module
stringlengths 21
82.9k
|
|---|
module rvdff_WIDTH7
(
din,
clk,
rst_l,
dout
);
input [6:0] din;
output [6:0] dout;
input clk;
input rst_l;
wire N0;
reg [6:0] dout;
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[6] <= 1'b0;
end else if(1'b1) begin
dout[6] <= din[6];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[5] <= 1'b0;
end else if(1'b1) begin
dout[5] <= din[5];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[4] <= 1'b0;
end else if(1'b1) begin
dout[4] <= din[4];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[3] <= 1'b0;
end else if(1'b1) begin
dout[3] <= din[3];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[2] <= 1'b0;
end else if(1'b1) begin
dout[2] <= din[2];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[1] <= 1'b0;
end else if(1'b1) begin
dout[1] <= din[1];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[0] <= 1'b0;
end else if(1'b1) begin
dout[0] <= din[0];
end
end
assign N0 = ~rst_l;
endmodule
|
module dec_dec_ctl
(
inst,
out_alu_,
out_rs1_,
out_rs2_,
out_imm12_,
out_rd_,
out_shimm5_,
out_imm20_,
out_pc_,
out_load_,
out_store_,
out_lsu_,
out_add_,
out_sub_,
out_land_,
out_lor_,
out_lxor_,
out_sll_,
out_sra_,
out_srl_,
out_slt_,
out_unsign_,
out_condbr_,
out_beq_,
out_bne_,
out_bge_,
out_blt_,
out_jal_,
out_by_,
out_half_,
out_word_,
out_csr_read_,
out_csr_clr_,
out_csr_set_,
out_csr_write_,
out_csr_imm_,
out_presync_,
out_postsync_,
out_ebreak_,
out_ecall_,
out_mret_,
out_mul_,
out_rs1_sign_,
out_rs2_sign_,
out_low_,
out_div_,
out_rem_,
out_fence_,
out_fence_i_,
out_pm_alu_,
out_legal_
);
input [31:0] inst;
output out_alu_;
output out_rs1_;
output out_rs2_;
output out_imm12_;
output out_rd_;
output out_shimm5_;
output out_imm20_;
output out_pc_;
output out_load_;
output out_store_;
output out_lsu_;
output out_add_;
output out_sub_;
output out_land_;
output out_lor_;
output out_lxor_;
output out_sll_;
output out_sra_;
output out_srl_;
output out_slt_;
output out_unsign_;
output out_condbr_;
output out_beq_;
output out_bne_;
output out_bge_;
output out_blt_;
output out_jal_;
output out_by_;
output out_half_;
output out_word_;
output out_csr_read_;
output out_csr_clr_;
output out_csr_set_;
output out_csr_write_;
output out_csr_imm_;
output out_presync_;
output out_postsync_;
output out_ebreak_;
output out_ecall_;
output out_mret_;
output out_mul_;
output out_rs1_sign_;
output out_rs2_sign_;
output out_low_;
output out_div_;
output out_rem_;
output out_fence_;
output out_fence_i_;
output out_pm_alu_;
output out_legal_;
wire out_alu_,out_rs1_,out_rs2_,out_imm12_,out_rd_,out_shimm5_,out_imm20_,out_pc_,
out_load_,out_store_,out_lsu_,out_add_,out_sub_,out_land_,out_lor_,out_lxor_,
out_sll_,out_sra_,out_srl_,out_slt_,out_unsign_,out_condbr_,out_beq_,out_bne_,
out_bge_,out_blt_,out_jal_,out_by_,out_half_,out_word_,out_csr_read_,out_csr_clr_,
out_csr_set_,out_csr_write_,out_csr_imm_,out_presync_,out_postsync_,out_ebreak_,
out_ecall_,out_mret_,out_mul_,out_rs1_sign_,out_rs2_sign_,out_low_,out_div_,out_rem_,
out_fence_,out_fence_i_,out_pm_alu_,out_legal_,N0,N1,N2,N3,N4,N5,N6,N7,N8,N9,N10,
N11,N12,N13,N14,N15,N16,N17,N18,N19,N20,N21,N22,N23,N24,N25,N26,N27,N28,N29,N30,
N31,N32,N33,N34,N35,N36,N37,N38,N39,N40,N41,N42,N43,N44,N45,N46,N47,N48,N49,N50,
N51,N52,N53,N54,N55,N56,N57,N58,N59,N60,N61,N62,N63,N64,N65,N66,N67,N68,N69,N70,
N71,N72,N73,N74,N75,N76,N77,N78,N79,N80,N81,N82,N83,N84,N85,N86,N87,N88,N89,N90,
N91,N92,N93,N94,N95,N96,N97,N98,N99,N100,N101,N102,N103,N104,N105,N106,N107,
N108,N109,N110,N111,N112,N113,N114,N115,N116,N117,N118,N119,N120,N121,N122,N123,
N124,N125,N126,N127,N128,N129,N130,N131,N132,N133,N134,N135,N136,N137,N138,N139,
N140,N141,N142,N143,N144,N145,N146,N147,N148,N149,N150,N151,N152,N153,N154,N155,
N156,N157,N158,N159,N160,N161,N162,N163,N164,N165,N166,N167,N168,N169,N170,N171,
N172,N173,N174,N175,N176,N177,N178,N179,N180,N181,N182,N183,N184,N185,N186,N187,
N188,N189,N190,N191,N192,N193,N194,N195,N196,N197,N198,N199,N200,N201,N202,N203,
N204,N205,N206,N207,N208,N209,N210,N211,N212,N213,N214,N215,N216,N217,N218,N219,
N220,N221,N222,N223,N224,N225,N226,N227,N228,N229,N230,N231,N232,N233,N234,N235,
N236,N237,N238,N239,N240,N241,N242,N243,N244,N245,N246,N247,N248,N249,N250,N251,
N252,N253,N254,N255,N256,N257,N258,N259,N260,N261,N262,N263,N264,N265,N266,N267,
N268,N269,N270,N271,N272,N273,N274,N275,N276,N277,N278,N279,N280,N281,N282,N283,
N284,N285,N286,N287,N288,N289,N290,N291,N292,N293,N294,N295,N296,N297,N298,N299,
N300,N301,N302,N303,N304,N305,N306,N307,N308,N309,N310,N311,N312,N313,N314,N315,
N316,N317,N318,N319,N320,N321,N322,N323,N324,N325,N326,N327,N328,N329,N330,N331,
N332,N333,N334,N335,N336,N337,N338,N339,N340,N341,N342,N343,N344,N345,N346,N347,
N348,N349,N350,N351,N352,N353,N354,N355,N356,N357,N358,N359,N360,N361,N362,N363,
N364,N365,N366,N367,N368,N369,N370,N371,N372,N373,N374,N375,N376,N377,N378,N379,
N380,N381,N382,N383,N384,N385,N386,N387,N388,N389,N390,N391,N392,N393,N394,N395,
N396,N397,N398,N399,N400,N401,N402,N403,N404,N405,N406,N407,N408,N409,N410,N411,
N412,N413,N414,N415,N416,N417,N418,N419,N420,N421,N422,N423,N424,N425,N426,N427,
N428,N429,N430,N431,N432,N433,N434,N435,N436,N437,N438,N439,N440,N441,N442,N443,
N444,N445,N446,N447,N448,N449,N450,N451,N452,N453,N454,N455,N456,N457,N458,N459,
N460,N461,N462,N463,N464,N465,N466,N467,N468,N469,N470,N471,N472,N473,N474,N475,
N476,N477,N478,N479,N480,N481,N482,N483,N484,N485,N486,N487,N488,N489,N490,N491,
N492,N493,N494,N495,N496,N497,N498,N499,N500,N501,N502,N503,N504,N505,N506,N507,
N508,N509,N510,N511,N512,N513,N514,N515,N516,N517,N518,N519,N520,N521,N522,N523,
N524,N525,N526,N527,N528,N529,N530,N531,N532,N533,N534,N535,N536,N537,N538,N539,
N540,N541,N542,N543,N544,N545,N546,N547,N548,N549,N550,N551,N552,N553,N554,N555,
N556,N557,N558,N559,N560,N561,N562,N563,N564,N565,N566,N567,N568,N569,N570,N571,
N572,N573,N574,N575,N576,N577,N578,N579,N580,N581,N582,N583,N584,N585,N586,N587,
N588,N589,N590,N591,N592,N593,N594,N595,N596,N597,N598,N599,N600,N601,N602,N603,
N604,N605,N606,N607,N608,N609,N610,N611,N612,N613,N614,N615,N616,N617,N618,N619,
N620,N621,N622,N623,N624,N625,N626,N627,N628,N629,N630,N631,N632,N633,N634,N635,
N636,N637,N638,N639,N640,N641,N642,N643,N644,N645,N646,N647,N648,N649,N650,N651,
N652,N653,N654,N655,N656,N657,N658,N659,N660,N661,N662,N663,N664,N665,N666,N667,
N668,N669,N670,N671,N672,N673,N674,N675,N676,N677,N678,N679,N680,N681,N682,N683,
N684,N685,N686,N687,N688,N689,N690,N691,N692,N693,N694,N695,N696,N697,N698,N699,
N700,N701,N702,N703,N704,N705,N706,N707,N708,N709,N710,N711,N712,N713,N714,N715,
N716,N717,N718,N719,N720,N721,N722,N723,N724,N725,N726;
assign out_alu_ = N32 | N34;
assign N32 = N29 | N31;
assign N29 = inst[2] | inst[6];
assign N31 = N30 & inst[4];
assign N30 = ~inst[25];
assign N34 = N33 & inst[4];
assign N33 = ~inst[5];
assign N0 = ~inst[13];
assign N1 = ~inst[2];
assign out_rs1_ = N71 | N73;
assign N71 = N67 | N70;
assign N67 = N64 | N66;
assign N64 = N61 | N63;
assign N61 = N58 | N60;
assign N58 = N55 | N57;
assign N55 = N52 | N54;
assign N52 = N49 | N51;
assign N49 = N46 | N48;
assign N46 = N43 | N45;
assign N43 = N40 | N42;
assign N40 = N37 | N39;
assign N37 = N36 & N1;
assign N36 = N35 & N0;
assign N35 = ~inst[14];
assign N39 = N38 & N1;
assign N38 = N0 & inst[11];
assign N42 = N41 & N1;
assign N41 = inst[19] & inst[13];
assign N45 = N44 & N1;
assign N44 = N0 & inst[10];
assign N48 = N47 & N1;
assign N47 = inst[18] & inst[13];
assign N51 = N50 & N1;
assign N50 = N0 & inst[9];
assign N54 = N53 & N1;
assign N53 = inst[17] & inst[13];
assign N57 = N56 & N1;
assign N56 = N0 & inst[8];
assign N60 = N59 & N1;
assign N59 = inst[16] & inst[13];
assign N63 = N62 & N1;
assign N62 = N0 & inst[7];
assign N66 = N65 & N1;
assign N65 = inst[15] & inst[13];
assign N70 = N68 & N69;
assign N68 = ~inst[4];
assign N69 = ~inst[3];
assign N73 = N72 & N1;
assign N72 = ~inst[6];
assign out_rs2_ = N75 | N77;
assign N75 = N74 & N1;
assign N74 = inst[5] & N68;
assign N77 = N76 & N1;
assign N76 = N72 & inst[5];
assign N2 = ~inst[12];
assign out_imm12_ = N87 | N90;
assign N87 = N83 | N86;
assign N83 = N79 | N82;
assign N79 = N78 & inst[2];
assign N78 = N68 & N69;
assign N82 = N81 & N1;
assign N81 = N80 & inst[4];
assign N80 = inst[13] & N33;
assign N86 = N85 & inst[4];
assign N85 = N84 & inst[6];
assign N84 = N0 & N2;
assign N90 = N89 & N1;
assign N89 = N88 & inst[4];
assign N88 = N2 & N33;
assign out_rd_ = N93 | inst[4];
assign N93 = N91 | N92;
assign N91 = N33 & N1;
assign N92 = inst[5] & inst[2];
assign out_shimm5_ = N96 & N1;
assign N96 = N95 & inst[4];
assign N95 = N94 & N33;
assign N94 = N0 & inst[12];
assign out_imm20_ = N97 | N98;
assign N97 = inst[5] & inst[3];
assign N98 = inst[4] & inst[2];
assign out_pc_ = N100 | N101;
assign N100 = N99 & inst[2];
assign N99 = N33 & N69;
assign N101 = inst[5] & inst[3];
assign out_load_ = N102 & N1;
assign N102 = N33 & N68;
assign out_store_ = N103 & N68;
assign N103 = N72 & inst[5];
assign out_lsu_ = N104 & N1;
assign N104 = N72 & N68;
assign out_add_ = N111 | N119;
assign N111 = N108 | N110;
assign N108 = N107 & inst[4];
assign N107 = N106 & N33;
assign N106 = N105 & N2;
assign N105 = N35 & N0;
assign N110 = N109 & inst[2];
assign N109 = N33 & N69;
assign N119 = N118 & N1;
assign N118 = N117 & inst[4];
assign N117 = N116 & N72;
assign N116 = N115 & N2;
assign N115 = N114 & N0;
assign N114 = N113 & N35;
assign N113 = N112 & N30;
assign N112 = ~inst[30];
assign out_sub_ = N135 | N137;
assign N135 = N130 | N134;
assign N130 = N124 | N129;
assign N124 = N123 & N1;
assign N123 = N122 & inst[4];
assign N122 = N121 & inst[5];
assign N121 = N120 & N72;
assign N120 = inst[30] & N2;
assign N129 = N128 & N1;
assign N128 = N127 & inst[4];
assign N127 = N126 & N72;
assign N126 = N125 & inst[13];
assign N125 = N30 & N35;
assign N134 = N133 & N1;
assign N133 = N132 & inst[4];
assign N132 = N131 & N33;
assign N131 = N35 & inst[13];
assign N137 = N136 & N1;
assign N136 = inst[6] & N68;
assign out_land_ = N141 | N146;
assign N141 = N140 & N1;
assign N140 = N139 & N33;
assign N139 = N138 & inst[12];
assign N138 = inst[14] & inst[13];
assign N146 = N145 & N1;
assign N145 = N144 & N72;
assign N144 = N143 & inst[12];
assign N143 = N142 & inst[13];
assign N142 = N30 & inst[14];
assign out_lor_ = N179 | N181;
assign N179 = N176 | N178;
assign N176 = N173 | N175;
assign N173 = N170 | N172;
assign N170 = N167 | N169;
assign N167 = N162 | N166;
assign N162 = N159 | N161;
assign N159 = N156 | N158;
assign N156 = N153 | N155;
assign N153 = N147 | N152;
assign N147 = N72 & inst[3];
assign N152 = N151 & N1;
assign N151 = N150 & inst[4];
assign N150 = N149 & N2;
assign N149 = N148 & inst[13];
assign N148 = N30 & inst[14];
assign N155 = N154 & inst[2];
assign N154 = inst[5] & inst[4];
assign N158 = N157 & inst[4];
assign N157 = N2 & inst[6];
assign N161 = N160 & inst[4];
assign N160 = inst[13] & inst[6];
assign N166 = N165 & N1;
assign N165 = N164 & N33;
assign N164 = N163 & N2;
assign N163 = inst[14] & inst[13];
assign N169 = N168 & inst[4];
assign N168 = inst[7] & inst[6];
assign N172 = N171 & inst[4];
assign N171 = inst[8] & inst[6];
assign N175 = N174 & inst[4];
assign N174 = inst[9] & inst[6];
assign N178 = N177 & inst[4];
assign N177 = inst[10] & inst[6];
assign N181 = N180 & inst[4];
assign N180 = inst[11] & inst[6];
assign out_lxor_ = N186 | N191;
assign N186 = N185 & N1;
assign N185 = N184 & inst[4];
assign N184 = N183 & N2;
assign N183 = N182 & N0;
assign N182 = N30 & inst[14];
assign N191 = N190 & N1;
assign N190 = N189 & inst[4];
assign N189 = N188 & N33;
assign N188 = N187 & N2;
assign N187 = inst[14] & N0;
assign out_sll_ = N196 & N1;
assign N196 = N195 & inst[4];
assign N195 = N194 & N72;
assign N194 = N193 & inst[12];
assign N193 = N192 & N0;
assign N192 = N30 & N35;
assign out_sra_ = N200 & N1;
assign N200 = N199 & inst[4];
assign N199 = N198 & N72;
assign N198 = N197 & inst[12];
assign N197 = inst[30] & N0;
assign out_srl_ = N206 & N1;
assign N206 = N205 & inst[4];
assign N205 = N204 & N72;
assign N204 = N203 & inst[12];
assign N203 = N202 & N0;
assign N202 = N201 & inst[14];
assign N201 = N112 & N30;
assign out_slt_ = N211 | N215;
assign N211 = N210 & N1;
assign N210 = N209 & inst[4];
assign N209 = N208 & N72;
assign N208 = N207 & inst[13];
assign N207 = N30 & N35;
assign N215 = N214 & N1;
assign N214 = N213 & inst[4];
assign N213 = N212 & N33;
assign N212 = N35 & inst[13];
assign out_unsign_ = N232 | N237;
assign N232 = N226 | N231;
assign N226 = N223 | N225;
assign N223 = N219 | N222;
assign N219 = N218 & N1;
assign N218 = N217 & N33;
assign N217 = N216 & inst[12];
assign N216 = N35 & inst[13];
assign N222 = N221 & N1;
assign N221 = N220 & N68;
assign N220 = inst[13] & inst[6];
assign N225 = N224 & N68;
assign N224 = inst[14] & N33;
assign N231 = N230 & N1;
assign N230 = N229 & N72;
assign N229 = N228 & inst[12];
assign N228 = N227 & inst[13];
assign N227 = N30 & N35;
assign N237 = N236 & N1;
assign N236 = N235 & inst[5];
assign N235 = N234 & N72;
assign N234 = N233 & inst[12];
assign N233 = inst[25] & inst[14];
assign out_condbr_ = N238 & N1;
assign N238 = inst[6] & N68;
assign out_beq_ = N241 & N1;
assign N241 = N240 & N68;
assign N240 = N239 & inst[6];
assign N239 = N35 & N2;
assign out_bne_ = N244 & N1;
assign N244 = N243 & N68;
assign N243 = N242 & inst[6];
assign N242 = N35 & inst[12];
assign out_bge_ = N247 & N1;
assign N247 = N246 & N68;
assign N246 = N245 & inst[5];
assign N245 = inst[14] & inst[12];
assign out_blt_ = N250 & N1;
assign N250 = N249 & N68;
assign N249 = N248 & inst[5];
assign N248 = inst[14] & N2;
assign out_jal_ = inst[6] & inst[2];
assign out_by_ = N253 & N1;
assign N253 = N252 & N68;
assign N252 = N251 & N72;
assign N251 = N0 & N2;
assign out_half_ = N255 & N1;
assign N255 = N254 & N68;
assign N254 = inst[12] & N72;
assign out_word_ = N256 & N68;
assign N256 = inst[13] & N72;
assign out_csr_read_ = N270 | N272;
assign N270 = N267 | N269;
assign N267 = N264 | N266;
assign N264 = N261 | N263;
assign N261 = N258 | N260;
assign N258 = N257 & inst[4];
assign N257 = inst[13] & inst[6];
assign N260 = N259 & inst[4];
assign N259 = inst[7] & inst[6];
assign N263 = N262 & inst[4];
assign N262 = inst[8] & inst[6];
assign N266 = N265 & inst[4];
assign N265 = inst[9] & inst[6];
assign N269 = N268 & inst[4];
assign N268 = inst[10] & inst[6];
assign N272 = N271 & inst[4];
assign N271 = inst[11] & inst[6];
assign out_csr_clr_ = N291 | N295;
assign N291 = N286 | N290;
assign N286 = N281 | N285;
assign N281 = N276 | N280;
assign N276 = N275 & inst[4];
assign N275 = N274 & inst[6];
assign N274 = N273 & inst[12];
assign N273 = inst[15] & inst[13];
assign N280 = N279 & inst[4];
assign N279 = N278 & inst[6];
assign N278 = N277 & inst[12];
assign N277 = inst[16] & inst[13];
assign N285 = N284 & inst[4];
assign N284 = N283 & inst[6];
assign N283 = N282 & inst[12];
assign N282 = inst[17] & inst[13];
assign N290 = N289 & inst[4];
assign N289 = N288 & inst[6];
assign N288 = N287 & inst[12];
assign N287 = inst[18] & inst[13];
assign N295 = N294 & inst[4];
assign N294 = N293 & inst[6];
assign N293 = N292 & inst[12];
assign N292 = inst[19] & inst[13];
assign out_csr_set_ = N310 | N313;
assign N310 = N306 | N309;
assign N306 = N302 | N305;
assign N302 = N298 | N301;
assign N298 = N297 & inst[4];
assign N297 = N296 & inst[6];
assign N296 = inst[15] & N2;
assign N301 = N300 & inst[4];
assign N300 = N299 & inst[6];
assign N299 = inst[16] & N2;
assign N305 = N304 & inst[4];
assign N304 = N303 & inst[6];
assign N303 = inst[17] & N2;
assign N309 = N308 & inst[4];
assign N308 = N307 & inst[6];
assign N307 = inst[18] & N2;
assign N313 = N312 & inst[4];
assign N312 = N311 & inst[6];
assign N311 = inst[19] & N2;
assign out_csr_write_ = N315 & inst[4];
assign N315 = N314 & inst[6];
assign N314 = N0 & inst[12];
assign out_csr_imm_ = N334 | N337;
assign N334 = N330 | N333;
assign N330 = N326 | N329;
assign N326 = N322 | N325;
assign N322 = N318 | N321;
assign N318 = N317 & inst[4];
assign N317 = N316 & inst[6];
assign N316 = inst[14] & N0;
assign N321 = N320 & inst[4];
assign N320 = N319 & inst[6];
assign N319 = inst[15] & inst[14];
assign N325 = N324 & inst[4];
assign N324 = N323 & inst[6];
assign N323 = inst[16] & inst[14];
assign N329 = N328 & inst[4];
assign N328 = N327 & inst[6];
assign N327 = inst[17] & inst[14];
assign N333 = N332 & inst[4];
assign N332 = N331 & inst[6];
assign N331 = inst[18] & inst[14];
assign N337 = N336 & inst[4];
assign N336 = N335 & inst[6];
assign N335 = inst[19] & inst[14];
assign out_presync_ = N379 | N382;
assign N379 = N375 | N378;
assign N375 = N371 | N374;
assign N371 = N367 | N370;
assign N367 = N363 | N366;
assign N363 = N359 | N362;
assign N359 = N355 | N358;
assign N355 = N351 | N354;
assign N351 = N347 | N350;
assign N347 = N343 | N346;
assign N343 = N338 | N342;
assign N338 = N33 & inst[3];
assign N342 = N341 & N1;
assign N341 = N340 & inst[5];
assign N340 = N339 & N72;
assign N339 = inst[25] & inst[14];
assign N346 = N345 & inst[4];
assign N345 = N344 & inst[6];
assign N344 = N0 & inst[7];
assign N350 = N349 & inst[4];
assign N349 = N348 & inst[6];
assign N348 = N0 & inst[8];
assign N354 = N353 & inst[4];
assign N353 = N352 & inst[6];
assign N352 = N0 & inst[9];
assign N358 = N357 & inst[4];
assign N357 = N356 & inst[6];
assign N356 = N0 & inst[10];
assign N362 = N361 & inst[4];
assign N361 = N360 & inst[6];
assign N360 = N0 & inst[11];
assign N366 = N365 & inst[4];
assign N365 = N364 & inst[6];
assign N364 = inst[15] & inst[13];
assign N370 = N369 & inst[4];
assign N369 = N368 & inst[6];
assign N368 = inst[16] & inst[13];
assign N374 = N373 & inst[4];
assign N373 = N372 & inst[6];
assign N372 = inst[17] & inst[13];
assign N378 = N377 & inst[4];
assign N377 = N376 & inst[6];
assign N376 = inst[18] & inst[13];
assign N382 = N381 & inst[4];
assign N381 = N380 & inst[6];
assign N380 = inst[19] & inst[13];
assign out_postsync_ = N431 | N434;
assign N431 = N427 | N430;
assign N427 = N423 | N426;
assign N423 = N419 | N422;
assign N419 = N415 | N418;
assign N415 = N411 | N414;
assign N411 = N407 | N410;
assign N407 = N403 | N406;
assign N403 = N399 | N402;
assign N399 = N395 | N398;
assign N395 = N390 | N394;
assign N390 = N384 | N389;
assign N384 = N383 & inst[3];
assign N383 = inst[12] & N33;
assign N389 = N388 & inst[4];
assign N388 = N387 & inst[6];
assign N387 = N386 & N2;
assign N386 = N385 & N0;
assign N385 = ~inst[22];
assign N394 = N393 & N1;
assign N393 = N392 & inst[5];
assign N392 = N391 & N72;
assign N391 = inst[25] & inst[14];
assign N398 = N397 & inst[4];
assign N397 = N396 & inst[6];
assign N396 = N0 & inst[7];
assign N402 = N401 & inst[4];
assign N401 = N400 & inst[6];
assign N400 = N0 & inst[8];
assign N406 = N405 & inst[4];
assign N405 = N404 & inst[6];
assign N404 = N0 & inst[9];
assign N410 = N409 & inst[4];
assign N409 = N408 & inst[6];
assign N408 = N0 & inst[10];
assign N414 = N413 & inst[4];
assign N413 = N412 & inst[6];
assign N412 = N0 & inst[11];
assign N418 = N417 & inst[4];
assign N417 = N416 & inst[6];
assign N416 = inst[15] & inst[13];
assign N422 = N421 & inst[4];
assign N421 = N420 & inst[6];
assign N420 = inst[16] & inst[13];
assign N426 = N425 & inst[4];
assign N425 = N424 & inst[6];
assign N424 = inst[17] & inst[13];
assign N430 = N429 & inst[4];
assign N429 = N428 & inst[6];
assign N428 = inst[18] & inst[13];
assign N434 = N433 & inst[4];
assign N433 = N432 & inst[6];
assign N432 = inst[19] & inst[13];
assign out_ebreak_ = N438 & inst[4];
assign N438 = N437 & inst[6];
assign N437 = N436 & N2;
assign N436 = N435 & N0;
assign N435 = N385 & inst[20];
assign out_ecall_ = N444 & inst[4];
assign N444 = N443 & inst[6];
assign N443 = N442 & N2;
assign N442 = N441 & N0;
assign N441 = N439 & N440;
assign N439 = ~inst[21];
assign N440 = ~inst[20];
assign out_mret_ = N447 & inst[4];
assign N447 = N446 & inst[6];
assign N446 = N445 & N2;
assign N445 = inst[29] & N0;
assign out_mul_ = N451 & N1;
assign N451 = N450 & inst[4];
assign N450 = N449 & inst[5];
assign N449 = N448 & N72;
assign N448 = inst[25] & N35;
assign N3 = inst[25] & N35;
assign out_rs1_sign_ = N457 | N462;
assign N457 = N456 & N1;
assign N456 = N455 & inst[4];
assign N455 = N454 & inst[5];
assign N454 = N453 & N72;
assign N453 = N452 & N2;
assign N452 = N3 & inst[13];
assign N462 = N461 & N1;
assign N461 = N460 & inst[4];
assign N460 = N459 & N72;
assign N459 = N458 & inst[12];
assign N458 = N3 & N0;
assign out_rs2_sign_ = N467 & N1;
assign N467 = N466 & inst[4];
assign N466 = N465 & N72;
assign N465 = N464 & inst[12];
assign N464 = N463 & N0;
assign N463 = inst[25] & N35;
assign out_low_ = N472 & N1;
assign N472 = N471 & inst[4];
assign N471 = N470 & inst[5];
assign N470 = N469 & N2;
assign N469 = N468 & N0;
assign N468 = inst[25] & N35;
assign out_div_ = N475 & N1;
assign N475 = N474 & inst[5];
assign N474 = N473 & N72;
assign N473 = inst[25] & inst[14];
assign out_rem_ = N479 & N1;
assign N479 = N478 & inst[5];
assign N478 = N477 & N72;
assign N477 = N476 & inst[13];
assign N476 = inst[25] & inst[14];
assign out_fence_ = N33 & inst[3];
assign out_fence_i_ = N480 & inst[3];
assign N480 = inst[12] & N33;
assign out_pm_alu_ = N489 | N490;
assign N489 = N486 | N488;
assign N486 = N484 | N485;
assign N484 = N483 & inst[4];
assign N483 = N482 & N2;
assign N482 = N481 & N0;
assign N481 = inst[28] & inst[22];
assign N485 = inst[4] & inst[2];
assign N488 = N487 & inst[4];
assign N487 = N30 & N72;
assign N490 = N33 & inst[4];
assign N4 = ~inst[31];
assign N5 = N4 & N112;
assign N6 = ~inst[27];
assign N7 = ~inst[26];
assign N8 = ~inst[24];
assign N9 = ~inst[23];
assign N10 = ~inst[19];
assign N11 = ~inst[18];
assign N12 = ~inst[17];
assign N13 = ~inst[16];
assign N14 = ~inst[15];
assign N15 = ~inst[11];
assign N16 = ~inst[10];
assign N17 = ~inst[9];
assign N18 = ~inst[8];
assign N19 = ~inst[7];
assign N20 = ~inst[29];
assign N21 = N5 & N20;
assign N22 = ~inst[28];
assign N23 = N21 & N22;
assign N24 = N491 & N7;
assign N491 = N23 & N6;
assign N25 = N24 & N30;
assign N26 = N494 & N439;
assign N494 = N493 & N385;
assign N493 = N492 & N9;
assign N492 = N25 & N8;
assign N27 = N498 & N30;
assign N498 = N497 & N7;
assign N497 = N496 & N6;
assign N496 = N495 & N22;
assign N495 = N4 & N20;
assign N28 = N35 & N0;
assign out_legal_ = N721 | N726;
assign N721 = N713 | N720;
assign N713 = N706 | N712;
assign N706 = N699 | N705;
assign N699 = N691 | N698;
assign N691 = N683 | N690;
assign N683 = N662 | N682;
assign N662 = N641 | N661;
assign N641 = N633 | N640;
assign N633 = N626 | N632;
assign N626 = N619 | N625;
assign N619 = N611 | N618;
assign N611 = N603 | N610;
assign N603 = N596 | N602;
assign N596 = N587 | N595;
assign N587 = N578 | N586;
assign N578 = N572 | N577;
assign N572 = N554 | N571;
assign N554 = N526 | N553;
assign N526 = N525 & inst[0];
assign N525 = N524 & inst[1];
assign N524 = N523 & N1;
assign N523 = N522 & N69;
assign N522 = N521 & inst[4];
assign N521 = N520 & inst[5];
assign N520 = N519 & inst[6];
assign N519 = N518 & N19;
assign N518 = N517 & N18;
assign N517 = N516 & N17;
assign N516 = N515 & N16;
assign N515 = N514 & N15;
assign N514 = N513 & N35;
assign N513 = N512 & N14;
assign N512 = N511 & N13;
assign N511 = N510 & N12;
assign N510 = N509 & N11;
assign N509 = N508 & N10;
assign N508 = N507 & N440;
assign N507 = N506 & inst[21];
assign N506 = N505 & N385;
assign N505 = N504 & N9;
assign N504 = N503 & N8;
assign N503 = N502 & N30;
assign N502 = N501 & N7;
assign N501 = N500 & N6;
assign N500 = N499 & inst[28];
assign N499 = N5 & inst[29];
assign N553 = N552 & inst[0];
assign N552 = N551 & inst[1];
assign N551 = N550 & N1;
assign N550 = N549 & N69;
assign N549 = N548 & inst[4];
assign N548 = N547 & inst[5];
assign N547 = N546 & inst[6];
assign N546 = N545 & N19;
assign N545 = N544 & N18;
assign N544 = N543 & N17;
assign N543 = N542 & N16;
assign N542 = N541 & N15;
assign N541 = N540 & N35;
assign N540 = N539 & N14;
assign N539 = N538 & N13;
assign N538 = N537 & N12;
assign N537 = N536 & N11;
assign N536 = N535 & N10;
assign N535 = N534 & inst[20];
assign N534 = N533 & N439;
assign N533 = N532 & inst[22];
assign N532 = N531 & N9;
assign N531 = N530 & N8;
assign N530 = N529 & N30;
assign N529 = N528 & N7;
assign N528 = N527 & N6;
assign N527 = N21 & inst[28];
assign N571 = N570 & inst[0];
assign N570 = N569 & inst[1];
assign N569 = N568 & N1;
assign N568 = N567 & N69;
assign N567 = N566 & inst[4];
assign N566 = N565 & inst[5];
assign N565 = N564 & N19;
assign N564 = N563 & N18;
assign N563 = N562 & N17;
assign N562 = N561 & N16;
assign N561 = N560 & N15;
assign N560 = N559 & N35;
assign N559 = N558 & N14;
assign N558 = N557 & N13;
assign N557 = N556 & N12;
assign N556 = N555 & N11;
assign N555 = N26 & N10;
assign N577 = N576 & inst[0];
assign N576 = N575 & inst[1];
assign N575 = N574 & N69;
assign N574 = N573 & inst[4];
assign N573 = N25 & N72;
assign N586 = N585 & inst[0];
assign N585 = N584 & inst[1];
assign N584 = N583 & N1;
assign N583 = N582 & N69;
assign N582 = N581 & N72;
assign N581 = N580 & N2;
assign N580 = N579 & N0;
assign N579 = N27 & N35;
assign N595 = N594 & inst[0];
assign N594 = N593 & inst[1];
assign N593 = N592 & N69;
assign N592 = N591 & inst[4];
assign N591 = N590 & N72;
assign N590 = N589 & inst[12];
assign N589 = N588 & N0;
assign N588 = N27 & inst[14];
assign N602 = N601 & inst[0];
assign N601 = N600 & inst[1];
assign N600 = N599 & N69;
assign N599 = N598 & inst[4];
assign N598 = N597 & inst[5];
assign N597 = N24 & N72;
assign N610 = N609 & inst[0];
assign N609 = N608 & inst[1];
assign N608 = N607 & N69;
assign N607 = N606 & N68;
assign N606 = N605 & inst[5];
assign N605 = N604 & inst[6];
assign N604 = N28 & N2;
assign N618 = N617 & inst[0];
assign N617 = N616 & inst[1];
assign N616 = N615 & N1;
assign N615 = N614 & N69;
assign N614 = N613 & N68;
assign N613 = N612 & inst[5];
assign N612 = inst[14] & inst[6];
assign N625 = N624 & inst[0];
assign N624 = N623 & inst[1];
assign N623 = N622 & N69;
assign N622 = N621 & inst[4];
assign N621 = N620 & N33;
assign N620 = N2 & N72;
assign N632 = N631 & inst[0];
assign N631 = N630 & inst[1];
assign N630 = N629 & N1;
assign N629 = N628 & N69;
assign N628 = N627 & N68;
assign N627 = N28 & inst[5];
assign N640 = N639 & inst[0];
assign N639 = N638 & inst[1];
assign N638 = N637 & N1;
assign N637 = N636 & N69;
assign N636 = N635 & inst[4];
assign N635 = N634 & inst[5];
assign N634 = inst[12] & inst[6];
assign N661 = N660 & inst[0];
assign N660 = N659 & inst[1];
assign N659 = N658 & inst[2];
assign N658 = N657 & inst[3];
assign N657 = N656 & N68;
assign N656 = N655 & N33;
assign N655 = N654 & N72;
assign N654 = N653 & N19;
assign N653 = N652 & N18;
assign N652 = N651 & N17;
assign N651 = N650 & N16;
assign N650 = N649 & N15;
assign N649 = N648 & N0;
assign N648 = N647 & N35;
assign N647 = N646 & N14;
assign N646 = N645 & N13;
assign N645 = N644 & N12;
assign N644 = N643 & N11;
assign N643 = N642 & N10;
assign N642 = N26 & N440;
assign N682 = N681 & inst[0];
assign N681 = N680 & inst[1];
assign N680 = N679 & inst[2];
assign N679 = N678 & inst[3];
assign N678 = N677 & N68;
assign N677 = N676 & N33;
assign N676 = N675 & N72;
assign N675 = N674 & N19;
assign N674 = N673 & N18;
assign N673 = N672 & N17;
assign N672 = N671 & N16;
assign N671 = N670 & N15;
assign N670 = N669 & N2;
assign N669 = N668 & N0;
assign N668 = N667 & N35;
assign N667 = N666 & N14;
assign N666 = N665 & N13;
assign N665 = N664 & N12;
assign N664 = N663 & N11;
assign N663 = N23 & N10;
assign N690 = N689 & inst[0];
assign N689 = N688 & inst[1];
assign N688 = N687 & N1;
assign N687 = N686 & N69;
assign N686 = N685 & inst[4];
assign N685 = N684 & inst[5];
assign N684 = inst[13] & inst[6];
assign N698 = N697 & inst[0];
assign N697 = N696 & inst[1];
assign N696 = N695 & N1;
assign N695 = N694 & N69;
assign N694 = N693 & N68;
assign N693 = N692 & N33;
assign N692 = N0 & N72;
assign N705 = N704 & inst[0];
assign N704 = N703 & inst[1];
assign N703 = N702 & inst[2];
assign N702 = N701 & inst[3];
assign N701 = N700 & N68;
assign N700 = inst[6] & inst[5];
assign N712 = N711 & inst[0];
assign N711 = N710 & inst[1];
assign N710 = N709 & N69;
assign N709 = N708 & inst[4];
assign N708 = N707 & N33;
assign N707 = inst[13] & N72;
assign N720 = N719 & inst[0];
assign N719 = N718 & inst[1];
assign N718 = N717 & N1;
assign N717 = N716 & N69;
assign N716 = N715 & N68;
assign N715 = N714 & N72;
assign N714 = N35 & N2;
assign N726 = N725 & inst[0];
assign N725 = N724 & inst[1];
assign N724 = N723 & inst[2];
assign N723 = N722 & N69;
assign N722 = N72 & inst[4];
endmodule
|
module rvecc_decode
(
en,
din,
ecc_in,
sed_ded,
dout,
ecc_out,
single_ecc_error,
double_ecc_error
);
input [31:0] din;
input [6:0] ecc_in;
output [31:0] dout;
output [6:0] ecc_out;
input en;
input sed_ded;
output single_ecc_error;
output double_ecc_error;
wire [31:0] dout;
wire [6:0] ecc_out,ecc_check;
wire single_ecc_error,double_ecc_error,N0,N1,N2,N3,N4,N5,N6,N7,N8,N9,N10,N11,N12,N13,
N14,N15,N16,N17,N18,N19,N20,N21,N22,N23,N24,N25,N26,N27,N28,N29,N30,N31,N32,N33,
N34,N35,N36,N37,N38,N39,N40,N41,N42,N43,N44,N45,N46,N47,N48,N49,N50,N51,N52,N53,
N54,N55,N56,N57,N58,N59,N60,N61,N62,N63,N64,N65,N66,N67,N68,N69,N70,N71,N72,N73,
N74,N75,N76,N77,N78,N79,N80,N81,N82,N83,N84,N85,N86,N87,N88,N89,N90,N91,N92,N93,
N94,N95,N96,N97,N98,N99,N100,N101,N102,N103,N104,N105,N106,N107,N108,N109,N110,
N111,N112,N113,N114,N115,N116,N117,N118,N119,N120,N121,N122,N123,N124,N125,N126,
N127,N128,N129,N130,N131,N132,N133,N134,N135,N136,N137,N138,N139,N140,N141,N142,
N143,N144,N145,N146,N147,N148,N149,N150,N151,N152,N153,N154,N155,N156,N157,N158,
N159,N160,N161,N162,N163,N164,N165,N166,N167,N168,N169,N170,N171,N172,N173,N174,
N175,N176,N177,N178,N179,N180,N181,N182,N183,N184,N185,N186,N187,N188,N189,N190,
N191,N192,N193,N194,N195,N196,N197,N198,N199,N200,N201,N202,N203,N204,N205,N206,
N207,N208,N209,N210,N211,N212,N213,N214,N215,N216,N217,N218,N219,N220,N221,N222,
N223,N224,N225,N226,N227,N228,N229,N230,N231,N232,N233,N234,N235,N236,N237,N238,
N239,N240,N241,N242,N243,N244,N245,N246,N247,N248,N249,N250,N251,N252,N253,N254,
N255,N256,N257,N258,N259,N260,N261,N262,N263,N264,N265,N266,N267,N268,N269,N270,
N271,N272,N273,N274,N275,N276,N277,N278,N279,N280,N281,N282,N283,N284,N285,N286,
N287,N288,N289,N290,N291,N292,N293,N294,N295,N296,N297,N298,N299,N300,N301,N302,
N303,N304,N305,N306,N307,N308,N309,N310,N311,N312,N313,N314,N315,N316,N317,N318,
N319,N320,N321,N322,N323,N324,N325,N326,N327,N328,N329,N330,N331,N332,N333,N334,
N335,N336,N337,N338,N339,N340,N341,N342,N343,N344,N345,N346,N347,N348,N349,N350,
N351,N352,N353,N354,N355,N356,N357,N358,N359,N360,N361,N362,N363,N364,N365,N366,
N367,N368,N369,N370,N371,N372,N373,N374,N375,N376,N377,N378,N379,N380,N381,N382,
N383,N384,N385,N386,N387,N388,N389,N390,N391,N392,N393,N394,N395,N396,N397,N398,
N399,N400,N401,N402,N403,N404,N405,N406,N407,N408,N409,N410,N411,N412,N413,N414,
N415,N416,N417,N418,N419,N420,N421,N422,N423,N424,N425,N426;
wire [38:38] dout_plus_parity;
assign N42 = ~ecc_check[6];
assign N43 = ecc_check[5] | N42;
assign N44 = ecc_check[4] | N43;
assign N45 = ecc_check[3] | N44;
assign N46 = ecc_check[2] | N45;
assign N47 = ecc_check[1] | N46;
assign N48 = ecc_check[0] | N47;
assign N49 = ~N48;
assign N50 = ecc_check[5] | ecc_check[6];
assign N51 = ecc_check[4] | N50;
assign N52 = ecc_check[3] | N51;
assign N53 = ecc_check[2] | N52;
assign N54 = ecc_check[1] | N53;
assign N55 = ecc_check[0] | N54;
assign N56 = ~ecc_check[5];
assign N57 = ~ecc_check[2];
assign N58 = ~ecc_check[1];
assign N59 = ecc_check[4] | N56;
assign N60 = ecc_check[3] | N59;
assign N61 = N57 | N60;
assign N62 = N58 | N61;
assign N63 = ecc_check[0] | N62;
assign N64 = ~N63;
assign N65 = ~ecc_check[0];
assign N66 = ecc_check[4] | N56;
assign N67 = ecc_check[3] | N66;
assign N68 = N57 | N67;
assign N69 = ecc_check[1] | N68;
assign N70 = N65 | N69;
assign N71 = ~N70;
assign N72 = ecc_check[4] | N56;
assign N73 = ecc_check[3] | N72;
assign N74 = N57 | N73;
assign N75 = ecc_check[1] | N74;
assign N76 = ecc_check[0] | N75;
assign N77 = ~N76;
assign N78 = ecc_check[4] | N56;
assign N79 = ecc_check[3] | N78;
assign N80 = ecc_check[2] | N79;
assign N81 = N58 | N80;
assign N82 = N65 | N81;
assign N83 = ~N82;
assign N84 = ecc_check[4] | N56;
assign N85 = ecc_check[3] | N84;
assign N86 = ecc_check[2] | N85;
assign N87 = N58 | N86;
assign N88 = ecc_check[0] | N87;
assign N89 = ~N88;
assign N90 = ecc_check[4] | N56;
assign N91 = ecc_check[3] | N90;
assign N92 = ecc_check[2] | N91;
assign N93 = ecc_check[1] | N92;
assign N94 = N65 | N93;
assign N95 = ~N94;
assign N96 = ~ecc_check[4];
assign N97 = ~ecc_check[3];
assign N98 = N96 | ecc_check[5];
assign N99 = N97 | N98;
assign N100 = N57 | N99;
assign N101 = N58 | N100;
assign N102 = N65 | N101;
assign N103 = ~N102;
assign N104 = N96 | ecc_check[5];
assign N105 = N97 | N104;
assign N106 = N57 | N105;
assign N107 = N58 | N106;
assign N108 = ecc_check[0] | N107;
assign N109 = ~N108;
assign N110 = N96 | ecc_check[5];
assign N111 = N97 | N110;
assign N112 = N57 | N111;
assign N113 = ecc_check[1] | N112;
assign N114 = N65 | N113;
assign N115 = ~N114;
assign N116 = N96 | ecc_check[5];
assign N117 = N97 | N116;
assign N118 = N57 | N117;
assign N119 = ecc_check[1] | N118;
assign N120 = ecc_check[0] | N119;
assign N121 = ~N120;
assign N122 = N96 | ecc_check[5];
assign N123 = N97 | N122;
assign N124 = ecc_check[2] | N123;
assign N125 = N58 | N124;
assign N126 = N65 | N125;
assign N127 = ~N126;
assign N128 = N96 | ecc_check[5];
assign N129 = N97 | N128;
assign N130 = ecc_check[2] | N129;
assign N131 = N58 | N130;
assign N132 = ecc_check[0] | N131;
assign N133 = ~N132;
assign N134 = N96 | ecc_check[5];
assign N135 = N97 | N134;
assign N136 = ecc_check[2] | N135;
assign N137 = ecc_check[1] | N136;
assign N138 = N65 | N137;
assign N139 = ~N138;
assign N140 = N96 | ecc_check[5];
assign N141 = N97 | N140;
assign N142 = ecc_check[2] | N141;
assign N143 = ecc_check[1] | N142;
assign N144 = ecc_check[0] | N143;
assign N145 = ~N144;
assign N146 = N96 | ecc_check[5];
assign N147 = ecc_check[3] | N146;
assign N148 = N57 | N147;
assign N149 = N58 | N148;
assign N150 = N65 | N149;
assign N151 = ~N150;
assign N152 = N96 | ecc_check[5];
assign N153 = ecc_check[3] | N152;
assign N154 = N57 | N153;
assign N155 = N58 | N154;
assign N156 = ecc_check[0] | N155;
assign N157 = ~N156;
assign N158 = N96 | ecc_check[5];
assign N159 = ecc_check[3] | N158;
assign N160 = N57 | N159;
assign N161 = ecc_check[1] | N160;
assign N162 = N65 | N161;
assign N163 = ~N162;
assign N164 = N96 | ecc_check[5];
assign N165 = ecc_check[3] | N164;
assign N166 = N57 | N165;
assign N167 = ecc_check[1] | N166;
assign N168 = ecc_check[0] | N167;
assign N169 = ~N168;
assign N170 = N96 | ecc_check[5];
assign N171 = ecc_check[3] | N170;
assign N172 = ecc_check[2] | N171;
assign N173 = N58 | N172;
assign N174 = N65 | N173;
assign N175 = ~N174;
assign N176 = N96 | ecc_check[5];
assign N177 = ecc_check[3] | N176;
assign N178 = ecc_check[2] | N177;
assign N179 = N58 | N178;
assign N180 = ecc_check[0] | N179;
assign N181 = ~N180;
assign N182 = N96 | ecc_check[5];
assign N183 = ecc_check[3] | N182;
assign N184 = ecc_check[2] | N183;
assign N185 = ecc_check[1] | N184;
assign N186 = N65 | N185;
assign N187 = ~N186;
assign N188 = ecc_check[4] | ecc_check[5];
assign N189 = N97 | N188;
assign N190 = N57 | N189;
assign N191 = N58 | N190;
assign N192 = N65 | N191;
assign N193 = ~N192;
assign N194 = ecc_check[4] | ecc_check[5];
assign N195 = N97 | N194;
assign N196 = N57 | N195;
assign N197 = N58 | N196;
assign N198 = ecc_check[0] | N197;
assign N199 = ~N198;
assign N200 = ecc_check[4] | ecc_check[5];
assign N201 = N97 | N200;
assign N202 = N57 | N201;
assign N203 = ecc_check[1] | N202;
assign N204 = N65 | N203;
assign N205 = ~N204;
assign N206 = ecc_check[4] | ecc_check[5];
assign N207 = N97 | N206;
assign N208 = N57 | N207;
assign N209 = ecc_check[1] | N208;
assign N210 = ecc_check[0] | N209;
assign N211 = ~N210;
assign N212 = ecc_check[4] | ecc_check[5];
assign N213 = N97 | N212;
assign N214 = ecc_check[2] | N213;
assign N215 = N58 | N214;
assign N216 = N65 | N215;
assign N217 = ~N216;
assign N218 = ecc_check[4] | ecc_check[5];
assign N219 = N97 | N218;
assign N220 = ecc_check[2] | N219;
assign N221 = N58 | N220;
assign N222 = ecc_check[0] | N221;
assign N223 = ~N222;
assign N224 = ecc_check[4] | ecc_check[5];
assign N225 = N97 | N224;
assign N226 = ecc_check[2] | N225;
assign N227 = ecc_check[1] | N226;
assign N228 = N65 | N227;
assign N229 = ~N228;
assign N230 = ecc_check[4] | ecc_check[5];
assign N231 = ecc_check[3] | N230;
assign N232 = N57 | N231;
assign N233 = N58 | N232;
assign N234 = N65 | N233;
assign N235 = ~N234;
assign N236 = ecc_check[4] | ecc_check[5];
assign N237 = ecc_check[3] | N236;
assign N238 = N57 | N237;
assign N239 = N58 | N238;
assign N240 = ecc_check[0] | N239;
assign N241 = ~N240;
assign N242 = ecc_check[4] | ecc_check[5];
assign N243 = ecc_check[3] | N242;
assign N244 = N57 | N243;
assign N245 = ecc_check[1] | N244;
assign N246 = N65 | N245;
assign N247 = ~N246;
assign N248 = ecc_check[4] | ecc_check[5];
assign N249 = ecc_check[3] | N248;
assign N250 = ecc_check[2] | N249;
assign N251 = N58 | N250;
assign N252 = N65 | N251;
assign N253 = ~N252;
assign N254 = ecc_check[4] | N56;
assign N255 = ecc_check[3] | N254;
assign N256 = ecc_check[2] | N255;
assign N257 = ecc_check[1] | N256;
assign N258 = ecc_check[0] | N257;
assign N259 = ~N258;
assign N260 = N96 | ecc_check[5];
assign N261 = ecc_check[3] | N260;
assign N262 = ecc_check[2] | N261;
assign N263 = ecc_check[1] | N262;
assign N264 = ecc_check[0] | N263;
assign N265 = ~N264;
assign N266 = ecc_check[4] | ecc_check[5];
assign N267 = N97 | N266;
assign N268 = ecc_check[2] | N267;
assign N269 = ecc_check[1] | N268;
assign N270 = ecc_check[0] | N269;
assign N271 = ~N270;
assign N272 = ecc_check[4] | ecc_check[5];
assign N273 = ecc_check[3] | N272;
assign N274 = N57 | N273;
assign N275 = ecc_check[1] | N274;
assign N276 = ecc_check[0] | N275;
assign N277 = ~N276;
assign N278 = ecc_check[4] | ecc_check[5];
assign N279 = ecc_check[3] | N278;
assign N280 = ecc_check[2] | N279;
assign N281 = N58 | N280;
assign N282 = ecc_check[0] | N281;
assign N283 = ~N282;
assign N284 = ecc_check[4] | ecc_check[5];
assign N285 = ecc_check[3] | N284;
assign N286 = ecc_check[2] | N285;
assign N287 = ecc_check[1] | N286;
assign N288 = N65 | N287;
assign N289 = ~N288;
assign N290 = ecc_check[4] | N56;
assign N291 = ecc_check[3] | N290;
assign N292 = N57 | N291;
assign N293 = N58 | N292;
assign N294 = N65 | N293;
assign N295 = ~N294;
assign N296 = ecc_check[5] | ecc_check[6];
assign N297 = ecc_check[4] | N296;
assign N298 = ecc_check[3] | N297;
assign N299 = ecc_check[2] | N298;
assign N300 = ecc_check[1] | N299;
assign N301 = ecc_check[0] | N300;
assign { dout_plus_parity[38:38], dout[31:26], ecc_out[5:5], dout[25:11], ecc_out[4:4], dout[10:4], ecc_out[3:3], dout[3:1], ecc_out[2:2], dout[0:0], ecc_out[1:0] } = (N0)? { N3, N4, N5, N6, N7, N8, N9, N10, N11, N12, N13, N14, N15, N16, N17, N18, N19, N20, N21, N22, N23, N24, N25, N26, N27, N28, N29, N30, N31, N32, N33, N34, N35, N36, N37, N38, N39, N40, N41 } :
(N1)? { ecc_in[6:6], din[31:26], ecc_in[5:5], din[25:11], ecc_in[4:4], din[10:4], ecc_in[3:3], din[3:1], ecc_in[2:2], din[0:0], ecc_in[1:0] } : 1'b0;
assign N0 = single_ecc_error;
assign N1 = N2;
assign ecc_check[0] = N318 ^ din[30];
assign N318 = N317 ^ din[28];
assign N317 = N316 ^ din[26];
assign N316 = N315 ^ din[25];
assign N315 = N314 ^ din[23];
assign N314 = N313 ^ din[21];
assign N313 = N312 ^ din[19];
assign N312 = N311 ^ din[17];
assign N311 = N310 ^ din[15];
assign N310 = N309 ^ din[13];
assign N309 = N308 ^ din[11];
assign N308 = N307 ^ din[10];
assign N307 = N306 ^ din[8];
assign N306 = N305 ^ din[6];
assign N305 = N304 ^ din[4];
assign N304 = N303 ^ din[3];
assign N303 = N302 ^ din[1];
assign N302 = ecc_in[0] ^ din[0];
assign ecc_check[1] = N335 ^ din[31];
assign N335 = N334 ^ din[28];
assign N334 = N333 ^ din[27];
assign N333 = N332 ^ din[25];
assign N332 = N331 ^ din[24];
assign N331 = N330 ^ din[21];
assign N330 = N329 ^ din[20];
assign N329 = N328 ^ din[17];
assign N328 = N327 ^ din[16];
assign N327 = N326 ^ din[13];
assign N326 = N325 ^ din[12];
assign N325 = N324 ^ din[10];
assign N324 = N323 ^ din[9];
assign N323 = N322 ^ din[6];
assign N322 = N321 ^ din[5];
assign N321 = N320 ^ din[3];
assign N320 = N319 ^ din[2];
assign N319 = ecc_in[1] ^ din[0];
assign ecc_check[2] = N352 ^ din[31];
assign N352 = N351 ^ din[30];
assign N351 = N350 ^ din[29];
assign N350 = N349 ^ din[25];
assign N349 = N348 ^ din[24];
assign N348 = N347 ^ din[23];
assign N347 = N346 ^ din[22];
assign N346 = N345 ^ din[17];
assign N345 = N344 ^ din[16];
assign N344 = N343 ^ din[15];
assign N343 = N342 ^ din[14];
assign N342 = N341 ^ din[10];
assign N341 = N340 ^ din[9];
assign N340 = N339 ^ din[8];
assign N339 = N338 ^ din[7];
assign N338 = N337 ^ din[3];
assign N337 = N336 ^ din[2];
assign N336 = ecc_in[2] ^ din[1];
assign ecc_check[3] = N366 ^ din[25];
assign N366 = N365 ^ din[24];
assign N365 = N364 ^ din[23];
assign N364 = N363 ^ din[22];
assign N363 = N362 ^ din[21];
assign N362 = N361 ^ din[20];
assign N361 = N360 ^ din[19];
assign N360 = N359 ^ din[18];
assign N359 = N358 ^ din[10];
assign N358 = N357 ^ din[9];
assign N357 = N356 ^ din[8];
assign N356 = N355 ^ din[7];
assign N355 = N354 ^ din[6];
assign N354 = N353 ^ din[5];
assign N353 = ecc_in[3] ^ din[4];
assign ecc_check[4] = N380 ^ din[25];
assign N380 = N379 ^ din[24];
assign N379 = N378 ^ din[23];
assign N378 = N377 ^ din[22];
assign N377 = N376 ^ din[21];
assign N376 = N375 ^ din[20];
assign N375 = N374 ^ din[19];
assign N374 = N373 ^ din[18];
assign N373 = N372 ^ din[17];
assign N372 = N371 ^ din[16];
assign N371 = N370 ^ din[15];
assign N370 = N369 ^ din[14];
assign N369 = N368 ^ din[13];
assign N368 = N367 ^ din[12];
assign N367 = ecc_in[4] ^ din[11];
assign ecc_check[5] = N385 ^ din[31];
assign N385 = N384 ^ din[30];
assign N384 = N383 ^ din[29];
assign N383 = N382 ^ din[28];
assign N382 = N381 ^ din[27];
assign N381 = ecc_in[5] ^ din[26];
assign ecc_check[6] = N423 & N424;
assign N423 = N416 ^ N422;
assign N416 = N415 ^ din[0];
assign N415 = N414 ^ din[1];
assign N414 = N413 ^ din[2];
assign N413 = N412 ^ din[3];
assign N412 = N411 ^ din[4];
assign N411 = N410 ^ din[5];
assign N410 = N409 ^ din[6];
assign N409 = N408 ^ din[7];
assign N408 = N407 ^ din[8];
assign N407 = N406 ^ din[9];
assign N406 = N405 ^ din[10];
assign N405 = N404 ^ din[11];
assign N404 = N403 ^ din[12];
assign N403 = N402 ^ din[13];
assign N402 = N401 ^ din[14];
assign N401 = N400 ^ din[15];
assign N400 = N399 ^ din[16];
assign N399 = N398 ^ din[17];
assign N398 = N397 ^ din[18];
assign N397 = N396 ^ din[19];
assign N396 = N395 ^ din[20];
assign N395 = N394 ^ din[21];
assign N394 = N393 ^ din[22];
assign N393 = N392 ^ din[23];
assign N392 = N391 ^ din[24];
assign N391 = N390 ^ din[25];
assign N390 = N389 ^ din[26];
assign N389 = N388 ^ din[27];
assign N388 = N387 ^ din[28];
assign N387 = N386 ^ din[29];
assign N386 = din[31] ^ din[30];
assign N422 = N421 ^ ecc_in[0];
assign N421 = N420 ^ ecc_in[1];
assign N420 = N419 ^ ecc_in[2];
assign N419 = N418 ^ ecc_in[3];
assign N418 = N417 ^ ecc_in[4];
assign N417 = ecc_in[6] ^ ecc_in[5];
assign N424 = ~sed_ded;
assign single_ecc_error = N425 & ecc_check[6];
assign N425 = en & N301;
assign double_ecc_error = N426 & N42;
assign N426 = en & N55;
assign N2 = ~single_ecc_error;
assign N3 = N295 ^ ecc_in[6];
assign N4 = N64 ^ din[31];
assign N5 = N71 ^ din[30];
assign N6 = N77 ^ din[29];
assign N7 = N83 ^ din[28];
assign N8 = N89 ^ din[27];
assign N9 = N95 ^ din[26];
assign N10 = N259 ^ ecc_in[5];
assign N11 = N103 ^ din[25];
assign N12 = N109 ^ din[24];
assign N13 = N115 ^ din[23];
assign N14 = N121 ^ din[22];
assign N15 = N127 ^ din[21];
assign N16 = N133 ^ din[20];
assign N17 = N139 ^ din[19];
assign N18 = N145 ^ din[18];
assign N19 = N151 ^ din[17];
assign N20 = N157 ^ din[16];
assign N21 = N163 ^ din[15];
assign N22 = N169 ^ din[14];
assign N23 = N175 ^ din[13];
assign N24 = N181 ^ din[12];
assign N25 = N187 ^ din[11];
assign N26 = N265 ^ ecc_in[4];
assign N27 = N193 ^ din[10];
assign N28 = N199 ^ din[9];
assign N29 = N205 ^ din[8];
assign N30 = N211 ^ din[7];
assign N31 = N217 ^ din[6];
assign N32 = N223 ^ din[5];
assign N33 = N229 ^ din[4];
assign N34 = N271 ^ ecc_in[3];
assign N35 = N235 ^ din[3];
assign N36 = N241 ^ din[2];
assign N37 = N247 ^ din[1];
assign N38 = N277 ^ ecc_in[2];
assign N39 = N253 ^ din[0];
assign N40 = N283 ^ ecc_in[1];
assign N41 = N289 ^ ecc_in[0];
assign ecc_out[6] = dout_plus_parity[38] ^ N49;
endmodule
|
module rvtwoscomp_WIDTH32
(
din,
dout
);
input [31:0] din;
output [31:0] dout;
wire [31:0] dout;
wire N0,N1,N2,N3,N4,N5,N6,N7,N8,N9,N10,N11,N12,N13,N14,N15,N16,N17,N18,N19,N20,N21,
N22,N23,N24,N25,N26,N27,N28,N29,N30,N31,N32,N33,N34,N35,N36,N37,N38,N39,N40,N41,
N42,N43,N44,N45,N46,N47,N48,N49,N50,N51,N52,N53,N54,N55,N56,N57,N58,N59,N60,N61,
N62,N63,N64,N65,N66,N67,N68,N69,N70,N71,N72,N73,N74,N75,N76,N77,N78,N79,N80,N81,
N82,N83,N84,N85,N86,N87,N88,N89,N90,N91,N92,N93,N94,N95,N96,N97,N98,N99,N100,N101,
N102,N103,N104,N105,N106,N107,N108,N109,N110,N111,N112,N113,N114,N115,N116,N117,
N118,N119,N120,N121,N122,N123,N124,N125,N126,N127,N128,N129,N130,N131,N132,N133,
N134,N135,N136,N137,N138,N139,N140,N141,N142,N143,N144,N145,N146,N147,N148,N149,
N150,N151,N152,N153,N154,N155,N156,N157,N158,N159,N160,N161,N162,N163,N164,N165,
N166,N167,N168,N169,N170,N171,N172,N173,N174,N175,N176,N177,N178,N179,N180,N181,
N182,N183,N184,N185,N186,N187,N188,N189,N190,N191,N192,N193,N194,N195,N196,N197,
N198,N199,N200,N201,N202,N203,N204,N205,N206,N207,N208,N209,N210,N211,N212,N213,
N214,N215,N216,N217,N218,N219,N220,N221,N222,N223,N224,N225,N226,N227,N228,N229,
N230,N231,N232,N233,N234,N235,N236,N237,N238,N239,N240,N241,N242,N243,N244,N245,
N246,N247,N248,N249,N250,N251,N252,N253,N254,N255,N256,N257,N258,N259,N260,N261,
N262,N263,N264,N265,N266,N267,N268,N269,N270,N271,N272,N273,N274,N275,N276,N277,
N278,N279,N280,N281,N282,N283,N284,N285,N286,N287,N288,N289,N290,N291,N292,N293,
N294,N295,N296,N297,N298,N299,N300,N301,N302,N303,N304,N305,N306,N307,N308,N309,
N310,N311,N312,N313,N314,N315,N316,N317,N318,N319,N320,N321,N322,N323,N324,N325,
N326,N327,N328,N329,N330,N331,N332,N333,N334,N335,N336,N337,N338,N339,N340,N341,
N342,N343,N344,N345,N346,N347,N348,N349,N350,N351,N352,N353,N354,N355,N356,N357,
N358,N359,N360,N361,N362,N363,N364,N365,N366,N367,N368,N369,N370,N371,N372,N373,
N374,N375,N376,N377,N378,N379,N380,N381,N382,N383,N384,N385,N386,N387,N388,N389,
N390,N391,N392,N393,N394,N395,N396,N397,N398,N399,N400,N401,N402,N403,N404,N405,
N406,N407,N408,N409,N410,N411,N412,N413,N414,N415,N416,N417,N418,N419,N420,N421,
N422,N423,N424,N425,N426,N427,N428,N429,N430,N431,N432,N433,N434,N435,N436,N437,
N438,N439,N440,N441,N442,N443,N444,N445,N446,N447,N448,N449,N450,N451,N452,N453,
N454,N455,N456,N457,N458,N459,N460,N461,N462,N463,N464,N465,N466,N467,N468,N469,
N470,N471,N472,N473,N474,N475,N476,N477,N478,N479,N480,N481,N482,N483,N484,N485,
N486,N487,N488,N489,N490,N491,N492,N493,N494,N495,N496,N497,N498,N499,N500,N501,
N502,N503,N504,N505,N506,N507,N508,N509,N510,N511,N512,N513,N514,N515,N516,N517,
N518,N519,N520,N521,N522,N523,N524,N525,N526,N527,N528,N529,N530,N531,N532,N533,
N534,N535,N536,N537,N538,N539,N540,N541,N542,N543,N544,N545,N546,N547,N548,N549,
N550,N551,N552,N553,N554,N555,N556,N557;
assign dout[0] = din[0];
assign dout[1] = (N0)? N32 :
(N31)? din[1] : 1'b0;
assign N0 = din[0];
assign dout[2] = (N1)? N35 :
(N34)? din[2] : 1'b0;
assign N1 = N33;
assign dout[3] = (N2)? N38 :
(N37)? din[3] : 1'b0;
assign N2 = N36;
assign dout[4] = (N3)? N41 :
(N40)? din[4] : 1'b0;
assign N3 = N39;
assign dout[5] = (N4)? N44 :
(N43)? din[5] : 1'b0;
assign N4 = N42;
assign dout[6] = (N5)? N47 :
(N46)? din[6] : 1'b0;
assign N5 = N45;
assign dout[7] = (N6)? N50 :
(N49)? din[7] : 1'b0;
assign N6 = N48;
assign dout[8] = (N7)? N53 :
(N52)? din[8] : 1'b0;
assign N7 = N51;
assign dout[9] = (N8)? N56 :
(N55)? din[9] : 1'b0;
assign N8 = N54;
assign dout[10] = (N9)? N59 :
(N58)? din[10] : 1'b0;
assign N9 = N57;
assign dout[11] = (N10)? N62 :
(N61)? din[11] : 1'b0;
assign N10 = N60;
assign dout[12] = (N11)? N65 :
(N64)? din[12] : 1'b0;
assign N11 = N63;
assign dout[13] = (N12)? N68 :
(N67)? din[13] : 1'b0;
assign N12 = N66;
assign dout[14] = (N13)? N71 :
(N70)? din[14] : 1'b0;
assign N13 = N69;
assign dout[15] = (N14)? N74 :
(N73)? din[15] : 1'b0;
assign N14 = N72;
assign dout[16] = (N15)? N77 :
(N76)? din[16] : 1'b0;
assign N15 = N75;
assign dout[17] = (N16)? N80 :
(N79)? din[17] : 1'b0;
assign N16 = N78;
assign dout[18] = (N17)? N83 :
(N82)? din[18] : 1'b0;
assign N17 = N81;
assign dout[19] = (N18)? N86 :
(N85)? din[19] : 1'b0;
assign N18 = N84;
assign dout[20] = (N19)? N89 :
(N88)? din[20] : 1'b0;
assign N19 = N87;
assign dout[21] = (N20)? N92 :
(N91)? din[21] : 1'b0;
assign N20 = N90;
assign dout[22] = (N21)? N95 :
(N94)? din[22] : 1'b0;
assign N21 = N93;
assign dout[23] = (N22)? N98 :
(N97)? din[23] : 1'b0;
assign N22 = N96;
assign dout[24] = (N23)? N101 :
(N100)? din[24] : 1'b0;
assign N23 = N99;
assign dout[25] = (N24)? N104 :
(N103)? din[25] : 1'b0;
assign N24 = N102;
assign dout[26] = (N25)? N107 :
(N106)? din[26] : 1'b0;
assign N25 = N105;
assign dout[27] = (N26)? N110 :
(N109)? din[27] : 1'b0;
assign N26 = N108;
assign dout[28] = (N27)? N113 :
(N112)? din[28] : 1'b0;
assign N27 = N111;
assign dout[29] = (N28)? N116 :
(N115)? din[29] : 1'b0;
assign N28 = N114;
assign dout[30] = (N29)? N119 :
(N118)? din[30] : 1'b0;
assign N29 = N117;
assign dout[31] = (N30)? N122 :
(N121)? din[31] : 1'b0;
assign N30 = N120;
assign N31 = ~din[0];
assign N32 = ~din[1];
assign N33 = din[1] | din[0];
assign N34 = ~N33;
assign N35 = ~din[2];
assign N36 = N123 | din[0];
assign N123 = din[2] | din[1];
assign N37 = ~N36;
assign N38 = ~din[3];
assign N39 = N125 | din[0];
assign N125 = N124 | din[1];
assign N124 = din[3] | din[2];
assign N40 = ~N39;
assign N41 = ~din[4];
assign N42 = N128 | din[0];
assign N128 = N127 | din[1];
assign N127 = N126 | din[2];
assign N126 = din[4] | din[3];
assign N43 = ~N42;
assign N44 = ~din[5];
assign N45 = N132 | din[0];
assign N132 = N131 | din[1];
assign N131 = N130 | din[2];
assign N130 = N129 | din[3];
assign N129 = din[5] | din[4];
assign N46 = ~N45;
assign N47 = ~din[6];
assign N48 = N137 | din[0];
assign N137 = N136 | din[1];
assign N136 = N135 | din[2];
assign N135 = N134 | din[3];
assign N134 = N133 | din[4];
assign N133 = din[6] | din[5];
assign N49 = ~N48;
assign N50 = ~din[7];
assign N51 = N143 | din[0];
assign N143 = N142 | din[1];
assign N142 = N141 | din[2];
assign N141 = N140 | din[3];
assign N140 = N139 | din[4];
assign N139 = N138 | din[5];
assign N138 = din[7] | din[6];
assign N52 = ~N51;
assign N53 = ~din[8];
assign N54 = N150 | din[0];
assign N150 = N149 | din[1];
assign N149 = N148 | din[2];
assign N148 = N147 | din[3];
assign N147 = N146 | din[4];
assign N146 = N145 | din[5];
assign N145 = N144 | din[6];
assign N144 = din[8] | din[7];
assign N55 = ~N54;
assign N56 = ~din[9];
assign N57 = N158 | din[0];
assign N158 = N157 | din[1];
assign N157 = N156 | din[2];
assign N156 = N155 | din[3];
assign N155 = N154 | din[4];
assign N154 = N153 | din[5];
assign N153 = N152 | din[6];
assign N152 = N151 | din[7];
assign N151 = din[9] | din[8];
assign N58 = ~N57;
assign N59 = ~din[10];
assign N60 = N167 | din[0];
assign N167 = N166 | din[1];
assign N166 = N165 | din[2];
assign N165 = N164 | din[3];
assign N164 = N163 | din[4];
assign N163 = N162 | din[5];
assign N162 = N161 | din[6];
assign N161 = N160 | din[7];
assign N160 = N159 | din[8];
assign N159 = din[10] | din[9];
assign N61 = ~N60;
assign N62 = ~din[11];
assign N63 = N177 | din[0];
assign N177 = N176 | din[1];
assign N176 = N175 | din[2];
assign N175 = N174 | din[3];
assign N174 = N173 | din[4];
assign N173 = N172 | din[5];
assign N172 = N171 | din[6];
assign N171 = N170 | din[7];
assign N170 = N169 | din[8];
assign N169 = N168 | din[9];
assign N168 = din[11] | din[10];
assign N64 = ~N63;
assign N65 = ~din[12];
assign N66 = N188 | din[0];
assign N188 = N187 | din[1];
assign N187 = N186 | din[2];
assign N186 = N185 | din[3];
assign N185 = N184 | din[4];
assign N184 = N183 | din[5];
assign N183 = N182 | din[6];
assign N182 = N181 | din[7];
assign N181 = N180 | din[8];
assign N180 = N179 | din[9];
assign N179 = N178 | din[10];
assign N178 = din[12] | din[11];
assign N67 = ~N66;
assign N68 = ~din[13];
assign N69 = N200 | din[0];
assign N200 = N199 | din[1];
assign N199 = N198 | din[2];
assign N198 = N197 | din[3];
assign N197 = N196 | din[4];
assign N196 = N195 | din[5];
assign N195 = N194 | din[6];
assign N194 = N193 | din[7];
assign N193 = N192 | din[8];
assign N192 = N191 | din[9];
assign N191 = N190 | din[10];
assign N190 = N189 | din[11];
assign N189 = din[13] | din[12];
assign N70 = ~N69;
assign N71 = ~din[14];
assign N72 = N213 | din[0];
assign N213 = N212 | din[1];
assign N212 = N211 | din[2];
assign N211 = N210 | din[3];
assign N210 = N209 | din[4];
assign N209 = N208 | din[5];
assign N208 = N207 | din[6];
assign N207 = N206 | din[7];
assign N206 = N205 | din[8];
assign N205 = N204 | din[9];
assign N204 = N203 | din[10];
assign N203 = N202 | din[11];
assign N202 = N201 | din[12];
assign N201 = din[14] | din[13];
assign N73 = ~N72;
assign N74 = ~din[15];
assign N75 = N227 | din[0];
assign N227 = N226 | din[1];
assign N226 = N225 | din[2];
assign N225 = N224 | din[3];
assign N224 = N223 | din[4];
assign N223 = N222 | din[5];
assign N222 = N221 | din[6];
assign N221 = N220 | din[7];
assign N220 = N219 | din[8];
assign N219 = N218 | din[9];
assign N218 = N217 | din[10];
assign N217 = N216 | din[11];
assign N216 = N215 | din[12];
assign N215 = N214 | din[13];
assign N214 = din[15] | din[14];
assign N76 = ~N75;
assign N77 = ~din[16];
assign N78 = N242 | din[0];
assign N242 = N241 | din[1];
assign N241 = N240 | din[2];
assign N240 = N239 | din[3];
assign N239 = N238 | din[4];
assign N238 = N237 | din[5];
assign N237 = N236 | din[6];
assign N236 = N235 | din[7];
assign N235 = N234 | din[8];
assign N234 = N233 | din[9];
assign N233 = N232 | din[10];
assign N232 = N231 | din[11];
assign N231 = N230 | din[12];
assign N230 = N229 | din[13];
assign N229 = N228 | din[14];
assign N228 = din[16] | din[15];
assign N79 = ~N78;
assign N80 = ~din[17];
assign N81 = N258 | din[0];
assign N258 = N257 | din[1];
assign N257 = N256 | din[2];
assign N256 = N255 | din[3];
assign N255 = N254 | din[4];
assign N254 = N253 | din[5];
assign N253 = N252 | din[6];
assign N252 = N251 | din[7];
assign N251 = N250 | din[8];
assign N250 = N249 | din[9];
assign N249 = N248 | din[10];
assign N248 = N247 | din[11];
assign N247 = N246 | din[12];
assign N246 = N245 | din[13];
assign N245 = N244 | din[14];
assign N244 = N243 | din[15];
assign N243 = din[17] | din[16];
assign N82 = ~N81;
assign N83 = ~din[18];
assign N84 = N275 | din[0];
assign N275 = N274 | din[1];
assign N274 = N273 | din[2];
assign N273 = N272 | din[3];
assign N272 = N271 | din[4];
assign N271 = N270 | din[5];
assign N270 = N269 | din[6];
assign N269 = N268 | din[7];
assign N268 = N267 | din[8];
assign N267 = N266 | din[9];
assign N266 = N265 | din[10];
assign N265 = N264 | din[11];
assign N264 = N263 | din[12];
assign N263 = N262 | din[13];
assign N262 = N261 | din[14];
assign N261 = N260 | din[15];
assign N260 = N259 | din[16];
assign N259 = din[18] | din[17];
assign N85 = ~N84;
assign N86 = ~din[19];
assign N87 = N293 | din[0];
assign N293 = N292 | din[1];
assign N292 = N291 | din[2];
assign N291 = N290 | din[3];
assign N290 = N289 | din[4];
assign N289 = N288 | din[5];
assign N288 = N287 | din[6];
assign N287 = N286 | din[7];
assign N286 = N285 | din[8];
assign N285 = N284 | din[9];
assign N284 = N283 | din[10];
assign N283 = N282 | din[11];
assign N282 = N281 | din[12];
assign N281 = N280 | din[13];
assign N280 = N279 | din[14];
assign N279 = N278 | din[15];
assign N278 = N277 | din[16];
assign N277 = N276 | din[17];
assign N276 = din[19] | din[18];
assign N88 = ~N87;
assign N89 = ~din[20];
assign N90 = N312 | din[0];
assign N312 = N311 | din[1];
assign N311 = N310 | din[2];
assign N310 = N309 | din[3];
assign N309 = N308 | din[4];
assign N308 = N307 | din[5];
assign N307 = N306 | din[6];
assign N306 = N305 | din[7];
assign N305 = N304 | din[8];
assign N304 = N303 | din[9];
assign N303 = N302 | din[10];
assign N302 = N301 | din[11];
assign N301 = N300 | din[12];
assign N300 = N299 | din[13];
assign N299 = N298 | din[14];
assign N298 = N297 | din[15];
assign N297 = N296 | din[16];
assign N296 = N295 | din[17];
assign N295 = N294 | din[18];
assign N294 = din[20] | din[19];
assign N91 = ~N90;
assign N92 = ~din[21];
assign N93 = N332 | din[0];
assign N332 = N331 | din[1];
assign N331 = N330 | din[2];
assign N330 = N329 | din[3];
assign N329 = N328 | din[4];
assign N328 = N327 | din[5];
assign N327 = N326 | din[6];
assign N326 = N325 | din[7];
assign N325 = N324 | din[8];
assign N324 = N323 | din[9];
assign N323 = N322 | din[10];
assign N322 = N321 | din[11];
assign N321 = N320 | din[12];
assign N320 = N319 | din[13];
assign N319 = N318 | din[14];
assign N318 = N317 | din[15];
assign N317 = N316 | din[16];
assign N316 = N315 | din[17];
assign N315 = N314 | din[18];
assign N314 = N313 | din[19];
assign N313 = din[21] | din[20];
assign N94 = ~N93;
assign N95 = ~din[22];
assign N96 = N353 | din[0];
assign N353 = N352 | din[1];
assign N352 = N351 | din[2];
assign N351 = N350 | din[3];
assign N350 = N349 | din[4];
assign N349 = N348 | din[5];
assign N348 = N347 | din[6];
assign N347 = N346 | din[7];
assign N346 = N345 | din[8];
assign N345 = N344 | din[9];
assign N344 = N343 | din[10];
assign N343 = N342 | din[11];
assign N342 = N341 | din[12];
assign N341 = N340 | din[13];
assign N340 = N339 | din[14];
assign N339 = N338 | din[15];
assign N338 = N337 | din[16];
assign N337 = N336 | din[17];
assign N336 = N335 | din[18];
assign N335 = N334 | din[19];
assign N334 = N333 | din[20];
assign N333 = din[22] | din[21];
assign N97 = ~N96;
assign N98 = ~din[23];
assign N99 = N375 | din[0];
assign N375 = N374 | din[1];
assign N374 = N373 | din[2];
assign N373 = N372 | din[3];
assign N372 = N371 | din[4];
assign N371 = N370 | din[5];
assign N370 = N369 | din[6];
assign N369 = N368 | din[7];
assign N368 = N367 | din[8];
assign N367 = N366 | din[9];
assign N366 = N365 | din[10];
assign N365 = N364 | din[11];
assign N364 = N363 | din[12];
assign N363 = N362 | din[13];
assign N362 = N361 | din[14];
assign N361 = N360 | din[15];
assign N360 = N359 | din[16];
assign N359 = N358 | din[17];
assign N358 = N357 | din[18];
assign N357 = N356 | din[19];
assign N356 = N355 | din[20];
assign N355 = N354 | din[21];
assign N354 = din[23] | din[22];
assign N100 = ~N99;
assign N101 = ~din[24];
assign N102 = N398 | din[0];
assign N398 = N397 | din[1];
assign N397 = N396 | din[2];
assign N396 = N395 | din[3];
assign N395 = N394 | din[4];
assign N394 = N393 | din[5];
assign N393 = N392 | din[6];
assign N392 = N391 | din[7];
assign N391 = N390 | din[8];
assign N390 = N389 | din[9];
assign N389 = N388 | din[10];
assign N388 = N387 | din[11];
assign N387 = N386 | din[12];
assign N386 = N385 | din[13];
assign N385 = N384 | din[14];
assign N384 = N383 | din[15];
assign N383 = N382 | din[16];
assign N382 = N381 | din[17];
assign N381 = N380 | din[18];
assign N380 = N379 | din[19];
assign N379 = N378 | din[20];
assign N378 = N377 | din[21];
assign N377 = N376 | din[22];
assign N376 = din[24] | din[23];
assign N103 = ~N102;
assign N104 = ~din[25];
assign N105 = N422 | din[0];
assign N422 = N421 | din[1];
assign N421 = N420 | din[2];
assign N420 = N419 | din[3];
assign N419 = N418 | din[4];
assign N418 = N417 | din[5];
assign N417 = N416 | din[6];
assign N416 = N415 | din[7];
assign N415 = N414 | din[8];
assign N414 = N413 | din[9];
assign N413 = N412 | din[10];
assign N412 = N411 | din[11];
assign N411 = N410 | din[12];
assign N410 = N409 | din[13];
assign N409 = N408 | din[14];
assign N408 = N407 | din[15];
assign N407 = N406 | din[16];
assign N406 = N405 | din[17];
assign N405 = N404 | din[18];
assign N404 = N403 | din[19];
assign N403 = N402 | din[20];
assign N402 = N401 | din[21];
assign N401 = N400 | din[22];
assign N400 = N399 | din[23];
assign N399 = din[25] | din[24];
assign N106 = ~N105;
assign N107 = ~din[26];
assign N108 = N447 | din[0];
assign N447 = N446 | din[1];
assign N446 = N445 | din[2];
assign N445 = N444 | din[3];
assign N444 = N443 | din[4];
assign N443 = N442 | din[5];
assign N442 = N441 | din[6];
assign N441 = N440 | din[7];
assign N440 = N439 | din[8];
assign N439 = N438 | din[9];
assign N438 = N437 | din[10];
assign N437 = N436 | din[11];
assign N436 = N435 | din[12];
assign N435 = N434 | din[13];
assign N434 = N433 | din[14];
assign N433 = N432 | din[15];
assign N432 = N431 | din[16];
assign N431 = N430 | din[17];
assign N430 = N429 | din[18];
assign N429 = N428 | din[19];
assign N428 = N427 | din[20];
assign N427 = N426 | din[21];
assign N426 = N425 | din[22];
assign N425 = N424 | din[23];
assign N424 = N423 | din[24];
assign N423 = din[26] | din[25];
assign N109 = ~N108;
assign N110 = ~din[27];
assign N111 = N473 | din[0];
assign N473 = N472 | din[1];
assign N472 = N471 | din[2];
assign N471 = N470 | din[3];
assign N470 = N469 | din[4];
assign N469 = N468 | din[5];
assign N468 = N467 | din[6];
assign N467 = N466 | din[7];
assign N466 = N465 | din[8];
assign N465 = N464 | din[9];
assign N464 = N463 | din[10];
assign N463 = N462 | din[11];
assign N462 = N461 | din[12];
assign N461 = N460 | din[13];
assign N460 = N459 | din[14];
assign N459 = N458 | din[15];
assign N458 = N457 | din[16];
assign N457 = N456 | din[17];
assign N456 = N455 | din[18];
assign N455 = N454 | din[19];
assign N454 = N453 | din[20];
assign N453 = N452 | din[21];
assign N452 = N451 | din[22];
assign N451 = N450 | din[23];
assign N450 = N449 | din[24];
assign N449 = N448 | din[25];
assign N448 = din[27] | din[26];
assign N112 = ~N111;
assign N113 = ~din[28];
assign N114 = N500 | din[0];
assign N500 = N499 | din[1];
assign N499 = N498 | din[2];
assign N498 = N497 | din[3];
assign N497 = N496 | din[4];
assign N496 = N495 | din[5];
assign N495 = N494 | din[6];
assign N494 = N493 | din[7];
assign N493 = N492 | din[8];
assign N492 = N491 | din[9];
assign N491 = N490 | din[10];
assign N490 = N489 | din[11];
assign N489 = N488 | din[12];
assign N488 = N487 | din[13];
assign N487 = N486 | din[14];
assign N486 = N485 | din[15];
assign N485 = N484 | din[16];
assign N484 = N483 | din[17];
assign N483 = N482 | din[18];
assign N482 = N481 | din[19];
assign N481 = N480 | din[20];
assign N480 = N479 | din[21];
assign N479 = N478 | din[22];
assign N478 = N477 | din[23];
assign N477 = N476 | din[24];
assign N476 = N475 | din[25];
assign N475 = N474 | din[26];
assign N474 = din[28] | din[27];
assign N115 = ~N114;
assign N116 = ~din[29];
assign N117 = N528 | din[0];
assign N528 = N527 | din[1];
assign N527 = N526 | din[2];
assign N526 = N525 | din[3];
assign N525 = N524 | din[4];
assign N524 = N523 | din[5];
assign N523 = N522 | din[6];
assign N522 = N521 | din[7];
assign N521 = N520 | din[8];
assign N520 = N519 | din[9];
assign N519 = N518 | din[10];
assign N518 = N517 | din[11];
assign N517 = N516 | din[12];
assign N516 = N515 | din[13];
assign N515 = N514 | din[14];
assign N514 = N513 | din[15];
assign N513 = N512 | din[16];
assign N512 = N511 | din[17];
assign N511 = N510 | din[18];
assign N510 = N509 | din[19];
assign N509 = N508 | din[20];
assign N508 = N507 | din[21];
assign N507 = N506 | din[22];
assign N506 = N505 | din[23];
assign N505 = N504 | din[24];
assign N504 = N503 | din[25];
assign N503 = N502 | din[26];
assign N502 = N501 | din[27];
assign N501 = din[29] | din[28];
assign N118 = ~N117;
assign N119 = ~din[30];
assign N120 = N557 | din[0];
assign N557 = N556 | din[1];
assign N556 = N555 | din[2];
assign N555 = N554 | din[3];
assign N554 = N553 | din[4];
assign N553 = N552 | din[5];
assign N552 = N551 | din[6];
assign N551 = N550 | din[7];
assign N550 = N549 | din[8];
assign N549 = N548 | din[9];
assign N548 = N547 | din[10];
assign N547 = N546 | din[11];
assign N546 = N545 | din[12];
assign N545 = N544 | din[13];
assign N544 = N543 | din[14];
assign N543 = N542 | din[15];
assign N542 = N541 | din[16];
assign N541 = N540 | din[17];
assign N540 = N539 | din[18];
assign N539 = N538 | din[19];
assign N538 = N537 | din[20];
assign N537 = N536 | din[21];
assign N536 = N535 | din[22];
assign N535 = N534 | din[23];
assign N534 = N533 | din[24];
assign N533 = N532 | din[25];
assign N532 = N531 | din[26];
assign N531 = N530 | din[27];
assign N530 = N529 | din[28];
assign N529 = din[30] | din[29];
assign N121 = ~N120;
assign N122 = ~din[31];
endmodule
|
module rvecc_encode
(
din,
ecc_out
);
input [31:0] din;
output [6:0] ecc_out;
wire [6:0] ecc_out;
wire N0,N1,N2,N3,N4,N5,N6,N7,N8,N9,N10,N11,N12,N13,N14,N15,N16,N17,N18,N19,N20,N21,
N22,N23,N24,N25,N26,N27,N28,N29,N30,N31,N32,N33,N34,N35,N36,N37,N38,N39,N40,N41,
N42,N43,N44,N45,N46,N47,N48,N49,N50,N51,N52,N53,N54,N55,N56,N57,N58,N59,N60,N61,
N62,N63,N64,N65,N66,N67,N68,N69,N70,N71,N72,N73,N74,N75,N76,N77,N78,N79,N80,N81,
N82,N83,N84,N85,N86,N87,N88,N89,N90,N91,N92,N93,N94,N95,N96,N97,N98,N99,N100,N101,
N102,N103,N104,N105,N106,N107,N108,N109,N110,N111,N112,N113;
assign ecc_out[0] = N15 ^ din[30];
assign N15 = N14 ^ din[28];
assign N14 = N13 ^ din[26];
assign N13 = N12 ^ din[25];
assign N12 = N11 ^ din[23];
assign N11 = N10 ^ din[21];
assign N10 = N9 ^ din[19];
assign N9 = N8 ^ din[17];
assign N8 = N7 ^ din[15];
assign N7 = N6 ^ din[13];
assign N6 = N5 ^ din[11];
assign N5 = N4 ^ din[10];
assign N4 = N3 ^ din[8];
assign N3 = N2 ^ din[6];
assign N2 = N1 ^ din[4];
assign N1 = N0 ^ din[3];
assign N0 = din[0] ^ din[1];
assign ecc_out[1] = N31 ^ din[31];
assign N31 = N30 ^ din[28];
assign N30 = N29 ^ din[27];
assign N29 = N28 ^ din[25];
assign N28 = N27 ^ din[24];
assign N27 = N26 ^ din[21];
assign N26 = N25 ^ din[20];
assign N25 = N24 ^ din[17];
assign N24 = N23 ^ din[16];
assign N23 = N22 ^ din[13];
assign N22 = N21 ^ din[12];
assign N21 = N20 ^ din[10];
assign N20 = N19 ^ din[9];
assign N19 = N18 ^ din[6];
assign N18 = N17 ^ din[5];
assign N17 = N16 ^ din[3];
assign N16 = din[0] ^ din[2];
assign ecc_out[2] = N47 ^ din[31];
assign N47 = N46 ^ din[30];
assign N46 = N45 ^ din[29];
assign N45 = N44 ^ din[25];
assign N44 = N43 ^ din[24];
assign N43 = N42 ^ din[23];
assign N42 = N41 ^ din[22];
assign N41 = N40 ^ din[17];
assign N40 = N39 ^ din[16];
assign N39 = N38 ^ din[15];
assign N38 = N37 ^ din[14];
assign N37 = N36 ^ din[10];
assign N36 = N35 ^ din[9];
assign N35 = N34 ^ din[8];
assign N34 = N33 ^ din[7];
assign N33 = N32 ^ din[3];
assign N32 = din[1] ^ din[2];
assign ecc_out[3] = N60 ^ din[25];
assign N60 = N59 ^ din[24];
assign N59 = N58 ^ din[23];
assign N58 = N57 ^ din[22];
assign N57 = N56 ^ din[21];
assign N56 = N55 ^ din[20];
assign N55 = N54 ^ din[19];
assign N54 = N53 ^ din[18];
assign N53 = N52 ^ din[10];
assign N52 = N51 ^ din[9];
assign N51 = N50 ^ din[8];
assign N50 = N49 ^ din[7];
assign N49 = N48 ^ din[6];
assign N48 = din[4] ^ din[5];
assign ecc_out[4] = N73 ^ din[25];
assign N73 = N72 ^ din[24];
assign N72 = N71 ^ din[23];
assign N71 = N70 ^ din[22];
assign N70 = N69 ^ din[21];
assign N69 = N68 ^ din[20];
assign N68 = N67 ^ din[19];
assign N67 = N66 ^ din[18];
assign N66 = N65 ^ din[17];
assign N65 = N64 ^ din[16];
assign N64 = N63 ^ din[15];
assign N63 = N62 ^ din[14];
assign N62 = N61 ^ din[13];
assign N61 = din[11] ^ din[12];
assign ecc_out[5] = N77 ^ din[31];
assign N77 = N76 ^ din[30];
assign N76 = N75 ^ din[29];
assign N75 = N74 ^ din[28];
assign N74 = din[26] ^ din[27];
assign ecc_out[6] = N108 ^ N113;
assign N108 = N107 ^ din[0];
assign N107 = N106 ^ din[1];
assign N106 = N105 ^ din[2];
assign N105 = N104 ^ din[3];
assign N104 = N103 ^ din[4];
assign N103 = N102 ^ din[5];
assign N102 = N101 ^ din[6];
assign N101 = N100 ^ din[7];
assign N100 = N99 ^ din[8];
assign N99 = N98 ^ din[9];
assign N98 = N97 ^ din[10];
assign N97 = N96 ^ din[11];
assign N96 = N95 ^ din[12];
assign N95 = N94 ^ din[13];
assign N94 = N93 ^ din[14];
assign N93 = N92 ^ din[15];
assign N92 = N91 ^ din[16];
assign N91 = N90 ^ din[17];
assign N90 = N89 ^ din[18];
assign N89 = N88 ^ din[19];
assign N88 = N87 ^ din[20];
assign N87 = N86 ^ din[21];
assign N86 = N85 ^ din[22];
assign N85 = N84 ^ din[23];
assign N84 = N83 ^ din[24];
assign N83 = N82 ^ din[25];
assign N82 = N81 ^ din[26];
assign N81 = N80 ^ din[27];
assign N80 = N79 ^ din[28];
assign N79 = N78 ^ din[29];
assign N78 = din[31] ^ din[30];
assign N113 = N112 ^ ecc_out[0];
assign N112 = N111 ^ ecc_out[1];
assign N111 = N110 ^ ecc_out[2];
assign N110 = N109 ^ ecc_out[3];
assign N109 = ecc_out[5] ^ ecc_out[4];
endmodule
|
module rvdff_WIDTH28
(
din,
clk,
rst_l,
dout
);
input [27:0] din;
output [27:0] dout;
input clk;
input rst_l;
wire N0;
reg [27:0] dout;
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[27] <= 1'b0;
end else if(1'b1) begin
dout[27] <= din[27];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[26] <= 1'b0;
end else if(1'b1) begin
dout[26] <= din[26];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[25] <= 1'b0;
end else if(1'b1) begin
dout[25] <= din[25];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[24] <= 1'b0;
end else if(1'b1) begin
dout[24] <= din[24];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[23] <= 1'b0;
end else if(1'b1) begin
dout[23] <= din[23];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[22] <= 1'b0;
end else if(1'b1) begin
dout[22] <= din[22];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[21] <= 1'b0;
end else if(1'b1) begin
dout[21] <= din[21];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[20] <= 1'b0;
end else if(1'b1) begin
dout[20] <= din[20];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[19] <= 1'b0;
end else if(1'b1) begin
dout[19] <= din[19];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[18] <= 1'b0;
end else if(1'b1) begin
dout[18] <= din[18];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[17] <= 1'b0;
end else if(1'b1) begin
dout[17] <= din[17];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[16] <= 1'b0;
end else if(1'b1) begin
dout[16] <= din[16];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[15] <= 1'b0;
end else if(1'b1) begin
dout[15] <= din[15];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[14] <= 1'b0;
end else if(1'b1) begin
dout[14] <= din[14];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[13] <= 1'b0;
end else if(1'b1) begin
dout[13] <= din[13];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[12] <= 1'b0;
end else if(1'b1) begin
dout[12] <= din[12];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[11] <= 1'b0;
end else if(1'b1) begin
dout[11] <= din[11];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[10] <= 1'b0;
end else if(1'b1) begin
dout[10] <= din[10];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[9] <= 1'b0;
end else if(1'b1) begin
dout[9] <= din[9];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[8] <= 1'b0;
end else if(1'b1) begin
dout[8] <= din[8];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[7] <= 1'b0;
end else if(1'b1) begin
dout[7] <= din[7];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[6] <= 1'b0;
end else if(1'b1) begin
dout[6] <= din[6];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[5] <= 1'b0;
end else if(1'b1) begin
dout[5] <= din[5];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[4] <= 1'b0;
end else if(1'b1) begin
dout[4] <= din[4];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[3] <= 1'b0;
end else if(1'b1) begin
dout[3] <= din[3];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[2] <= 1'b0;
end else if(1'b1) begin
dout[2] <= din[2];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[1] <= 1'b0;
end else if(1'b1) begin
dout[1] <= din[1];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[0] <= 1'b0;
end else if(1'b1) begin
dout[0] <= din[0];
end
end
assign N0 = ~rst_l;
endmodule
|
module rvdff_WIDTH22
(
din,
clk,
rst_l,
dout
);
input [21:0] din;
output [21:0] dout;
input clk;
input rst_l;
wire N0;
reg [21:0] dout;
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[21] <= 1'b0;
end else if(1'b1) begin
dout[21] <= din[21];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[20] <= 1'b0;
end else if(1'b1) begin
dout[20] <= din[20];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[19] <= 1'b0;
end else if(1'b1) begin
dout[19] <= din[19];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[18] <= 1'b0;
end else if(1'b1) begin
dout[18] <= din[18];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[17] <= 1'b0;
end else if(1'b1) begin
dout[17] <= din[17];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[16] <= 1'b0;
end else if(1'b1) begin
dout[16] <= din[16];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[15] <= 1'b0;
end else if(1'b1) begin
dout[15] <= din[15];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[14] <= 1'b0;
end else if(1'b1) begin
dout[14] <= din[14];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[13] <= 1'b0;
end else if(1'b1) begin
dout[13] <= din[13];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[12] <= 1'b0;
end else if(1'b1) begin
dout[12] <= din[12];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[11] <= 1'b0;
end else if(1'b1) begin
dout[11] <= din[11];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[10] <= 1'b0;
end else if(1'b1) begin
dout[10] <= din[10];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[9] <= 1'b0;
end else if(1'b1) begin
dout[9] <= din[9];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[8] <= 1'b0;
end else if(1'b1) begin
dout[8] <= din[8];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[7] <= 1'b0;
end else if(1'b1) begin
dout[7] <= din[7];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[6] <= 1'b0;
end else if(1'b1) begin
dout[6] <= din[6];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[5] <= 1'b0;
end else if(1'b1) begin
dout[5] <= din[5];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[4] <= 1'b0;
end else if(1'b1) begin
dout[4] <= din[4];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[3] <= 1'b0;
end else if(1'b1) begin
dout[3] <= din[3];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[2] <= 1'b0;
end else if(1'b1) begin
dout[2] <= din[2];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[1] <= 1'b0;
end else if(1'b1) begin
dout[1] <= din[1];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[0] <= 1'b0;
end else if(1'b1) begin
dout[0] <= din[0];
end
end
assign N0 = ~rst_l;
endmodule
|
module rvdff_WIDTH9
(
din,
clk,
rst_l,
dout
);
input [8:0] din;
output [8:0] dout;
input clk;
input rst_l;
wire N0;
reg [8:0] dout;
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[8] <= 1'b0;
end else if(1'b1) begin
dout[8] <= din[8];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[7] <= 1'b0;
end else if(1'b1) begin
dout[7] <= din[7];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[6] <= 1'b0;
end else if(1'b1) begin
dout[6] <= din[6];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[5] <= 1'b0;
end else if(1'b1) begin
dout[5] <= din[5];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[4] <= 1'b0;
end else if(1'b1) begin
dout[4] <= din[4];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[3] <= 1'b0;
end else if(1'b1) begin
dout[3] <= din[3];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[2] <= 1'b0;
end else if(1'b1) begin
dout[2] <= din[2];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[1] <= 1'b0;
end else if(1'b1) begin
dout[1] <= din[1];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[0] <= 1'b0;
end else if(1'b1) begin
dout[0] <= din[0];
end
end
assign N0 = ~rst_l;
endmodule
|
module rveven_paritygen_WIDTH16
(
data_in,
parity_out
);
input [15:0] data_in;
output parity_out;
wire parity_out,N0,N1,N2,N3,N4,N5,N6,N7,N8,N9,N10,N11,N12,N13;
assign parity_out = N13 ^ data_in[0];
assign N13 = N12 ^ data_in[1];
assign N12 = N11 ^ data_in[2];
assign N11 = N10 ^ data_in[3];
assign N10 = N9 ^ data_in[4];
assign N9 = N8 ^ data_in[5];
assign N8 = N7 ^ data_in[6];
assign N7 = N6 ^ data_in[7];
assign N6 = N5 ^ data_in[8];
assign N5 = N4 ^ data_in[9];
assign N4 = N3 ^ data_in[10];
assign N3 = N2 ^ data_in[11];
assign N2 = N1 ^ data_in[12];
assign N1 = N0 ^ data_in[13];
assign N0 = data_in[15] ^ data_in[14];
endmodule
|
module rvdff_WIDTH38
(
din,
clk,
rst_l,
dout
);
input [37:0] din;
output [37:0] dout;
input clk;
input rst_l;
wire N0;
reg [37:0] dout;
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[37] <= 1'b0;
end else if(1'b1) begin
dout[37] <= din[37];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[36] <= 1'b0;
end else if(1'b1) begin
dout[36] <= din[36];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[35] <= 1'b0;
end else if(1'b1) begin
dout[35] <= din[35];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[34] <= 1'b0;
end else if(1'b1) begin
dout[34] <= din[34];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[33] <= 1'b0;
end else if(1'b1) begin
dout[33] <= din[33];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[32] <= 1'b0;
end else if(1'b1) begin
dout[32] <= din[32];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[31] <= 1'b0;
end else if(1'b1) begin
dout[31] <= din[31];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[30] <= 1'b0;
end else if(1'b1) begin
dout[30] <= din[30];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[29] <= 1'b0;
end else if(1'b1) begin
dout[29] <= din[29];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[28] <= 1'b0;
end else if(1'b1) begin
dout[28] <= din[28];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[27] <= 1'b0;
end else if(1'b1) begin
dout[27] <= din[27];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[26] <= 1'b0;
end else if(1'b1) begin
dout[26] <= din[26];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[25] <= 1'b0;
end else if(1'b1) begin
dout[25] <= din[25];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[24] <= 1'b0;
end else if(1'b1) begin
dout[24] <= din[24];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[23] <= 1'b0;
end else if(1'b1) begin
dout[23] <= din[23];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[22] <= 1'b0;
end else if(1'b1) begin
dout[22] <= din[22];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[21] <= 1'b0;
end else if(1'b1) begin
dout[21] <= din[21];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[20] <= 1'b0;
end else if(1'b1) begin
dout[20] <= din[20];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[19] <= 1'b0;
end else if(1'b1) begin
dout[19] <= din[19];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[18] <= 1'b0;
end else if(1'b1) begin
dout[18] <= din[18];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[17] <= 1'b0;
end else if(1'b1) begin
dout[17] <= din[17];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[16] <= 1'b0;
end else if(1'b1) begin
dout[16] <= din[16];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[15] <= 1'b0;
end else if(1'b1) begin
dout[15] <= din[15];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[14] <= 1'b0;
end else if(1'b1) begin
dout[14] <= din[14];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[13] <= 1'b0;
end else if(1'b1) begin
dout[13] <= din[13];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[12] <= 1'b0;
end else if(1'b1) begin
dout[12] <= din[12];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[11] <= 1'b0;
end else if(1'b1) begin
dout[11] <= din[11];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[10] <= 1'b0;
end else if(1'b1) begin
dout[10] <= din[10];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[9] <= 1'b0;
end else if(1'b1) begin
dout[9] <= din[9];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[8] <= 1'b0;
end else if(1'b1) begin
dout[8] <= din[8];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[7] <= 1'b0;
end else if(1'b1) begin
dout[7] <= din[7];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[6] <= 1'b0;
end else if(1'b1) begin
dout[6] <= din[6];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[5] <= 1'b0;
end else if(1'b1) begin
dout[5] <= din[5];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[4] <= 1'b0;
end else if(1'b1) begin
dout[4] <= din[4];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[3] <= 1'b0;
end else if(1'b1) begin
dout[3] <= din[3];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[2] <= 1'b0;
end else if(1'b1) begin
dout[2] <= din[2];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[1] <= 1'b0;
end else if(1'b1) begin
dout[1] <= din[1];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[0] <= 1'b0;
end else if(1'b1) begin
dout[0] <= din[0];
end
end
assign N0 = ~rst_l;
endmodule
|
module rvdff_WIDTH26
(
din,
clk,
rst_l,
dout
);
input [25:0] din;
output [25:0] dout;
input clk;
input rst_l;
wire N0;
reg [25:0] dout;
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[25] <= 1'b0;
end else if(1'b1) begin
dout[25] <= din[25];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[24] <= 1'b0;
end else if(1'b1) begin
dout[24] <= din[24];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[23] <= 1'b0;
end else if(1'b1) begin
dout[23] <= din[23];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[22] <= 1'b0;
end else if(1'b1) begin
dout[22] <= din[22];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[21] <= 1'b0;
end else if(1'b1) begin
dout[21] <= din[21];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[20] <= 1'b0;
end else if(1'b1) begin
dout[20] <= din[20];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[19] <= 1'b0;
end else if(1'b1) begin
dout[19] <= din[19];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[18] <= 1'b0;
end else if(1'b1) begin
dout[18] <= din[18];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[17] <= 1'b0;
end else if(1'b1) begin
dout[17] <= din[17];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[16] <= 1'b0;
end else if(1'b1) begin
dout[16] <= din[16];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[15] <= 1'b0;
end else if(1'b1) begin
dout[15] <= din[15];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[14] <= 1'b0;
end else if(1'b1) begin
dout[14] <= din[14];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[13] <= 1'b0;
end else if(1'b1) begin
dout[13] <= din[13];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[12] <= 1'b0;
end else if(1'b1) begin
dout[12] <= din[12];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[11] <= 1'b0;
end else if(1'b1) begin
dout[11] <= din[11];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[10] <= 1'b0;
end else if(1'b1) begin
dout[10] <= din[10];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[9] <= 1'b0;
end else if(1'b1) begin
dout[9] <= din[9];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[8] <= 1'b0;
end else if(1'b1) begin
dout[8] <= din[8];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[7] <= 1'b0;
end else if(1'b1) begin
dout[7] <= din[7];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[6] <= 1'b0;
end else if(1'b1) begin
dout[6] <= din[6];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[5] <= 1'b0;
end else if(1'b1) begin
dout[5] <= din[5];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[4] <= 1'b0;
end else if(1'b1) begin
dout[4] <= din[4];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[3] <= 1'b0;
end else if(1'b1) begin
dout[3] <= din[3];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[2] <= 1'b0;
end else if(1'b1) begin
dout[2] <= din[2];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[1] <= 1'b0;
end else if(1'b1) begin
dout[1] <= din[1];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[0] <= 1'b0;
end else if(1'b1) begin
dout[0] <= din[0];
end
end
assign N0 = ~rst_l;
endmodule
|
module rvdff_WIDTH11
(
din,
clk,
rst_l,
dout
);
input [10:0] din;
output [10:0] dout;
input clk;
input rst_l;
wire N0;
reg [10:0] dout;
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[10] <= 1'b0;
end else if(1'b1) begin
dout[10] <= din[10];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[9] <= 1'b0;
end else if(1'b1) begin
dout[9] <= din[9];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[8] <= 1'b0;
end else if(1'b1) begin
dout[8] <= din[8];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[7] <= 1'b0;
end else if(1'b1) begin
dout[7] <= din[7];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[6] <= 1'b0;
end else if(1'b1) begin
dout[6] <= din[6];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[5] <= 1'b0;
end else if(1'b1) begin
dout[5] <= din[5];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[4] <= 1'b0;
end else if(1'b1) begin
dout[4] <= din[4];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[3] <= 1'b0;
end else if(1'b1) begin
dout[3] <= din[3];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[2] <= 1'b0;
end else if(1'b1) begin
dout[2] <= din[2];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[1] <= 1'b0;
end else if(1'b1) begin
dout[1] <= din[1];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[0] <= 1'b0;
end else if(1'b1) begin
dout[0] <= din[0];
end
end
assign N0 = ~rst_l;
endmodule
|
module dmi_jtag_to_core_sync
(
rd_en,
wr_en,
rst_n,
clk,
reg_en,
reg_wr_en
);
input rd_en;
input wr_en;
input rst_n;
input clk;
output reg_en;
output reg_wr_en;
wire reg_en,reg_wr_en,c_rd_en,N0,N1,N2;
reg [2:0] wren,rden;
always @(posedge clk or posedge N0) begin
if(N0) begin
wren[2] <= 1'b0;
end else if(1'b1) begin
wren[2] <= wren[1];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
wren[1] <= 1'b0;
end else if(1'b1) begin
wren[1] <= wren[0];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
wren[0] <= 1'b0;
end else if(1'b1) begin
wren[0] <= wr_en;
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
rden[2] <= 1'b0;
end else if(1'b1) begin
rden[2] <= rden[1];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
rden[1] <= 1'b0;
end else if(1'b1) begin
rden[1] <= rden[0];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
rden[0] <= 1'b0;
end else if(1'b1) begin
rden[0] <= rd_en;
end
end
assign reg_en = reg_wr_en | c_rd_en;
assign N0 = ~rst_n;
assign c_rd_en = rden[1] & N1;
assign N1 = ~rden[2];
assign reg_wr_en = wren[1] & N2;
assign N2 = ~wren[2];
endmodule
|
module rvdff_WIDTH6
(
din,
clk,
rst_l,
dout
);
input [5:0] din;
output [5:0] dout;
input clk;
input rst_l;
wire N0;
reg [5:0] dout;
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[5] <= 1'b0;
end else if(1'b1) begin
dout[5] <= din[5];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[4] <= 1'b0;
end else if(1'b1) begin
dout[4] <= din[4];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[3] <= 1'b0;
end else if(1'b1) begin
dout[3] <= din[3];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[2] <= 1'b0;
end else if(1'b1) begin
dout[2] <= din[2];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[1] <= 1'b0;
end else if(1'b1) begin
dout[1] <= din[1];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[0] <= 1'b0;
end else if(1'b1) begin
dout[0] <= din[0];
end
end
assign N0 = ~rst_l;
endmodule
|
module rvdff_WIDTH76
(
din,
clk,
rst_l,
dout
);
input [75:0] din;
output [75:0] dout;
input clk;
input rst_l;
wire N0;
reg [75:0] dout;
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[75] <= 1'b0;
end else if(1'b1) begin
dout[75] <= din[75];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[74] <= 1'b0;
end else if(1'b1) begin
dout[74] <= din[74];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[73] <= 1'b0;
end else if(1'b1) begin
dout[73] <= din[73];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[72] <= 1'b0;
end else if(1'b1) begin
dout[72] <= din[72];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[71] <= 1'b0;
end else if(1'b1) begin
dout[71] <= din[71];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[70] <= 1'b0;
end else if(1'b1) begin
dout[70] <= din[70];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[69] <= 1'b0;
end else if(1'b1) begin
dout[69] <= din[69];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[68] <= 1'b0;
end else if(1'b1) begin
dout[68] <= din[68];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[67] <= 1'b0;
end else if(1'b1) begin
dout[67] <= din[67];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[66] <= 1'b0;
end else if(1'b1) begin
dout[66] <= din[66];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[65] <= 1'b0;
end else if(1'b1) begin
dout[65] <= din[65];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[64] <= 1'b0;
end else if(1'b1) begin
dout[64] <= din[64];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[63] <= 1'b0;
end else if(1'b1) begin
dout[63] <= din[63];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[62] <= 1'b0;
end else if(1'b1) begin
dout[62] <= din[62];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[61] <= 1'b0;
end else if(1'b1) begin
dout[61] <= din[61];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[60] <= 1'b0;
end else if(1'b1) begin
dout[60] <= din[60];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[59] <= 1'b0;
end else if(1'b1) begin
dout[59] <= din[59];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[58] <= 1'b0;
end else if(1'b1) begin
dout[58] <= din[58];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[57] <= 1'b0;
end else if(1'b1) begin
dout[57] <= din[57];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[56] <= 1'b0;
end else if(1'b1) begin
dout[56] <= din[56];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[55] <= 1'b0;
end else if(1'b1) begin
dout[55] <= din[55];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[54] <= 1'b0;
end else if(1'b1) begin
dout[54] <= din[54];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[53] <= 1'b0;
end else if(1'b1) begin
dout[53] <= din[53];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[52] <= 1'b0;
end else if(1'b1) begin
dout[52] <= din[52];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[51] <= 1'b0;
end else if(1'b1) begin
dout[51] <= din[51];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[50] <= 1'b0;
end else if(1'b1) begin
dout[50] <= din[50];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[49] <= 1'b0;
end else if(1'b1) begin
dout[49] <= din[49];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[48] <= 1'b0;
end else if(1'b1) begin
dout[48] <= din[48];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[47] <= 1'b0;
end else if(1'b1) begin
dout[47] <= din[47];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[46] <= 1'b0;
end else if(1'b1) begin
dout[46] <= din[46];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[45] <= 1'b0;
end else if(1'b1) begin
dout[45] <= din[45];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[44] <= 1'b0;
end else if(1'b1) begin
dout[44] <= din[44];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[43] <= 1'b0;
end else if(1'b1) begin
dout[43] <= din[43];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[42] <= 1'b0;
end else if(1'b1) begin
dout[42] <= din[42];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[41] <= 1'b0;
end else if(1'b1) begin
dout[41] <= din[41];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[40] <= 1'b0;
end else if(1'b1) begin
dout[40] <= din[40];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[39] <= 1'b0;
end else if(1'b1) begin
dout[39] <= din[39];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[38] <= 1'b0;
end else if(1'b1) begin
dout[38] <= din[38];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[37] <= 1'b0;
end else if(1'b1) begin
dout[37] <= din[37];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[36] <= 1'b0;
end else if(1'b1) begin
dout[36] <= din[36];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[35] <= 1'b0;
end else if(1'b1) begin
dout[35] <= din[35];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[34] <= 1'b0;
end else if(1'b1) begin
dout[34] <= din[34];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[33] <= 1'b0;
end else if(1'b1) begin
dout[33] <= din[33];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[32] <= 1'b0;
end else if(1'b1) begin
dout[32] <= din[32];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[31] <= 1'b0;
end else if(1'b1) begin
dout[31] <= din[31];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[30] <= 1'b0;
end else if(1'b1) begin
dout[30] <= din[30];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[29] <= 1'b0;
end else if(1'b1) begin
dout[29] <= din[29];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[28] <= 1'b0;
end else if(1'b1) begin
dout[28] <= din[28];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[27] <= 1'b0;
end else if(1'b1) begin
dout[27] <= din[27];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[26] <= 1'b0;
end else if(1'b1) begin
dout[26] <= din[26];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[25] <= 1'b0;
end else if(1'b1) begin
dout[25] <= din[25];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[24] <= 1'b0;
end else if(1'b1) begin
dout[24] <= din[24];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[23] <= 1'b0;
end else if(1'b1) begin
dout[23] <= din[23];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[22] <= 1'b0;
end else if(1'b1) begin
dout[22] <= din[22];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[21] <= 1'b0;
end else if(1'b1) begin
dout[21] <= din[21];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[20] <= 1'b0;
end else if(1'b1) begin
dout[20] <= din[20];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[19] <= 1'b0;
end else if(1'b1) begin
dout[19] <= din[19];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[18] <= 1'b0;
end else if(1'b1) begin
dout[18] <= din[18];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[17] <= 1'b0;
end else if(1'b1) begin
dout[17] <= din[17];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[16] <= 1'b0;
end else if(1'b1) begin
dout[16] <= din[16];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[15] <= 1'b0;
end else if(1'b1) begin
dout[15] <= din[15];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[14] <= 1'b0;
end else if(1'b1) begin
dout[14] <= din[14];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[13] <= 1'b0;
end else if(1'b1) begin
dout[13] <= din[13];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[12] <= 1'b0;
end else if(1'b1) begin
dout[12] <= din[12];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[11] <= 1'b0;
end else if(1'b1) begin
dout[11] <= din[11];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[10] <= 1'b0;
end else if(1'b1) begin
dout[10] <= din[10];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[9] <= 1'b0;
end else if(1'b1) begin
dout[9] <= din[9];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[8] <= 1'b0;
end else if(1'b1) begin
dout[8] <= din[8];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[7] <= 1'b0;
end else if(1'b1) begin
dout[7] <= din[7];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[6] <= 1'b0;
end else if(1'b1) begin
dout[6] <= din[6];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[5] <= 1'b0;
end else if(1'b1) begin
dout[5] <= din[5];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[4] <= 1'b0;
end else if(1'b1) begin
dout[4] <= din[4];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[3] <= 1'b0;
end else if(1'b1) begin
dout[3] <= din[3];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[2] <= 1'b0;
end else if(1'b1) begin
dout[2] <= din[2];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[1] <= 1'b0;
end else if(1'b1) begin
dout[1] <= din[1];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[0] <= 1'b0;
end else if(1'b1) begin
dout[0] <= din[0];
end
end
assign N0 = ~rst_l;
endmodule
|
module rvmaskandmatch
(
mask,
data,
masken,
match
);
input [31:0] mask;
input [31:0] data;
input masken;
output match;
wire match,N0,N1,N2,N3,N4,N5,N6,N7,N8,N9,N10,N11,N12,N13,N14,N15,N16,N17,N18,N19,N20,
N21,N22,N23,N24,N25,N26,N27,N28,N29,N30,N31,N32,N33,N34,N35,N36,N37,N38,N39,N40,
N41,N42,N43,N44,N45,N46,N47,N48,N49,N50,N51,N52,N53,N54,N55,N56,N57,N58,N59,N60,
N61,N62,masken_or_fullmask,N63,N64,N65,N66,N67,N68,N69,N70,N71,N72,N73,N74,N75,
N76,N77,N78,N79,N80,N81,N82,N83,N84,N85,N86,N87,N88,N89,N90,N91,N92,N93,N94,N95,
N96,N97,N98,N99,N100,N101,N102,N103,N104,N105,N106,N107,N108,N109,N110,N111,N112,
N113,N114,N115,N116,N117,N118,N119,N120,N121,N122,N123,N124,N125,N126,N127,N128,
N129,N130,N131,N132,N133,N134,N135,N136,N137,N138,N139,N140,N141,N142,N143,N144,
N145,N146,N147,N148,N149,N150,N151,N152,N153,N154,N155,N156,N157,N158,N159,N160,
N161,N162,N163,N164,N165,N166,N167,N168,N169,N170,N171,N172,N173,N174,N175,N176,
N177,N178,N179,N180,N181,N182,N183,N184,N185,N186,N187,N188,N189,N190,N191,N192,
N193,N194,N195,N196,N197,N198,N199,N200,N201,N202,N203,N204,N205,N206,N207,N208,
N209,N210,N211,N212,N213,N214,N215,N216,N217,N218,N219,N220,N221,N222,N223,N224,
N225,N226,N227,N228,N229,N230,N231,N232,N233,N234,N235,N236,N237,N238,N239,N240,
N241,N242,N243,N244,N245,N246,N247,N248,N249,N250,N251,N252,N253,N254,N255,N256,
N257,N258,N259,N260,N261,N262,N263,N264,N265,N266,N267,N268,N269,N270,N271,N272,
N273,N274,N275,N276,N277,N278,N279,N280,N281,N282,N283,N284,N285,N286,N287,N288,
N289,N290,N291,N292,N293,N294,N295,N296,N297,N298,N299,N300,N301,N302,N303,N304,
N305,N306,N307,N308,N309,N310,N311,N312,N313,N314,N315,N316,N317,N318,N319,N320,
N321,N322,N323,N324,N325,N326,N327,N328,N329,N330,N331,N332,N333,N334,N335,N336,
N337,N338,N339,N340,N341,N342,N343,N344,N345,N346,N347,N348,N349,N350,N351,N352,
N353,N354,N355,N356,N357,N358,N359,N360,N361,N362,N363,N364,N365,N366,N367,N368,
N369,N370,N371,N372,N373,N374,N375,N376,N377,N378,N379,N380,N381,N382,N383,N384,
N385,N386,N387,N388,N389,N390,N391,N392,N393,N394,N395,N396,N397,N398,N399,N400,
N401,N402,N403,N404,N405,N406,N407,N408,N409,N410,N411,N412,N413,N414,N415,N416,
N417,N418,N419,N420,N421,N422,N423,N424,N425,N426,N427,N428,N429,N430,N431,N432,
N433,N434,N435,N436,N437,N438,N439,N440,N441,N442,N443,N444,N445,N446,N447,N448,
N449,N450,N451,N452,N453,N454,N455,N456,N457,N458,N459,N460,N461,N462,N463,N464,
N465,N466,N467,N468,N469,N470,N471,N472,N473,N474,N475,N476,N477,N478,N479,N480,
N481,N482,N483,N484,N485,N486,N487,N488,N489,N490,N491,N492,N493,N494,N495,N496,
N497,N498,N499,N500,N501,N502,N503,N504,N505,N506,N507,N508,N509,N510,N511,N512,
N513,N514,N515,N516,N517,N518,N519,N520,N521,N522,N523,N524,N525,N526,N527,N528,
N529,N530,N531,N532,N533,N534,N535,N536,N537,N538,N539,N540,N541,N542,N543,N544,
N545,N546,N547,N548,N549,N550,N551,N552,N553,N554,N555,N556,N557,N558,N559,N560,
N561,N562,N563,N564,N565,N566,N567,N568,N569,N570,N571,N572,N573,N574,N575,N576,
N577,N578,N579,N580,N581,N582,N583,N584,N585,N586,N587,N588,N589,N590,N591,N592,
N593,N594,N595,N596,N597,N598,N599,N600,N601,N602,N603,N604,N605,N606,N607,N608,
N609,N610,N611,N612,N613,N614,N615,N616,N617,N618,N619,N620,N621,N622,N623,N624,
N625,N626,N627,N628,N629,N630,N631,N632,N633,N634,N635,N636,N637,N638,N639,N640,
N641,N642,N643,N644,N645,N646,N647,N648,N649,N650,N651,N652,N653,N654,N655,N656,
N657,N658,N659,N660,N661,N662,N663,N664,N665,N666,N667,N668,N669,N670,N671,N672,
N673,N674,N675,N676,N677,N678,N679,N680,N681,N682,N683;
wire [31:0] matchvec;
assign N0 = mask[0] ^ data[0];
assign N63 = ~N0;
assign N1 = mask[1] ^ data[1];
assign N66 = ~N1;
assign N2 = mask[2] ^ data[2];
assign N69 = ~N2;
assign N3 = mask[3] ^ data[3];
assign N72 = ~N3;
assign N4 = mask[4] ^ data[4];
assign N75 = ~N4;
assign N5 = mask[5] ^ data[5];
assign N78 = ~N5;
assign N6 = mask[6] ^ data[6];
assign N81 = ~N6;
assign N7 = mask[7] ^ data[7];
assign N84 = ~N7;
assign N8 = mask[8] ^ data[8];
assign N87 = ~N8;
assign N9 = mask[9] ^ data[9];
assign N90 = ~N9;
assign N10 = mask[10] ^ data[10];
assign N93 = ~N10;
assign N11 = mask[11] ^ data[11];
assign N96 = ~N11;
assign N12 = mask[12] ^ data[12];
assign N99 = ~N12;
assign N13 = mask[13] ^ data[13];
assign N102 = ~N13;
assign N14 = mask[14] ^ data[14];
assign N105 = ~N14;
assign N15 = mask[15] ^ data[15];
assign N108 = ~N15;
assign N16 = mask[16] ^ data[16];
assign N111 = ~N16;
assign N17 = mask[17] ^ data[17];
assign N114 = ~N17;
assign N18 = mask[18] ^ data[18];
assign N117 = ~N18;
assign N19 = mask[19] ^ data[19];
assign N120 = ~N19;
assign N20 = mask[20] ^ data[20];
assign N123 = ~N20;
assign N21 = mask[21] ^ data[21];
assign N126 = ~N21;
assign N22 = mask[22] ^ data[22];
assign N129 = ~N22;
assign N23 = mask[23] ^ data[23];
assign N132 = ~N23;
assign N24 = mask[24] ^ data[24];
assign N135 = ~N24;
assign N25 = mask[25] ^ data[25];
assign N138 = ~N25;
assign N26 = mask[26] ^ data[26];
assign N141 = ~N26;
assign N27 = mask[27] ^ data[27];
assign N144 = ~N27;
assign N28 = mask[28] ^ data[28];
assign N147 = ~N28;
assign N29 = mask[29] ^ data[29];
assign N150 = ~N29;
assign N30 = mask[30] ^ data[30];
assign N153 = ~N30;
assign N31 = mask[31] ^ data[31];
assign N156 = ~N31;
assign matchvec[1] = (N32)? 1'b1 :
(N65)? N66 : 1'b0;
assign N32 = N64;
assign matchvec[2] = (N33)? 1'b1 :
(N68)? N69 : 1'b0;
assign N33 = N67;
assign matchvec[3] = (N34)? 1'b1 :
(N71)? N72 : 1'b0;
assign N34 = N70;
assign matchvec[4] = (N35)? 1'b1 :
(N74)? N75 : 1'b0;
assign N35 = N73;
assign matchvec[5] = (N36)? 1'b1 :
(N77)? N78 : 1'b0;
assign N36 = N76;
assign matchvec[6] = (N37)? 1'b1 :
(N80)? N81 : 1'b0;
assign N37 = N79;
assign matchvec[7] = (N38)? 1'b1 :
(N83)? N84 : 1'b0;
assign N38 = N82;
assign matchvec[8] = (N39)? 1'b1 :
(N86)? N87 : 1'b0;
assign N39 = N85;
assign matchvec[9] = (N40)? 1'b1 :
(N89)? N90 : 1'b0;
assign N40 = N88;
assign matchvec[10] = (N41)? 1'b1 :
(N92)? N93 : 1'b0;
assign N41 = N91;
assign matchvec[11] = (N42)? 1'b1 :
(N95)? N96 : 1'b0;
assign N42 = N94;
assign matchvec[12] = (N43)? 1'b1 :
(N98)? N99 : 1'b0;
assign N43 = N97;
assign matchvec[13] = (N44)? 1'b1 :
(N101)? N102 : 1'b0;
assign N44 = N100;
assign matchvec[14] = (N45)? 1'b1 :
(N104)? N105 : 1'b0;
assign N45 = N103;
assign matchvec[15] = (N46)? 1'b1 :
(N107)? N108 : 1'b0;
assign N46 = N106;
assign matchvec[16] = (N47)? 1'b1 :
(N110)? N111 : 1'b0;
assign N47 = N109;
assign matchvec[17] = (N48)? 1'b1 :
(N113)? N114 : 1'b0;
assign N48 = N112;
assign matchvec[18] = (N49)? 1'b1 :
(N116)? N117 : 1'b0;
assign N49 = N115;
assign matchvec[19] = (N50)? 1'b1 :
(N119)? N120 : 1'b0;
assign N50 = N118;
assign matchvec[20] = (N51)? 1'b1 :
(N122)? N123 : 1'b0;
assign N51 = N121;
assign matchvec[21] = (N52)? 1'b1 :
(N125)? N126 : 1'b0;
assign N52 = N124;
assign matchvec[22] = (N53)? 1'b1 :
(N128)? N129 : 1'b0;
assign N53 = N127;
assign matchvec[23] = (N54)? 1'b1 :
(N131)? N132 : 1'b0;
assign N54 = N130;
assign matchvec[24] = (N55)? 1'b1 :
(N134)? N135 : 1'b0;
assign N55 = N133;
assign matchvec[25] = (N56)? 1'b1 :
(N137)? N138 : 1'b0;
assign N56 = N136;
assign matchvec[26] = (N57)? 1'b1 :
(N140)? N141 : 1'b0;
assign N57 = N139;
assign matchvec[27] = (N58)? 1'b1 :
(N143)? N144 : 1'b0;
assign N58 = N142;
assign matchvec[28] = (N59)? 1'b1 :
(N146)? N147 : 1'b0;
assign N59 = N145;
assign matchvec[29] = (N60)? 1'b1 :
(N149)? N150 : 1'b0;
assign N60 = N148;
assign matchvec[30] = (N61)? 1'b1 :
(N152)? N153 : 1'b0;
assign N61 = N151;
assign matchvec[31] = (N62)? 1'b1 :
(N155)? N156 : 1'b0;
assign N62 = N154;
assign masken_or_fullmask = masken & N188;
assign N188 = ~N187;
assign N187 = N186 & mask[0];
assign N186 = N185 & mask[1];
assign N185 = N184 & mask[2];
assign N184 = N183 & mask[3];
assign N183 = N182 & mask[4];
assign N182 = N181 & mask[5];
assign N181 = N180 & mask[6];
assign N180 = N179 & mask[7];
assign N179 = N178 & mask[8];
assign N178 = N177 & mask[9];
assign N177 = N176 & mask[10];
assign N176 = N175 & mask[11];
assign N175 = N174 & mask[12];
assign N174 = N173 & mask[13];
assign N173 = N172 & mask[14];
assign N172 = N171 & mask[15];
assign N171 = N170 & mask[16];
assign N170 = N169 & mask[17];
assign N169 = N168 & mask[18];
assign N168 = N167 & mask[19];
assign N167 = N166 & mask[20];
assign N166 = N165 & mask[21];
assign N165 = N164 & mask[22];
assign N164 = N163 & mask[23];
assign N163 = N162 & mask[24];
assign N162 = N161 & mask[25];
assign N161 = N160 & mask[26];
assign N160 = N159 & mask[27];
assign N159 = N158 & mask[28];
assign N158 = N157 & mask[29];
assign N157 = mask[31] & mask[30];
assign matchvec[0] = masken_or_fullmask | N63;
assign N64 = mask[0] & masken_or_fullmask;
assign N65 = ~N64;
assign N67 = N189 & masken_or_fullmask;
assign N189 = mask[1] & mask[0];
assign N68 = ~N67;
assign N70 = N191 & masken_or_fullmask;
assign N191 = N190 & mask[0];
assign N190 = mask[2] & mask[1];
assign N71 = ~N70;
assign N73 = N194 & masken_or_fullmask;
assign N194 = N193 & mask[0];
assign N193 = N192 & mask[1];
assign N192 = mask[3] & mask[2];
assign N74 = ~N73;
assign N76 = N198 & masken_or_fullmask;
assign N198 = N197 & mask[0];
assign N197 = N196 & mask[1];
assign N196 = N195 & mask[2];
assign N195 = mask[4] & mask[3];
assign N77 = ~N76;
assign N79 = N203 & masken_or_fullmask;
assign N203 = N202 & mask[0];
assign N202 = N201 & mask[1];
assign N201 = N200 & mask[2];
assign N200 = N199 & mask[3];
assign N199 = mask[5] & mask[4];
assign N80 = ~N79;
assign N82 = N209 & masken_or_fullmask;
assign N209 = N208 & mask[0];
assign N208 = N207 & mask[1];
assign N207 = N206 & mask[2];
assign N206 = N205 & mask[3];
assign N205 = N204 & mask[4];
assign N204 = mask[6] & mask[5];
assign N83 = ~N82;
assign N85 = N216 & masken_or_fullmask;
assign N216 = N215 & mask[0];
assign N215 = N214 & mask[1];
assign N214 = N213 & mask[2];
assign N213 = N212 & mask[3];
assign N212 = N211 & mask[4];
assign N211 = N210 & mask[5];
assign N210 = mask[7] & mask[6];
assign N86 = ~N85;
assign N88 = N224 & masken_or_fullmask;
assign N224 = N223 & mask[0];
assign N223 = N222 & mask[1];
assign N222 = N221 & mask[2];
assign N221 = N220 & mask[3];
assign N220 = N219 & mask[4];
assign N219 = N218 & mask[5];
assign N218 = N217 & mask[6];
assign N217 = mask[8] & mask[7];
assign N89 = ~N88;
assign N91 = N233 & masken_or_fullmask;
assign N233 = N232 & mask[0];
assign N232 = N231 & mask[1];
assign N231 = N230 & mask[2];
assign N230 = N229 & mask[3];
assign N229 = N228 & mask[4];
assign N228 = N227 & mask[5];
assign N227 = N226 & mask[6];
assign N226 = N225 & mask[7];
assign N225 = mask[9] & mask[8];
assign N92 = ~N91;
assign N94 = N243 & masken_or_fullmask;
assign N243 = N242 & mask[0];
assign N242 = N241 & mask[1];
assign N241 = N240 & mask[2];
assign N240 = N239 & mask[3];
assign N239 = N238 & mask[4];
assign N238 = N237 & mask[5];
assign N237 = N236 & mask[6];
assign N236 = N235 & mask[7];
assign N235 = N234 & mask[8];
assign N234 = mask[10] & mask[9];
assign N95 = ~N94;
assign N97 = N254 & masken_or_fullmask;
assign N254 = N253 & mask[0];
assign N253 = N252 & mask[1];
assign N252 = N251 & mask[2];
assign N251 = N250 & mask[3];
assign N250 = N249 & mask[4];
assign N249 = N248 & mask[5];
assign N248 = N247 & mask[6];
assign N247 = N246 & mask[7];
assign N246 = N245 & mask[8];
assign N245 = N244 & mask[9];
assign N244 = mask[11] & mask[10];
assign N98 = ~N97;
assign N100 = N266 & masken_or_fullmask;
assign N266 = N265 & mask[0];
assign N265 = N264 & mask[1];
assign N264 = N263 & mask[2];
assign N263 = N262 & mask[3];
assign N262 = N261 & mask[4];
assign N261 = N260 & mask[5];
assign N260 = N259 & mask[6];
assign N259 = N258 & mask[7];
assign N258 = N257 & mask[8];
assign N257 = N256 & mask[9];
assign N256 = N255 & mask[10];
assign N255 = mask[12] & mask[11];
assign N101 = ~N100;
assign N103 = N279 & masken_or_fullmask;
assign N279 = N278 & mask[0];
assign N278 = N277 & mask[1];
assign N277 = N276 & mask[2];
assign N276 = N275 & mask[3];
assign N275 = N274 & mask[4];
assign N274 = N273 & mask[5];
assign N273 = N272 & mask[6];
assign N272 = N271 & mask[7];
assign N271 = N270 & mask[8];
assign N270 = N269 & mask[9];
assign N269 = N268 & mask[10];
assign N268 = N267 & mask[11];
assign N267 = mask[13] & mask[12];
assign N104 = ~N103;
assign N106 = N293 & masken_or_fullmask;
assign N293 = N292 & mask[0];
assign N292 = N291 & mask[1];
assign N291 = N290 & mask[2];
assign N290 = N289 & mask[3];
assign N289 = N288 & mask[4];
assign N288 = N287 & mask[5];
assign N287 = N286 & mask[6];
assign N286 = N285 & mask[7];
assign N285 = N284 & mask[8];
assign N284 = N283 & mask[9];
assign N283 = N282 & mask[10];
assign N282 = N281 & mask[11];
assign N281 = N280 & mask[12];
assign N280 = mask[14] & mask[13];
assign N107 = ~N106;
assign N109 = N308 & masken_or_fullmask;
assign N308 = N307 & mask[0];
assign N307 = N306 & mask[1];
assign N306 = N305 & mask[2];
assign N305 = N304 & mask[3];
assign N304 = N303 & mask[4];
assign N303 = N302 & mask[5];
assign N302 = N301 & mask[6];
assign N301 = N300 & mask[7];
assign N300 = N299 & mask[8];
assign N299 = N298 & mask[9];
assign N298 = N297 & mask[10];
assign N297 = N296 & mask[11];
assign N296 = N295 & mask[12];
assign N295 = N294 & mask[13];
assign N294 = mask[15] & mask[14];
assign N110 = ~N109;
assign N112 = N324 & masken_or_fullmask;
assign N324 = N323 & mask[0];
assign N323 = N322 & mask[1];
assign N322 = N321 & mask[2];
assign N321 = N320 & mask[3];
assign N320 = N319 & mask[4];
assign N319 = N318 & mask[5];
assign N318 = N317 & mask[6];
assign N317 = N316 & mask[7];
assign N316 = N315 & mask[8];
assign N315 = N314 & mask[9];
assign N314 = N313 & mask[10];
assign N313 = N312 & mask[11];
assign N312 = N311 & mask[12];
assign N311 = N310 & mask[13];
assign N310 = N309 & mask[14];
assign N309 = mask[16] & mask[15];
assign N113 = ~N112;
assign N115 = N341 & masken_or_fullmask;
assign N341 = N340 & mask[0];
assign N340 = N339 & mask[1];
assign N339 = N338 & mask[2];
assign N338 = N337 & mask[3];
assign N337 = N336 & mask[4];
assign N336 = N335 & mask[5];
assign N335 = N334 & mask[6];
assign N334 = N333 & mask[7];
assign N333 = N332 & mask[8];
assign N332 = N331 & mask[9];
assign N331 = N330 & mask[10];
assign N330 = N329 & mask[11];
assign N329 = N328 & mask[12];
assign N328 = N327 & mask[13];
assign N327 = N326 & mask[14];
assign N326 = N325 & mask[15];
assign N325 = mask[17] & mask[16];
assign N116 = ~N115;
assign N118 = N359 & masken_or_fullmask;
assign N359 = N358 & mask[0];
assign N358 = N357 & mask[1];
assign N357 = N356 & mask[2];
assign N356 = N355 & mask[3];
assign N355 = N354 & mask[4];
assign N354 = N353 & mask[5];
assign N353 = N352 & mask[6];
assign N352 = N351 & mask[7];
assign N351 = N350 & mask[8];
assign N350 = N349 & mask[9];
assign N349 = N348 & mask[10];
assign N348 = N347 & mask[11];
assign N347 = N346 & mask[12];
assign N346 = N345 & mask[13];
assign N345 = N344 & mask[14];
assign N344 = N343 & mask[15];
assign N343 = N342 & mask[16];
assign N342 = mask[18] & mask[17];
assign N119 = ~N118;
assign N121 = N378 & masken_or_fullmask;
assign N378 = N377 & mask[0];
assign N377 = N376 & mask[1];
assign N376 = N375 & mask[2];
assign N375 = N374 & mask[3];
assign N374 = N373 & mask[4];
assign N373 = N372 & mask[5];
assign N372 = N371 & mask[6];
assign N371 = N370 & mask[7];
assign N370 = N369 & mask[8];
assign N369 = N368 & mask[9];
assign N368 = N367 & mask[10];
assign N367 = N366 & mask[11];
assign N366 = N365 & mask[12];
assign N365 = N364 & mask[13];
assign N364 = N363 & mask[14];
assign N363 = N362 & mask[15];
assign N362 = N361 & mask[16];
assign N361 = N360 & mask[17];
assign N360 = mask[19] & mask[18];
assign N122 = ~N121;
assign N124 = N398 & masken_or_fullmask;
assign N398 = N397 & mask[0];
assign N397 = N396 & mask[1];
assign N396 = N395 & mask[2];
assign N395 = N394 & mask[3];
assign N394 = N393 & mask[4];
assign N393 = N392 & mask[5];
assign N392 = N391 & mask[6];
assign N391 = N390 & mask[7];
assign N390 = N389 & mask[8];
assign N389 = N388 & mask[9];
assign N388 = N387 & mask[10];
assign N387 = N386 & mask[11];
assign N386 = N385 & mask[12];
assign N385 = N384 & mask[13];
assign N384 = N383 & mask[14];
assign N383 = N382 & mask[15];
assign N382 = N381 & mask[16];
assign N381 = N380 & mask[17];
assign N380 = N379 & mask[18];
assign N379 = mask[20] & mask[19];
assign N125 = ~N124;
assign N127 = N419 & masken_or_fullmask;
assign N419 = N418 & mask[0];
assign N418 = N417 & mask[1];
assign N417 = N416 & mask[2];
assign N416 = N415 & mask[3];
assign N415 = N414 & mask[4];
assign N414 = N413 & mask[5];
assign N413 = N412 & mask[6];
assign N412 = N411 & mask[7];
assign N411 = N410 & mask[8];
assign N410 = N409 & mask[9];
assign N409 = N408 & mask[10];
assign N408 = N407 & mask[11];
assign N407 = N406 & mask[12];
assign N406 = N405 & mask[13];
assign N405 = N404 & mask[14];
assign N404 = N403 & mask[15];
assign N403 = N402 & mask[16];
assign N402 = N401 & mask[17];
assign N401 = N400 & mask[18];
assign N400 = N399 & mask[19];
assign N399 = mask[21] & mask[20];
assign N128 = ~N127;
assign N130 = N441 & masken_or_fullmask;
assign N441 = N440 & mask[0];
assign N440 = N439 & mask[1];
assign N439 = N438 & mask[2];
assign N438 = N437 & mask[3];
assign N437 = N436 & mask[4];
assign N436 = N435 & mask[5];
assign N435 = N434 & mask[6];
assign N434 = N433 & mask[7];
assign N433 = N432 & mask[8];
assign N432 = N431 & mask[9];
assign N431 = N430 & mask[10];
assign N430 = N429 & mask[11];
assign N429 = N428 & mask[12];
assign N428 = N427 & mask[13];
assign N427 = N426 & mask[14];
assign N426 = N425 & mask[15];
assign N425 = N424 & mask[16];
assign N424 = N423 & mask[17];
assign N423 = N422 & mask[18];
assign N422 = N421 & mask[19];
assign N421 = N420 & mask[20];
assign N420 = mask[22] & mask[21];
assign N131 = ~N130;
assign N133 = N464 & masken_or_fullmask;
assign N464 = N463 & mask[0];
assign N463 = N462 & mask[1];
assign N462 = N461 & mask[2];
assign N461 = N460 & mask[3];
assign N460 = N459 & mask[4];
assign N459 = N458 & mask[5];
assign N458 = N457 & mask[6];
assign N457 = N456 & mask[7];
assign N456 = N455 & mask[8];
assign N455 = N454 & mask[9];
assign N454 = N453 & mask[10];
assign N453 = N452 & mask[11];
assign N452 = N451 & mask[12];
assign N451 = N450 & mask[13];
assign N450 = N449 & mask[14];
assign N449 = N448 & mask[15];
assign N448 = N447 & mask[16];
assign N447 = N446 & mask[17];
assign N446 = N445 & mask[18];
assign N445 = N444 & mask[19];
assign N444 = N443 & mask[20];
assign N443 = N442 & mask[21];
assign N442 = mask[23] & mask[22];
assign N134 = ~N133;
assign N136 = N488 & masken_or_fullmask;
assign N488 = N487 & mask[0];
assign N487 = N486 & mask[1];
assign N486 = N485 & mask[2];
assign N485 = N484 & mask[3];
assign N484 = N483 & mask[4];
assign N483 = N482 & mask[5];
assign N482 = N481 & mask[6];
assign N481 = N480 & mask[7];
assign N480 = N479 & mask[8];
assign N479 = N478 & mask[9];
assign N478 = N477 & mask[10];
assign N477 = N476 & mask[11];
assign N476 = N475 & mask[12];
assign N475 = N474 & mask[13];
assign N474 = N473 & mask[14];
assign N473 = N472 & mask[15];
assign N472 = N471 & mask[16];
assign N471 = N470 & mask[17];
assign N470 = N469 & mask[18];
assign N469 = N468 & mask[19];
assign N468 = N467 & mask[20];
assign N467 = N466 & mask[21];
assign N466 = N465 & mask[22];
assign N465 = mask[24] & mask[23];
assign N137 = ~N136;
assign N139 = N513 & masken_or_fullmask;
assign N513 = N512 & mask[0];
assign N512 = N511 & mask[1];
assign N511 = N510 & mask[2];
assign N510 = N509 & mask[3];
assign N509 = N508 & mask[4];
assign N508 = N507 & mask[5];
assign N507 = N506 & mask[6];
assign N506 = N505 & mask[7];
assign N505 = N504 & mask[8];
assign N504 = N503 & mask[9];
assign N503 = N502 & mask[10];
assign N502 = N501 & mask[11];
assign N501 = N500 & mask[12];
assign N500 = N499 & mask[13];
assign N499 = N498 & mask[14];
assign N498 = N497 & mask[15];
assign N497 = N496 & mask[16];
assign N496 = N495 & mask[17];
assign N495 = N494 & mask[18];
assign N494 = N493 & mask[19];
assign N493 = N492 & mask[20];
assign N492 = N491 & mask[21];
assign N491 = N490 & mask[22];
assign N490 = N489 & mask[23];
assign N489 = mask[25] & mask[24];
assign N140 = ~N139;
assign N142 = N539 & masken_or_fullmask;
assign N539 = N538 & mask[0];
assign N538 = N537 & mask[1];
assign N537 = N536 & mask[2];
assign N536 = N535 & mask[3];
assign N535 = N534 & mask[4];
assign N534 = N533 & mask[5];
assign N533 = N532 & mask[6];
assign N532 = N531 & mask[7];
assign N531 = N530 & mask[8];
assign N530 = N529 & mask[9];
assign N529 = N528 & mask[10];
assign N528 = N527 & mask[11];
assign N527 = N526 & mask[12];
assign N526 = N525 & mask[13];
assign N525 = N524 & mask[14];
assign N524 = N523 & mask[15];
assign N523 = N522 & mask[16];
assign N522 = N521 & mask[17];
assign N521 = N520 & mask[18];
assign N520 = N519 & mask[19];
assign N519 = N518 & mask[20];
assign N518 = N517 & mask[21];
assign N517 = N516 & mask[22];
assign N516 = N515 & mask[23];
assign N515 = N514 & mask[24];
assign N514 = mask[26] & mask[25];
assign N143 = ~N142;
assign N145 = N566 & masken_or_fullmask;
assign N566 = N565 & mask[0];
assign N565 = N564 & mask[1];
assign N564 = N563 & mask[2];
assign N563 = N562 & mask[3];
assign N562 = N561 & mask[4];
assign N561 = N560 & mask[5];
assign N560 = N559 & mask[6];
assign N559 = N558 & mask[7];
assign N558 = N557 & mask[8];
assign N557 = N556 & mask[9];
assign N556 = N555 & mask[10];
assign N555 = N554 & mask[11];
assign N554 = N553 & mask[12];
assign N553 = N552 & mask[13];
assign N552 = N551 & mask[14];
assign N551 = N550 & mask[15];
assign N550 = N549 & mask[16];
assign N549 = N548 & mask[17];
assign N548 = N547 & mask[18];
assign N547 = N546 & mask[19];
assign N546 = N545 & mask[20];
assign N545 = N544 & mask[21];
assign N544 = N543 & mask[22];
assign N543 = N542 & mask[23];
assign N542 = N541 & mask[24];
assign N541 = N540 & mask[25];
assign N540 = mask[27] & mask[26];
assign N146 = ~N145;
assign N148 = N594 & masken_or_fullmask;
assign N594 = N593 & mask[0];
assign N593 = N592 & mask[1];
assign N592 = N591 & mask[2];
assign N591 = N590 & mask[3];
assign N590 = N589 & mask[4];
assign N589 = N588 & mask[5];
assign N588 = N587 & mask[6];
assign N587 = N586 & mask[7];
assign N586 = N585 & mask[8];
assign N585 = N584 & mask[9];
assign N584 = N583 & mask[10];
assign N583 = N582 & mask[11];
assign N582 = N581 & mask[12];
assign N581 = N580 & mask[13];
assign N580 = N579 & mask[14];
assign N579 = N578 & mask[15];
assign N578 = N577 & mask[16];
assign N577 = N576 & mask[17];
assign N576 = N575 & mask[18];
assign N575 = N574 & mask[19];
assign N574 = N573 & mask[20];
assign N573 = N572 & mask[21];
assign N572 = N571 & mask[22];
assign N571 = N570 & mask[23];
assign N570 = N569 & mask[24];
assign N569 = N568 & mask[25];
assign N568 = N567 & mask[26];
assign N567 = mask[28] & mask[27];
assign N149 = ~N148;
assign N151 = N623 & masken_or_fullmask;
assign N623 = N622 & mask[0];
assign N622 = N621 & mask[1];
assign N621 = N620 & mask[2];
assign N620 = N619 & mask[3];
assign N619 = N618 & mask[4];
assign N618 = N617 & mask[5];
assign N617 = N616 & mask[6];
assign N616 = N615 & mask[7];
assign N615 = N614 & mask[8];
assign N614 = N613 & mask[9];
assign N613 = N612 & mask[10];
assign N612 = N611 & mask[11];
assign N611 = N610 & mask[12];
assign N610 = N609 & mask[13];
assign N609 = N608 & mask[14];
assign N608 = N607 & mask[15];
assign N607 = N606 & mask[16];
assign N606 = N605 & mask[17];
assign N605 = N604 & mask[18];
assign N604 = N603 & mask[19];
assign N603 = N602 & mask[20];
assign N602 = N601 & mask[21];
assign N601 = N600 & mask[22];
assign N600 = N599 & mask[23];
assign N599 = N598 & mask[24];
assign N598 = N597 & mask[25];
assign N597 = N596 & mask[26];
assign N596 = N595 & mask[27];
assign N595 = mask[29] & mask[28];
assign N152 = ~N151;
assign N154 = N653 & masken_or_fullmask;
assign N653 = N652 & mask[0];
assign N652 = N651 & mask[1];
assign N651 = N650 & mask[2];
assign N650 = N649 & mask[3];
assign N649 = N648 & mask[4];
assign N648 = N647 & mask[5];
assign N647 = N646 & mask[6];
assign N646 = N645 & mask[7];
assign N645 = N644 & mask[8];
assign N644 = N643 & mask[9];
assign N643 = N642 & mask[10];
assign N642 = N641 & mask[11];
assign N641 = N640 & mask[12];
assign N640 = N639 & mask[13];
assign N639 = N638 & mask[14];
assign N638 = N637 & mask[15];
assign N637 = N636 & mask[16];
assign N636 = N635 & mask[17];
assign N635 = N634 & mask[18];
assign N634 = N633 & mask[19];
assign N633 = N632 & mask[20];
assign N632 = N631 & mask[21];
assign N631 = N630 & mask[22];
assign N630 = N629 & mask[23];
assign N629 = N628 & mask[24];
assign N628 = N627 & mask[25];
assign N627 = N626 & mask[26];
assign N626 = N625 & mask[27];
assign N625 = N624 & mask[28];
assign N624 = mask[30] & mask[29];
assign N155 = ~N154;
assign match = N683 & matchvec[0];
assign N683 = N682 & matchvec[1];
assign N682 = N681 & matchvec[2];
assign N681 = N680 & matchvec[3];
assign N680 = N679 & matchvec[4];
assign N679 = N678 & matchvec[5];
assign N678 = N677 & matchvec[6];
assign N677 = N676 & matchvec[7];
assign N676 = N675 & matchvec[8];
assign N675 = N674 & matchvec[9];
assign N674 = N673 & matchvec[10];
assign N673 = N672 & matchvec[11];
assign N672 = N671 & matchvec[12];
assign N671 = N670 & matchvec[13];
assign N670 = N669 & matchvec[14];
assign N669 = N668 & matchvec[15];
assign N668 = N667 & matchvec[16];
assign N667 = N666 & matchvec[17];
assign N666 = N665 & matchvec[18];
assign N665 = N664 & matchvec[19];
assign N664 = N663 & matchvec[20];
assign N663 = N662 & matchvec[21];
assign N662 = N661 & matchvec[22];
assign N661 = N660 & matchvec[23];
assign N660 = N659 & matchvec[24];
assign N659 = N658 & matchvec[25];
assign N658 = N657 & matchvec[26];
assign N657 = N656 & matchvec[27];
assign N656 = N655 & matchvec[28];
assign N655 = N654 & matchvec[29];
assign N654 = matchvec[31] & matchvec[30];
endmodule
|
module rvdff_WIDTH48
(
din,
clk,
rst_l,
dout
);
input [47:0] din;
output [47:0] dout;
input clk;
input rst_l;
wire N0;
reg [47:0] dout;
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[47] <= 1'b0;
end else if(1'b1) begin
dout[47] <= din[47];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[46] <= 1'b0;
end else if(1'b1) begin
dout[46] <= din[46];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[45] <= 1'b0;
end else if(1'b1) begin
dout[45] <= din[45];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[44] <= 1'b0;
end else if(1'b1) begin
dout[44] <= din[44];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[43] <= 1'b0;
end else if(1'b1) begin
dout[43] <= din[43];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[42] <= 1'b0;
end else if(1'b1) begin
dout[42] <= din[42];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[41] <= 1'b0;
end else if(1'b1) begin
dout[41] <= din[41];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[40] <= 1'b0;
end else if(1'b1) begin
dout[40] <= din[40];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[39] <= 1'b0;
end else if(1'b1) begin
dout[39] <= din[39];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[38] <= 1'b0;
end else if(1'b1) begin
dout[38] <= din[38];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[37] <= 1'b0;
end else if(1'b1) begin
dout[37] <= din[37];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[36] <= 1'b0;
end else if(1'b1) begin
dout[36] <= din[36];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[35] <= 1'b0;
end else if(1'b1) begin
dout[35] <= din[35];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[34] <= 1'b0;
end else if(1'b1) begin
dout[34] <= din[34];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[33] <= 1'b0;
end else if(1'b1) begin
dout[33] <= din[33];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[32] <= 1'b0;
end else if(1'b1) begin
dout[32] <= din[32];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[31] <= 1'b0;
end else if(1'b1) begin
dout[31] <= din[31];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[30] <= 1'b0;
end else if(1'b1) begin
dout[30] <= din[30];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[29] <= 1'b0;
end else if(1'b1) begin
dout[29] <= din[29];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[28] <= 1'b0;
end else if(1'b1) begin
dout[28] <= din[28];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[27] <= 1'b0;
end else if(1'b1) begin
dout[27] <= din[27];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[26] <= 1'b0;
end else if(1'b1) begin
dout[26] <= din[26];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[25] <= 1'b0;
end else if(1'b1) begin
dout[25] <= din[25];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[24] <= 1'b0;
end else if(1'b1) begin
dout[24] <= din[24];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[23] <= 1'b0;
end else if(1'b1) begin
dout[23] <= din[23];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[22] <= 1'b0;
end else if(1'b1) begin
dout[22] <= din[22];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[21] <= 1'b0;
end else if(1'b1) begin
dout[21] <= din[21];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[20] <= 1'b0;
end else if(1'b1) begin
dout[20] <= din[20];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[19] <= 1'b0;
end else if(1'b1) begin
dout[19] <= din[19];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[18] <= 1'b0;
end else if(1'b1) begin
dout[18] <= din[18];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[17] <= 1'b0;
end else if(1'b1) begin
dout[17] <= din[17];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[16] <= 1'b0;
end else if(1'b1) begin
dout[16] <= din[16];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[15] <= 1'b0;
end else if(1'b1) begin
dout[15] <= din[15];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[14] <= 1'b0;
end else if(1'b1) begin
dout[14] <= din[14];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[13] <= 1'b0;
end else if(1'b1) begin
dout[13] <= din[13];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[12] <= 1'b0;
end else if(1'b1) begin
dout[12] <= din[12];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[11] <= 1'b0;
end else if(1'b1) begin
dout[11] <= din[11];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[10] <= 1'b0;
end else if(1'b1) begin
dout[10] <= din[10];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[9] <= 1'b0;
end else if(1'b1) begin
dout[9] <= din[9];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[8] <= 1'b0;
end else if(1'b1) begin
dout[8] <= din[8];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[7] <= 1'b0;
end else if(1'b1) begin
dout[7] <= din[7];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[6] <= 1'b0;
end else if(1'b1) begin
dout[6] <= din[6];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[5] <= 1'b0;
end else if(1'b1) begin
dout[5] <= din[5];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[4] <= 1'b0;
end else if(1'b1) begin
dout[4] <= din[4];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[3] <= 1'b0;
end else if(1'b1) begin
dout[3] <= din[3];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[2] <= 1'b0;
end else if(1'b1) begin
dout[2] <= din[2];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[1] <= 1'b0;
end else if(1'b1) begin
dout[1] <= din[1];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[0] <= 1'b0;
end else if(1'b1) begin
dout[0] <= din[0];
end
end
assign N0 = ~rst_l;
endmodule
|
module rvdff_WIDTH10
(
din,
clk,
rst_l,
dout
);
input [9:0] din;
output [9:0] dout;
input clk;
input rst_l;
wire N0;
reg [9:0] dout;
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[9] <= 1'b0;
end else if(1'b1) begin
dout[9] <= din[9];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[8] <= 1'b0;
end else if(1'b1) begin
dout[8] <= din[8];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[7] <= 1'b0;
end else if(1'b1) begin
dout[7] <= din[7];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[6] <= 1'b0;
end else if(1'b1) begin
dout[6] <= din[6];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[5] <= 1'b0;
end else if(1'b1) begin
dout[5] <= din[5];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[4] <= 1'b0;
end else if(1'b1) begin
dout[4] <= din[4];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[3] <= 1'b0;
end else if(1'b1) begin
dout[3] <= din[3];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[2] <= 1'b0;
end else if(1'b1) begin
dout[2] <= din[2];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[1] <= 1'b0;
end else if(1'b1) begin
dout[1] <= din[1];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[0] <= 1'b0;
end else if(1'b1) begin
dout[0] <= din[0];
end
end
assign N0 = ~rst_l;
endmodule
|
module rvdff_WIDTH68
(
din,
clk,
rst_l,
dout
);
input [67:0] din;
output [67:0] dout;
input clk;
input rst_l;
wire N0;
reg [67:0] dout;
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[67] <= 1'b0;
end else if(1'b1) begin
dout[67] <= din[67];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[66] <= 1'b0;
end else if(1'b1) begin
dout[66] <= din[66];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[65] <= 1'b0;
end else if(1'b1) begin
dout[65] <= din[65];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[64] <= 1'b0;
end else if(1'b1) begin
dout[64] <= din[64];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[63] <= 1'b0;
end else if(1'b1) begin
dout[63] <= din[63];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[62] <= 1'b0;
end else if(1'b1) begin
dout[62] <= din[62];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[61] <= 1'b0;
end else if(1'b1) begin
dout[61] <= din[61];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[60] <= 1'b0;
end else if(1'b1) begin
dout[60] <= din[60];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[59] <= 1'b0;
end else if(1'b1) begin
dout[59] <= din[59];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[58] <= 1'b0;
end else if(1'b1) begin
dout[58] <= din[58];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[57] <= 1'b0;
end else if(1'b1) begin
dout[57] <= din[57];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[56] <= 1'b0;
end else if(1'b1) begin
dout[56] <= din[56];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[55] <= 1'b0;
end else if(1'b1) begin
dout[55] <= din[55];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[54] <= 1'b0;
end else if(1'b1) begin
dout[54] <= din[54];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[53] <= 1'b0;
end else if(1'b1) begin
dout[53] <= din[53];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[52] <= 1'b0;
end else if(1'b1) begin
dout[52] <= din[52];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[51] <= 1'b0;
end else if(1'b1) begin
dout[51] <= din[51];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[50] <= 1'b0;
end else if(1'b1) begin
dout[50] <= din[50];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[49] <= 1'b0;
end else if(1'b1) begin
dout[49] <= din[49];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[48] <= 1'b0;
end else if(1'b1) begin
dout[48] <= din[48];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[47] <= 1'b0;
end else if(1'b1) begin
dout[47] <= din[47];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[46] <= 1'b0;
end else if(1'b1) begin
dout[46] <= din[46];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[45] <= 1'b0;
end else if(1'b1) begin
dout[45] <= din[45];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[44] <= 1'b0;
end else if(1'b1) begin
dout[44] <= din[44];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[43] <= 1'b0;
end else if(1'b1) begin
dout[43] <= din[43];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[42] <= 1'b0;
end else if(1'b1) begin
dout[42] <= din[42];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[41] <= 1'b0;
end else if(1'b1) begin
dout[41] <= din[41];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[40] <= 1'b0;
end else if(1'b1) begin
dout[40] <= din[40];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[39] <= 1'b0;
end else if(1'b1) begin
dout[39] <= din[39];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[38] <= 1'b0;
end else if(1'b1) begin
dout[38] <= din[38];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[37] <= 1'b0;
end else if(1'b1) begin
dout[37] <= din[37];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[36] <= 1'b0;
end else if(1'b1) begin
dout[36] <= din[36];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[35] <= 1'b0;
end else if(1'b1) begin
dout[35] <= din[35];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[34] <= 1'b0;
end else if(1'b1) begin
dout[34] <= din[34];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[33] <= 1'b0;
end else if(1'b1) begin
dout[33] <= din[33];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[32] <= 1'b0;
end else if(1'b1) begin
dout[32] <= din[32];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[31] <= 1'b0;
end else if(1'b1) begin
dout[31] <= din[31];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[30] <= 1'b0;
end else if(1'b1) begin
dout[30] <= din[30];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[29] <= 1'b0;
end else if(1'b1) begin
dout[29] <= din[29];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[28] <= 1'b0;
end else if(1'b1) begin
dout[28] <= din[28];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[27] <= 1'b0;
end else if(1'b1) begin
dout[27] <= din[27];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[26] <= 1'b0;
end else if(1'b1) begin
dout[26] <= din[26];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[25] <= 1'b0;
end else if(1'b1) begin
dout[25] <= din[25];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[24] <= 1'b0;
end else if(1'b1) begin
dout[24] <= din[24];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[23] <= 1'b0;
end else if(1'b1) begin
dout[23] <= din[23];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[22] <= 1'b0;
end else if(1'b1) begin
dout[22] <= din[22];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[21] <= 1'b0;
end else if(1'b1) begin
dout[21] <= din[21];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[20] <= 1'b0;
end else if(1'b1) begin
dout[20] <= din[20];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[19] <= 1'b0;
end else if(1'b1) begin
dout[19] <= din[19];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[18] <= 1'b0;
end else if(1'b1) begin
dout[18] <= din[18];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[17] <= 1'b0;
end else if(1'b1) begin
dout[17] <= din[17];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[16] <= 1'b0;
end else if(1'b1) begin
dout[16] <= din[16];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[15] <= 1'b0;
end else if(1'b1) begin
dout[15] <= din[15];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[14] <= 1'b0;
end else if(1'b1) begin
dout[14] <= din[14];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[13] <= 1'b0;
end else if(1'b1) begin
dout[13] <= din[13];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[12] <= 1'b0;
end else if(1'b1) begin
dout[12] <= din[12];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[11] <= 1'b0;
end else if(1'b1) begin
dout[11] <= din[11];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[10] <= 1'b0;
end else if(1'b1) begin
dout[10] <= din[10];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[9] <= 1'b0;
end else if(1'b1) begin
dout[9] <= din[9];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[8] <= 1'b0;
end else if(1'b1) begin
dout[8] <= din[8];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[7] <= 1'b0;
end else if(1'b1) begin
dout[7] <= din[7];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[6] <= 1'b0;
end else if(1'b1) begin
dout[6] <= din[6];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[5] <= 1'b0;
end else if(1'b1) begin
dout[5] <= din[5];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[4] <= 1'b0;
end else if(1'b1) begin
dout[4] <= din[4];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[3] <= 1'b0;
end else if(1'b1) begin
dout[3] <= din[3];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[2] <= 1'b0;
end else if(1'b1) begin
dout[2] <= din[2];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[1] <= 1'b0;
end else if(1'b1) begin
dout[1] <= din[1];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[0] <= 1'b0;
end else if(1'b1) begin
dout[0] <= din[0];
end
end
assign N0 = ~rst_l;
endmodule
|
module ifu_compress_ctl
(
din,
dout,
legal
);
input [15:0] din;
output [31:0] dout;
output legal;
wire [31:0] dout;
wire legal,l1_30,rdrd,rdprd,rs2prd,rdeq1,rdeq2,rdrs1,rdprs1,rs1eq2,rs2rs2,rs2prs2,
simm5_0,uimm9_2,simm9_4,ulwimm6_2,ulwspimm7_2,uimm5_0,sjaloffset11_1,sluimm17_12,
sbroffset8_1,uswimm6_2,uswspimm7_2,l3_11,l3_10,l3_9,l3_8,l3_7,N0,N1,N2,N3,N4,N5,
N6,N7,N8,N9,N10,N11,N12,N13,N14,N15,N16,N17,N18,N19,N20,N21,N22,N23,N24,N25,N26,
N27,N28,N29,N30,N31,N32,N33,N34,N35,N36,N37,N38,N39,N40,N41,N42,N43,N44,N45,N46,
N47,N48,N49,N50,N51,N52,N53,N54,N55,N56,N57,N58,N59,N60,N61,N62,N63,N64,N65,N66,
N67,N68,N69,N70,N71,N72,N73,N74,N75,N76,N77,N78,N79,N80,N81,N82,N83,N84,N85,N86,
N87,N88,N89,N90,N91,N92,N93,N94,N95,N96,N97,N98,N99,N100,N101,N102,N103,N104,N105,
N106,N107,N108,N109,N110,N111,N112,N113,N114,N115,N116,N117,N118,N119,N120,N121,
N122,N123,N124,N125,N126,N127,N128,N129,N130,N131,N132,N133,N134,N135,N136,N137,
N138,N139,N140,N141,N142,N143,N144,N145,N146,N147,N148,N149,N150,N151,N152,N153,
N154,N155,N156,N157,N158,N159,N160,N161,N162,N163,N164,N165,N166,N167,N168,N169,
N170,N171,N172,N173,N174,N175,N176,N177,N178,N179,N180,N181,N182,N183,N184,N185,
N186,N187,N188,N189,N190,N191,N192,N193,N194,N195,N196,N197,N198,N199,N200,N201,
N202,N203,N204,N205,N206,N207,N208,N209,N210,N211,N212,N213,N214,N215,N216,N217,
N218,N219,N220,N221,N222,N223,N224,N225,N226,N227,N228,N229,N230,N231,N232,N233,
N234,N235,N236,N237,N238,N239,N240,N241,N242,N243,N244,N245,N246,N247,N248,N249,
N250,N251,N252,N253,N254,N255,N256,N257,N258,N259,N260,N261,N262,N263,N264,N265,
N266,N267,N268,N269,N270,N271,N272,N273,N274,N275,N276,N277,N278,N279,N280,N281,
N282,N283,N284,N285,N286,N287,N288,N289,N290,N291,N292,N293,N294,N295,N296,N297,
N298,N299,N300,N301,N302,N303,N304,N305,N306,N307,N308,N309,N310,N311,N312,N313,
N314,N315,N316,N317,N318,N319,N320,N321,N322,N323,N324,N325,N326,N327,N328,N329,
N330,N331,N332,N333,N334,N335,N336,N337,N338,N339,N340,N341,N342,N343,N344,N345,
N346,N347,N348,N349,N350,N351,N352,N353,N354,N355,N356,N357,N358,N359,N360,N361,
N362,N363,N364,N365,N366,N367,N368,N369,N370,N371,N372,N373,N374,N375,N376,N377,
N378,N379,N380,N381,N382,N383,N384,N385,N386,N387,N388,N389,N390,N391,N392,N393,
N394,N395,N396,N397,N398,N399,N400,N401,N402,N403,N404,N405,N406,N407,N408,N409,
N410,N411,N412,N413,N414,N415,N416,N417,N418,N419,N420,N421,N422,N423,N424,N425,
N426,N427,N428,N429,N430,N431,N432,N433,N434,N435,N436,N437,N438,N439,N440,N441,
N442,N443,N444,N445,N446,N447,N448,N449,N450,N451,N452,N453,N454,N455,N456,N457,
N458,N459,N460,N461,N462,N463,N464,N465,N466,N467,N468,N469,N470,N471,N472,N473,
N474,N475,N476,N477,N478,N479,N480,N481,N482,N483,N484,N485,N486,N487,N488,N489,
N490,N491,N492,N493,N494,N495,N496,N497,N498,N499,N500,N501,N502,N503,N504,N505,
N506,N507,N508,N509,N510,N511,N512,N513,N514,N515,N516,N517,N518,N519,N520,N521,
N522,N523,N524,N525,N526,N527,N528,N529,N530,N531,N532,N533,N534,N535,N536,N537,
N538,N539,N540,N541,N542,N543,N544,N545,N546,N547,N548,N549,N550,N551,N552,N553,
N554,N555,N556,N557,N558,N559,N560,N561,N562,N563,N564,N565,N566,N567,N568,N569,
N570,N571,N572,N573,N574,N575,N576,N577,N578,N579,N580,N581,N582,N583,N584,N585,
N586,N587,N588,N589,N590,N591,N592,N593,N594,N595,N596,N597,N598,N599,N600,N601,
N602,N603,N604,N605,N606,N607,N608,N609,N610,N611,N612,N613,N614,N615,N616,N617,
N618,N619,N620,N621,N622,N623,N624,N625,N626,N627,N628,N629,N630,N631,N632,N633,
N634,N635,N636,N637,N638,N639,N640,N641,N642,N643,N644,N645,N646,N647,N648,N649,
N650,N651,N652,N653,N654,N655,N656,N657,N658,N659,N660,N661,N662,N663,N664,N665,
N666,N667,N668,N669,N670,N671,N672,N673,N674,N675,N676,N677,N678,N679,N680,N681,
N682,N683,N684,N685,N686,N687,N688,N689,N690,N691,N692,N693,N694,N695,N696,N697,
N698,N699,N700,N701,N702,N703,N704,N705,N706,N707,N708,N709,N710,N711,N712,N713,
N714,N715,N716,N717,N718,N719,N720,N721,N722,N723,N724,N725,N726,N727,N728,N729,
N730,N731,N732,N733,N734,N735,N736,N737,N738,N739,N740,N741,N742,N743,N744,N745,
N746,N747;
wire [24:2] l1;
wire [20:20] o;
wire [31:12] l2;
wire [31:25] l3;
assign l1[11] = N14 | N15;
assign N14 = N12 | N13;
assign N12 = 1'b0 | N11;
assign N11 = rdrd & din[11];
assign N13 = rdprd & 1'b0;
assign N15 = rs2prd & 1'b0;
assign l1[10] = N19 | N20;
assign N19 = N17 | N18;
assign N17 = 1'b0 | N16;
assign N16 = rdrd & din[10];
assign N18 = rdprd & 1'b1;
assign N20 = rs2prd & 1'b1;
assign l1[9] = N24 | N25;
assign N24 = N22 | N23;
assign N22 = 1'b0 | N21;
assign N21 = rdrd & din[9];
assign N23 = rdprd & din[9];
assign N25 = rs2prd & din[4];
assign l1[8] = N31 | rdeq2;
assign N31 = N29 | N30;
assign N29 = N27 | N28;
assign N27 = 1'b0 | N26;
assign N26 = rdrd & din[8];
assign N28 = rdprd & din[8];
assign N30 = rs2prd & din[3];
assign l1[7] = N37 | rdeq1;
assign N37 = N35 | N36;
assign N35 = N33 | N34;
assign N33 = 1'b0 | N32;
assign N32 = rdrd & din[7];
assign N34 = rdprd & din[7];
assign N36 = rs2prd & din[2];
assign l1[19] = N39 | N40;
assign N39 = 1'b0 | N38;
assign N38 = rdrs1 & din[11];
assign N40 = rdprs1 & 1'b0;
assign l1[18] = N42 | N43;
assign N42 = 1'b0 | N41;
assign N41 = rdrs1 & din[10];
assign N43 = rdprs1 & 1'b1;
assign l1[17] = N45 | N46;
assign N45 = 1'b0 | N44;
assign N44 = rdrs1 & din[9];
assign N46 = rdprs1 & din[9];
assign l1[16] = N50 | rs1eq2;
assign N50 = N48 | N49;
assign N48 = 1'b0 | N47;
assign N47 = rdrs1 & din[8];
assign N49 = rdprs1 & din[8];
assign l1[15] = N52 | N53;
assign N52 = 1'b0 | N51;
assign N51 = rdrs1 & din[7];
assign N53 = rdprs1 & din[7];
assign l1[24] = N55 | N56;
assign N55 = 1'b0 | N54;
assign N54 = rs2rs2 & din[6];
assign N56 = rs2prs2 & 1'b0;
assign l1[23] = N58 | N59;
assign N58 = 1'b0 | N57;
assign N57 = rs2rs2 & din[5];
assign N59 = rs2prs2 & 1'b1;
assign l1[22] = N61 | N62;
assign N61 = 1'b0 | N60;
assign N60 = rs2rs2 & din[4];
assign N62 = rs2prs2 & din[4];
assign l1[21] = N64 | N65;
assign N64 = 1'b0 | N63;
assign N63 = rs2rs2 & din[3];
assign N65 = rs2prs2 & din[3];
assign l1[20] = N67 | N68;
assign N67 = o[20] | N66;
assign N66 = rs2rs2 & din[2];
assign N68 = rs2prs2 & din[2];
assign l2[31] = N74 | N75;
assign N74 = N72 | N73;
assign N72 = N70 | N71;
assign N70 = 1'b0 | N69;
assign N69 = simm5_0 & din[12];
assign N71 = simm9_4 & din[12];
assign N73 = sjaloffset11_1 & din[12];
assign N75 = sluimm17_12 & din[12];
assign l2[30] = N81 | N82;
assign N81 = N79 | N80;
assign N79 = N77 | N78;
assign N77 = l1_30 | N76;
assign N76 = simm5_0 & din[12];
assign N78 = simm9_4 & din[12];
assign N80 = sjaloffset11_1 & din[8];
assign N82 = sluimm17_12 & din[12];
assign l2[29] = N90 | N91;
assign N90 = N88 | N89;
assign N88 = N86 | N87;
assign N86 = N84 | N85;
assign N84 = 1'b0 | N83;
assign N83 = simm5_0 & din[12];
assign N85 = uimm9_2 & din[10];
assign N87 = simm9_4 & din[12];
assign N89 = sjaloffset11_1 & din[10];
assign N91 = sluimm17_12 & din[12];
assign l2[28] = N99 | N100;
assign N99 = N97 | N98;
assign N97 = N95 | N96;
assign N95 = N93 | N94;
assign N93 = 1'b0 | N92;
assign N92 = simm5_0 & din[12];
assign N94 = uimm9_2 & din[9];
assign N96 = simm9_4 & din[4];
assign N98 = sjaloffset11_1 & din[9];
assign N100 = sluimm17_12 & din[12];
assign l2[27] = N110 | N111;
assign N110 = N108 | N109;
assign N108 = N106 | N107;
assign N106 = N104 | N105;
assign N104 = N102 | N103;
assign N102 = 1'b0 | N101;
assign N101 = simm5_0 & din[12];
assign N103 = uimm9_2 & din[8];
assign N105 = simm9_4 & din[3];
assign N107 = ulwspimm7_2 & din[3];
assign N109 = sjaloffset11_1 & din[6];
assign N111 = sluimm17_12 & din[12];
assign l2[26] = N123 | N124;
assign N123 = N121 | N122;
assign N121 = N119 | N120;
assign N119 = N117 | N118;
assign N117 = N115 | N116;
assign N115 = N113 | N114;
assign N113 = 1'b0 | N112;
assign N112 = simm5_0 & din[12];
assign N114 = uimm9_2 & din[7];
assign N116 = simm9_4 & din[5];
assign N118 = ulwimm6_2 & din[5];
assign N120 = ulwspimm7_2 & din[2];
assign N122 = sjaloffset11_1 & din[7];
assign N124 = sluimm17_12 & din[12];
assign l2[25] = N138 | N139;
assign N138 = N136 | N137;
assign N136 = N134 | N135;
assign N134 = N132 | N133;
assign N132 = N130 | N131;
assign N130 = N128 | N129;
assign N128 = N126 | N127;
assign N126 = 1'b0 | N125;
assign N125 = simm5_0 & din[12];
assign N127 = uimm9_2 & din[12];
assign N129 = simm9_4 & din[2];
assign N131 = ulwimm6_2 & din[12];
assign N133 = ulwspimm7_2 & din[12];
assign N135 = uimm5_0 & din[12];
assign N137 = sjaloffset11_1 & din[2];
assign N139 = sluimm17_12 & din[12];
assign l2[24] = N153 | N154;
assign N153 = N151 | N152;
assign N151 = N149 | N150;
assign N149 = N147 | N148;
assign N147 = N145 | N146;
assign N145 = N143 | N144;
assign N143 = N141 | N142;
assign N141 = l1[24] | N140;
assign N140 = simm5_0 & din[6];
assign N142 = uimm9_2 & din[11];
assign N144 = simm9_4 & din[6];
assign N146 = ulwimm6_2 & din[11];
assign N148 = ulwspimm7_2 & din[6];
assign N150 = uimm5_0 & din[6];
assign N152 = sjaloffset11_1 & din[11];
assign N154 = sluimm17_12 & din[12];
assign l2[23] = N166 | N167;
assign N166 = N164 | N165;
assign N164 = N162 | N163;
assign N162 = N160 | N161;
assign N160 = N158 | N159;
assign N158 = N156 | N157;
assign N156 = l1[23] | N155;
assign N155 = simm5_0 & din[5];
assign N157 = uimm9_2 & din[5];
assign N159 = ulwimm6_2 & din[10];
assign N161 = ulwspimm7_2 & din[5];
assign N163 = uimm5_0 & din[5];
assign N165 = sjaloffset11_1 & din[5];
assign N167 = sluimm17_12 & din[12];
assign l2[22] = N179 | N180;
assign N179 = N177 | N178;
assign N177 = N175 | N176;
assign N175 = N173 | N174;
assign N173 = N171 | N172;
assign N171 = N169 | N170;
assign N169 = l1[22] | N168;
assign N168 = simm5_0 & din[4];
assign N170 = uimm9_2 & din[6];
assign N172 = ulwimm6_2 & din[6];
assign N174 = ulwspimm7_2 & din[4];
assign N176 = uimm5_0 & din[4];
assign N178 = sjaloffset11_1 & din[4];
assign N180 = sluimm17_12 & din[12];
assign l2[21] = N186 | N187;
assign N186 = N184 | N185;
assign N184 = N182 | N183;
assign N182 = l1[21] | N181;
assign N181 = simm5_0 & din[3];
assign N183 = uimm5_0 & din[3];
assign N185 = sjaloffset11_1 & din[3];
assign N187 = sluimm17_12 & din[12];
assign l2[20] = N193 | N194;
assign N193 = N191 | N192;
assign N191 = N189 | N190;
assign N189 = l1[20] | N188;
assign N188 = simm5_0 & din[2];
assign N190 = uimm5_0 & din[2];
assign N192 = sjaloffset11_1 & din[12];
assign N194 = sluimm17_12 & din[12];
assign l2[19] = N196 | N197;
assign N196 = l1[19] | N195;
assign N195 = sjaloffset11_1 & din[12];
assign N197 = sluimm17_12 & din[12];
assign l2[18] = N199 | N200;
assign N199 = l1[18] | N198;
assign N198 = sjaloffset11_1 & din[12];
assign N200 = sluimm17_12 & din[12];
assign l2[17] = N202 | N203;
assign N202 = l1[17] | N201;
assign N201 = sjaloffset11_1 & din[12];
assign N203 = sluimm17_12 & din[12];
assign l2[16] = N205 | N206;
assign N205 = l1[16] | N204;
assign N204 = sjaloffset11_1 & din[12];
assign N206 = sluimm17_12 & din[6];
assign l2[15] = N208 | N209;
assign N208 = l1[15] | N207;
assign N207 = sjaloffset11_1 & din[12];
assign N209 = sluimm17_12 & din[5];
assign l2[14] = N211 | N212;
assign N211 = l1[14] | N210;
assign N210 = sjaloffset11_1 & din[12];
assign N212 = sluimm17_12 & din[4];
assign l2[13] = N214 | N215;
assign N214 = l1[13] | N213;
assign N213 = sjaloffset11_1 & din[12];
assign N215 = sluimm17_12 & din[3];
assign l2[12] = N217 | N218;
assign N217 = l1[12] | N216;
assign N216 = sjaloffset11_1 & din[12];
assign N218 = sluimm17_12 & din[2];
assign l3[31] = l2[31] | N219;
assign N219 = sbroffset8_1 & din[12];
assign l3[30] = l2[30] | N220;
assign N220 = sbroffset8_1 & din[12];
assign l3[29] = l2[29] | N221;
assign N221 = sbroffset8_1 & din[12];
assign l3[28] = l2[28] | N222;
assign N222 = sbroffset8_1 & din[12];
assign l3[27] = N224 | N225;
assign N224 = l2[27] | N223;
assign N223 = sbroffset8_1 & din[6];
assign N225 = uswspimm7_2 & din[8];
assign l3[26] = N229 | N230;
assign N229 = N227 | N228;
assign N227 = l2[26] | N226;
assign N226 = sbroffset8_1 & din[5];
assign N228 = uswimm6_2 & din[5];
assign N230 = uswspimm7_2 & din[7];
assign l3[25] = N234 | N235;
assign N234 = N232 | N233;
assign N232 = l2[25] | N231;
assign N231 = sbroffset8_1 & din[2];
assign N233 = uswimm6_2 & din[12];
assign N235 = uswspimm7_2 & din[12];
assign l3_11 = N239 | N240;
assign N239 = N237 | N238;
assign N237 = l1[11] | N236;
assign N236 = sbroffset8_1 & din[11];
assign N238 = uswimm6_2 & din[11];
assign N240 = uswspimm7_2 & din[11];
assign l3_10 = N244 | N245;
assign N244 = N242 | N243;
assign N242 = l1[10] | N241;
assign N241 = sbroffset8_1 & din[10];
assign N243 = uswimm6_2 & din[10];
assign N245 = uswspimm7_2 & din[10];
assign l3_9 = N249 | N250;
assign N249 = N247 | N248;
assign N247 = l1[9] | N246;
assign N246 = sbroffset8_1 & din[4];
assign N248 = uswimm6_2 & din[6];
assign N250 = uswspimm7_2 & din[9];
assign l3_8 = l1[8] | N251;
assign N251 = sbroffset8_1 & din[3];
assign l3_7 = l1[7] | N252;
assign N252 = sbroffset8_1 & din[12];
assign dout[31] = l3[31] & legal;
assign dout[30] = l3[30] & legal;
assign dout[29] = l3[29] & legal;
assign dout[28] = l3[28] & legal;
assign dout[27] = l3[27] & legal;
assign dout[26] = l3[26] & legal;
assign dout[25] = l3[25] & legal;
assign dout[24] = l2[24] & legal;
assign dout[23] = l2[23] & legal;
assign dout[22] = l2[22] & legal;
assign dout[21] = l2[21] & legal;
assign dout[20] = l2[20] & legal;
assign dout[19] = l2[19] & legal;
assign dout[18] = l2[18] & legal;
assign dout[17] = l2[17] & legal;
assign dout[16] = l2[16] & legal;
assign dout[15] = l2[15] & legal;
assign dout[14] = l2[14] & legal;
assign dout[13] = l2[13] & legal;
assign dout[12] = l2[12] & legal;
assign dout[11] = l3_11 & legal;
assign dout[10] = l3_10 & legal;
assign dout[9] = l3_9 & legal;
assign dout[8] = l3_8 & legal;
assign dout[7] = l3_7 & legal;
assign dout[6] = l1[6] & legal;
assign dout[5] = l1[5] & legal;
assign dout[4] = l1[4] & legal;
assign dout[3] = l1[3] & legal;
assign dout[2] = l1[2] & legal;
assign dout[1] = 1'b1 & legal;
assign dout[0] = 1'b1 & legal;
assign N0 = N288 & din[14];
assign rdrd = N284 | N287;
assign N284 = N282 | N283;
assign N282 = N279 | N281;
assign N279 = N276 | N278;
assign N276 = N272 | N275;
assign N272 = N269 | N271;
assign N269 = N266 | N268;
assign N266 = N263 | N265;
assign N263 = N260 | N262;
assign N260 = N257 | N259;
assign N257 = N254 | N256;
assign N254 = N253 & din[1];
assign N253 = N352 & din[6];
assign N256 = N255 & din[0];
assign N255 = N0 & din[11];
assign N259 = N258 & din[1];
assign N258 = N352 & din[5];
assign N262 = N261 & din[0];
assign N261 = N0 & din[10];
assign N265 = N264 & din[1];
assign N264 = N352 & din[4];
assign N268 = N267 & din[0];
assign N267 = N0 & din[9];
assign N271 = N270 & din[1];
assign N270 = N352 & din[3];
assign N275 = N274 & din[0];
assign N274 = N0 & N273;
assign N273 = ~din[8];
assign N278 = N277 & din[1];
assign N277 = N352 & din[2];
assign N281 = N280 & din[0];
assign N280 = N0 & din[7];
assign N283 = N288 & din[1];
assign N287 = N286 & din[0];
assign N286 = N288 & N285;
assign N285 = ~din[13];
assign N1 = N288 & N352;
assign N288 = ~din[15];
assign rdrs1 = N334 | N335;
assign N334 = N331 | N333;
assign N331 = N328 | N330;
assign N328 = N325 | N327;
assign N325 = N322 | N324;
assign N322 = N319 | N321;
assign N319 = N316 | N318;
assign N316 = N302 | N315;
assign N302 = N299 | N301;
assign N299 = N296 | N298;
assign N296 = N293 | N295;
assign N293 = N290 | N292;
assign N290 = N289 & din[1];
assign N289 = N6 & din[11];
assign N292 = N291 & din[1];
assign N291 = N6 & din[10];
assign N295 = N294 & din[1];
assign N294 = N6 & din[9];
assign N298 = N297 & din[1];
assign N297 = N6 & din[8];
assign N301 = N300 & din[1];
assign N300 = N6 & din[7];
assign N315 = N314 & din[1];
assign N314 = N312 & N313;
assign N312 = N310 & N311;
assign N310 = N308 & N309;
assign N308 = N306 & N307;
assign N306 = N304 & N305;
assign N304 = N352 & N303;
assign N303 = ~din[12];
assign N305 = ~din[6];
assign N307 = ~din[5];
assign N309 = ~din[4];
assign N311 = ~din[3];
assign N313 = ~din[2];
assign N318 = N317 & din[1];
assign N317 = N6 & din[6];
assign N321 = N320 & din[1];
assign N320 = N6 & din[5];
assign N324 = N323 & din[1];
assign N323 = N6 & din[4];
assign N327 = N326 & din[1];
assign N326 = N6 & din[3];
assign N330 = N329 & din[1];
assign N329 = N6 & din[2];
assign N333 = N332 & din[0];
assign N332 = N1 & N285;
assign N335 = N1 & din[1];
assign rs2rs2 = N349 | N351;
assign N349 = N346 | N348;
assign N346 = N343 | N345;
assign N343 = N340 | N342;
assign N340 = N337 | N339;
assign N337 = N336 & din[1];
assign N336 = din[15] & din[6];
assign N339 = N338 & din[1];
assign N338 = din[15] & din[5];
assign N342 = N341 & din[1];
assign N341 = din[15] & din[4];
assign N345 = N344 & din[1];
assign N344 = din[15] & din[3];
assign N348 = N347 & din[1];
assign N347 = din[15] & din[2];
assign N351 = N350 & din[1];
assign N350 = din[15] & din[14];
assign rdprd = N354 & din[0];
assign N354 = N353 & N285;
assign N353 = din[15] & N352;
assign N352 = ~din[14];
assign rdprs1 = N359 | N363;
assign N359 = N356 | N358;
assign N356 = N355 & din[0];
assign N355 = din[15] & N285;
assign N358 = N357 & din[0];
assign N357 = din[15] & din[14];
assign N363 = N361 & N362;
assign N361 = din[14] & N360;
assign N360 = ~din[1];
assign N362 = ~din[0];
assign rs2prs2 = N368 | N370;
assign N368 = N367 & din[0];
assign N367 = N366 & din[10];
assign N366 = N365 & din[11];
assign N365 = N364 & N285;
assign N364 = din[15] & N352;
assign N370 = N369 & N362;
assign N369 = din[15] & N360;
assign rs2prd = N371 & N362;
assign N371 = N288 & N360;
assign uimm9_2 = N372 & N362;
assign N372 = N352 & N360;
assign ulwimm6_2 = N374 & N362;
assign N374 = N373 & N360;
assign N373 = N288 & din[14];
assign ulwspimm7_2 = N375 & din[1];
assign N375 = N288 & din[14];
assign rdeq2 = N384 & N385;
assign N384 = N383 & din[8];
assign N383 = N381 & N382;
assign N381 = N379 & N380;
assign N379 = N377 & N378;
assign N377 = N376 & din[13];
assign N376 = N288 & din[14];
assign N378 = ~din[11];
assign N380 = ~din[10];
assign N382 = ~din[9];
assign N385 = ~din[7];
assign rdeq1 = N424 | N426;
assign N424 = N416 | N423;
assign N416 = N408 | N415;
assign N408 = N400 | N407;
assign N400 = N392 | N399;
assign N392 = N391 & din[1];
assign N391 = N390 & N313;
assign N390 = N389 & N311;
assign N389 = N388 & N309;
assign N388 = N387 & N307;
assign N387 = N386 & N305;
assign N386 = N6 & din[11];
assign N399 = N398 & din[1];
assign N398 = N397 & N313;
assign N397 = N396 & N311;
assign N396 = N395 & N309;
assign N395 = N394 & N307;
assign N394 = N393 & N305;
assign N393 = N6 & din[10];
assign N407 = N406 & din[1];
assign N406 = N405 & N313;
assign N405 = N404 & N311;
assign N404 = N403 & N309;
assign N403 = N402 & N307;
assign N402 = N401 & N305;
assign N401 = N6 & din[9];
assign N415 = N414 & din[1];
assign N414 = N413 & N313;
assign N413 = N412 & N311;
assign N412 = N411 & N309;
assign N411 = N410 & N307;
assign N410 = N409 & N305;
assign N409 = N6 & din[8];
assign N423 = N422 & din[1];
assign N422 = N421 & N313;
assign N421 = N420 & N311;
assign N420 = N419 & N309;
assign N419 = N418 & N307;
assign N418 = N417 & N305;
assign N417 = N6 & din[7];
assign N426 = N425 & din[13];
assign N425 = N288 & N352;
assign rs1eq2 = N435 | N437;
assign N435 = N433 | N434;
assign N433 = N432 & N385;
assign N432 = N431 & din[8];
assign N431 = N430 & N382;
assign N430 = N429 & N380;
assign N429 = N428 & N378;
assign N428 = N427 & din[13];
assign N427 = N288 & din[14];
assign N434 = din[14] & din[1];
assign N437 = N436 & N362;
assign N436 = N352 & N360;
assign sbroffset8_1 = N438 & din[0];
assign N438 = din[15] & din[14];
assign simm9_4 = N444 & N385;
assign N444 = N443 & din[8];
assign N443 = N442 & N382;
assign N442 = N441 & N380;
assign N441 = N440 & N378;
assign N440 = N439 & din[13];
assign N439 = N288 & din[14];
assign simm5_0 = N448 | N450;
assign N448 = N447 & din[0];
assign N447 = N446 & N380;
assign N446 = N445 & din[11];
assign N445 = N352 & N285;
assign N450 = N449 & din[0];
assign N449 = N288 & N285;
assign sjaloffset11_1 = N352 & din[13];
assign N2 = N451 & din[13];
assign N451 = N288 & din[14];
assign sluimm17_12 = N458 | N459;
assign N458 = N456 | N457;
assign N456 = N454 | N455;
assign N454 = N452 | N453;
assign N452 = N2 & din[7];
assign N453 = N2 & N273;
assign N455 = N2 & din[9];
assign N457 = N2 & din[10];
assign N459 = N2 & din[11];
assign uimm5_0 = N463 | N465;
assign N463 = N462 & din[0];
assign N462 = N461 & N378;
assign N461 = N460 & N285;
assign N460 = din[15] & N352;
assign N465 = N464 & din[1];
assign N464 = N288 & N352;
assign uswimm6_2 = N466 & N362;
assign N466 = din[15] & N360;
assign uswspimm7_2 = N467 & din[1];
assign N467 = din[15] & din[14];
assign l1_30 = N471 | N474;
assign N471 = N470 & din[0];
assign N470 = N469 & N307;
assign N469 = N468 & N305;
assign N468 = N3 & din[10];
assign N474 = N473 & din[0];
assign N473 = N472 & din[10];
assign N472 = N3 & N378;
assign o[20] = N485 & din[1];
assign N485 = N484 & N313;
assign N484 = N483 & N311;
assign N483 = N482 & N309;
assign N482 = N481 & N307;
assign N481 = N480 & N305;
assign N480 = N479 & N385;
assign N479 = N478 & N273;
assign N478 = N477 & N382;
assign N477 = N476 & N380;
assign N476 = N475 & N378;
assign N475 = N352 & din[12];
assign N3 = N486 & N285;
assign N486 = din[15] & N352;
assign l1[14] = N494 | N496;
assign N494 = N491 | N493;
assign N491 = N488 | N490;
assign N488 = N487 & din[0];
assign N487 = N3 & N378;
assign N490 = N489 & din[0];
assign N489 = N3 & N380;
assign N493 = N492 & din[0];
assign N492 = N3 & din[6];
assign N496 = N495 & din[0];
assign N495 = N3 & din[5];
assign N4 = N498 & din[11];
assign N498 = N497 & N285;
assign N497 = din[15] & N352;
assign l1[13] = N503 | N504;
assign N503 = N500 | N502;
assign N500 = N499 & din[0];
assign N499 = N4 & N380;
assign N502 = N501 & din[0];
assign N501 = N4 & din[6];
assign N504 = din[14] & N362;
assign N5 = N505 & N285;
assign N505 = din[15] & N352;
assign l1[12] = N517 | N519;
assign N517 = N514 | N516;
assign N514 = N511 | N513;
assign N511 = N508 | N510;
assign N508 = N507 & din[0];
assign N507 = N506 & din[5];
assign N506 = N5 & din[6];
assign N510 = N509 & din[0];
assign N509 = N5 & N378;
assign N513 = N512 & din[0];
assign N512 = N5 & N380;
assign N516 = N515 & din[1];
assign N515 = N288 & N352;
assign N519 = N518 & din[13];
assign N518 = din[15] & din[14];
assign l1[6] = N528 | N530;
assign N528 = N526 | N527;
assign N526 = N525 & N362;
assign N525 = N524 & N313;
assign N524 = N523 & N311;
assign N523 = N522 & N309;
assign N522 = N521 & N307;
assign N521 = N520 & N305;
assign N520 = din[15] & N352;
assign N527 = N352 & din[13];
assign N530 = N529 & din[0];
assign N529 = din[15] & din[14];
assign l1[5] = N546 | N547;
assign N546 = N544 | N545;
assign N544 = N542 | N543;
assign N542 = N540 | N541;
assign N540 = N538 | N539;
assign N538 = N536 | N537;
assign N536 = N534 | N535;
assign N534 = N531 | N533;
assign N531 = din[15] & N362;
assign N533 = N532 & din[10];
assign N532 = din[15] & din[11];
assign N535 = din[13] & N273;
assign N537 = din[13] & din[7];
assign N539 = din[13] & din[9];
assign N541 = din[13] & din[10];
assign N543 = din[13] & din[11];
assign N545 = N352 & din[13];
assign N547 = din[15] & din[14];
assign l1[4] = N574 | N576;
assign N574 = N571 | N573;
assign N571 = N568 | N570;
assign N568 = N565 | N567;
assign N565 = N562 | N564;
assign N562 = N559 | N561;
assign N559 = N556 | N558;
assign N556 = N553 | N555;
assign N553 = N552 & N362;
assign N552 = N551 & N385;
assign N551 = N550 & N273;
assign N550 = N549 & N382;
assign N549 = N548 & N380;
assign N548 = N352 & N378;
assign N555 = N554 & N362;
assign N554 = N288 & N352;
assign N558 = N557 & N362;
assign N557 = N352 & din[6];
assign N561 = N560 & din[0];
assign N560 = N288 & din[14];
assign N564 = N563 & N362;
assign N563 = N352 & din[5];
assign N567 = N566 & N362;
assign N566 = N352 & din[4];
assign N570 = N569 & din[0];
assign N569 = N352 & N285;
assign N573 = N572 & N362;
assign N572 = N352 & din[3];
assign N576 = N575 & N362;
assign N575 = N352 & din[2];
assign l1[3] = N352 & din[13];
assign N6 = N352 & din[12];
assign N7 = N288 & din[13];
assign l1[2] = N634 | N635;
assign N634 = N632 | N633;
assign N632 = N630 | N631;
assign N630 = N628 | N629;
assign N628 = N626 | N627;
assign N626 = N624 | N625;
assign N624 = N615 | N623;
assign N615 = N607 | N614;
assign N607 = N599 | N606;
assign N599 = N591 | N598;
assign N591 = N583 | N590;
assign N583 = N582 & din[1];
assign N582 = N581 & N313;
assign N581 = N580 & N311;
assign N580 = N579 & N309;
assign N579 = N578 & N307;
assign N578 = N577 & N305;
assign N577 = N6 & din[11];
assign N590 = N589 & din[1];
assign N589 = N588 & N313;
assign N588 = N587 & N311;
assign N587 = N586 & N309;
assign N586 = N585 & N307;
assign N585 = N584 & N305;
assign N584 = N6 & din[10];
assign N598 = N597 & din[1];
assign N597 = N596 & N313;
assign N596 = N595 & N311;
assign N595 = N594 & N309;
assign N594 = N593 & N307;
assign N593 = N592 & N305;
assign N592 = N6 & din[9];
assign N606 = N605 & din[1];
assign N605 = N604 & N313;
assign N604 = N603 & N311;
assign N603 = N602 & N309;
assign N602 = N601 & N307;
assign N601 = N600 & N305;
assign N600 = N6 & din[8];
assign N614 = N613 & din[1];
assign N613 = N612 & N313;
assign N612 = N611 & N311;
assign N611 = N610 & N309;
assign N610 = N609 & N307;
assign N609 = N608 & N305;
assign N608 = N6 & din[7];
assign N623 = N622 & N362;
assign N622 = N621 & N313;
assign N621 = N620 & N311;
assign N620 = N619 & N309;
assign N619 = N618 & N307;
assign N618 = N617 & N305;
assign N617 = N616 & N303;
assign N616 = din[15] & N352;
assign N625 = N7 & N273;
assign N627 = N7 & din[7];
assign N629 = N7 & din[9];
assign N631 = N7 & din[10];
assign N633 = N7 & din[11];
assign N635 = N352 & din[13];
assign N8 = N285 & N303;
assign N9 = N288 & N285;
assign N10 = din[14] & N285;
assign legal = N746 | N747;
assign N746 = N743 | N745;
assign N743 = N739 | N742;
assign N739 = N734 | N738;
assign N734 = N730 | N733;
assign N730 = N728 | N729;
assign N728 = N724 | N727;
assign N724 = N720 | N723;
assign N720 = N717 | N719;
assign N717 = N713 | N716;
assign N713 = N709 | N712;
assign N709 = N705 | N708;
assign N705 = N702 | N704;
assign N702 = N698 | N701;
assign N698 = N694 | N697;
assign N694 = N691 | N693;
assign N691 = N686 | N690;
assign N686 = N682 | N685;
assign N682 = N679 | N681;
assign N679 = N675 | N678;
assign N675 = N671 | N674;
assign N671 = N668 | N670;
assign N668 = N664 | N667;
assign N664 = N660 | N663;
assign N660 = N656 | N659;
assign N656 = N653 | N655;
assign N653 = N649 | N652;
assign N649 = N645 | N648;
assign N645 = N642 | N644;
assign N642 = N638 | N641;
assign N638 = N637 & N362;
assign N637 = N636 & din[1];
assign N636 = N8 & din[11];
assign N641 = N640 & N362;
assign N640 = N639 & din[1];
assign N639 = N8 & din[6];
assign N644 = N643 & N360;
assign N643 = N9 & din[11];
assign N648 = N647 & N362;
assign N647 = N646 & din[1];
assign N646 = N8 & din[5];
assign N652 = N651 & N362;
assign N651 = N650 & din[1];
assign N650 = N8 & din[10];
assign N655 = N654 & N360;
assign N654 = N9 & din[6];
assign N659 = N658 & din[0];
assign N658 = N657 & N360;
assign N657 = din[15] & N303;
assign N663 = N662 & N362;
assign N662 = N661 & din[1];
assign N661 = N8 & din[9];
assign N667 = N666 & din[0];
assign N666 = N665 & N360;
assign N665 = N303 & din[6];
assign N670 = N669 & N360;
assign N669 = N9 & din[5];
assign N674 = N673 & N362;
assign N673 = N672 & din[1];
assign N672 = N8 & din[8];
assign N678 = N677 & din[0];
assign N677 = N676 & N360;
assign N676 = N303 & din[5];
assign N681 = N680 & N360;
assign N680 = N9 & din[10];
assign N685 = N684 & N362;
assign N684 = N683 & din[1];
assign N683 = N8 & din[7];
assign N690 = N689 & din[0];
assign N689 = N688 & N360;
assign N688 = N687 & N380;
assign N687 = din[12] & din[11];
assign N693 = N692 & N360;
assign N692 = N9 & din[9];
assign N697 = N696 & N362;
assign N696 = N695 & din[1];
assign N695 = N8 & din[4];
assign N701 = N700 & din[0];
assign N700 = N699 & N360;
assign N699 = din[13] & din[12];
assign N704 = N703 & N360;
assign N703 = N9 & din[8];
assign N708 = N707 & N362;
assign N707 = N706 & din[1];
assign N706 = N8 & din[3];
assign N712 = N711 & din[0];
assign N711 = N710 & N360;
assign N710 = din[13] & din[4];
assign N716 = N715 & N362;
assign N715 = N714 & din[1];
assign N714 = N8 & din[2];
assign N719 = N718 & N360;
assign N718 = N9 & din[7];
assign N723 = N722 & din[0];
assign N722 = N721 & N360;
assign N721 = din[13] & din[3];
assign N727 = N726 & din[0];
assign N726 = N725 & N360;
assign N725 = din[13] & din[2];
assign N729 = N10 & N360;
assign N733 = N732 & din[0];
assign N732 = N731 & N360;
assign N731 = N352 & N303;
assign N738 = N737 & N362;
assign N737 = N736 & din[1];
assign N736 = N735 & din[12];
assign N735 = din[15] & N285;
assign N742 = N741 & N362;
assign N741 = N740 & din[1];
assign N740 = N9 & N303;
assign N745 = N744 & N360;
assign N744 = N9 & din[12];
assign N747 = N10 & N362;
endmodule
|
module rvdff_WIDTH33
(
din,
clk,
rst_l,
dout
);
input [32:0] din;
output [32:0] dout;
input clk;
input rst_l;
wire N0;
reg [32:0] dout;
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[32] <= 1'b0;
end else if(1'b1) begin
dout[32] <= din[32];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[31] <= 1'b0;
end else if(1'b1) begin
dout[31] <= din[31];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[30] <= 1'b0;
end else if(1'b1) begin
dout[30] <= din[30];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[29] <= 1'b0;
end else if(1'b1) begin
dout[29] <= din[29];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[28] <= 1'b0;
end else if(1'b1) begin
dout[28] <= din[28];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[27] <= 1'b0;
end else if(1'b1) begin
dout[27] <= din[27];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[26] <= 1'b0;
end else if(1'b1) begin
dout[26] <= din[26];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[25] <= 1'b0;
end else if(1'b1) begin
dout[25] <= din[25];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[24] <= 1'b0;
end else if(1'b1) begin
dout[24] <= din[24];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[23] <= 1'b0;
end else if(1'b1) begin
dout[23] <= din[23];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[22] <= 1'b0;
end else if(1'b1) begin
dout[22] <= din[22];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[21] <= 1'b0;
end else if(1'b1) begin
dout[21] <= din[21];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[20] <= 1'b0;
end else if(1'b1) begin
dout[20] <= din[20];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[19] <= 1'b0;
end else if(1'b1) begin
dout[19] <= din[19];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[18] <= 1'b0;
end else if(1'b1) begin
dout[18] <= din[18];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[17] <= 1'b0;
end else if(1'b1) begin
dout[17] <= din[17];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[16] <= 1'b0;
end else if(1'b1) begin
dout[16] <= din[16];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[15] <= 1'b0;
end else if(1'b1) begin
dout[15] <= din[15];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[14] <= 1'b0;
end else if(1'b1) begin
dout[14] <= din[14];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[13] <= 1'b0;
end else if(1'b1) begin
dout[13] <= din[13];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[12] <= 1'b0;
end else if(1'b1) begin
dout[12] <= din[12];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[11] <= 1'b0;
end else if(1'b1) begin
dout[11] <= din[11];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[10] <= 1'b0;
end else if(1'b1) begin
dout[10] <= din[10];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[9] <= 1'b0;
end else if(1'b1) begin
dout[9] <= din[9];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[8] <= 1'b0;
end else if(1'b1) begin
dout[8] <= din[8];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[7] <= 1'b0;
end else if(1'b1) begin
dout[7] <= din[7];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[6] <= 1'b0;
end else if(1'b1) begin
dout[6] <= din[6];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[5] <= 1'b0;
end else if(1'b1) begin
dout[5] <= din[5];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[4] <= 1'b0;
end else if(1'b1) begin
dout[4] <= din[4];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[3] <= 1'b0;
end else if(1'b1) begin
dout[3] <= din[3];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[2] <= 1'b0;
end else if(1'b1) begin
dout[2] <= din[2];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[1] <= 1'b0;
end else if(1'b1) begin
dout[1] <= din[1];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[0] <= 1'b0;
end else if(1'b1) begin
dout[0] <= din[0];
end
end
assign N0 = ~rst_l;
endmodule
|
module rvdff_WIDTH2
(
din,
clk,
rst_l,
dout
);
input [1:0] din;
output [1:0] dout;
input clk;
input rst_l;
wire N0;
reg [1:0] dout;
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[1] <= 1'b0;
end else if(1'b1) begin
dout[1] <= din[1];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[0] <= 1'b0;
end else if(1'b1) begin
dout[0] <= din[0];
end
end
assign N0 = ~rst_l;
endmodule
|
module rvdff_WIDTH4
(
din,
clk,
rst_l,
dout
);
input [3:0] din;
output [3:0] dout;
input clk;
input rst_l;
wire N0;
reg [3:0] dout;
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[3] <= 1'b0;
end else if(1'b1) begin
dout[3] <= din[3];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[2] <= 1'b0;
end else if(1'b1) begin
dout[2] <= din[2];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[1] <= 1'b0;
end else if(1'b1) begin
dout[1] <= din[1];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[0] <= 1'b0;
end else if(1'b1) begin
dout[0] <= din[0];
end
end
assign N0 = ~rst_l;
endmodule
|
module rvbradder
(
pc,
offset,
dout
);
input [31:1] pc;
input [12:1] offset;
output [31:1] dout;
wire [31:1] dout;
wire N0,N1,N2,N3,N4,N5,N6,N7,N8,N9,N10,N11,N12,N13,N14,N15,N16,N17,N18,cout,N19,N20,
N21,N22,N23,N24,N25,N26,N27,N28,N29,N30,N31,N32,N33,N34,N35,N36,N37,N38,N39,N40,
N41,N42,N43,N44,N45,N46,N47,N48,N49,N50,N51,N52,N53,N54,N55,N56,N57,N58,N59,N60,
N61,N62,N63,N64,N65,N66,N67,N68,N69,N70,N71,N72,N73,N74,N75,N76,N77,N78,N79,N80,
N81,N82,N83,N84,N85,N86,N87,N88,N89,N90,N91,N92,N93,N94,N95,N96,N97,N98,N99,N100,
N101,N102,N103,N104,N105,N106,N107,N108,N109,N110,N111,N112,N113,N114,N115,N116,
N117,N118,N119,N120,N121,N122,N123,N124,N125,N126,N127,N128,N129,N130,N131,N132,
N133,N134,N135,N136,N137,N138,N139,N140,N141,N142,N143,N144,N145,N146,N147,N148,
N149,N150,N151,N152,N153;
wire [31:13] pc_inc,pc_dec;
assign { cout, dout[12:1] } = pc[12:1] + offset;
assign pc_inc = pc[31:13] + 1'b1;
assign pc_dec = pc[31:13] - 1'b1;
assign dout[31] = N24 | N27;
assign N24 = N20 | N23;
assign N20 = N19 & pc[31];
assign N0 = offset[12] ^ cout;
assign N19 = ~N0;
assign N23 = N22 & pc_inc[31];
assign N22 = N21 & cout;
assign N21 = ~offset[12];
assign N27 = N26 & pc_dec[31];
assign N26 = offset[12] & N25;
assign N25 = ~cout;
assign dout[30] = N32 | N34;
assign N32 = N29 | N31;
assign N29 = N28 & pc[30];
assign N1 = offset[12] ^ cout;
assign N28 = ~N1;
assign N31 = N30 & pc_inc[30];
assign N30 = N21 & cout;
assign N34 = N33 & pc_dec[30];
assign N33 = offset[12] & N25;
assign dout[29] = N39 | N41;
assign N39 = N36 | N38;
assign N36 = N35 & pc[29];
assign N2 = offset[12] ^ cout;
assign N35 = ~N2;
assign N38 = N37 & pc_inc[29];
assign N37 = N21 & cout;
assign N41 = N40 & pc_dec[29];
assign N40 = offset[12] & N25;
assign dout[28] = N46 | N48;
assign N46 = N43 | N45;
assign N43 = N42 & pc[28];
assign N3 = offset[12] ^ cout;
assign N42 = ~N3;
assign N45 = N44 & pc_inc[28];
assign N44 = N21 & cout;
assign N48 = N47 & pc_dec[28];
assign N47 = offset[12] & N25;
assign dout[27] = N53 | N55;
assign N53 = N50 | N52;
assign N50 = N49 & pc[27];
assign N4 = offset[12] ^ cout;
assign N49 = ~N4;
assign N52 = N51 & pc_inc[27];
assign N51 = N21 & cout;
assign N55 = N54 & pc_dec[27];
assign N54 = offset[12] & N25;
assign dout[26] = N60 | N62;
assign N60 = N57 | N59;
assign N57 = N56 & pc[26];
assign N5 = offset[12] ^ cout;
assign N56 = ~N5;
assign N59 = N58 & pc_inc[26];
assign N58 = N21 & cout;
assign N62 = N61 & pc_dec[26];
assign N61 = offset[12] & N25;
assign dout[25] = N67 | N69;
assign N67 = N64 | N66;
assign N64 = N63 & pc[25];
assign N6 = offset[12] ^ cout;
assign N63 = ~N6;
assign N66 = N65 & pc_inc[25];
assign N65 = N21 & cout;
assign N69 = N68 & pc_dec[25];
assign N68 = offset[12] & N25;
assign dout[24] = N74 | N76;
assign N74 = N71 | N73;
assign N71 = N70 & pc[24];
assign N7 = offset[12] ^ cout;
assign N70 = ~N7;
assign N73 = N72 & pc_inc[24];
assign N72 = N21 & cout;
assign N76 = N75 & pc_dec[24];
assign N75 = offset[12] & N25;
assign dout[23] = N81 | N83;
assign N81 = N78 | N80;
assign N78 = N77 & pc[23];
assign N8 = offset[12] ^ cout;
assign N77 = ~N8;
assign N80 = N79 & pc_inc[23];
assign N79 = N21 & cout;
assign N83 = N82 & pc_dec[23];
assign N82 = offset[12] & N25;
assign dout[22] = N88 | N90;
assign N88 = N85 | N87;
assign N85 = N84 & pc[22];
assign N9 = offset[12] ^ cout;
assign N84 = ~N9;
assign N87 = N86 & pc_inc[22];
assign N86 = N21 & cout;
assign N90 = N89 & pc_dec[22];
assign N89 = offset[12] & N25;
assign dout[21] = N95 | N97;
assign N95 = N92 | N94;
assign N92 = N91 & pc[21];
assign N10 = offset[12] ^ cout;
assign N91 = ~N10;
assign N94 = N93 & pc_inc[21];
assign N93 = N21 & cout;
assign N97 = N96 & pc_dec[21];
assign N96 = offset[12] & N25;
assign dout[20] = N102 | N104;
assign N102 = N99 | N101;
assign N99 = N98 & pc[20];
assign N11 = offset[12] ^ cout;
assign N98 = ~N11;
assign N101 = N100 & pc_inc[20];
assign N100 = N21 & cout;
assign N104 = N103 & pc_dec[20];
assign N103 = offset[12] & N25;
assign dout[19] = N109 | N111;
assign N109 = N106 | N108;
assign N106 = N105 & pc[19];
assign N12 = offset[12] ^ cout;
assign N105 = ~N12;
assign N108 = N107 & pc_inc[19];
assign N107 = N21 & cout;
assign N111 = N110 & pc_dec[19];
assign N110 = offset[12] & N25;
assign dout[18] = N116 | N118;
assign N116 = N113 | N115;
assign N113 = N112 & pc[18];
assign N13 = offset[12] ^ cout;
assign N112 = ~N13;
assign N115 = N114 & pc_inc[18];
assign N114 = N21 & cout;
assign N118 = N117 & pc_dec[18];
assign N117 = offset[12] & N25;
assign dout[17] = N123 | N125;
assign N123 = N120 | N122;
assign N120 = N119 & pc[17];
assign N14 = offset[12] ^ cout;
assign N119 = ~N14;
assign N122 = N121 & pc_inc[17];
assign N121 = N21 & cout;
assign N125 = N124 & pc_dec[17];
assign N124 = offset[12] & N25;
assign dout[16] = N130 | N132;
assign N130 = N127 | N129;
assign N127 = N126 & pc[16];
assign N15 = offset[12] ^ cout;
assign N126 = ~N15;
assign N129 = N128 & pc_inc[16];
assign N128 = N21 & cout;
assign N132 = N131 & pc_dec[16];
assign N131 = offset[12] & N25;
assign dout[15] = N137 | N139;
assign N137 = N134 | N136;
assign N134 = N133 & pc[15];
assign N16 = offset[12] ^ cout;
assign N133 = ~N16;
assign N136 = N135 & pc_inc[15];
assign N135 = N21 & cout;
assign N139 = N138 & pc_dec[15];
assign N138 = offset[12] & N25;
assign dout[14] = N144 | N146;
assign N144 = N141 | N143;
assign N141 = N140 & pc[14];
assign N17 = offset[12] ^ cout;
assign N140 = ~N17;
assign N143 = N142 & pc_inc[14];
assign N142 = N21 & cout;
assign N146 = N145 & pc_dec[14];
assign N145 = offset[12] & N25;
assign dout[13] = N151 | N153;
assign N151 = N148 | N150;
assign N148 = N147 & pc[13];
assign N18 = offset[12] ^ cout;
assign N147 = ~N18;
assign N150 = N149 & pc_inc[13];
assign N149 = N21 & cout;
assign N153 = N152 & pc_dec[13];
assign N152 = offset[12] & N25;
endmodule
|
module rvdff_WIDTH18
(
din,
clk,
rst_l,
dout
);
input [17:0] din;
output [17:0] dout;
input clk;
input rst_l;
wire N0;
reg [17:0] dout;
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[17] <= 1'b0;
end else if(1'b1) begin
dout[17] <= din[17];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[16] <= 1'b0;
end else if(1'b1) begin
dout[16] <= din[16];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[15] <= 1'b0;
end else if(1'b1) begin
dout[15] <= din[15];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[14] <= 1'b0;
end else if(1'b1) begin
dout[14] <= din[14];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[13] <= 1'b0;
end else if(1'b1) begin
dout[13] <= din[13];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[12] <= 1'b0;
end else if(1'b1) begin
dout[12] <= din[12];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[11] <= 1'b0;
end else if(1'b1) begin
dout[11] <= din[11];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[10] <= 1'b0;
end else if(1'b1) begin
dout[10] <= din[10];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[9] <= 1'b0;
end else if(1'b1) begin
dout[9] <= din[9];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[8] <= 1'b0;
end else if(1'b1) begin
dout[8] <= din[8];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[7] <= 1'b0;
end else if(1'b1) begin
dout[7] <= din[7];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[6] <= 1'b0;
end else if(1'b1) begin
dout[6] <= din[6];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[5] <= 1'b0;
end else if(1'b1) begin
dout[5] <= din[5];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[4] <= 1'b0;
end else if(1'b1) begin
dout[4] <= din[4];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[3] <= 1'b0;
end else if(1'b1) begin
dout[3] <= din[3];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[2] <= 1'b0;
end else if(1'b1) begin
dout[2] <= din[2];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[1] <= 1'b0;
end else if(1'b1) begin
dout[1] <= din[1];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[0] <= 1'b0;
end else if(1'b1) begin
dout[0] <= din[0];
end
end
assign N0 = ~rst_l;
endmodule
|
module rvrangecheck_f00c0000_32
(
addr,
in_range,
in_region
);
input [31:0] addr;
output in_range;
output in_region;
wire in_range,in_region,N0,N1,N2,N3,N4,N5,N6,N7,N8,N9,N10,N11,N12,N13,N14,N15,N16,
N17,N18,N19,N20,N21,N23,N24;
assign N0 = ~addr[31];
assign N1 = ~addr[30];
assign N2 = ~addr[29];
assign N3 = ~addr[28];
assign N4 = ~addr[19];
assign N5 = ~addr[18];
assign N6 = N1 | N0;
assign N7 = N2 | N6;
assign N8 = N3 | N7;
assign N9 = addr[27] | N8;
assign N10 = addr[26] | N9;
assign N11 = addr[25] | N10;
assign N12 = addr[24] | N11;
assign N13 = addr[23] | N12;
assign N14 = addr[22] | N13;
assign N15 = addr[21] | N14;
assign N16 = addr[20] | N15;
assign N17 = N4 | N16;
assign N18 = N5 | N17;
assign N19 = addr[17] | N18;
assign N20 = addr[16] | N19;
assign N21 = addr[15] | N20;
assign in_range = ~N21;
assign N23 = addr[30] & addr[31];
assign N24 = addr[29] & N23;
assign in_region = addr[28] & N24;
endmodule
|
module rvdff_WIDTH53
(
din,
clk,
rst_l,
dout
);
input [52:0] din;
output [52:0] dout;
input clk;
input rst_l;
wire N0;
reg [52:0] dout;
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[52] <= 1'b0;
end else if(1'b1) begin
dout[52] <= din[52];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[51] <= 1'b0;
end else if(1'b1) begin
dout[51] <= din[51];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[50] <= 1'b0;
end else if(1'b1) begin
dout[50] <= din[50];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[49] <= 1'b0;
end else if(1'b1) begin
dout[49] <= din[49];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[48] <= 1'b0;
end else if(1'b1) begin
dout[48] <= din[48];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[47] <= 1'b0;
end else if(1'b1) begin
dout[47] <= din[47];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[46] <= 1'b0;
end else if(1'b1) begin
dout[46] <= din[46];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[45] <= 1'b0;
end else if(1'b1) begin
dout[45] <= din[45];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[44] <= 1'b0;
end else if(1'b1) begin
dout[44] <= din[44];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[43] <= 1'b0;
end else if(1'b1) begin
dout[43] <= din[43];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[42] <= 1'b0;
end else if(1'b1) begin
dout[42] <= din[42];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[41] <= 1'b0;
end else if(1'b1) begin
dout[41] <= din[41];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[40] <= 1'b0;
end else if(1'b1) begin
dout[40] <= din[40];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[39] <= 1'b0;
end else if(1'b1) begin
dout[39] <= din[39];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[38] <= 1'b0;
end else if(1'b1) begin
dout[38] <= din[38];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[37] <= 1'b0;
end else if(1'b1) begin
dout[37] <= din[37];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[36] <= 1'b0;
end else if(1'b1) begin
dout[36] <= din[36];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[35] <= 1'b0;
end else if(1'b1) begin
dout[35] <= din[35];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[34] <= 1'b0;
end else if(1'b1) begin
dout[34] <= din[34];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[33] <= 1'b0;
end else if(1'b1) begin
dout[33] <= din[33];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[32] <= 1'b0;
end else if(1'b1) begin
dout[32] <= din[32];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[31] <= 1'b0;
end else if(1'b1) begin
dout[31] <= din[31];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[30] <= 1'b0;
end else if(1'b1) begin
dout[30] <= din[30];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[29] <= 1'b0;
end else if(1'b1) begin
dout[29] <= din[29];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[28] <= 1'b0;
end else if(1'b1) begin
dout[28] <= din[28];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[27] <= 1'b0;
end else if(1'b1) begin
dout[27] <= din[27];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[26] <= 1'b0;
end else if(1'b1) begin
dout[26] <= din[26];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[25] <= 1'b0;
end else if(1'b1) begin
dout[25] <= din[25];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[24] <= 1'b0;
end else if(1'b1) begin
dout[24] <= din[24];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[23] <= 1'b0;
end else if(1'b1) begin
dout[23] <= din[23];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[22] <= 1'b0;
end else if(1'b1) begin
dout[22] <= din[22];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[21] <= 1'b0;
end else if(1'b1) begin
dout[21] <= din[21];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[20] <= 1'b0;
end else if(1'b1) begin
dout[20] <= din[20];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[19] <= 1'b0;
end else if(1'b1) begin
dout[19] <= din[19];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[18] <= 1'b0;
end else if(1'b1) begin
dout[18] <= din[18];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[17] <= 1'b0;
end else if(1'b1) begin
dout[17] <= din[17];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[16] <= 1'b0;
end else if(1'b1) begin
dout[16] <= din[16];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[15] <= 1'b0;
end else if(1'b1) begin
dout[15] <= din[15];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[14] <= 1'b0;
end else if(1'b1) begin
dout[14] <= din[14];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[13] <= 1'b0;
end else if(1'b1) begin
dout[13] <= din[13];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[12] <= 1'b0;
end else if(1'b1) begin
dout[12] <= din[12];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[11] <= 1'b0;
end else if(1'b1) begin
dout[11] <= din[11];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[10] <= 1'b0;
end else if(1'b1) begin
dout[10] <= din[10];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[9] <= 1'b0;
end else if(1'b1) begin
dout[9] <= din[9];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[8] <= 1'b0;
end else if(1'b1) begin
dout[8] <= din[8];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[7] <= 1'b0;
end else if(1'b1) begin
dout[7] <= din[7];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[6] <= 1'b0;
end else if(1'b1) begin
dout[6] <= din[6];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[5] <= 1'b0;
end else if(1'b1) begin
dout[5] <= din[5];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[4] <= 1'b0;
end else if(1'b1) begin
dout[4] <= din[4];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[3] <= 1'b0;
end else if(1'b1) begin
dout[3] <= din[3];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[2] <= 1'b0;
end else if(1'b1) begin
dout[2] <= din[2];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[1] <= 1'b0;
end else if(1'b1) begin
dout[1] <= din[1];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[0] <= 1'b0;
end else if(1'b1) begin
dout[0] <= din[0];
end
end
assign N0 = ~rst_l;
endmodule
|
module rveven_paritycheck
(
data_in,
parity_in,
parity_err
);
input [15:0] data_in;
input parity_in;
output parity_err;
wire parity_err,N0,N1,N2,N3,N4,N5,N6,N7,N8,N9,N10,N11,N12,N13,N14;
assign parity_err = N14 ^ parity_in;
assign N14 = N13 ^ data_in[0];
assign N13 = N12 ^ data_in[1];
assign N12 = N11 ^ data_in[2];
assign N11 = N10 ^ data_in[3];
assign N10 = N9 ^ data_in[4];
assign N9 = N8 ^ data_in[5];
assign N8 = N7 ^ data_in[6];
assign N7 = N6 ^ data_in[7];
assign N6 = N5 ^ data_in[8];
assign N5 = N4 ^ data_in[9];
assign N4 = N3 ^ data_in[10];
assign N3 = N2 ^ data_in[11];
assign N2 = N1 ^ data_in[12];
assign N1 = N0 ^ data_in[13];
assign N0 = data_in[15] ^ data_in[14];
endmodule
|
module rvdff_WIDTH17
(
din,
clk,
rst_l,
dout
);
input [16:0] din;
output [16:0] dout;
input clk;
input rst_l;
wire N0;
reg [16:0] dout;
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[16] <= 1'b0;
end else if(1'b1) begin
dout[16] <= din[16];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[15] <= 1'b0;
end else if(1'b1) begin
dout[15] <= din[15];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[14] <= 1'b0;
end else if(1'b1) begin
dout[14] <= din[14];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[13] <= 1'b0;
end else if(1'b1) begin
dout[13] <= din[13];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[12] <= 1'b0;
end else if(1'b1) begin
dout[12] <= din[12];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[11] <= 1'b0;
end else if(1'b1) begin
dout[11] <= din[11];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[10] <= 1'b0;
end else if(1'b1) begin
dout[10] <= din[10];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[9] <= 1'b0;
end else if(1'b1) begin
dout[9] <= din[9];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[8] <= 1'b0;
end else if(1'b1) begin
dout[8] <= din[8];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[7] <= 1'b0;
end else if(1'b1) begin
dout[7] <= din[7];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[6] <= 1'b0;
end else if(1'b1) begin
dout[6] <= din[6];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[5] <= 1'b0;
end else if(1'b1) begin
dout[5] <= din[5];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[4] <= 1'b0;
end else if(1'b1) begin
dout[4] <= din[4];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[3] <= 1'b0;
end else if(1'b1) begin
dout[3] <= din[3];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[2] <= 1'b0;
end else if(1'b1) begin
dout[2] <= din[2];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[1] <= 1'b0;
end else if(1'b1) begin
dout[1] <= din[1];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[0] <= 1'b0;
end else if(1'b1) begin
dout[0] <= din[0];
end
end
assign N0 = ~rst_l;
endmodule
|
module rvdff_WIDTH8
(
din,
clk,
rst_l,
dout
);
input [7:0] din;
output [7:0] dout;
input clk;
input rst_l;
wire N0;
reg [7:0] dout;
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[7] <= 1'b0;
end else if(1'b1) begin
dout[7] <= din[7];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[6] <= 1'b0;
end else if(1'b1) begin
dout[6] <= din[6];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[5] <= 1'b0;
end else if(1'b1) begin
dout[5] <= din[5];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[4] <= 1'b0;
end else if(1'b1) begin
dout[4] <= din[4];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[3] <= 1'b0;
end else if(1'b1) begin
dout[3] <= din[3];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[2] <= 1'b0;
end else if(1'b1) begin
dout[2] <= din[2];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[1] <= 1'b0;
end else if(1'b1) begin
dout[1] <= din[1];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[0] <= 1'b0;
end else if(1'b1) begin
dout[0] <= din[0];
end
end
assign N0 = ~rst_l;
endmodule
|
module rvdff_WIDTH32
(
din,
clk,
rst_l,
dout
);
input [31:0] din;
output [31:0] dout;
input clk;
input rst_l;
wire N0;
reg [31:0] dout;
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[31] <= 1'b0;
end else if(1'b1) begin
dout[31] <= din[31];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[30] <= 1'b0;
end else if(1'b1) begin
dout[30] <= din[30];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[29] <= 1'b0;
end else if(1'b1) begin
dout[29] <= din[29];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[28] <= 1'b0;
end else if(1'b1) begin
dout[28] <= din[28];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[27] <= 1'b0;
end else if(1'b1) begin
dout[27] <= din[27];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[26] <= 1'b0;
end else if(1'b1) begin
dout[26] <= din[26];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[25] <= 1'b0;
end else if(1'b1) begin
dout[25] <= din[25];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[24] <= 1'b0;
end else if(1'b1) begin
dout[24] <= din[24];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[23] <= 1'b0;
end else if(1'b1) begin
dout[23] <= din[23];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[22] <= 1'b0;
end else if(1'b1) begin
dout[22] <= din[22];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[21] <= 1'b0;
end else if(1'b1) begin
dout[21] <= din[21];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[20] <= 1'b0;
end else if(1'b1) begin
dout[20] <= din[20];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[19] <= 1'b0;
end else if(1'b1) begin
dout[19] <= din[19];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[18] <= 1'b0;
end else if(1'b1) begin
dout[18] <= din[18];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[17] <= 1'b0;
end else if(1'b1) begin
dout[17] <= din[17];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[16] <= 1'b0;
end else if(1'b1) begin
dout[16] <= din[16];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[15] <= 1'b0;
end else if(1'b1) begin
dout[15] <= din[15];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[14] <= 1'b0;
end else if(1'b1) begin
dout[14] <= din[14];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[13] <= 1'b0;
end else if(1'b1) begin
dout[13] <= din[13];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[12] <= 1'b0;
end else if(1'b1) begin
dout[12] <= din[12];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[11] <= 1'b0;
end else if(1'b1) begin
dout[11] <= din[11];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[10] <= 1'b0;
end else if(1'b1) begin
dout[10] <= din[10];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[9] <= 1'b0;
end else if(1'b1) begin
dout[9] <= din[9];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[8] <= 1'b0;
end else if(1'b1) begin
dout[8] <= din[8];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[7] <= 1'b0;
end else if(1'b1) begin
dout[7] <= din[7];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[6] <= 1'b0;
end else if(1'b1) begin
dout[6] <= din[6];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[5] <= 1'b0;
end else if(1'b1) begin
dout[5] <= din[5];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[4] <= 1'b0;
end else if(1'b1) begin
dout[4] <= din[4];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[3] <= 1'b0;
end else if(1'b1) begin
dout[3] <= din[3];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[2] <= 1'b0;
end else if(1'b1) begin
dout[2] <= din[2];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[1] <= 1'b0;
end else if(1'b1) begin
dout[1] <= din[1];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[0] <= 1'b0;
end else if(1'b1) begin
dout[0] <= din[0];
end
end
assign N0 = ~rst_l;
endmodule
|
module cmp_and_mux_ID_BITS8_INTPRIORITY_BITS4
(
a_id,
a_priority,
b_id,
b_priority,
out_id,
out_priority
);
input [7:0] a_id;
input [3:0] a_priority;
input [7:0] b_id;
input [3:0] b_priority;
output [7:0] out_id;
output [3:0] out_priority;
wire [7:0] out_id;
wire [3:0] out_priority;
wire N0,N1,a_is_lt_b,N2;
assign a_is_lt_b = a_priority < b_priority;
assign out_id = (N0)? b_id :
(N1)? a_id : 1'b0;
assign N0 = a_is_lt_b;
assign N1 = N2;
assign out_priority = (N0)? b_priority :
(N1)? a_priority : 1'b0;
assign N2 = ~a_is_lt_b;
endmodule
|
module rvbtb_addr_hash
(
pc,
hash
);
input [31:1] pc;
output [5:4] hash;
wire [5:4] hash;
wire N0,N1;
assign hash[5] = N0 ^ pc[9];
assign N0 = pc[5] ^ pc[7];
assign hash[4] = N1 ^ pc[8];
assign N1 = pc[4] ^ pc[6];
endmodule
|
module rvdff_WIDTH12
(
din,
clk,
rst_l,
dout
);
input [11:0] din;
output [11:0] dout;
input clk;
input rst_l;
wire N0;
reg [11:0] dout;
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[11] <= 1'b0;
end else if(1'b1) begin
dout[11] <= din[11];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[10] <= 1'b0;
end else if(1'b1) begin
dout[10] <= din[10];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[9] <= 1'b0;
end else if(1'b1) begin
dout[9] <= din[9];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[8] <= 1'b0;
end else if(1'b1) begin
dout[8] <= din[8];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[7] <= 1'b0;
end else if(1'b1) begin
dout[7] <= din[7];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[6] <= 1'b0;
end else if(1'b1) begin
dout[6] <= din[6];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[5] <= 1'b0;
end else if(1'b1) begin
dout[5] <= din[5];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[4] <= 1'b0;
end else if(1'b1) begin
dout[4] <= din[4];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[3] <= 1'b0;
end else if(1'b1) begin
dout[3] <= din[3];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[2] <= 1'b0;
end else if(1'b1) begin
dout[2] <= din[2];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[1] <= 1'b0;
end else if(1'b1) begin
dout[1] <= din[1];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[0] <= 1'b0;
end else if(1'b1) begin
dout[0] <= din[0];
end
end
assign N0 = ~rst_l;
endmodule
|
module rvdff_WIDTH5
(
din,
clk,
rst_l,
dout
);
input [4:0] din;
output [4:0] dout;
input clk;
input rst_l;
wire N0;
reg [4:0] dout;
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[4] <= 1'b0;
end else if(1'b1) begin
dout[4] <= din[4];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[3] <= 1'b0;
end else if(1'b1) begin
dout[3] <= din[3];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[2] <= 1'b0;
end else if(1'b1) begin
dout[2] <= din[2];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[1] <= 1'b0;
end else if(1'b1) begin
dout[1] <= din[1];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[0] <= 1'b0;
end else if(1'b1) begin
dout[0] <= din[0];
end
end
assign N0 = ~rst_l;
endmodule
|
module rvdff_WIDTH74
(
din,
clk,
rst_l,
dout
);
input [73:0] din;
output [73:0] dout;
input clk;
input rst_l;
wire N0;
reg [73:0] dout;
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[73] <= 1'b0;
end else if(1'b1) begin
dout[73] <= din[73];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[72] <= 1'b0;
end else if(1'b1) begin
dout[72] <= din[72];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[71] <= 1'b0;
end else if(1'b1) begin
dout[71] <= din[71];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[70] <= 1'b0;
end else if(1'b1) begin
dout[70] <= din[70];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[69] <= 1'b0;
end else if(1'b1) begin
dout[69] <= din[69];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[68] <= 1'b0;
end else if(1'b1) begin
dout[68] <= din[68];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[67] <= 1'b0;
end else if(1'b1) begin
dout[67] <= din[67];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[66] <= 1'b0;
end else if(1'b1) begin
dout[66] <= din[66];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[65] <= 1'b0;
end else if(1'b1) begin
dout[65] <= din[65];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[64] <= 1'b0;
end else if(1'b1) begin
dout[64] <= din[64];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[63] <= 1'b0;
end else if(1'b1) begin
dout[63] <= din[63];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[62] <= 1'b0;
end else if(1'b1) begin
dout[62] <= din[62];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[61] <= 1'b0;
end else if(1'b1) begin
dout[61] <= din[61];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[60] <= 1'b0;
end else if(1'b1) begin
dout[60] <= din[60];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[59] <= 1'b0;
end else if(1'b1) begin
dout[59] <= din[59];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[58] <= 1'b0;
end else if(1'b1) begin
dout[58] <= din[58];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[57] <= 1'b0;
end else if(1'b1) begin
dout[57] <= din[57];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[56] <= 1'b0;
end else if(1'b1) begin
dout[56] <= din[56];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[55] <= 1'b0;
end else if(1'b1) begin
dout[55] <= din[55];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[54] <= 1'b0;
end else if(1'b1) begin
dout[54] <= din[54];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[53] <= 1'b0;
end else if(1'b1) begin
dout[53] <= din[53];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[52] <= 1'b0;
end else if(1'b1) begin
dout[52] <= din[52];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[51] <= 1'b0;
end else if(1'b1) begin
dout[51] <= din[51];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[50] <= 1'b0;
end else if(1'b1) begin
dout[50] <= din[50];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[49] <= 1'b0;
end else if(1'b1) begin
dout[49] <= din[49];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[48] <= 1'b0;
end else if(1'b1) begin
dout[48] <= din[48];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[47] <= 1'b0;
end else if(1'b1) begin
dout[47] <= din[47];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[46] <= 1'b0;
end else if(1'b1) begin
dout[46] <= din[46];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[45] <= 1'b0;
end else if(1'b1) begin
dout[45] <= din[45];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[44] <= 1'b0;
end else if(1'b1) begin
dout[44] <= din[44];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[43] <= 1'b0;
end else if(1'b1) begin
dout[43] <= din[43];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[42] <= 1'b0;
end else if(1'b1) begin
dout[42] <= din[42];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[41] <= 1'b0;
end else if(1'b1) begin
dout[41] <= din[41];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[40] <= 1'b0;
end else if(1'b1) begin
dout[40] <= din[40];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[39] <= 1'b0;
end else if(1'b1) begin
dout[39] <= din[39];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[38] <= 1'b0;
end else if(1'b1) begin
dout[38] <= din[38];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[37] <= 1'b0;
end else if(1'b1) begin
dout[37] <= din[37];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[36] <= 1'b0;
end else if(1'b1) begin
dout[36] <= din[36];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[35] <= 1'b0;
end else if(1'b1) begin
dout[35] <= din[35];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[34] <= 1'b0;
end else if(1'b1) begin
dout[34] <= din[34];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[33] <= 1'b0;
end else if(1'b1) begin
dout[33] <= din[33];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[32] <= 1'b0;
end else if(1'b1) begin
dout[32] <= din[32];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[31] <= 1'b0;
end else if(1'b1) begin
dout[31] <= din[31];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[30] <= 1'b0;
end else if(1'b1) begin
dout[30] <= din[30];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[29] <= 1'b0;
end else if(1'b1) begin
dout[29] <= din[29];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[28] <= 1'b0;
end else if(1'b1) begin
dout[28] <= din[28];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[27] <= 1'b0;
end else if(1'b1) begin
dout[27] <= din[27];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[26] <= 1'b0;
end else if(1'b1) begin
dout[26] <= din[26];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[25] <= 1'b0;
end else if(1'b1) begin
dout[25] <= din[25];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[24] <= 1'b0;
end else if(1'b1) begin
dout[24] <= din[24];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[23] <= 1'b0;
end else if(1'b1) begin
dout[23] <= din[23];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[22] <= 1'b0;
end else if(1'b1) begin
dout[22] <= din[22];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[21] <= 1'b0;
end else if(1'b1) begin
dout[21] <= din[21];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[20] <= 1'b0;
end else if(1'b1) begin
dout[20] <= din[20];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[19] <= 1'b0;
end else if(1'b1) begin
dout[19] <= din[19];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[18] <= 1'b0;
end else if(1'b1) begin
dout[18] <= din[18];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[17] <= 1'b0;
end else if(1'b1) begin
dout[17] <= din[17];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[16] <= 1'b0;
end else if(1'b1) begin
dout[16] <= din[16];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[15] <= 1'b0;
end else if(1'b1) begin
dout[15] <= din[15];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[14] <= 1'b0;
end else if(1'b1) begin
dout[14] <= din[14];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[13] <= 1'b0;
end else if(1'b1) begin
dout[13] <= din[13];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[12] <= 1'b0;
end else if(1'b1) begin
dout[12] <= din[12];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[11] <= 1'b0;
end else if(1'b1) begin
dout[11] <= din[11];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[10] <= 1'b0;
end else if(1'b1) begin
dout[10] <= din[10];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[9] <= 1'b0;
end else if(1'b1) begin
dout[9] <= din[9];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[8] <= 1'b0;
end else if(1'b1) begin
dout[8] <= din[8];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[7] <= 1'b0;
end else if(1'b1) begin
dout[7] <= din[7];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[6] <= 1'b0;
end else if(1'b1) begin
dout[6] <= din[6];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[5] <= 1'b0;
end else if(1'b1) begin
dout[5] <= din[5];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[4] <= 1'b0;
end else if(1'b1) begin
dout[4] <= din[4];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[3] <= 1'b0;
end else if(1'b1) begin
dout[3] <= din[3];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[2] <= 1'b0;
end else if(1'b1) begin
dout[2] <= din[2];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[1] <= 1'b0;
end else if(1'b1) begin
dout[1] <= din[1];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[0] <= 1'b0;
end else if(1'b1) begin
dout[0] <= din[0];
end
end
assign N0 = ~rst_l;
endmodule
|
module rvbtb_ghr_hash
(
hashin,
ghr,
hash
);
input [5:4] hashin;
input [4:0] ghr;
output [7:4] hash;
wire [7:4] hash;
assign hash[6] = ghr[2];
assign hash[7] = ghr[3] ^ ghr[4];
assign hash[5] = hashin[5] ^ ghr[1];
assign hash[4] = hashin[4] ^ ghr[0];
endmodule
|
module rvdff_WIDTH15
(
din,
clk,
rst_l,
dout
);
input [14:0] din;
output [14:0] dout;
input clk;
input rst_l;
wire N0;
reg [14:0] dout;
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[14] <= 1'b0;
end else if(1'b1) begin
dout[14] <= din[14];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[13] <= 1'b0;
end else if(1'b1) begin
dout[13] <= din[13];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[12] <= 1'b0;
end else if(1'b1) begin
dout[12] <= din[12];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[11] <= 1'b0;
end else if(1'b1) begin
dout[11] <= din[11];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[10] <= 1'b0;
end else if(1'b1) begin
dout[10] <= din[10];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[9] <= 1'b0;
end else if(1'b1) begin
dout[9] <= din[9];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[8] <= 1'b0;
end else if(1'b1) begin
dout[8] <= din[8];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[7] <= 1'b0;
end else if(1'b1) begin
dout[7] <= din[7];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[6] <= 1'b0;
end else if(1'b1) begin
dout[6] <= din[6];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[5] <= 1'b0;
end else if(1'b1) begin
dout[5] <= din[5];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[4] <= 1'b0;
end else if(1'b1) begin
dout[4] <= din[4];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[3] <= 1'b0;
end else if(1'b1) begin
dout[3] <= din[3];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[2] <= 1'b0;
end else if(1'b1) begin
dout[2] <= din[2];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[1] <= 1'b0;
end else if(1'b1) begin
dout[1] <= din[1];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[0] <= 1'b0;
end else if(1'b1) begin
dout[0] <= din[0];
end
end
assign N0 = ~rst_l;
endmodule
|
module rvdff_WIDTH14
(
din,
clk,
rst_l,
dout
);
input [13:0] din;
output [13:0] dout;
input clk;
input rst_l;
wire N0;
reg [13:0] dout;
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[13] <= 1'b0;
end else if(1'b1) begin
dout[13] <= din[13];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[12] <= 1'b0;
end else if(1'b1) begin
dout[12] <= din[12];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[11] <= 1'b0;
end else if(1'b1) begin
dout[11] <= din[11];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[10] <= 1'b0;
end else if(1'b1) begin
dout[10] <= din[10];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[9] <= 1'b0;
end else if(1'b1) begin
dout[9] <= din[9];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[8] <= 1'b0;
end else if(1'b1) begin
dout[8] <= din[8];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[7] <= 1'b0;
end else if(1'b1) begin
dout[7] <= din[7];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[6] <= 1'b0;
end else if(1'b1) begin
dout[6] <= din[6];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[5] <= 1'b0;
end else if(1'b1) begin
dout[5] <= din[5];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[4] <= 1'b0;
end else if(1'b1) begin
dout[4] <= din[4];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[3] <= 1'b0;
end else if(1'b1) begin
dout[3] <= din[3];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[2] <= 1'b0;
end else if(1'b1) begin
dout[2] <= din[2];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[1] <= 1'b0;
end else if(1'b1) begin
dout[1] <= din[1];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[0] <= 1'b0;
end else if(1'b1) begin
dout[0] <= din[0];
end
end
assign N0 = ~rst_l;
endmodule
|
module rvdff_WIDTH63
(
din,
clk,
rst_l,
dout
);
input [62:0] din;
output [62:0] dout;
input clk;
input rst_l;
wire N0;
reg [62:0] dout;
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[62] <= 1'b0;
end else if(1'b1) begin
dout[62] <= din[62];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[61] <= 1'b0;
end else if(1'b1) begin
dout[61] <= din[61];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[60] <= 1'b0;
end else if(1'b1) begin
dout[60] <= din[60];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[59] <= 1'b0;
end else if(1'b1) begin
dout[59] <= din[59];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[58] <= 1'b0;
end else if(1'b1) begin
dout[58] <= din[58];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[57] <= 1'b0;
end else if(1'b1) begin
dout[57] <= din[57];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[56] <= 1'b0;
end else if(1'b1) begin
dout[56] <= din[56];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[55] <= 1'b0;
end else if(1'b1) begin
dout[55] <= din[55];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[54] <= 1'b0;
end else if(1'b1) begin
dout[54] <= din[54];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[53] <= 1'b0;
end else if(1'b1) begin
dout[53] <= din[53];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[52] <= 1'b0;
end else if(1'b1) begin
dout[52] <= din[52];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[51] <= 1'b0;
end else if(1'b1) begin
dout[51] <= din[51];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[50] <= 1'b0;
end else if(1'b1) begin
dout[50] <= din[50];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[49] <= 1'b0;
end else if(1'b1) begin
dout[49] <= din[49];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[48] <= 1'b0;
end else if(1'b1) begin
dout[48] <= din[48];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[47] <= 1'b0;
end else if(1'b1) begin
dout[47] <= din[47];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[46] <= 1'b0;
end else if(1'b1) begin
dout[46] <= din[46];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[45] <= 1'b0;
end else if(1'b1) begin
dout[45] <= din[45];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[44] <= 1'b0;
end else if(1'b1) begin
dout[44] <= din[44];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[43] <= 1'b0;
end else if(1'b1) begin
dout[43] <= din[43];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[42] <= 1'b0;
end else if(1'b1) begin
dout[42] <= din[42];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[41] <= 1'b0;
end else if(1'b1) begin
dout[41] <= din[41];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[40] <= 1'b0;
end else if(1'b1) begin
dout[40] <= din[40];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[39] <= 1'b0;
end else if(1'b1) begin
dout[39] <= din[39];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[38] <= 1'b0;
end else if(1'b1) begin
dout[38] <= din[38];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[37] <= 1'b0;
end else if(1'b1) begin
dout[37] <= din[37];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[36] <= 1'b0;
end else if(1'b1) begin
dout[36] <= din[36];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[35] <= 1'b0;
end else if(1'b1) begin
dout[35] <= din[35];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[34] <= 1'b0;
end else if(1'b1) begin
dout[34] <= din[34];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[33] <= 1'b0;
end else if(1'b1) begin
dout[33] <= din[33];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[32] <= 1'b0;
end else if(1'b1) begin
dout[32] <= din[32];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[31] <= 1'b0;
end else if(1'b1) begin
dout[31] <= din[31];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[30] <= 1'b0;
end else if(1'b1) begin
dout[30] <= din[30];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[29] <= 1'b0;
end else if(1'b1) begin
dout[29] <= din[29];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[28] <= 1'b0;
end else if(1'b1) begin
dout[28] <= din[28];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[27] <= 1'b0;
end else if(1'b1) begin
dout[27] <= din[27];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[26] <= 1'b0;
end else if(1'b1) begin
dout[26] <= din[26];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[25] <= 1'b0;
end else if(1'b1) begin
dout[25] <= din[25];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[24] <= 1'b0;
end else if(1'b1) begin
dout[24] <= din[24];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[23] <= 1'b0;
end else if(1'b1) begin
dout[23] <= din[23];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[22] <= 1'b0;
end else if(1'b1) begin
dout[22] <= din[22];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[21] <= 1'b0;
end else if(1'b1) begin
dout[21] <= din[21];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[20] <= 1'b0;
end else if(1'b1) begin
dout[20] <= din[20];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[19] <= 1'b0;
end else if(1'b1) begin
dout[19] <= din[19];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[18] <= 1'b0;
end else if(1'b1) begin
dout[18] <= din[18];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[17] <= 1'b0;
end else if(1'b1) begin
dout[17] <= din[17];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[16] <= 1'b0;
end else if(1'b1) begin
dout[16] <= din[16];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[15] <= 1'b0;
end else if(1'b1) begin
dout[15] <= din[15];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[14] <= 1'b0;
end else if(1'b1) begin
dout[14] <= din[14];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[13] <= 1'b0;
end else if(1'b1) begin
dout[13] <= din[13];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[12] <= 1'b0;
end else if(1'b1) begin
dout[12] <= din[12];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[11] <= 1'b0;
end else if(1'b1) begin
dout[11] <= din[11];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[10] <= 1'b0;
end else if(1'b1) begin
dout[10] <= din[10];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[9] <= 1'b0;
end else if(1'b1) begin
dout[9] <= din[9];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[8] <= 1'b0;
end else if(1'b1) begin
dout[8] <= din[8];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[7] <= 1'b0;
end else if(1'b1) begin
dout[7] <= din[7];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[6] <= 1'b0;
end else if(1'b1) begin
dout[6] <= din[6];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[5] <= 1'b0;
end else if(1'b1) begin
dout[5] <= din[5];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[4] <= 1'b0;
end else if(1'b1) begin
dout[4] <= din[4];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[3] <= 1'b0;
end else if(1'b1) begin
dout[3] <= din[3];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[2] <= 1'b0;
end else if(1'b1) begin
dout[2] <= din[2];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[1] <= 1'b0;
end else if(1'b1) begin
dout[1] <= din[1];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[0] <= 1'b0;
end else if(1'b1) begin
dout[0] <= din[0];
end
end
assign N0 = ~rst_l;
endmodule
|
module rvlsadder
(
rs1,
offset,
dout
);
input [31:0] rs1;
input [11:0] offset;
output [31:0] dout;
wire [31:0] dout;
wire N0,N1,N2,N3,N4,N5,N6,N7,N8,N9,N10,N11,N12,N13,N14,N15,N16,N17,N18,N19,cout,N20,
N21,N22,N23,N24,N25,N26,N27,N28,N29,N30,N31,N32,N33,N34,N35,N36,N37,N38,N39,N40,
N41,N42,N43,N44,N45,N46,N47,N48,N49,N50,N51,N52,N53,N54,N55,N56,N57,N58,N59,N60,
N61,N62,N63,N64,N65,N66,N67,N68,N69,N70,N71,N72,N73,N74,N75,N76,N77,N78,N79,N80,
N81,N82,N83,N84,N85,N86,N87,N88,N89,N90,N91,N92,N93,N94,N95,N96,N97,N98,N99,N100,
N101,N102,N103,N104,N105,N106,N107,N108,N109,N110,N111,N112,N113,N114,N115,N116,
N117,N118,N119,N120,N121,N122,N123,N124,N125,N126,N127,N128,N129,N130,N131,N132,
N133,N134,N135,N136,N137,N138,N139,N140,N141,N142,N143,N144,N145,N146,N147,N148,
N149,N150,N151,N152,N153,N154,N155,N156,N157,N158,N159,N160,N161;
wire [31:12] rs1_inc,rs1_dec;
assign { cout, dout[11:0] } = rs1[11:0] + offset;
assign rs1_inc = rs1[31:12] + 1'b1;
assign rs1_dec = rs1[31:12] - 1'b1;
assign dout[31] = N25 | N28;
assign N25 = N21 | N24;
assign N21 = N20 & rs1[31];
assign N0 = offset[11] ^ cout;
assign N20 = ~N0;
assign N24 = N23 & rs1_inc[31];
assign N23 = N22 & cout;
assign N22 = ~offset[11];
assign N28 = N27 & rs1_dec[31];
assign N27 = offset[11] & N26;
assign N26 = ~cout;
assign dout[30] = N33 | N35;
assign N33 = N30 | N32;
assign N30 = N29 & rs1[30];
assign N1 = offset[11] ^ cout;
assign N29 = ~N1;
assign N32 = N31 & rs1_inc[30];
assign N31 = N22 & cout;
assign N35 = N34 & rs1_dec[30];
assign N34 = offset[11] & N26;
assign dout[29] = N40 | N42;
assign N40 = N37 | N39;
assign N37 = N36 & rs1[29];
assign N2 = offset[11] ^ cout;
assign N36 = ~N2;
assign N39 = N38 & rs1_inc[29];
assign N38 = N22 & cout;
assign N42 = N41 & rs1_dec[29];
assign N41 = offset[11] & N26;
assign dout[28] = N47 | N49;
assign N47 = N44 | N46;
assign N44 = N43 & rs1[28];
assign N3 = offset[11] ^ cout;
assign N43 = ~N3;
assign N46 = N45 & rs1_inc[28];
assign N45 = N22 & cout;
assign N49 = N48 & rs1_dec[28];
assign N48 = offset[11] & N26;
assign dout[27] = N54 | N56;
assign N54 = N51 | N53;
assign N51 = N50 & rs1[27];
assign N4 = offset[11] ^ cout;
assign N50 = ~N4;
assign N53 = N52 & rs1_inc[27];
assign N52 = N22 & cout;
assign N56 = N55 & rs1_dec[27];
assign N55 = offset[11] & N26;
assign dout[26] = N61 | N63;
assign N61 = N58 | N60;
assign N58 = N57 & rs1[26];
assign N5 = offset[11] ^ cout;
assign N57 = ~N5;
assign N60 = N59 & rs1_inc[26];
assign N59 = N22 & cout;
assign N63 = N62 & rs1_dec[26];
assign N62 = offset[11] & N26;
assign dout[25] = N68 | N70;
assign N68 = N65 | N67;
assign N65 = N64 & rs1[25];
assign N6 = offset[11] ^ cout;
assign N64 = ~N6;
assign N67 = N66 & rs1_inc[25];
assign N66 = N22 & cout;
assign N70 = N69 & rs1_dec[25];
assign N69 = offset[11] & N26;
assign dout[24] = N75 | N77;
assign N75 = N72 | N74;
assign N72 = N71 & rs1[24];
assign N7 = offset[11] ^ cout;
assign N71 = ~N7;
assign N74 = N73 & rs1_inc[24];
assign N73 = N22 & cout;
assign N77 = N76 & rs1_dec[24];
assign N76 = offset[11] & N26;
assign dout[23] = N82 | N84;
assign N82 = N79 | N81;
assign N79 = N78 & rs1[23];
assign N8 = offset[11] ^ cout;
assign N78 = ~N8;
assign N81 = N80 & rs1_inc[23];
assign N80 = N22 & cout;
assign N84 = N83 & rs1_dec[23];
assign N83 = offset[11] & N26;
assign dout[22] = N89 | N91;
assign N89 = N86 | N88;
assign N86 = N85 & rs1[22];
assign N9 = offset[11] ^ cout;
assign N85 = ~N9;
assign N88 = N87 & rs1_inc[22];
assign N87 = N22 & cout;
assign N91 = N90 & rs1_dec[22];
assign N90 = offset[11] & N26;
assign dout[21] = N96 | N98;
assign N96 = N93 | N95;
assign N93 = N92 & rs1[21];
assign N10 = offset[11] ^ cout;
assign N92 = ~N10;
assign N95 = N94 & rs1_inc[21];
assign N94 = N22 & cout;
assign N98 = N97 & rs1_dec[21];
assign N97 = offset[11] & N26;
assign dout[20] = N103 | N105;
assign N103 = N100 | N102;
assign N100 = N99 & rs1[20];
assign N11 = offset[11] ^ cout;
assign N99 = ~N11;
assign N102 = N101 & rs1_inc[20];
assign N101 = N22 & cout;
assign N105 = N104 & rs1_dec[20];
assign N104 = offset[11] & N26;
assign dout[19] = N110 | N112;
assign N110 = N107 | N109;
assign N107 = N106 & rs1[19];
assign N12 = offset[11] ^ cout;
assign N106 = ~N12;
assign N109 = N108 & rs1_inc[19];
assign N108 = N22 & cout;
assign N112 = N111 & rs1_dec[19];
assign N111 = offset[11] & N26;
assign dout[18] = N117 | N119;
assign N117 = N114 | N116;
assign N114 = N113 & rs1[18];
assign N13 = offset[11] ^ cout;
assign N113 = ~N13;
assign N116 = N115 & rs1_inc[18];
assign N115 = N22 & cout;
assign N119 = N118 & rs1_dec[18];
assign N118 = offset[11] & N26;
assign dout[17] = N124 | N126;
assign N124 = N121 | N123;
assign N121 = N120 & rs1[17];
assign N14 = offset[11] ^ cout;
assign N120 = ~N14;
assign N123 = N122 & rs1_inc[17];
assign N122 = N22 & cout;
assign N126 = N125 & rs1_dec[17];
assign N125 = offset[11] & N26;
assign dout[16] = N131 | N133;
assign N131 = N128 | N130;
assign N128 = N127 & rs1[16];
assign N15 = offset[11] ^ cout;
assign N127 = ~N15;
assign N130 = N129 & rs1_inc[16];
assign N129 = N22 & cout;
assign N133 = N132 & rs1_dec[16];
assign N132 = offset[11] & N26;
assign dout[15] = N138 | N140;
assign N138 = N135 | N137;
assign N135 = N134 & rs1[15];
assign N16 = offset[11] ^ cout;
assign N134 = ~N16;
assign N137 = N136 & rs1_inc[15];
assign N136 = N22 & cout;
assign N140 = N139 & rs1_dec[15];
assign N139 = offset[11] & N26;
assign dout[14] = N145 | N147;
assign N145 = N142 | N144;
assign N142 = N141 & rs1[14];
assign N17 = offset[11] ^ cout;
assign N141 = ~N17;
assign N144 = N143 & rs1_inc[14];
assign N143 = N22 & cout;
assign N147 = N146 & rs1_dec[14];
assign N146 = offset[11] & N26;
assign dout[13] = N152 | N154;
assign N152 = N149 | N151;
assign N149 = N148 & rs1[13];
assign N18 = offset[11] ^ cout;
assign N148 = ~N18;
assign N151 = N150 & rs1_inc[13];
assign N150 = N22 & cout;
assign N154 = N153 & rs1_dec[13];
assign N153 = offset[11] & N26;
assign dout[12] = N159 | N161;
assign N159 = N156 | N158;
assign N156 = N155 & rs1[12];
assign N19 = offset[11] ^ cout;
assign N155 = ~N19;
assign N158 = N157 & rs1_inc[12];
assign N157 = N22 & cout;
assign N161 = N160 & rs1_dec[12];
assign N160 = offset[11] & N26;
endmodule
|
module rvdff_WIDTH20
(
din,
clk,
rst_l,
dout
);
input [19:0] din;
output [19:0] dout;
input clk;
input rst_l;
wire N0;
reg [19:0] dout;
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[19] <= 1'b0;
end else if(1'b1) begin
dout[19] <= din[19];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[18] <= 1'b0;
end else if(1'b1) begin
dout[18] <= din[18];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[17] <= 1'b0;
end else if(1'b1) begin
dout[17] <= din[17];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[16] <= 1'b0;
end else if(1'b1) begin
dout[16] <= din[16];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[15] <= 1'b0;
end else if(1'b1) begin
dout[15] <= din[15];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[14] <= 1'b0;
end else if(1'b1) begin
dout[14] <= din[14];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[13] <= 1'b0;
end else if(1'b1) begin
dout[13] <= din[13];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[12] <= 1'b0;
end else if(1'b1) begin
dout[12] <= din[12];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[11] <= 1'b0;
end else if(1'b1) begin
dout[11] <= din[11];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[10] <= 1'b0;
end else if(1'b1) begin
dout[10] <= din[10];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[9] <= 1'b0;
end else if(1'b1) begin
dout[9] <= din[9];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[8] <= 1'b0;
end else if(1'b1) begin
dout[8] <= din[8];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[7] <= 1'b0;
end else if(1'b1) begin
dout[7] <= din[7];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[6] <= 1'b0;
end else if(1'b1) begin
dout[6] <= din[6];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[5] <= 1'b0;
end else if(1'b1) begin
dout[5] <= din[5];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[4] <= 1'b0;
end else if(1'b1) begin
dout[4] <= din[4];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[3] <= 1'b0;
end else if(1'b1) begin
dout[3] <= din[3];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[2] <= 1'b0;
end else if(1'b1) begin
dout[2] <= din[2];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[1] <= 1'b0;
end else if(1'b1) begin
dout[1] <= din[1];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[0] <= 1'b0;
end else if(1'b1) begin
dout[0] <= din[0];
end
end
assign N0 = ~rst_l;
endmodule
|
module rvdff_WIDTH3
(
din,
clk,
rst_l,
dout
);
input [2:0] din;
output [2:0] dout;
input clk;
input rst_l;
wire N0;
reg [2:0] dout;
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[2] <= 1'b0;
end else if(1'b1) begin
dout[2] <= din[2];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[1] <= 1'b0;
end else if(1'b1) begin
dout[1] <= din[1];
end
end
always @(posedge clk or posedge N0) begin
if(N0) begin
dout[0] <= 1'b0;
end else if(1'b1) begin
dout[0] <= din[0];
end
end
assign N0 = ~rst_l;
endmodule
|
module rvrangecheck_f0040000_64
(
addr,
in_range,
in_region
);
input [31:0] addr;
output in_range;
output in_region;
wire in_range,in_region,N0,N1,N2,N3,N4,N5,N6,N7,N8,N9,N10,N11,N12,N13,N14,N15,N16,
N17,N18,N19,N21,N22;
assign N0 = ~addr[31];
assign N1 = ~addr[30];
assign N2 = ~addr[29];
assign N3 = ~addr[28];
assign N4 = ~addr[18];
assign N5 = N1 | N0;
assign N6 = N2 | N5;
assign N7 = N3 | N6;
assign N8 = addr[27] | N7;
assign N9 = addr[26] | N8;
assign N10 = addr[25] | N9;
assign N11 = addr[24] | N10;
assign N12 = addr[23] | N11;
assign N13 = addr[22] | N12;
assign N14 = addr[21] | N13;
assign N15 = addr[20] | N14;
assign N16 = addr[19] | N15;
assign N17 = N4 | N16;
assign N18 = addr[17] | N17;
assign N19 = addr[16] | N18;
assign in_range = ~N19;
assign N21 = addr[30] & addr[31];
assign N22 = addr[29] & N21;
assign in_region = addr[28] & N22;
endmodule
|
module dynamic_input_route_request_calc(route_req_n, route_req_e, route_req_s, route_req_w, route_req_p,
default_ready_n, default_ready_e, default_ready_s, default_ready_w, default_ready_p,
my_loc_x_in, my_loc_y_in, my_chip_id_in, abs_x, abs_y, abs_chip_id, final_bits, length, header_in);
// begin port declarations
output route_req_n;
output route_req_e;
output route_req_s;
output route_req_w;
output route_req_p;
output default_ready_n;
output default_ready_e;
output default_ready_s;
output default_ready_w;
output default_ready_p;
input [8-1:0] my_loc_x_in;
input [8-1:0] my_loc_y_in;
input [14-1:0] my_chip_id_in;
input [8-1:0] abs_x;
input [8-1:0] abs_y;
input [14-1:0] abs_chip_id;
input [2:0] final_bits;
input [8-1:0] length;
input header_in;
// end port declarations
//fbit declarations
//This is the state
//NONE
//inputs to the state
//NONE
//wires
wire more_x;
wire more_y;
wire less_x;
wire less_y;
wire done_x;
wire done_y;
wire off_chip;
wire done;
wire north;
wire east;
wire south;
wire west;
wire proc;
wire north_calc;
wire south_calc;
//wire regs
//assigns
assign off_chip = abs_chip_id != my_chip_id_in;
assign more_x = off_chip ? 0 > my_loc_x_in : abs_x > my_loc_x_in;
assign more_y = off_chip ? 0 > my_loc_y_in : abs_y > my_loc_y_in;
assign less_x = off_chip ? 0 < my_loc_x_in : abs_x < my_loc_x_in;
assign less_y = off_chip ? 0 < my_loc_y_in : abs_y < my_loc_y_in;
assign done_x = off_chip ? 0 == my_loc_x_in : abs_x == my_loc_x_in;
assign done_y = off_chip ? 0 == my_loc_y_in : abs_y == my_loc_y_in;
assign done = done_x & done_y;
assign north_calc = done_x & less_y;
assign south_calc = done_x & more_y;
assign north = north_calc | ((final_bits == 3'b101) & done);
assign south = south_calc | ((final_bits == 3'b011) & done);
assign east = more_x | ((final_bits == 3'b100) & done);
assign west = less_x | ((final_bits == 3'b010) & done);
assign proc = ((final_bits == 3'b000) & done);
assign route_req_n = header_in & north;
assign route_req_e = header_in & east;
assign route_req_s = header_in & south;
assign route_req_w = header_in & west;
assign route_req_p = header_in & proc;
assign default_ready_n = route_req_n;
assign default_ready_e = route_req_e;
assign default_ready_s = route_req_s;
assign default_ready_w = route_req_w;
assign default_ready_p = route_req_p;
//instantiations
endmodule
|
module one_of_eight(in0,in1,in2,in3,in4,in5,in6,in7,sel,out);
parameter WIDTH = 8;
parameter BHC = 10;
input [2:0] sel;
input [WIDTH-1:0] in0,in1,in2,in3,in4,in5,in6,in7;
output reg [WIDTH-1:0] out;
always@ (*)
begin
out={WIDTH{1'b0}};
case(sel)
3'd0:out=in0;
3'd1:out=in1;
3'd2:out=in2;
3'd3:out=in3;
3'd4:out=in4;
3'd5:out=in5;
3'd6:out=in6;
3'd7:out=in7;
default:; // indicates null
endcase
end
endmodule
|
module bus_compare_equal (a, b, bus_equal);
parameter WIDTH = 8;
parameter BHC = 10;
input [WIDTH-1:0] a, b;
output wire bus_equal;
assign bus_equal = (a==b) ? 1'b1 : 1'b0;
endmodule
|
module space_avail_top (valid,
yummy,
spc_avail,
clk,
reset);
parameter BUFFER_SIZE = 4;
parameter BUFFER_BITS = 3;
input valid; // sending data to the output
input yummy; // output consumed data
output spc_avail; // is there space available?
input clk;
input reset;
//This is the state
reg yummy_f;
reg valid_f;
reg [BUFFER_BITS-1:0] count_f;
reg is_one_f;
reg is_two_or_more_f;
//wires
wire [BUFFER_BITS-1:0] count_plus_1;
wire [BUFFER_BITS-1:0] count_minus_1;
wire up;
wire down;
//wire regs
reg [BUFFER_BITS-1:0] count_temp;
//assigns
assign count_plus_1 = count_f + 1'b1;
assign count_minus_1 = count_f - 1'b1;
assign spc_avail = (is_two_or_more_f | yummy_f | (is_one_f & ~valid_f));
assign up = yummy_f & ~valid_f;
assign down = ~yummy_f & valid_f;
always @ (count_f or count_plus_1 or count_minus_1 or up or down)
begin
case (count_f)
0:
begin
if(up)
begin
count_temp <= count_plus_1;
end
else
begin
count_temp <= count_f;
end
end
BUFFER_SIZE:
begin
if(down)
begin
count_temp <= count_minus_1;
end
else
begin
count_temp <= count_f;
end
end
default:
begin
case ({up, down})
2'b10: count_temp <= count_plus_1;
2'b01: count_temp <= count_minus_1;
default: count_temp <= count_f;
endcase
end
endcase
end
wire top_bits_zero_temp = ~| count_temp[BUFFER_BITS-1:1];
always @ (posedge clk)
begin
if(reset)
begin
count_f <= BUFFER_SIZE;
yummy_f <= 1'b0;
valid_f <= 1'b0;
is_one_f <= (BUFFER_SIZE == 1);
is_two_or_more_f <= (BUFFER_SIZE >= 2);
end
else
begin
count_f <= count_temp;
yummy_f <= yummy;
valid_f <= valid;
is_one_f <= top_bits_zero_temp & count_temp[0];
is_two_or_more_f <= ~top_bits_zero_temp;
end
end
endmodule
|
module flip_bus (in, out);
parameter WIDTH = 8;
parameter BHC = 10;
input [WIDTH-1:0] in;
output wire [WIDTH-1:0] out;
assign out = ~in;
endmodule
|
module one_of_five(in0,in1,in2,in3,in4,sel,out);
parameter WIDTH = 8;
parameter BHC = 10;
input [2:0] sel;
input [WIDTH-1:0] in0,in1,in2,in3,in4;
output reg [WIDTH-1:0] out;
always@(*)
begin
out={WIDTH{1'b0}};
case(sel)
3'd0:out=in0;
3'd1:out=in1;
3'd2:out=in2;
3'd3:out=in3;
3'd4:out=in4;
default:; // indicates null
endcase
end
endmodule
|
module dynamic_output_control(thanks_a, thanks_b, thanks_c, thanks_d, thanks_x, valid_out, current_route, ec_wants_to_send_but_cannot, clk, reset, route_req_a_in, route_req_b_in, route_req_c_in, route_req_d_in, route_req_x_in, tail_a_in, tail_b_in, tail_c_in, tail_d_in, tail_x_in, valid_out_temp, default_ready, space_avail);
// begin port declarations
output thanks_a;
output thanks_b;
output thanks_c;
output thanks_d;
output thanks_x;
output valid_out;
output [2:0] current_route;
output ec_wants_to_send_but_cannot;
input clk;
input reset;
input route_req_a_in;
input route_req_b_in;
input route_req_c_in;
input route_req_d_in;
input route_req_x_in;
input tail_a_in;
input tail_b_in;
input tail_c_in;
input tail_d_in;
input tail_x_in;
input valid_out_temp;
input default_ready;
input space_avail;
// end port declarations
//This is the state
reg [2:0]current_route_f;
reg planned_f;
//inputs to the state
wire [2:0] current_route_temp;
//wires
wire planned_or_default;
// wire route_req_all_or;
wire route_req_all_or_with_planned;
wire route_req_all_but_default;
wire valid_out_internal;
//wire regs
reg new_route_needed;
reg planned_temp;
reg [2:0] new_route;
reg tail_current_route;
/*reg route_req_planned;*/
reg route_req_a_mask;
reg route_req_b_mask;
reg route_req_c_mask;
reg route_req_d_mask;
reg route_req_x_mask;
//more wire regs for the thanks lines
reg thanks_a;
reg thanks_b;
reg thanks_c;
reg thanks_d;
reg thanks_x;
reg ec_wants_to_send_but_cannot;
//assigns
assign planned_or_default = planned_f | default_ready;
assign valid_out_internal = valid_out_temp & planned_or_default & space_avail;
// mbt: if valid_out_interal is a critical path, we can use some "bleeder" gates to decrease the load of the ec stuff
always @(posedge clk)
begin
ec_wants_to_send_but_cannot <= valid_out_temp & planned_or_default & ~space_avail;
end
/* assign route_req_all_or = route_req_a_in | route_req_b_in | route_req_c_in | route_req_d_in | route_req_x_in; */
assign current_route_temp = (new_route_needed) ? new_route : current_route_f;
assign current_route = current_route_f;
//this is everything except the currentl planned route's request
assign route_req_all_or_with_planned = (route_req_a_in & route_req_a_mask) | (route_req_b_in & route_req_b_mask) | (route_req_c_in & route_req_c_mask) | (route_req_d_in & route_req_d_mask) | (route_req_x_in & route_req_x_mask);
//calculates whether the nib that we are going to has space
assign route_req_all_but_default = route_req_b_in | route_req_c_in | route_req_d_in | route_req_x_in;
assign valid_out = valid_out_internal;
//instantiations
//space_avail space(.valid(valid_out_internal), .clk(clk), .reset(reset), .yummy(yummy_in), .spc_avail(space_avail));
//THIS HAS BEEN MOVED to dynamic_output_top
//a mux for current_route_f's tail bit
always @ (current_route_f or tail_a_in or tail_b_in or tail_c_in or tail_d_in or tail_x_in)
begin
(* parallel_case *) case(current_route_f)
3'b000:
begin
tail_current_route <= tail_a_in;
end
3'b001:
begin
tail_current_route <= tail_b_in;
end
3'b010:
begin
tail_current_route <= tail_c_in;
end
3'b011:
begin
tail_current_route <= tail_d_in;
end
3'b100:
begin
tail_current_route <= tail_x_in;
end
default:
begin
tail_current_route <= 1'bx; //This is probably dangerous, but I
//really need the speed here and
//I don't want the synthesizer to
//mess me up if I put a real value
//here
end
endcase
end
always @ (current_route_f or valid_out_internal)
begin
case(current_route_f)
3'b000:
begin
thanks_a <= valid_out_internal;
thanks_b <= 1'b0;
thanks_c <= 1'b0;
thanks_d <= 1'b0;
thanks_x <= 1'b0;
end
3'b001:
begin
thanks_a <= 1'b0;
thanks_b <= valid_out_internal;
thanks_c <= 1'b0;
thanks_d <= 1'b0;
thanks_x <= 1'b0;
end
3'b010:
begin
thanks_a <= 1'b0;
thanks_b <= 1'b0;
thanks_c <= valid_out_internal;
thanks_d <= 1'b0;
thanks_x <= 1'b0;
end
3'b011:
begin
thanks_a <= 1'b0;
thanks_b <= 1'b0;
thanks_c <= 1'b0;
thanks_d <= valid_out_internal;
thanks_x <= 1'b0;
end
3'b100:
begin
thanks_a <= 1'b0;
thanks_b <= 1'b0;
thanks_c <= 1'b0;
thanks_d <= 1'b0;
thanks_x <= valid_out_internal;
end
default:
begin
thanks_a <= 1'bx;
thanks_b <= 1'bx;
thanks_c <= 1'bx;
thanks_d <= 1'bx;
thanks_x <= 1'bx;
//once again this is very dangerous
//but I want to see the timing this
//way and we sould never get here
end
endcase
end
//this is the rotating priority encoder
/*
always @(current_route_f or route_req_a_in or route_req_b_in or route_req_c_in or route_req_d_in or route_req_x_in)
begin
case(current_route_f)
`ROUTE_A:
begin
new_route <= (route_req_b_in)?`ROUTE_B:((route_req_c_in)?`ROUTE_C:((route_req_d_in)?`ROUTE_D:((route_req_x_in)?`ROUTE_X:`ROUTE_A)));
end
`ROUTE_B:
begin
new_route <= (route_req_c_in)?`ROUTE_C:((route_req_d_in)?`ROUTE_D:((route_req_x_in)?`ROUTE_X:((route_req_a_in)?`ROUTE_A:((route_req_b_in)?`ROUTE_B:`ROUTE_A))));
end
`ROUTE_C:
begin
new_route <= (route_req_d_in)?`ROUTE_D:((route_req_x_in)?`ROUTE_X:((route_req_a_in)?`ROUTE_A:((route_req_b_in)?`ROUTE_B:((route_req_c_in)?`ROUTE_C:`ROUTE_A))));
end
`ROUTE_D:
begin
new_route <= (route_req_c_in)?`ROUTE_C:((route_req_d_in)?`ROUTE_D:((route_req_x_in)?`ROUTE_X:((route_req_a_in)?`ROUTE_A:((route_req_b_in)?`ROUTE_B:`ROUTE_A))));
end
`ROUTE_X:
begin
new_route <= (route_req_x_in)?`ROUTE_X:((route_req_a_in)?`ROUTE_A:((route_req_b_in)?`ROUTE_B:((route_req_c_in)?`ROUTE_C:((route_req_d_in)?`ROUTE_D:`ROUTE_A))));
end
default:
begin
new_route <= `ROUTE_A;
//this one I am not willing to chince on
end
endcase
end
*/
//end the rotating priority encoder
//this is the rotating priority encoder
always @(current_route_f or route_req_a_in or route_req_b_in or route_req_c_in or route_req_d_in or route_req_x_in)
begin
case(current_route_f)
3'b000:
begin
new_route <= (route_req_b_in)?3'b001:((route_req_c_in)?3'b010:((route_req_d_in)?3'b011:((route_req_x_in)?3'b100:3'b000)));
end
3'b001:
begin
new_route <= (route_req_c_in)?3'b010:((route_req_d_in)?3'b011:((route_req_x_in)?3'b100:((route_req_a_in)?3'b000:3'b000)));
end
3'b010:
begin
new_route <= (route_req_d_in)?3'b011:((route_req_x_in)?3'b100:((route_req_a_in)?3'b000:((route_req_b_in)?3'b001:3'b000)));
end
3'b011:
begin
new_route <= (route_req_x_in)?3'b100:((route_req_a_in)?3'b000:((route_req_b_in)?3'b001:((route_req_c_in)?3'b010:3'b000)));
end
3'b100:
begin
new_route <= (route_req_a_in)?3'b000:((route_req_b_in)?3'b001:((route_req_c_in)?3'b010:((route_req_d_in)?3'b011:3'b000)));
end
default:
begin
new_route <= 3'b000;
//this one I am not willing to chince on
end
endcase
end
//end the rotating priority encoder
always @(current_route_f or planned_f)
begin
if(planned_f)
begin
case(current_route_f)
3'b000:
begin
route_req_a_mask <= 1'b0;
route_req_b_mask <= 1'b1;
route_req_c_mask <= 1'b1;
route_req_d_mask <= 1'b1;
route_req_x_mask <= 1'b1;
end
3'b001:
begin
route_req_a_mask <= 1'b1;
route_req_b_mask <= 1'b0;
route_req_c_mask <= 1'b1;
route_req_d_mask <= 1'b1;
route_req_x_mask <= 1'b1;
end
3'b010:
begin
route_req_a_mask <= 1'b1;
route_req_b_mask <= 1'b1;
route_req_c_mask <= 1'b0;
route_req_d_mask <= 1'b1;
route_req_x_mask <= 1'b1;
end
3'b011:
begin
route_req_a_mask <= 1'b1;
route_req_b_mask <= 1'b1;
route_req_c_mask <= 1'b1;
route_req_d_mask <= 1'b0;
route_req_x_mask <= 1'b1;
end
3'b100:
begin
route_req_a_mask <= 1'b1;
route_req_b_mask <= 1'b1;
route_req_c_mask <= 1'b1;
route_req_d_mask <= 1'b1;
route_req_x_mask <= 1'b0;
end
default:
begin
route_req_a_mask <= 1'b1;
route_req_b_mask <= 1'b1;
route_req_c_mask <= 1'b1;
route_req_d_mask <= 1'b1;
route_req_x_mask <= 1'b1;
end
endcase
end
else
begin
route_req_a_mask <= 1'b1;
route_req_b_mask <= 1'b1;
route_req_c_mask <= 1'b1;
route_req_d_mask <= 1'b1;
route_req_x_mask <= 1'b1;
end
end
//calculation of new_route_needed
always @ (planned_f or tail_current_route or valid_out_internal or default_ready)
begin
(* parallel_case *) case({default_ready, valid_out_internal, tail_current_route, planned_f})
4'b0000: new_route_needed <= 1'b1;
4'b0001: new_route_needed <= 1'b0;
4'b0010: new_route_needed <= 1'b1;
4'b0011: new_route_needed <= 1'b0;
4'b0100: new_route_needed <= 1'b0; //This line should probably be turned to a 1 if we are to implement "Mikes fairness" schema
4'b0101: new_route_needed <= 1'b0; //This line should probably be turned to a 1 if we are to implement "Mikes fairness" schema
4'b0110: new_route_needed <= 1'b1;
4'b0111: new_route_needed <= 1'b1;
4'b1000: new_route_needed <= 1'b1;
4'b1001: new_route_needed <= 1'b0;
// 4'b1010: new_route_needed <= 1'b0; //this is scary CHECK THIS BEFORE CHIP SHIPS
4'b1010: new_route_needed <= 1'b1; //this is the case where there is a zero length message on the default route that is not being sent this cycle therefore we should let something be locked in, but it doesn't necessarily just the default route. Remember that the default route is the last choice in the priority encoder, but if nothing else is requesting, the default route will be planned and locked in.
//yanqiz change from 0->1
4'b1011: new_route_needed <= 1'b0;
4'b1100: new_route_needed <= 1'b0;
4'b1101: new_route_needed <= 1'b0;
4'b1110: new_route_needed <= 1'b1;
4'b1111: new_route_needed <= 1'b1;
default: new_route_needed <= 1'b1;
//safest choice should never occur
endcase
end
//calculation of planned_temp
//random five input function
always @ (planned_f or tail_current_route or valid_out_internal or default_ready or route_req_all_or_with_planned or route_req_all_but_default)
begin
(* parallel_case *) case({route_req_all_or_with_planned, default_ready, valid_out_internal, tail_current_route, planned_f})
5'b00000: planned_temp <= 1'b0;
5'b00001: planned_temp <= 1'b1;
5'b00010: planned_temp <= 1'b0;
5'b00011: planned_temp <= 1'b1;
5'b00100: planned_temp <= 1'b0; //error what did we just send
5'b00101: planned_temp <= 1'b1;
5'b00110: planned_temp <= 1'b0; //error
5'b00111: planned_temp <= 1'b0;
5'b01000: planned_temp <= 1'b0; //error
5'b01001: planned_temp <= 1'b1;
5'b01010: planned_temp <= 1'b0; //This actually cannot happen
5'b01011: planned_temp <= 1'b1;
5'b01100: planned_temp <= 1'b0; //What did we just send?
5'b01101: planned_temp <= 1'b1;
5'b01110: planned_temp <= 1'b0; //error
5'b01111: planned_temp <= 1'b0; //The default route is
//currently planned but
//is ending this cycle
//and nobody else wants to go
//This is a delayed zero length
//message on the through route
5'b10000: planned_temp <= 1'b1;
5'b10001: planned_temp <= 1'b1;
5'b10010: planned_temp <= 1'b1;
5'b10011: planned_temp <= 1'b1;
5'b10100: planned_temp <= 1'b1;
5'b10101: planned_temp <= 1'b1;
5'b10110: planned_temp <= 1'b1;
5'b10111: planned_temp <= 1'b1;
5'b11000: planned_temp <= 1'b1;
5'b11001: planned_temp <= 1'b1;
5'b11010: planned_temp <= 1'b1;
5'b11011: planned_temp <= 1'b1;
5'b11100: planned_temp <= 1'b1;
5'b11101: planned_temp <= 1'b1;
// 5'b11110: planned_temp <= 1'b0; //This is wrong becasue if
//there is a default
//route zero length message
//that is being sent and
//somebody else wants to send
//on the next cycle
5'b11110: planned_temp <= route_req_all_but_default;
5'b11111: planned_temp <= 1'b1;
default: planned_temp <= 1'b0;
endcase
end
//take care of syncrhonous stuff
always @(posedge clk)
begin
if(reset)
begin
current_route_f <= 3'd0;
planned_f <= 1'd0;
end
else
begin
current_route_f <= current_route_temp;
planned_f <= planned_temp;
end
end
endmodule
|
module bp_me_network_pkt_encode_data_resp_num_lce_p2_num_cce_p1_paddr_width_p22_block_size_in_bits_p512_max_num_flit_p4_x_cord_width_p1_y_cord_width_p1
(
payload_i,
packet_o
);
input [536:0] payload_i;
output [540:0] packet_o;
wire [540:0] packet_o;
wire N0;
assign packet_o[1] = 1'b0;
assign packet_o[2] = packet_o[3];
assign packet_o[540] = payload_i[536];
assign packet_o[539] = payload_i[535];
assign packet_o[538] = payload_i[534];
assign packet_o[537] = payload_i[533];
assign packet_o[536] = payload_i[532];
assign packet_o[535] = payload_i[531];
assign packet_o[534] = payload_i[530];
assign packet_o[533] = payload_i[529];
assign packet_o[532] = payload_i[528];
assign packet_o[531] = payload_i[527];
assign packet_o[530] = payload_i[526];
assign packet_o[529] = payload_i[525];
assign packet_o[528] = payload_i[524];
assign packet_o[527] = payload_i[523];
assign packet_o[526] = payload_i[522];
assign packet_o[525] = payload_i[521];
assign packet_o[524] = payload_i[520];
assign packet_o[523] = payload_i[519];
assign packet_o[522] = payload_i[518];
assign packet_o[521] = payload_i[517];
assign packet_o[520] = payload_i[516];
assign packet_o[519] = payload_i[515];
assign packet_o[518] = payload_i[514];
assign packet_o[517] = payload_i[513];
assign packet_o[516] = payload_i[512];
assign packet_o[515] = payload_i[511];
assign packet_o[514] = payload_i[510];
assign packet_o[513] = payload_i[509];
assign packet_o[512] = payload_i[508];
assign packet_o[511] = payload_i[507];
assign packet_o[510] = payload_i[506];
assign packet_o[509] = payload_i[505];
assign packet_o[508] = payload_i[504];
assign packet_o[507] = payload_i[503];
assign packet_o[506] = payload_i[502];
assign packet_o[505] = payload_i[501];
assign packet_o[504] = payload_i[500];
assign packet_o[503] = payload_i[499];
assign packet_o[502] = payload_i[498];
assign packet_o[501] = payload_i[497];
assign packet_o[500] = payload_i[496];
assign packet_o[499] = payload_i[495];
assign packet_o[498] = payload_i[494];
assign packet_o[497] = payload_i[493];
assign packet_o[496] = payload_i[492];
assign packet_o[495] = payload_i[491];
assign packet_o[494] = payload_i[490];
assign packet_o[493] = payload_i[489];
assign packet_o[492] = payload_i[488];
assign packet_o[491] = payload_i[487];
assign packet_o[490] = payload_i[486];
assign packet_o[489] = payload_i[485];
assign packet_o[488] = payload_i[484];
assign packet_o[487] = payload_i[483];
assign packet_o[486] = payload_i[482];
assign packet_o[485] = payload_i[481];
assign packet_o[484] = payload_i[480];
assign packet_o[483] = payload_i[479];
assign packet_o[482] = payload_i[478];
assign packet_o[481] = payload_i[477];
assign packet_o[480] = payload_i[476];
assign packet_o[479] = payload_i[475];
assign packet_o[478] = payload_i[474];
assign packet_o[477] = payload_i[473];
assign packet_o[476] = payload_i[472];
assign packet_o[475] = payload_i[471];
assign packet_o[474] = payload_i[470];
assign packet_o[473] = payload_i[469];
assign packet_o[472] = payload_i[468];
assign packet_o[471] = payload_i[467];
assign packet_o[470] = payload_i[466];
assign packet_o[469] = payload_i[465];
assign packet_o[468] = payload_i[464];
assign packet_o[467] = payload_i[463];
assign packet_o[466] = payload_i[462];
assign packet_o[465] = payload_i[461];
assign packet_o[464] = payload_i[460];
assign packet_o[463] = payload_i[459];
assign packet_o[462] = payload_i[458];
assign packet_o[461] = payload_i[457];
assign packet_o[460] = payload_i[456];
assign packet_o[459] = payload_i[455];
assign packet_o[458] = payload_i[454];
assign packet_o[457] = payload_i[453];
assign packet_o[456] = payload_i[452];
assign packet_o[455] = payload_i[451];
assign packet_o[454] = payload_i[450];
assign packet_o[453] = payload_i[449];
assign packet_o[452] = payload_i[448];
assign packet_o[451] = payload_i[447];
assign packet_o[450] = payload_i[446];
assign packet_o[449] = payload_i[445];
assign packet_o[448] = payload_i[444];
assign packet_o[447] = payload_i[443];
assign packet_o[446] = payload_i[442];
assign packet_o[445] = payload_i[441];
assign packet_o[444] = payload_i[440];
assign packet_o[443] = payload_i[439];
assign packet_o[442] = payload_i[438];
assign packet_o[441] = payload_i[437];
assign packet_o[440] = payload_i[436];
assign packet_o[439] = payload_i[435];
assign packet_o[438] = payload_i[434];
assign packet_o[437] = payload_i[433];
assign packet_o[436] = payload_i[432];
assign packet_o[435] = payload_i[431];
assign packet_o[434] = payload_i[430];
assign packet_o[433] = payload_i[429];
assign packet_o[432] = payload_i[428];
assign packet_o[431] = payload_i[427];
assign packet_o[430] = payload_i[426];
assign packet_o[429] = payload_i[425];
assign packet_o[428] = payload_i[424];
assign packet_o[427] = payload_i[423];
assign packet_o[426] = payload_i[422];
assign packet_o[425] = payload_i[421];
assign packet_o[424] = payload_i[420];
assign packet_o[423] = payload_i[419];
assign packet_o[422] = payload_i[418];
assign packet_o[421] = payload_i[417];
assign packet_o[420] = payload_i[416];
assign packet_o[419] = payload_i[415];
assign packet_o[418] = payload_i[414];
assign packet_o[417] = payload_i[413];
assign packet_o[416] = payload_i[412];
assign packet_o[415] = payload_i[411];
assign packet_o[414] = payload_i[410];
assign packet_o[413] = payload_i[409];
assign packet_o[412] = payload_i[408];
assign packet_o[411] = payload_i[407];
assign packet_o[410] = payload_i[406];
assign packet_o[409] = payload_i[405];
assign packet_o[408] = payload_i[404];
assign packet_o[407] = payload_i[403];
assign packet_o[406] = payload_i[402];
assign packet_o[405] = payload_i[401];
assign packet_o[404] = payload_i[400];
assign packet_o[403] = payload_i[399];
assign packet_o[402] = payload_i[398];
assign packet_o[401] = payload_i[397];
assign packet_o[400] = payload_i[396];
assign packet_o[399] = payload_i[395];
assign packet_o[398] = payload_i[394];
assign packet_o[397] = payload_i[393];
assign packet_o[396] = payload_i[392];
assign packet_o[395] = payload_i[391];
assign packet_o[394] = payload_i[390];
assign packet_o[393] = payload_i[389];
assign packet_o[392] = payload_i[388];
assign packet_o[391] = payload_i[387];
assign packet_o[390] = payload_i[386];
assign packet_o[389] = payload_i[385];
assign packet_o[388] = payload_i[384];
assign packet_o[387] = payload_i[383];
assign packet_o[386] = payload_i[382];
assign packet_o[385] = payload_i[381];
assign packet_o[384] = payload_i[380];
assign packet_o[383] = payload_i[379];
assign packet_o[382] = payload_i[378];
assign packet_o[381] = payload_i[377];
assign packet_o[380] = payload_i[376];
assign packet_o[379] = payload_i[375];
assign packet_o[378] = payload_i[374];
assign packet_o[377] = payload_i[373];
assign packet_o[376] = payload_i[372];
assign packet_o[375] = payload_i[371];
assign packet_o[374] = payload_i[370];
assign packet_o[373] = payload_i[369];
assign packet_o[372] = payload_i[368];
assign packet_o[371] = payload_i[367];
assign packet_o[370] = payload_i[366];
assign packet_o[369] = payload_i[365];
assign packet_o[368] = payload_i[364];
assign packet_o[367] = payload_i[363];
assign packet_o[366] = payload_i[362];
assign packet_o[365] = payload_i[361];
assign packet_o[364] = payload_i[360];
assign packet_o[363] = payload_i[359];
assign packet_o[362] = payload_i[358];
assign packet_o[361] = payload_i[357];
assign packet_o[360] = payload_i[356];
assign packet_o[359] = payload_i[355];
assign packet_o[358] = payload_i[354];
assign packet_o[357] = payload_i[353];
assign packet_o[356] = payload_i[352];
assign packet_o[355] = payload_i[351];
assign packet_o[354] = payload_i[350];
assign packet_o[353] = payload_i[349];
assign packet_o[352] = payload_i[348];
assign packet_o[351] = payload_i[347];
assign packet_o[350] = payload_i[346];
assign packet_o[349] = payload_i[345];
assign packet_o[348] = payload_i[344];
assign packet_o[347] = payload_i[343];
assign packet_o[346] = payload_i[342];
assign packet_o[345] = payload_i[341];
assign packet_o[344] = payload_i[340];
assign packet_o[343] = payload_i[339];
assign packet_o[342] = payload_i[338];
assign packet_o[341] = payload_i[337];
assign packet_o[340] = payload_i[336];
assign packet_o[339] = payload_i[335];
assign packet_o[338] = payload_i[334];
assign packet_o[337] = payload_i[333];
assign packet_o[336] = payload_i[332];
assign packet_o[335] = payload_i[331];
assign packet_o[334] = payload_i[330];
assign packet_o[333] = payload_i[329];
assign packet_o[332] = payload_i[328];
assign packet_o[331] = payload_i[327];
assign packet_o[330] = payload_i[326];
assign packet_o[329] = payload_i[325];
assign packet_o[328] = payload_i[324];
assign packet_o[327] = payload_i[323];
assign packet_o[326] = payload_i[322];
assign packet_o[325] = payload_i[321];
assign packet_o[324] = payload_i[320];
assign packet_o[323] = payload_i[319];
assign packet_o[322] = payload_i[318];
assign packet_o[321] = payload_i[317];
assign packet_o[320] = payload_i[316];
assign packet_o[319] = payload_i[315];
assign packet_o[318] = payload_i[314];
assign packet_o[317] = payload_i[313];
assign packet_o[316] = payload_i[312];
assign packet_o[315] = payload_i[311];
assign packet_o[314] = payload_i[310];
assign packet_o[313] = payload_i[309];
assign packet_o[312] = payload_i[308];
assign packet_o[311] = payload_i[307];
assign packet_o[310] = payload_i[306];
assign packet_o[309] = payload_i[305];
assign packet_o[308] = payload_i[304];
assign packet_o[307] = payload_i[303];
assign packet_o[306] = payload_i[302];
assign packet_o[305] = payload_i[301];
assign packet_o[304] = payload_i[300];
assign packet_o[303] = payload_i[299];
assign packet_o[302] = payload_i[298];
assign packet_o[301] = payload_i[297];
assign packet_o[300] = payload_i[296];
assign packet_o[299] = payload_i[295];
assign packet_o[298] = payload_i[294];
assign packet_o[297] = payload_i[293];
assign packet_o[296] = payload_i[292];
assign packet_o[295] = payload_i[291];
assign packet_o[294] = payload_i[290];
assign packet_o[293] = payload_i[289];
assign packet_o[292] = payload_i[288];
assign packet_o[291] = payload_i[287];
assign packet_o[290] = payload_i[286];
assign packet_o[289] = payload_i[285];
assign packet_o[288] = payload_i[284];
assign packet_o[287] = payload_i[283];
assign packet_o[286] = payload_i[282];
assign packet_o[285] = payload_i[281];
assign packet_o[284] = payload_i[280];
assign packet_o[283] = payload_i[279];
assign packet_o[282] = payload_i[278];
assign packet_o[281] = payload_i[277];
assign packet_o[280] = payload_i[276];
assign packet_o[279] = payload_i[275];
assign packet_o[278] = payload_i[274];
assign packet_o[277] = payload_i[273];
assign packet_o[276] = payload_i[272];
assign packet_o[275] = payload_i[271];
assign packet_o[274] = payload_i[270];
assign packet_o[273] = payload_i[269];
assign packet_o[272] = payload_i[268];
assign packet_o[271] = payload_i[267];
assign packet_o[270] = payload_i[266];
assign packet_o[269] = payload_i[265];
assign packet_o[268] = payload_i[264];
assign packet_o[267] = payload_i[263];
assign packet_o[266] = payload_i[262];
assign packet_o[265] = payload_i[261];
assign packet_o[264] = payload_i[260];
assign packet_o[263] = payload_i[259];
assign packet_o[262] = payload_i[258];
assign packet_o[261] = payload_i[257];
assign packet_o[260] = payload_i[256];
assign packet_o[259] = payload_i[255];
assign packet_o[258] = payload_i[254];
assign packet_o[257] = payload_i[253];
assign packet_o[256] = payload_i[252];
assign packet_o[255] = payload_i[251];
assign packet_o[254] = payload_i[250];
assign packet_o[253] = payload_i[249];
assign packet_o[252] = payload_i[248];
assign packet_o[251] = payload_i[247];
assign packet_o[250] = payload_i[246];
assign packet_o[249] = payload_i[245];
assign packet_o[248] = payload_i[244];
assign packet_o[247] = payload_i[243];
assign packet_o[246] = payload_i[242];
assign packet_o[245] = payload_i[241];
assign packet_o[244] = payload_i[240];
assign packet_o[243] = payload_i[239];
assign packet_o[242] = payload_i[238];
assign packet_o[241] = payload_i[237];
assign packet_o[240] = payload_i[236];
assign packet_o[239] = payload_i[235];
assign packet_o[238] = payload_i[234];
assign packet_o[237] = payload_i[233];
assign packet_o[236] = payload_i[232];
assign packet_o[235] = payload_i[231];
assign packet_o[234] = payload_i[230];
assign packet_o[233] = payload_i[229];
assign packet_o[232] = payload_i[228];
assign packet_o[231] = payload_i[227];
assign packet_o[230] = payload_i[226];
assign packet_o[229] = payload_i[225];
assign packet_o[228] = payload_i[224];
assign packet_o[227] = payload_i[223];
assign packet_o[226] = payload_i[222];
assign packet_o[225] = payload_i[221];
assign packet_o[224] = payload_i[220];
assign packet_o[223] = payload_i[219];
assign packet_o[222] = payload_i[218];
assign packet_o[221] = payload_i[217];
assign packet_o[220] = payload_i[216];
assign packet_o[219] = payload_i[215];
assign packet_o[218] = payload_i[214];
assign packet_o[217] = payload_i[213];
assign packet_o[216] = payload_i[212];
assign packet_o[215] = payload_i[211];
assign packet_o[214] = payload_i[210];
assign packet_o[213] = payload_i[209];
assign packet_o[212] = payload_i[208];
assign packet_o[211] = payload_i[207];
assign packet_o[210] = payload_i[206];
assign packet_o[209] = payload_i[205];
assign packet_o[208] = payload_i[204];
assign packet_o[207] = payload_i[203];
assign packet_o[206] = payload_i[202];
assign packet_o[205] = payload_i[201];
assign packet_o[204] = payload_i[200];
assign packet_o[203] = payload_i[199];
assign packet_o[202] = payload_i[198];
assign packet_o[201] = payload_i[197];
assign packet_o[200] = payload_i[196];
assign packet_o[199] = payload_i[195];
assign packet_o[198] = payload_i[194];
assign packet_o[197] = payload_i[193];
assign packet_o[196] = payload_i[192];
assign packet_o[195] = payload_i[191];
assign packet_o[194] = payload_i[190];
assign packet_o[193] = payload_i[189];
assign packet_o[192] = payload_i[188];
assign packet_o[191] = payload_i[187];
assign packet_o[190] = payload_i[186];
assign packet_o[189] = payload_i[185];
assign packet_o[188] = payload_i[184];
assign packet_o[187] = payload_i[183];
assign packet_o[186] = payload_i[182];
assign packet_o[185] = payload_i[181];
assign packet_o[184] = payload_i[180];
assign packet_o[183] = payload_i[179];
assign packet_o[182] = payload_i[178];
assign packet_o[181] = payload_i[177];
assign packet_o[180] = payload_i[176];
assign packet_o[179] = payload_i[175];
assign packet_o[178] = payload_i[174];
assign packet_o[177] = payload_i[173];
assign packet_o[176] = payload_i[172];
assign packet_o[175] = payload_i[171];
assign packet_o[174] = payload_i[170];
assign packet_o[173] = payload_i[169];
assign packet_o[172] = payload_i[168];
assign packet_o[171] = payload_i[167];
assign packet_o[170] = payload_i[166];
assign packet_o[169] = payload_i[165];
assign packet_o[168] = payload_i[164];
assign packet_o[167] = payload_i[163];
assign packet_o[166] = payload_i[162];
assign packet_o[165] = payload_i[161];
assign packet_o[164] = payload_i[160];
assign packet_o[163] = payload_i[159];
assign packet_o[162] = payload_i[158];
assign packet_o[161] = payload_i[157];
assign packet_o[160] = payload_i[156];
assign packet_o[159] = payload_i[155];
assign packet_o[158] = payload_i[154];
assign packet_o[157] = payload_i[153];
assign packet_o[156] = payload_i[152];
assign packet_o[155] = payload_i[151];
assign packet_o[154] = payload_i[150];
assign packet_o[153] = payload_i[149];
assign packet_o[152] = payload_i[148];
assign packet_o[151] = payload_i[147];
assign packet_o[150] = payload_i[146];
assign packet_o[149] = payload_i[145];
assign packet_o[148] = payload_i[144];
assign packet_o[147] = payload_i[143];
assign packet_o[146] = payload_i[142];
assign packet_o[145] = payload_i[141];
assign packet_o[144] = payload_i[140];
assign packet_o[143] = payload_i[139];
assign packet_o[142] = payload_i[138];
assign packet_o[141] = payload_i[137];
assign packet_o[140] = payload_i[136];
assign packet_o[139] = payload_i[135];
assign packet_o[138] = payload_i[134];
assign packet_o[137] = payload_i[133];
assign packet_o[136] = payload_i[132];
assign packet_o[135] = payload_i[131];
assign packet_o[134] = payload_i[130];
assign packet_o[133] = payload_i[129];
assign packet_o[132] = payload_i[128];
assign packet_o[131] = payload_i[127];
assign packet_o[130] = payload_i[126];
assign packet_o[129] = payload_i[125];
assign packet_o[128] = payload_i[124];
assign packet_o[127] = payload_i[123];
assign packet_o[126] = payload_i[122];
assign packet_o[125] = payload_i[121];
assign packet_o[124] = payload_i[120];
assign packet_o[123] = payload_i[119];
assign packet_o[122] = payload_i[118];
assign packet_o[121] = payload_i[117];
assign packet_o[120] = payload_i[116];
assign packet_o[119] = payload_i[115];
assign packet_o[118] = payload_i[114];
assign packet_o[117] = payload_i[113];
assign packet_o[116] = payload_i[112];
assign packet_o[115] = payload_i[111];
assign packet_o[114] = payload_i[110];
assign packet_o[113] = payload_i[109];
assign packet_o[112] = payload_i[108];
assign packet_o[111] = payload_i[107];
assign packet_o[110] = payload_i[106];
assign packet_o[109] = payload_i[105];
assign packet_o[108] = payload_i[104];
assign packet_o[107] = payload_i[103];
assign packet_o[106] = payload_i[102];
assign packet_o[105] = payload_i[101];
assign packet_o[104] = payload_i[100];
assign packet_o[103] = payload_i[99];
assign packet_o[102] = payload_i[98];
assign packet_o[101] = payload_i[97];
assign packet_o[100] = payload_i[96];
assign packet_o[99] = payload_i[95];
assign packet_o[98] = payload_i[94];
assign packet_o[97] = payload_i[93];
assign packet_o[96] = payload_i[92];
assign packet_o[95] = payload_i[91];
assign packet_o[94] = payload_i[90];
assign packet_o[93] = payload_i[89];
assign packet_o[92] = payload_i[88];
assign packet_o[91] = payload_i[87];
assign packet_o[90] = payload_i[86];
assign packet_o[89] = payload_i[85];
assign packet_o[88] = payload_i[84];
assign packet_o[87] = payload_i[83];
assign packet_o[86] = payload_i[82];
assign packet_o[85] = payload_i[81];
assign packet_o[84] = payload_i[80];
assign packet_o[83] = payload_i[79];
assign packet_o[82] = payload_i[78];
assign packet_o[81] = payload_i[77];
assign packet_o[80] = payload_i[76];
assign packet_o[79] = payload_i[75];
assign packet_o[78] = payload_i[74];
assign packet_o[77] = payload_i[73];
assign packet_o[76] = payload_i[72];
assign packet_o[75] = payload_i[71];
assign packet_o[74] = payload_i[70];
assign packet_o[73] = payload_i[69];
assign packet_o[72] = payload_i[68];
assign packet_o[71] = payload_i[67];
assign packet_o[70] = payload_i[66];
assign packet_o[69] = payload_i[65];
assign packet_o[68] = payload_i[64];
assign packet_o[67] = payload_i[63];
assign packet_o[66] = payload_i[62];
assign packet_o[65] = payload_i[61];
assign packet_o[64] = payload_i[60];
assign packet_o[63] = payload_i[59];
assign packet_o[62] = payload_i[58];
assign packet_o[61] = payload_i[57];
assign packet_o[60] = payload_i[56];
assign packet_o[59] = payload_i[55];
assign packet_o[58] = payload_i[54];
assign packet_o[57] = payload_i[53];
assign packet_o[56] = payload_i[52];
assign packet_o[55] = payload_i[51];
assign packet_o[54] = payload_i[50];
assign packet_o[53] = payload_i[49];
assign packet_o[52] = payload_i[48];
assign packet_o[51] = payload_i[47];
assign packet_o[50] = payload_i[46];
assign packet_o[49] = payload_i[45];
assign packet_o[48] = payload_i[44];
assign packet_o[47] = payload_i[43];
assign packet_o[46] = payload_i[42];
assign packet_o[45] = payload_i[41];
assign packet_o[44] = payload_i[40];
assign packet_o[43] = payload_i[39];
assign packet_o[42] = payload_i[38];
assign packet_o[41] = payload_i[37];
assign packet_o[40] = payload_i[36];
assign packet_o[39] = payload_i[35];
assign packet_o[38] = payload_i[34];
assign packet_o[37] = payload_i[33];
assign packet_o[36] = payload_i[32];
assign packet_o[35] = payload_i[31];
assign packet_o[34] = payload_i[30];
assign packet_o[33] = payload_i[29];
assign packet_o[32] = payload_i[28];
assign packet_o[31] = payload_i[27];
assign packet_o[30] = payload_i[26];
assign packet_o[29] = payload_i[25];
assign packet_o[0] = payload_i[24];
assign packet_o[28] = payload_i[24];
assign packet_o[27] = payload_i[23];
assign packet_o[26] = payload_i[22];
assign packet_o[25] = payload_i[21];
assign packet_o[24] = payload_i[20];
assign packet_o[23] = payload_i[19];
assign packet_o[22] = payload_i[18];
assign packet_o[21] = payload_i[17];
assign packet_o[20] = payload_i[16];
assign packet_o[19] = payload_i[15];
assign packet_o[18] = payload_i[14];
assign packet_o[17] = payload_i[13];
assign packet_o[16] = payload_i[12];
assign packet_o[15] = payload_i[11];
assign packet_o[14] = payload_i[10];
assign packet_o[13] = payload_i[9];
assign packet_o[12] = payload_i[8];
assign packet_o[11] = payload_i[7];
assign packet_o[10] = payload_i[6];
assign packet_o[9] = payload_i[5];
assign packet_o[8] = payload_i[4];
assign packet_o[7] = payload_i[3];
assign packet_o[6] = payload_i[2];
assign packet_o[5] = payload_i[1];
assign packet_o[4] = payload_i[0];
assign N0 = ~payload_i[22];
assign packet_o[3] = N0;
endmodule
|
module bp_be_dcache_lce_data_cmd_num_cce_p1_num_lce_p2_data_width_p64_paddr_width_p22_lce_data_width_p512_ways_p8_sets_p64
(
cce_data_received_o,
tr_data_received_o,
uncached_data_received_o,
miss_addr_i,
lce_data_cmd_i,
lce_data_cmd_v_i,
lce_data_cmd_yumi_o,
data_mem_pkt_v_o,
data_mem_pkt_o,
data_mem_pkt_yumi_i
);
input [21:0] miss_addr_i;
input [517:0] lce_data_cmd_i;
output [522:0] data_mem_pkt_o;
input lce_data_cmd_v_i;
input data_mem_pkt_yumi_i;
output cce_data_received_o;
output tr_data_received_o;
output uncached_data_received_o;
output lce_data_cmd_yumi_o;
output data_mem_pkt_v_o;
wire [522:0] data_mem_pkt_o;
wire cce_data_received_o,tr_data_received_o,uncached_data_received_o,
lce_data_cmd_yumi_o,data_mem_pkt_v_o,data_mem_pkt_yumi_i,lce_data_cmd_v_i,N0,N1,N2,N3,N4,N5,N6,
N7;
assign data_mem_pkt_o[0] = 1'b0;
assign data_mem_pkt_o[516] = lce_data_cmd_i[2];
assign data_mem_pkt_o[515] = lce_data_cmd_i[1];
assign data_mem_pkt_o[514] = lce_data_cmd_i[0];
assign data_mem_pkt_o[513] = lce_data_cmd_i[517];
assign data_mem_pkt_o[512] = lce_data_cmd_i[516];
assign data_mem_pkt_o[511] = lce_data_cmd_i[515];
assign data_mem_pkt_o[510] = lce_data_cmd_i[514];
assign data_mem_pkt_o[509] = lce_data_cmd_i[513];
assign data_mem_pkt_o[508] = lce_data_cmd_i[512];
assign data_mem_pkt_o[507] = lce_data_cmd_i[511];
assign data_mem_pkt_o[506] = lce_data_cmd_i[510];
assign data_mem_pkt_o[505] = lce_data_cmd_i[509];
assign data_mem_pkt_o[504] = lce_data_cmd_i[508];
assign data_mem_pkt_o[503] = lce_data_cmd_i[507];
assign data_mem_pkt_o[502] = lce_data_cmd_i[506];
assign data_mem_pkt_o[501] = lce_data_cmd_i[505];
assign data_mem_pkt_o[500] = lce_data_cmd_i[504];
assign data_mem_pkt_o[499] = lce_data_cmd_i[503];
assign data_mem_pkt_o[498] = lce_data_cmd_i[502];
assign data_mem_pkt_o[497] = lce_data_cmd_i[501];
assign data_mem_pkt_o[496] = lce_data_cmd_i[500];
assign data_mem_pkt_o[495] = lce_data_cmd_i[499];
assign data_mem_pkt_o[494] = lce_data_cmd_i[498];
assign data_mem_pkt_o[493] = lce_data_cmd_i[497];
assign data_mem_pkt_o[492] = lce_data_cmd_i[496];
assign data_mem_pkt_o[491] = lce_data_cmd_i[495];
assign data_mem_pkt_o[490] = lce_data_cmd_i[494];
assign data_mem_pkt_o[489] = lce_data_cmd_i[493];
assign data_mem_pkt_o[488] = lce_data_cmd_i[492];
assign data_mem_pkt_o[487] = lce_data_cmd_i[491];
assign data_mem_pkt_o[486] = lce_data_cmd_i[490];
assign data_mem_pkt_o[485] = lce_data_cmd_i[489];
assign data_mem_pkt_o[484] = lce_data_cmd_i[488];
assign data_mem_pkt_o[483] = lce_data_cmd_i[487];
assign data_mem_pkt_o[482] = lce_data_cmd_i[486];
assign data_mem_pkt_o[481] = lce_data_cmd_i[485];
assign data_mem_pkt_o[480] = lce_data_cmd_i[484];
assign data_mem_pkt_o[479] = lce_data_cmd_i[483];
assign data_mem_pkt_o[478] = lce_data_cmd_i[482];
assign data_mem_pkt_o[477] = lce_data_cmd_i[481];
assign data_mem_pkt_o[476] = lce_data_cmd_i[480];
assign data_mem_pkt_o[475] = lce_data_cmd_i[479];
assign data_mem_pkt_o[474] = lce_data_cmd_i[478];
assign data_mem_pkt_o[473] = lce_data_cmd_i[477];
assign data_mem_pkt_o[472] = lce_data_cmd_i[476];
assign data_mem_pkt_o[471] = lce_data_cmd_i[475];
assign data_mem_pkt_o[470] = lce_data_cmd_i[474];
assign data_mem_pkt_o[469] = lce_data_cmd_i[473];
assign data_mem_pkt_o[468] = lce_data_cmd_i[472];
assign data_mem_pkt_o[467] = lce_data_cmd_i[471];
assign data_mem_pkt_o[466] = lce_data_cmd_i[470];
assign data_mem_pkt_o[465] = lce_data_cmd_i[469];
assign data_mem_pkt_o[464] = lce_data_cmd_i[468];
assign data_mem_pkt_o[463] = lce_data_cmd_i[467];
assign data_mem_pkt_o[462] = lce_data_cmd_i[466];
assign data_mem_pkt_o[461] = lce_data_cmd_i[465];
assign data_mem_pkt_o[460] = lce_data_cmd_i[464];
assign data_mem_pkt_o[459] = lce_data_cmd_i[463];
assign data_mem_pkt_o[458] = lce_data_cmd_i[462];
assign data_mem_pkt_o[457] = lce_data_cmd_i[461];
assign data_mem_pkt_o[456] = lce_data_cmd_i[460];
assign data_mem_pkt_o[455] = lce_data_cmd_i[459];
assign data_mem_pkt_o[454] = lce_data_cmd_i[458];
assign data_mem_pkt_o[453] = lce_data_cmd_i[457];
assign data_mem_pkt_o[452] = lce_data_cmd_i[456];
assign data_mem_pkt_o[451] = lce_data_cmd_i[455];
assign data_mem_pkt_o[450] = lce_data_cmd_i[454];
assign data_mem_pkt_o[449] = lce_data_cmd_i[453];
assign data_mem_pkt_o[448] = lce_data_cmd_i[452];
assign data_mem_pkt_o[447] = lce_data_cmd_i[451];
assign data_mem_pkt_o[446] = lce_data_cmd_i[450];
assign data_mem_pkt_o[445] = lce_data_cmd_i[449];
assign data_mem_pkt_o[444] = lce_data_cmd_i[448];
assign data_mem_pkt_o[443] = lce_data_cmd_i[447];
assign data_mem_pkt_o[442] = lce_data_cmd_i[446];
assign data_mem_pkt_o[441] = lce_data_cmd_i[445];
assign data_mem_pkt_o[440] = lce_data_cmd_i[444];
assign data_mem_pkt_o[439] = lce_data_cmd_i[443];
assign data_mem_pkt_o[438] = lce_data_cmd_i[442];
assign data_mem_pkt_o[437] = lce_data_cmd_i[441];
assign data_mem_pkt_o[436] = lce_data_cmd_i[440];
assign data_mem_pkt_o[435] = lce_data_cmd_i[439];
assign data_mem_pkt_o[434] = lce_data_cmd_i[438];
assign data_mem_pkt_o[433] = lce_data_cmd_i[437];
assign data_mem_pkt_o[432] = lce_data_cmd_i[436];
assign data_mem_pkt_o[431] = lce_data_cmd_i[435];
assign data_mem_pkt_o[430] = lce_data_cmd_i[434];
assign data_mem_pkt_o[429] = lce_data_cmd_i[433];
assign data_mem_pkt_o[428] = lce_data_cmd_i[432];
assign data_mem_pkt_o[427] = lce_data_cmd_i[431];
assign data_mem_pkt_o[426] = lce_data_cmd_i[430];
assign data_mem_pkt_o[425] = lce_data_cmd_i[429];
assign data_mem_pkt_o[424] = lce_data_cmd_i[428];
assign data_mem_pkt_o[423] = lce_data_cmd_i[427];
assign data_mem_pkt_o[422] = lce_data_cmd_i[426];
assign data_mem_pkt_o[421] = lce_data_cmd_i[425];
assign data_mem_pkt_o[420] = lce_data_cmd_i[424];
assign data_mem_pkt_o[419] = lce_data_cmd_i[423];
assign data_mem_pkt_o[418] = lce_data_cmd_i[422];
assign data_mem_pkt_o[417] = lce_data_cmd_i[421];
assign data_mem_pkt_o[416] = lce_data_cmd_i[420];
assign data_mem_pkt_o[415] = lce_data_cmd_i[419];
assign data_mem_pkt_o[414] = lce_data_cmd_i[418];
assign data_mem_pkt_o[413] = lce_data_cmd_i[417];
assign data_mem_pkt_o[412] = lce_data_cmd_i[416];
assign data_mem_pkt_o[411] = lce_data_cmd_i[415];
assign data_mem_pkt_o[410] = lce_data_cmd_i[414];
assign data_mem_pkt_o[409] = lce_data_cmd_i[413];
assign data_mem_pkt_o[408] = lce_data_cmd_i[412];
assign data_mem_pkt_o[407] = lce_data_cmd_i[411];
assign data_mem_pkt_o[406] = lce_data_cmd_i[410];
assign data_mem_pkt_o[405] = lce_data_cmd_i[409];
assign data_mem_pkt_o[404] = lce_data_cmd_i[408];
assign data_mem_pkt_o[403] = lce_data_cmd_i[407];
assign data_mem_pkt_o[402] = lce_data_cmd_i[406];
assign data_mem_pkt_o[401] = lce_data_cmd_i[405];
assign data_mem_pkt_o[400] = lce_data_cmd_i[404];
assign data_mem_pkt_o[399] = lce_data_cmd_i[403];
assign data_mem_pkt_o[398] = lce_data_cmd_i[402];
assign data_mem_pkt_o[397] = lce_data_cmd_i[401];
assign data_mem_pkt_o[396] = lce_data_cmd_i[400];
assign data_mem_pkt_o[395] = lce_data_cmd_i[399];
assign data_mem_pkt_o[394] = lce_data_cmd_i[398];
assign data_mem_pkt_o[393] = lce_data_cmd_i[397];
assign data_mem_pkt_o[392] = lce_data_cmd_i[396];
assign data_mem_pkt_o[391] = lce_data_cmd_i[395];
assign data_mem_pkt_o[390] = lce_data_cmd_i[394];
assign data_mem_pkt_o[389] = lce_data_cmd_i[393];
assign data_mem_pkt_o[388] = lce_data_cmd_i[392];
assign data_mem_pkt_o[387] = lce_data_cmd_i[391];
assign data_mem_pkt_o[386] = lce_data_cmd_i[390];
assign data_mem_pkt_o[385] = lce_data_cmd_i[389];
assign data_mem_pkt_o[384] = lce_data_cmd_i[388];
assign data_mem_pkt_o[383] = lce_data_cmd_i[387];
assign data_mem_pkt_o[382] = lce_data_cmd_i[386];
assign data_mem_pkt_o[381] = lce_data_cmd_i[385];
assign data_mem_pkt_o[380] = lce_data_cmd_i[384];
assign data_mem_pkt_o[379] = lce_data_cmd_i[383];
assign data_mem_pkt_o[378] = lce_data_cmd_i[382];
assign data_mem_pkt_o[377] = lce_data_cmd_i[381];
assign data_mem_pkt_o[376] = lce_data_cmd_i[380];
assign data_mem_pkt_o[375] = lce_data_cmd_i[379];
assign data_mem_pkt_o[374] = lce_data_cmd_i[378];
assign data_mem_pkt_o[373] = lce_data_cmd_i[377];
assign data_mem_pkt_o[372] = lce_data_cmd_i[376];
assign data_mem_pkt_o[371] = lce_data_cmd_i[375];
assign data_mem_pkt_o[370] = lce_data_cmd_i[374];
assign data_mem_pkt_o[369] = lce_data_cmd_i[373];
assign data_mem_pkt_o[368] = lce_data_cmd_i[372];
assign data_mem_pkt_o[367] = lce_data_cmd_i[371];
assign data_mem_pkt_o[366] = lce_data_cmd_i[370];
assign data_mem_pkt_o[365] = lce_data_cmd_i[369];
assign data_mem_pkt_o[364] = lce_data_cmd_i[368];
assign data_mem_pkt_o[363] = lce_data_cmd_i[367];
assign data_mem_pkt_o[362] = lce_data_cmd_i[366];
assign data_mem_pkt_o[361] = lce_data_cmd_i[365];
assign data_mem_pkt_o[360] = lce_data_cmd_i[364];
assign data_mem_pkt_o[359] = lce_data_cmd_i[363];
assign data_mem_pkt_o[358] = lce_data_cmd_i[362];
assign data_mem_pkt_o[357] = lce_data_cmd_i[361];
assign data_mem_pkt_o[356] = lce_data_cmd_i[360];
assign data_mem_pkt_o[355] = lce_data_cmd_i[359];
assign data_mem_pkt_o[354] = lce_data_cmd_i[358];
assign data_mem_pkt_o[353] = lce_data_cmd_i[357];
assign data_mem_pkt_o[352] = lce_data_cmd_i[356];
assign data_mem_pkt_o[351] = lce_data_cmd_i[355];
assign data_mem_pkt_o[350] = lce_data_cmd_i[354];
assign data_mem_pkt_o[349] = lce_data_cmd_i[353];
assign data_mem_pkt_o[348] = lce_data_cmd_i[352];
assign data_mem_pkt_o[347] = lce_data_cmd_i[351];
assign data_mem_pkt_o[346] = lce_data_cmd_i[350];
assign data_mem_pkt_o[345] = lce_data_cmd_i[349];
assign data_mem_pkt_o[344] = lce_data_cmd_i[348];
assign data_mem_pkt_o[343] = lce_data_cmd_i[347];
assign data_mem_pkt_o[342] = lce_data_cmd_i[346];
assign data_mem_pkt_o[341] = lce_data_cmd_i[345];
assign data_mem_pkt_o[340] = lce_data_cmd_i[344];
assign data_mem_pkt_o[339] = lce_data_cmd_i[343];
assign data_mem_pkt_o[338] = lce_data_cmd_i[342];
assign data_mem_pkt_o[337] = lce_data_cmd_i[341];
assign data_mem_pkt_o[336] = lce_data_cmd_i[340];
assign data_mem_pkt_o[335] = lce_data_cmd_i[339];
assign data_mem_pkt_o[334] = lce_data_cmd_i[338];
assign data_mem_pkt_o[333] = lce_data_cmd_i[337];
assign data_mem_pkt_o[332] = lce_data_cmd_i[336];
assign data_mem_pkt_o[331] = lce_data_cmd_i[335];
assign data_mem_pkt_o[330] = lce_data_cmd_i[334];
assign data_mem_pkt_o[329] = lce_data_cmd_i[333];
assign data_mem_pkt_o[328] = lce_data_cmd_i[332];
assign data_mem_pkt_o[327] = lce_data_cmd_i[331];
assign data_mem_pkt_o[326] = lce_data_cmd_i[330];
assign data_mem_pkt_o[325] = lce_data_cmd_i[329];
assign data_mem_pkt_o[324] = lce_data_cmd_i[328];
assign data_mem_pkt_o[323] = lce_data_cmd_i[327];
assign data_mem_pkt_o[322] = lce_data_cmd_i[326];
assign data_mem_pkt_o[321] = lce_data_cmd_i[325];
assign data_mem_pkt_o[320] = lce_data_cmd_i[324];
assign data_mem_pkt_o[319] = lce_data_cmd_i[323];
assign data_mem_pkt_o[318] = lce_data_cmd_i[322];
assign data_mem_pkt_o[317] = lce_data_cmd_i[321];
assign data_mem_pkt_o[316] = lce_data_cmd_i[320];
assign data_mem_pkt_o[315] = lce_data_cmd_i[319];
assign data_mem_pkt_o[314] = lce_data_cmd_i[318];
assign data_mem_pkt_o[313] = lce_data_cmd_i[317];
assign data_mem_pkt_o[312] = lce_data_cmd_i[316];
assign data_mem_pkt_o[311] = lce_data_cmd_i[315];
assign data_mem_pkt_o[310] = lce_data_cmd_i[314];
assign data_mem_pkt_o[309] = lce_data_cmd_i[313];
assign data_mem_pkt_o[308] = lce_data_cmd_i[312];
assign data_mem_pkt_o[307] = lce_data_cmd_i[311];
assign data_mem_pkt_o[306] = lce_data_cmd_i[310];
assign data_mem_pkt_o[305] = lce_data_cmd_i[309];
assign data_mem_pkt_o[304] = lce_data_cmd_i[308];
assign data_mem_pkt_o[303] = lce_data_cmd_i[307];
assign data_mem_pkt_o[302] = lce_data_cmd_i[306];
assign data_mem_pkt_o[301] = lce_data_cmd_i[305];
assign data_mem_pkt_o[300] = lce_data_cmd_i[304];
assign data_mem_pkt_o[299] = lce_data_cmd_i[303];
assign data_mem_pkt_o[298] = lce_data_cmd_i[302];
assign data_mem_pkt_o[297] = lce_data_cmd_i[301];
assign data_mem_pkt_o[296] = lce_data_cmd_i[300];
assign data_mem_pkt_o[295] = lce_data_cmd_i[299];
assign data_mem_pkt_o[294] = lce_data_cmd_i[298];
assign data_mem_pkt_o[293] = lce_data_cmd_i[297];
assign data_mem_pkt_o[292] = lce_data_cmd_i[296];
assign data_mem_pkt_o[291] = lce_data_cmd_i[295];
assign data_mem_pkt_o[290] = lce_data_cmd_i[294];
assign data_mem_pkt_o[289] = lce_data_cmd_i[293];
assign data_mem_pkt_o[288] = lce_data_cmd_i[292];
assign data_mem_pkt_o[287] = lce_data_cmd_i[291];
assign data_mem_pkt_o[286] = lce_data_cmd_i[290];
assign data_mem_pkt_o[285] = lce_data_cmd_i[289];
assign data_mem_pkt_o[284] = lce_data_cmd_i[288];
assign data_mem_pkt_o[283] = lce_data_cmd_i[287];
assign data_mem_pkt_o[282] = lce_data_cmd_i[286];
assign data_mem_pkt_o[281] = lce_data_cmd_i[285];
assign data_mem_pkt_o[280] = lce_data_cmd_i[284];
assign data_mem_pkt_o[279] = lce_data_cmd_i[283];
assign data_mem_pkt_o[278] = lce_data_cmd_i[282];
assign data_mem_pkt_o[277] = lce_data_cmd_i[281];
assign data_mem_pkt_o[276] = lce_data_cmd_i[280];
assign data_mem_pkt_o[275] = lce_data_cmd_i[279];
assign data_mem_pkt_o[274] = lce_data_cmd_i[278];
assign data_mem_pkt_o[273] = lce_data_cmd_i[277];
assign data_mem_pkt_o[272] = lce_data_cmd_i[276];
assign data_mem_pkt_o[271] = lce_data_cmd_i[275];
assign data_mem_pkt_o[270] = lce_data_cmd_i[274];
assign data_mem_pkt_o[269] = lce_data_cmd_i[273];
assign data_mem_pkt_o[268] = lce_data_cmd_i[272];
assign data_mem_pkt_o[267] = lce_data_cmd_i[271];
assign data_mem_pkt_o[266] = lce_data_cmd_i[270];
assign data_mem_pkt_o[265] = lce_data_cmd_i[269];
assign data_mem_pkt_o[264] = lce_data_cmd_i[268];
assign data_mem_pkt_o[263] = lce_data_cmd_i[267];
assign data_mem_pkt_o[262] = lce_data_cmd_i[266];
assign data_mem_pkt_o[261] = lce_data_cmd_i[265];
assign data_mem_pkt_o[260] = lce_data_cmd_i[264];
assign data_mem_pkt_o[259] = lce_data_cmd_i[263];
assign data_mem_pkt_o[258] = lce_data_cmd_i[262];
assign data_mem_pkt_o[257] = lce_data_cmd_i[261];
assign data_mem_pkt_o[256] = lce_data_cmd_i[260];
assign data_mem_pkt_o[255] = lce_data_cmd_i[259];
assign data_mem_pkt_o[254] = lce_data_cmd_i[258];
assign data_mem_pkt_o[253] = lce_data_cmd_i[257];
assign data_mem_pkt_o[252] = lce_data_cmd_i[256];
assign data_mem_pkt_o[251] = lce_data_cmd_i[255];
assign data_mem_pkt_o[250] = lce_data_cmd_i[254];
assign data_mem_pkt_o[249] = lce_data_cmd_i[253];
assign data_mem_pkt_o[248] = lce_data_cmd_i[252];
assign data_mem_pkt_o[247] = lce_data_cmd_i[251];
assign data_mem_pkt_o[246] = lce_data_cmd_i[250];
assign data_mem_pkt_o[245] = lce_data_cmd_i[249];
assign data_mem_pkt_o[244] = lce_data_cmd_i[248];
assign data_mem_pkt_o[243] = lce_data_cmd_i[247];
assign data_mem_pkt_o[242] = lce_data_cmd_i[246];
assign data_mem_pkt_o[241] = lce_data_cmd_i[245];
assign data_mem_pkt_o[240] = lce_data_cmd_i[244];
assign data_mem_pkt_o[239] = lce_data_cmd_i[243];
assign data_mem_pkt_o[238] = lce_data_cmd_i[242];
assign data_mem_pkt_o[237] = lce_data_cmd_i[241];
assign data_mem_pkt_o[236] = lce_data_cmd_i[240];
assign data_mem_pkt_o[235] = lce_data_cmd_i[239];
assign data_mem_pkt_o[234] = lce_data_cmd_i[238];
assign data_mem_pkt_o[233] = lce_data_cmd_i[237];
assign data_mem_pkt_o[232] = lce_data_cmd_i[236];
assign data_mem_pkt_o[231] = lce_data_cmd_i[235];
assign data_mem_pkt_o[230] = lce_data_cmd_i[234];
assign data_mem_pkt_o[229] = lce_data_cmd_i[233];
assign data_mem_pkt_o[228] = lce_data_cmd_i[232];
assign data_mem_pkt_o[227] = lce_data_cmd_i[231];
assign data_mem_pkt_o[226] = lce_data_cmd_i[230];
assign data_mem_pkt_o[225] = lce_data_cmd_i[229];
assign data_mem_pkt_o[224] = lce_data_cmd_i[228];
assign data_mem_pkt_o[223] = lce_data_cmd_i[227];
assign data_mem_pkt_o[222] = lce_data_cmd_i[226];
assign data_mem_pkt_o[221] = lce_data_cmd_i[225];
assign data_mem_pkt_o[220] = lce_data_cmd_i[224];
assign data_mem_pkt_o[219] = lce_data_cmd_i[223];
assign data_mem_pkt_o[218] = lce_data_cmd_i[222];
assign data_mem_pkt_o[217] = lce_data_cmd_i[221];
assign data_mem_pkt_o[216] = lce_data_cmd_i[220];
assign data_mem_pkt_o[215] = lce_data_cmd_i[219];
assign data_mem_pkt_o[214] = lce_data_cmd_i[218];
assign data_mem_pkt_o[213] = lce_data_cmd_i[217];
assign data_mem_pkt_o[212] = lce_data_cmd_i[216];
assign data_mem_pkt_o[211] = lce_data_cmd_i[215];
assign data_mem_pkt_o[210] = lce_data_cmd_i[214];
assign data_mem_pkt_o[209] = lce_data_cmd_i[213];
assign data_mem_pkt_o[208] = lce_data_cmd_i[212];
assign data_mem_pkt_o[207] = lce_data_cmd_i[211];
assign data_mem_pkt_o[206] = lce_data_cmd_i[210];
assign data_mem_pkt_o[205] = lce_data_cmd_i[209];
assign data_mem_pkt_o[204] = lce_data_cmd_i[208];
assign data_mem_pkt_o[203] = lce_data_cmd_i[207];
assign data_mem_pkt_o[202] = lce_data_cmd_i[206];
assign data_mem_pkt_o[201] = lce_data_cmd_i[205];
assign data_mem_pkt_o[200] = lce_data_cmd_i[204];
assign data_mem_pkt_o[199] = lce_data_cmd_i[203];
assign data_mem_pkt_o[198] = lce_data_cmd_i[202];
assign data_mem_pkt_o[197] = lce_data_cmd_i[201];
assign data_mem_pkt_o[196] = lce_data_cmd_i[200];
assign data_mem_pkt_o[195] = lce_data_cmd_i[199];
assign data_mem_pkt_o[194] = lce_data_cmd_i[198];
assign data_mem_pkt_o[193] = lce_data_cmd_i[197];
assign data_mem_pkt_o[192] = lce_data_cmd_i[196];
assign data_mem_pkt_o[191] = lce_data_cmd_i[195];
assign data_mem_pkt_o[190] = lce_data_cmd_i[194];
assign data_mem_pkt_o[189] = lce_data_cmd_i[193];
assign data_mem_pkt_o[188] = lce_data_cmd_i[192];
assign data_mem_pkt_o[187] = lce_data_cmd_i[191];
assign data_mem_pkt_o[186] = lce_data_cmd_i[190];
assign data_mem_pkt_o[185] = lce_data_cmd_i[189];
assign data_mem_pkt_o[184] = lce_data_cmd_i[188];
assign data_mem_pkt_o[183] = lce_data_cmd_i[187];
assign data_mem_pkt_o[182] = lce_data_cmd_i[186];
assign data_mem_pkt_o[181] = lce_data_cmd_i[185];
assign data_mem_pkt_o[180] = lce_data_cmd_i[184];
assign data_mem_pkt_o[179] = lce_data_cmd_i[183];
assign data_mem_pkt_o[178] = lce_data_cmd_i[182];
assign data_mem_pkt_o[177] = lce_data_cmd_i[181];
assign data_mem_pkt_o[176] = lce_data_cmd_i[180];
assign data_mem_pkt_o[175] = lce_data_cmd_i[179];
assign data_mem_pkt_o[174] = lce_data_cmd_i[178];
assign data_mem_pkt_o[173] = lce_data_cmd_i[177];
assign data_mem_pkt_o[172] = lce_data_cmd_i[176];
assign data_mem_pkt_o[171] = lce_data_cmd_i[175];
assign data_mem_pkt_o[170] = lce_data_cmd_i[174];
assign data_mem_pkt_o[169] = lce_data_cmd_i[173];
assign data_mem_pkt_o[168] = lce_data_cmd_i[172];
assign data_mem_pkt_o[167] = lce_data_cmd_i[171];
assign data_mem_pkt_o[166] = lce_data_cmd_i[170];
assign data_mem_pkt_o[165] = lce_data_cmd_i[169];
assign data_mem_pkt_o[164] = lce_data_cmd_i[168];
assign data_mem_pkt_o[163] = lce_data_cmd_i[167];
assign data_mem_pkt_o[162] = lce_data_cmd_i[166];
assign data_mem_pkt_o[161] = lce_data_cmd_i[165];
assign data_mem_pkt_o[160] = lce_data_cmd_i[164];
assign data_mem_pkt_o[159] = lce_data_cmd_i[163];
assign data_mem_pkt_o[158] = lce_data_cmd_i[162];
assign data_mem_pkt_o[157] = lce_data_cmd_i[161];
assign data_mem_pkt_o[156] = lce_data_cmd_i[160];
assign data_mem_pkt_o[155] = lce_data_cmd_i[159];
assign data_mem_pkt_o[154] = lce_data_cmd_i[158];
assign data_mem_pkt_o[153] = lce_data_cmd_i[157];
assign data_mem_pkt_o[152] = lce_data_cmd_i[156];
assign data_mem_pkt_o[151] = lce_data_cmd_i[155];
assign data_mem_pkt_o[150] = lce_data_cmd_i[154];
assign data_mem_pkt_o[149] = lce_data_cmd_i[153];
assign data_mem_pkt_o[148] = lce_data_cmd_i[152];
assign data_mem_pkt_o[147] = lce_data_cmd_i[151];
assign data_mem_pkt_o[146] = lce_data_cmd_i[150];
assign data_mem_pkt_o[145] = lce_data_cmd_i[149];
assign data_mem_pkt_o[144] = lce_data_cmd_i[148];
assign data_mem_pkt_o[143] = lce_data_cmd_i[147];
assign data_mem_pkt_o[142] = lce_data_cmd_i[146];
assign data_mem_pkt_o[141] = lce_data_cmd_i[145];
assign data_mem_pkt_o[140] = lce_data_cmd_i[144];
assign data_mem_pkt_o[139] = lce_data_cmd_i[143];
assign data_mem_pkt_o[138] = lce_data_cmd_i[142];
assign data_mem_pkt_o[137] = lce_data_cmd_i[141];
assign data_mem_pkt_o[136] = lce_data_cmd_i[140];
assign data_mem_pkt_o[135] = lce_data_cmd_i[139];
assign data_mem_pkt_o[134] = lce_data_cmd_i[138];
assign data_mem_pkt_o[133] = lce_data_cmd_i[137];
assign data_mem_pkt_o[132] = lce_data_cmd_i[136];
assign data_mem_pkt_o[131] = lce_data_cmd_i[135];
assign data_mem_pkt_o[130] = lce_data_cmd_i[134];
assign data_mem_pkt_o[129] = lce_data_cmd_i[133];
assign data_mem_pkt_o[128] = lce_data_cmd_i[132];
assign data_mem_pkt_o[127] = lce_data_cmd_i[131];
assign data_mem_pkt_o[126] = lce_data_cmd_i[130];
assign data_mem_pkt_o[125] = lce_data_cmd_i[129];
assign data_mem_pkt_o[124] = lce_data_cmd_i[128];
assign data_mem_pkt_o[123] = lce_data_cmd_i[127];
assign data_mem_pkt_o[122] = lce_data_cmd_i[126];
assign data_mem_pkt_o[121] = lce_data_cmd_i[125];
assign data_mem_pkt_o[120] = lce_data_cmd_i[124];
assign data_mem_pkt_o[119] = lce_data_cmd_i[123];
assign data_mem_pkt_o[118] = lce_data_cmd_i[122];
assign data_mem_pkt_o[117] = lce_data_cmd_i[121];
assign data_mem_pkt_o[116] = lce_data_cmd_i[120];
assign data_mem_pkt_o[115] = lce_data_cmd_i[119];
assign data_mem_pkt_o[114] = lce_data_cmd_i[118];
assign data_mem_pkt_o[113] = lce_data_cmd_i[117];
assign data_mem_pkt_o[112] = lce_data_cmd_i[116];
assign data_mem_pkt_o[111] = lce_data_cmd_i[115];
assign data_mem_pkt_o[110] = lce_data_cmd_i[114];
assign data_mem_pkt_o[109] = lce_data_cmd_i[113];
assign data_mem_pkt_o[108] = lce_data_cmd_i[112];
assign data_mem_pkt_o[107] = lce_data_cmd_i[111];
assign data_mem_pkt_o[106] = lce_data_cmd_i[110];
assign data_mem_pkt_o[105] = lce_data_cmd_i[109];
assign data_mem_pkt_o[104] = lce_data_cmd_i[108];
assign data_mem_pkt_o[103] = lce_data_cmd_i[107];
assign data_mem_pkt_o[102] = lce_data_cmd_i[106];
assign data_mem_pkt_o[101] = lce_data_cmd_i[105];
assign data_mem_pkt_o[100] = lce_data_cmd_i[104];
assign data_mem_pkt_o[99] = lce_data_cmd_i[103];
assign data_mem_pkt_o[98] = lce_data_cmd_i[102];
assign data_mem_pkt_o[97] = lce_data_cmd_i[101];
assign data_mem_pkt_o[96] = lce_data_cmd_i[100];
assign data_mem_pkt_o[95] = lce_data_cmd_i[99];
assign data_mem_pkt_o[94] = lce_data_cmd_i[98];
assign data_mem_pkt_o[93] = lce_data_cmd_i[97];
assign data_mem_pkt_o[92] = lce_data_cmd_i[96];
assign data_mem_pkt_o[91] = lce_data_cmd_i[95];
assign data_mem_pkt_o[90] = lce_data_cmd_i[94];
assign data_mem_pkt_o[89] = lce_data_cmd_i[93];
assign data_mem_pkt_o[88] = lce_data_cmd_i[92];
assign data_mem_pkt_o[87] = lce_data_cmd_i[91];
assign data_mem_pkt_o[86] = lce_data_cmd_i[90];
assign data_mem_pkt_o[85] = lce_data_cmd_i[89];
assign data_mem_pkt_o[84] = lce_data_cmd_i[88];
assign data_mem_pkt_o[83] = lce_data_cmd_i[87];
assign data_mem_pkt_o[82] = lce_data_cmd_i[86];
assign data_mem_pkt_o[81] = lce_data_cmd_i[85];
assign data_mem_pkt_o[80] = lce_data_cmd_i[84];
assign data_mem_pkt_o[79] = lce_data_cmd_i[83];
assign data_mem_pkt_o[78] = lce_data_cmd_i[82];
assign data_mem_pkt_o[77] = lce_data_cmd_i[81];
assign data_mem_pkt_o[76] = lce_data_cmd_i[80];
assign data_mem_pkt_o[75] = lce_data_cmd_i[79];
assign data_mem_pkt_o[74] = lce_data_cmd_i[78];
assign data_mem_pkt_o[73] = lce_data_cmd_i[77];
assign data_mem_pkt_o[72] = lce_data_cmd_i[76];
assign data_mem_pkt_o[71] = lce_data_cmd_i[75];
assign data_mem_pkt_o[70] = lce_data_cmd_i[74];
assign data_mem_pkt_o[69] = lce_data_cmd_i[73];
assign data_mem_pkt_o[68] = lce_data_cmd_i[72];
assign data_mem_pkt_o[67] = lce_data_cmd_i[71];
assign data_mem_pkt_o[66] = lce_data_cmd_i[70];
assign data_mem_pkt_o[65] = lce_data_cmd_i[69];
assign data_mem_pkt_o[64] = lce_data_cmd_i[68];
assign data_mem_pkt_o[63] = lce_data_cmd_i[67];
assign data_mem_pkt_o[62] = lce_data_cmd_i[66];
assign data_mem_pkt_o[61] = lce_data_cmd_i[65];
assign data_mem_pkt_o[60] = lce_data_cmd_i[64];
assign data_mem_pkt_o[59] = lce_data_cmd_i[63];
assign data_mem_pkt_o[58] = lce_data_cmd_i[62];
assign data_mem_pkt_o[57] = lce_data_cmd_i[61];
assign data_mem_pkt_o[56] = lce_data_cmd_i[60];
assign data_mem_pkt_o[55] = lce_data_cmd_i[59];
assign data_mem_pkt_o[54] = lce_data_cmd_i[58];
assign data_mem_pkt_o[53] = lce_data_cmd_i[57];
assign data_mem_pkt_o[52] = lce_data_cmd_i[56];
assign data_mem_pkt_o[51] = lce_data_cmd_i[55];
assign data_mem_pkt_o[50] = lce_data_cmd_i[54];
assign data_mem_pkt_o[49] = lce_data_cmd_i[53];
assign data_mem_pkt_o[48] = lce_data_cmd_i[52];
assign data_mem_pkt_o[47] = lce_data_cmd_i[51];
assign data_mem_pkt_o[46] = lce_data_cmd_i[50];
assign data_mem_pkt_o[45] = lce_data_cmd_i[49];
assign data_mem_pkt_o[44] = lce_data_cmd_i[48];
assign data_mem_pkt_o[43] = lce_data_cmd_i[47];
assign data_mem_pkt_o[42] = lce_data_cmd_i[46];
assign data_mem_pkt_o[41] = lce_data_cmd_i[45];
assign data_mem_pkt_o[40] = lce_data_cmd_i[44];
assign data_mem_pkt_o[39] = lce_data_cmd_i[43];
assign data_mem_pkt_o[38] = lce_data_cmd_i[42];
assign data_mem_pkt_o[37] = lce_data_cmd_i[41];
assign data_mem_pkt_o[36] = lce_data_cmd_i[40];
assign data_mem_pkt_o[35] = lce_data_cmd_i[39];
assign data_mem_pkt_o[34] = lce_data_cmd_i[38];
assign data_mem_pkt_o[33] = lce_data_cmd_i[37];
assign data_mem_pkt_o[32] = lce_data_cmd_i[36];
assign data_mem_pkt_o[31] = lce_data_cmd_i[35];
assign data_mem_pkt_o[30] = lce_data_cmd_i[34];
assign data_mem_pkt_o[29] = lce_data_cmd_i[33];
assign data_mem_pkt_o[28] = lce_data_cmd_i[32];
assign data_mem_pkt_o[27] = lce_data_cmd_i[31];
assign data_mem_pkt_o[26] = lce_data_cmd_i[30];
assign data_mem_pkt_o[25] = lce_data_cmd_i[29];
assign data_mem_pkt_o[24] = lce_data_cmd_i[28];
assign data_mem_pkt_o[23] = lce_data_cmd_i[27];
assign data_mem_pkt_o[22] = lce_data_cmd_i[26];
assign data_mem_pkt_o[21] = lce_data_cmd_i[25];
assign data_mem_pkt_o[20] = lce_data_cmd_i[24];
assign data_mem_pkt_o[19] = lce_data_cmd_i[23];
assign data_mem_pkt_o[18] = lce_data_cmd_i[22];
assign data_mem_pkt_o[17] = lce_data_cmd_i[21];
assign data_mem_pkt_o[16] = lce_data_cmd_i[20];
assign data_mem_pkt_o[15] = lce_data_cmd_i[19];
assign data_mem_pkt_o[14] = lce_data_cmd_i[18];
assign data_mem_pkt_o[13] = lce_data_cmd_i[17];
assign data_mem_pkt_o[12] = lce_data_cmd_i[16];
assign data_mem_pkt_o[11] = lce_data_cmd_i[15];
assign data_mem_pkt_o[10] = lce_data_cmd_i[14];
assign data_mem_pkt_o[9] = lce_data_cmd_i[13];
assign data_mem_pkt_o[8] = lce_data_cmd_i[12];
assign data_mem_pkt_o[7] = lce_data_cmd_i[11];
assign data_mem_pkt_o[6] = lce_data_cmd_i[10];
assign data_mem_pkt_o[5] = lce_data_cmd_i[9];
assign data_mem_pkt_o[4] = lce_data_cmd_i[8];
assign data_mem_pkt_o[3] = lce_data_cmd_i[7];
assign data_mem_pkt_o[2] = lce_data_cmd_i[6];
assign lce_data_cmd_yumi_o = data_mem_pkt_yumi_i;
assign data_mem_pkt_v_o = lce_data_cmd_v_i;
assign data_mem_pkt_o[522] = miss_addr_i[11];
assign data_mem_pkt_o[521] = miss_addr_i[10];
assign data_mem_pkt_o[520] = miss_addr_i[9];
assign data_mem_pkt_o[519] = miss_addr_i[8];
assign data_mem_pkt_o[518] = miss_addr_i[7];
assign data_mem_pkt_o[517] = miss_addr_i[6];
assign N0 = ~lce_data_cmd_i[3];
assign N1 = N0 | lce_data_cmd_i[4];
assign N2 = ~N1;
assign N3 = lce_data_cmd_i[3] | lce_data_cmd_i[4];
assign N4 = ~N3;
assign N5 = ~lce_data_cmd_i[4];
assign N6 = lce_data_cmd_i[3] | N5;
assign N7 = ~N6;
assign data_mem_pkt_o[1] = N7;
assign cce_data_received_o = data_mem_pkt_yumi_i & N2;
assign tr_data_received_o = data_mem_pkt_yumi_i & N4;
assign uncached_data_received_o = data_mem_pkt_yumi_i & N7;
endmodule
|
module bp_cce_inst_decode_inst_width_p96_inst_addr_width_p8
(
clk_i,
reset_i,
inst_i,
inst_v_i,
lce_req_v_i,
lce_resp_v_i,
lce_data_resp_v_i,
mem_resp_v_i,
mem_data_resp_v_i,
pending_v_i,
lce_cmd_ready_i,
lce_data_cmd_ready_i,
mem_cmd_ready_i,
mem_data_cmd_ready_i,
decoded_inst_o,
decoded_inst_v_o,
pc_stall_o,
pc_branch_target_o
);
input [95:0] inst_i;
output [127:0] decoded_inst_o;
output [7:0] pc_branch_target_o;
input clk_i;
input reset_i;
input inst_v_i;
input lce_req_v_i;
input lce_resp_v_i;
input lce_data_resp_v_i;
input mem_resp_v_i;
input mem_data_resp_v_i;
input pending_v_i;
input lce_cmd_ready_i;
input lce_data_cmd_ready_i;
input mem_cmd_ready_i;
input mem_data_cmd_ready_i;
output decoded_inst_v_o;
output pc_stall_o;
wire [127:0] decoded_inst_o;
wire [7:0] pc_branch_target_o;
wire decoded_inst_v_o,pc_stall_o,N0,N1,N2,N3,N4,N5,N6,N7,N8,N9,N10,N11,N12,pushq_op,
popq_op,N13,N14,N15,N16,N17,N18,N19,N20,N21,N22,N23,N24,N25,N26,N27,N28,N29,N30,
N31,N32,N33,N34,N35,N36,N37,N38,N39,N40,N41,wfq_op,stall_op,wfq_q_ready,N42,N43,
N44,N45,N46,N47,N48,N49,N50,N51,N52,N53,N54,N55,N56,N57,N58,N59,N60,N61,N62,N63,
N64,N65,N66,N67,N68,N69,N70,N71,N72,N73,N74,N75,N76,N77,N78,N79,N80,N81,N82,N83,
N84,N85,N86,N87,N88,N89,N90,N91,N92,N93,N94,N95,N96,N97,N98,N99,N100,N101,N102,
N103,N104,N105,N106,N107,N108,N109,N110,N111,N112,N113,N114,N115,N116,N117,N118,
N119,N120,N121,N122,N123,N124,N125,N126,N127,N128,N129,N130,N131,N132,N133,N134,
N135,N136,N137,N138,N139,N140,N141,N142,N143,N144,N145,N146,N147,N148,N149,N150,
N151,N152,N153,N154,N155;
assign N44 = N102 & N99;
assign N45 = inst_i[63] | N99;
assign N47 = N102 | inst_i[62];
assign N49 = inst_i[63] & inst_i[62];
assign N57 = inst_i[94] | inst_i[95];
assign N58 = inst_i[93] | N57;
assign N59 = ~N58;
assign N60 = ~inst_i[93];
assign N61 = N60 | N57;
assign N62 = ~N61;
assign N63 = ~inst_i[95];
assign N64 = ~inst_i[94];
assign N65 = N64 | N63;
assign N66 = inst_i[93] | N65;
assign N67 = ~N66;
assign N68 = inst_i[91] | inst_i[92];
assign N69 = inst_i[90] | N68;
assign N70 = ~N69;
assign N71 = inst_i[94] | N63;
assign N72 = inst_i[93] | N71;
assign N73 = ~N72;
assign N74 = ~inst_i[90];
assign N75 = N74 | N68;
assign N76 = ~N75;
assign N77 = ~inst_i[91];
assign N78 = N77 | inst_i[92];
assign N79 = inst_i[90] | N78;
assign N80 = ~N79;
assign N81 = inst_i[60] | inst_i[61];
assign N82 = inst_i[59] | N81;
assign N83 = ~N82;
assign N84 = ~inst_i[60];
assign N85 = N84 | inst_i[61];
assign N86 = inst_i[59] | N85;
assign N87 = ~N86;
assign N88 = ~inst_i[61];
assign N89 = inst_i[60] | N88;
assign N90 = inst_i[59] | N89;
assign N91 = ~N90;
assign N92 = ~inst_i[59];
assign N93 = N92 | N89;
assign N94 = ~N93;
assign N95 = N92 | N81;
assign N96 = ~N95;
assign N97 = inst_i[62] | inst_i[63];
assign N98 = ~N97;
assign N99 = ~inst_i[62];
assign N100 = N99 | inst_i[63];
assign N101 = ~N100;
assign N102 = ~inst_i[63];
assign N103 = inst_i[62] | N102;
assign N104 = ~N103;
assign N105 = inst_i[62] & inst_i[63];
assign N106 = ~inst_i[76];
assign N107 = ~inst_i[75];
assign N108 = inst_i[78] | inst_i[79];
assign N109 = inst_i[77] | N108;
assign N110 = N106 | N109;
assign N111 = N107 | N110;
assign N112 = ~N111;
assign N113 = inst_i[75] | N110;
assign N114 = ~N113;
assign N115 = inst_i[76] | N109;
assign N116 = N107 | N115;
assign N117 = ~N116;
assign N118 = inst_i[75] | N115;
assign N119 = ~N118;
assign N120 = N64 | inst_i[95];
assign N121 = inst_i[93] | N120;
assign N122 = ~N121;
assign N123 = inst_i[94] & inst_i[95];
assign N124 = inst_i[93] & N123;
assign N125 = N60 | N71;
assign N126 = ~N125;
assign N127 = inst_i[91] & inst_i[92];
assign N128 = inst_i[90] & N127;
assign { N18, N17, N16 } = (N0)? inst_i[92:90] :
(N1)? { 1'b0, 1'b0, 1'b0 } : 1'b0;
assign N0 = N73;
assign N1 = N72;
assign { N21, N20, N19 } = (N2)? inst_i[92:90] :
(N3)? { 1'b0, 1'b0, 1'b0 } : 1'b0;
assign N2 = N126;
assign N3 = N125;
assign decoded_inst_v_o = (N4)? 1'b0 :
(N14)? inst_v_i : 1'b0;
assign N4 = N13;
assign decoded_inst_o = (N4)? { 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0 } :
(N14)? { inst_i[92:59], N15, inst_i[58:29], N18, N17, N16, N73, N21, N20, N19, N126, inst_i[28:20], inst_i[61:59], inst_i[19:19], N122, N59, N22, N23, N24, N25, N26, inst_i[18:13], N27, N28, N29, inst_i[12:0], N39, N40, N41, inst_i[12:12], N30, N31, N32, N33, N34, N35, N36, N37, N38 } : 1'b0;
assign N54 = (N5)? N50 :
(N6)? N51 :
(N7)? N52 :
(N8)? N53 : 1'b0;
assign N5 = N44;
assign N6 = N46;
assign N7 = N48;
assign N8 = N49;
assign N55 = (N9)? N54 :
(N10)? N42 : 1'b0;
assign N9 = pushq_op;
assign N10 = N43;
assign pc_stall_o = (N11)? 1'b0 :
(N12)? N55 : 1'b0;
assign N11 = reset_i;
assign N12 = N56;
assign pc_branch_target_o = (N11)? { 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0 } :
(N12)? inst_i[66:59] : 1'b0;
assign pushq_op = N124 & N76;
assign popq_op = N124 & N80;
assign N13 = reset_i | N129;
assign N129 = ~inst_v_i;
assign N14 = ~N13;
assign N15 = N59 | N62;
assign N22 = N112 & N130;
assign N130 = N122 | N59;
assign N23 = N114 & N131;
assign N131 = N122 | N59;
assign N24 = N117 & N132;
assign N132 = N122 | N59;
assign N25 = N119 & N133;
assign N133 = N122 | N59;
assign N26 = N135 | N25;
assign N135 = N134 | N24;
assign N134 = N22 | N23;
assign N27 = N67 & N70;
assign N28 = N73 & N76;
assign N29 = N73 & N80;
assign N30 = popq_op & N83;
assign N31 = popq_op & N91;
assign N32 = popq_op & N94;
assign N33 = popq_op & N96;
assign N34 = popq_op & N87;
assign N35 = N136 & N98;
assign N136 = lce_cmd_ready_i & pushq_op;
assign N36 = pushq_op & N101;
assign N37 = N137 & N104;
assign N137 = mem_cmd_ready_i & pushq_op;
assign N38 = N138 & N105;
assign N138 = mem_data_cmd_ready_i & pushq_op;
assign N39 = popq_op & N83;
assign N40 = popq_op & N87;
assign N41 = popq_op & N139;
assign N139 = N83 | N87;
assign wfq_op = N124 & N70;
assign stall_op = N67 & N128;
assign wfq_q_ready = N148 | N149;
assign N148 = N146 | N147;
assign N146 = N144 | N145;
assign N144 = N142 | N143;
assign N142 = N140 | N141;
assign N140 = inst_i[64] & lce_req_v_i;
assign N141 = inst_i[63] & lce_resp_v_i;
assign N143 = inst_i[62] & lce_data_resp_v_i;
assign N145 = inst_i[61] & mem_resp_v_i;
assign N147 = inst_i[60] & mem_data_resp_v_i;
assign N149 = inst_i[59] & pending_v_i;
assign N42 = stall_op | N151;
assign N151 = wfq_op & N150;
assign N150 = ~wfq_q_ready;
assign N43 = ~pushq_op;
assign N46 = ~N45;
assign N48 = ~N47;
assign N50 = N42 | N152;
assign N152 = ~lce_cmd_ready_i;
assign N51 = N42 | N153;
assign N153 = ~lce_data_cmd_ready_i;
assign N52 = N42 | N154;
assign N154 = ~mem_cmd_ready_i;
assign N53 = N42 | N155;
assign N155 = ~mem_data_cmd_ready_i;
assign N56 = ~reset_i;
endmodule
|
module bsg_mux_segmented_segments_p5_segment_width_p64
(
data0_i,
data1_i,
sel_i,
data_o
);
input [319:0] data0_i;
input [319:0] data1_i;
input [4:0] sel_i;
output [319:0] data_o;
wire [319:0] data_o;
wire N0,N1,N2,N3,N4,N5,N6,N7,N8,N9;
assign data_o[63:0] = (N0)? data1_i[63:0] :
(N5)? data0_i[63:0] : 1'b0;
assign N0 = sel_i[0];
assign data_o[127:64] = (N1)? data1_i[127:64] :
(N6)? data0_i[127:64] : 1'b0;
assign N1 = sel_i[1];
assign data_o[191:128] = (N2)? data1_i[191:128] :
(N7)? data0_i[191:128] : 1'b0;
assign N2 = sel_i[2];
assign data_o[255:192] = (N3)? data1_i[255:192] :
(N8)? data0_i[255:192] : 1'b0;
assign N3 = sel_i[3];
assign data_o[319:256] = (N4)? data1_i[319:256] :
(N9)? data0_i[319:256] : 1'b0;
assign N4 = sel_i[4];
assign N5 = ~sel_i[0];
assign N6 = ~sel_i[1];
assign N7 = ~sel_i[2];
assign N8 = ~sel_i[3];
assign N9 = ~sel_i[4];
endmodule
|
module bsg_mux_one_hot_width_p131_els_p4
(
data_i,
sel_one_hot_i,
data_o
);
input [523:0] data_i;
input [3:0] sel_one_hot_i;
output [130:0] data_o;
wire [130:0] data_o;
wire N0,N1,N2,N3,N4,N5,N6,N7,N8,N9,N10,N11,N12,N13,N14,N15,N16,N17,N18,N19,N20,N21,
N22,N23,N24,N25,N26,N27,N28,N29,N30,N31,N32,N33,N34,N35,N36,N37,N38,N39,N40,N41,
N42,N43,N44,N45,N46,N47,N48,N49,N50,N51,N52,N53,N54,N55,N56,N57,N58,N59,N60,N61,
N62,N63,N64,N65,N66,N67,N68,N69,N70,N71,N72,N73,N74,N75,N76,N77,N78,N79,N80,N81,
N82,N83,N84,N85,N86,N87,N88,N89,N90,N91,N92,N93,N94,N95,N96,N97,N98,N99,N100,N101,
N102,N103,N104,N105,N106,N107,N108,N109,N110,N111,N112,N113,N114,N115,N116,N117,
N118,N119,N120,N121,N122,N123,N124,N125,N126,N127,N128,N129,N130,N131,N132,N133,
N134,N135,N136,N137,N138,N139,N140,N141,N142,N143,N144,N145,N146,N147,N148,N149,
N150,N151,N152,N153,N154,N155,N156,N157,N158,N159,N160,N161,N162,N163,N164,N165,
N166,N167,N168,N169,N170,N171,N172,N173,N174,N175,N176,N177,N178,N179,N180,N181,
N182,N183,N184,N185,N186,N187,N188,N189,N190,N191,N192,N193,N194,N195,N196,N197,
N198,N199,N200,N201,N202,N203,N204,N205,N206,N207,N208,N209,N210,N211,N212,N213,
N214,N215,N216,N217,N218,N219,N220,N221,N222,N223,N224,N225,N226,N227,N228,N229,
N230,N231,N232,N233,N234,N235,N236,N237,N238,N239,N240,N241,N242,N243,N244,N245,
N246,N247,N248,N249,N250,N251,N252,N253,N254,N255,N256,N257,N258,N259,N260,N261;
wire [523:0] data_masked;
assign data_masked[130] = data_i[130] & sel_one_hot_i[0];
assign data_masked[129] = data_i[129] & sel_one_hot_i[0];
assign data_masked[128] = data_i[128] & sel_one_hot_i[0];
assign data_masked[127] = data_i[127] & sel_one_hot_i[0];
assign data_masked[126] = data_i[126] & sel_one_hot_i[0];
assign data_masked[125] = data_i[125] & sel_one_hot_i[0];
assign data_masked[124] = data_i[124] & sel_one_hot_i[0];
assign data_masked[123] = data_i[123] & sel_one_hot_i[0];
assign data_masked[122] = data_i[122] & sel_one_hot_i[0];
assign data_masked[121] = data_i[121] & sel_one_hot_i[0];
assign data_masked[120] = data_i[120] & sel_one_hot_i[0];
assign data_masked[119] = data_i[119] & sel_one_hot_i[0];
assign data_masked[118] = data_i[118] & sel_one_hot_i[0];
assign data_masked[117] = data_i[117] & sel_one_hot_i[0];
assign data_masked[116] = data_i[116] & sel_one_hot_i[0];
assign data_masked[115] = data_i[115] & sel_one_hot_i[0];
assign data_masked[114] = data_i[114] & sel_one_hot_i[0];
assign data_masked[113] = data_i[113] & sel_one_hot_i[0];
assign data_masked[112] = data_i[112] & sel_one_hot_i[0];
assign data_masked[111] = data_i[111] & sel_one_hot_i[0];
assign data_masked[110] = data_i[110] & sel_one_hot_i[0];
assign data_masked[109] = data_i[109] & sel_one_hot_i[0];
assign data_masked[108] = data_i[108] & sel_one_hot_i[0];
assign data_masked[107] = data_i[107] & sel_one_hot_i[0];
assign data_masked[106] = data_i[106] & sel_one_hot_i[0];
assign data_masked[105] = data_i[105] & sel_one_hot_i[0];
assign data_masked[104] = data_i[104] & sel_one_hot_i[0];
assign data_masked[103] = data_i[103] & sel_one_hot_i[0];
assign data_masked[102] = data_i[102] & sel_one_hot_i[0];
assign data_masked[101] = data_i[101] & sel_one_hot_i[0];
assign data_masked[100] = data_i[100] & sel_one_hot_i[0];
assign data_masked[99] = data_i[99] & sel_one_hot_i[0];
assign data_masked[98] = data_i[98] & sel_one_hot_i[0];
assign data_masked[97] = data_i[97] & sel_one_hot_i[0];
assign data_masked[96] = data_i[96] & sel_one_hot_i[0];
assign data_masked[95] = data_i[95] & sel_one_hot_i[0];
assign data_masked[94] = data_i[94] & sel_one_hot_i[0];
assign data_masked[93] = data_i[93] & sel_one_hot_i[0];
assign data_masked[92] = data_i[92] & sel_one_hot_i[0];
assign data_masked[91] = data_i[91] & sel_one_hot_i[0];
assign data_masked[90] = data_i[90] & sel_one_hot_i[0];
assign data_masked[89] = data_i[89] & sel_one_hot_i[0];
assign data_masked[88] = data_i[88] & sel_one_hot_i[0];
assign data_masked[87] = data_i[87] & sel_one_hot_i[0];
assign data_masked[86] = data_i[86] & sel_one_hot_i[0];
assign data_masked[85] = data_i[85] & sel_one_hot_i[0];
assign data_masked[84] = data_i[84] & sel_one_hot_i[0];
assign data_masked[83] = data_i[83] & sel_one_hot_i[0];
assign data_masked[82] = data_i[82] & sel_one_hot_i[0];
assign data_masked[81] = data_i[81] & sel_one_hot_i[0];
assign data_masked[80] = data_i[80] & sel_one_hot_i[0];
assign data_masked[79] = data_i[79] & sel_one_hot_i[0];
assign data_masked[78] = data_i[78] & sel_one_hot_i[0];
assign data_masked[77] = data_i[77] & sel_one_hot_i[0];
assign data_masked[76] = data_i[76] & sel_one_hot_i[0];
assign data_masked[75] = data_i[75] & sel_one_hot_i[0];
assign data_masked[74] = data_i[74] & sel_one_hot_i[0];
assign data_masked[73] = data_i[73] & sel_one_hot_i[0];
assign data_masked[72] = data_i[72] & sel_one_hot_i[0];
assign data_masked[71] = data_i[71] & sel_one_hot_i[0];
assign data_masked[70] = data_i[70] & sel_one_hot_i[0];
assign data_masked[69] = data_i[69] & sel_one_hot_i[0];
assign data_masked[68] = data_i[68] & sel_one_hot_i[0];
assign data_masked[67] = data_i[67] & sel_one_hot_i[0];
assign data_masked[66] = data_i[66] & sel_one_hot_i[0];
assign data_masked[65] = data_i[65] & sel_one_hot_i[0];
assign data_masked[64] = data_i[64] & sel_one_hot_i[0];
assign data_masked[63] = data_i[63] & sel_one_hot_i[0];
assign data_masked[62] = data_i[62] & sel_one_hot_i[0];
assign data_masked[61] = data_i[61] & sel_one_hot_i[0];
assign data_masked[60] = data_i[60] & sel_one_hot_i[0];
assign data_masked[59] = data_i[59] & sel_one_hot_i[0];
assign data_masked[58] = data_i[58] & sel_one_hot_i[0];
assign data_masked[57] = data_i[57] & sel_one_hot_i[0];
assign data_masked[56] = data_i[56] & sel_one_hot_i[0];
assign data_masked[55] = data_i[55] & sel_one_hot_i[0];
assign data_masked[54] = data_i[54] & sel_one_hot_i[0];
assign data_masked[53] = data_i[53] & sel_one_hot_i[0];
assign data_masked[52] = data_i[52] & sel_one_hot_i[0];
assign data_masked[51] = data_i[51] & sel_one_hot_i[0];
assign data_masked[50] = data_i[50] & sel_one_hot_i[0];
assign data_masked[49] = data_i[49] & sel_one_hot_i[0];
assign data_masked[48] = data_i[48] & sel_one_hot_i[0];
assign data_masked[47] = data_i[47] & sel_one_hot_i[0];
assign data_masked[46] = data_i[46] & sel_one_hot_i[0];
assign data_masked[45] = data_i[45] & sel_one_hot_i[0];
assign data_masked[44] = data_i[44] & sel_one_hot_i[0];
assign data_masked[43] = data_i[43] & sel_one_hot_i[0];
assign data_masked[42] = data_i[42] & sel_one_hot_i[0];
assign data_masked[41] = data_i[41] & sel_one_hot_i[0];
assign data_masked[40] = data_i[40] & sel_one_hot_i[0];
assign data_masked[39] = data_i[39] & sel_one_hot_i[0];
assign data_masked[38] = data_i[38] & sel_one_hot_i[0];
assign data_masked[37] = data_i[37] & sel_one_hot_i[0];
assign data_masked[36] = data_i[36] & sel_one_hot_i[0];
assign data_masked[35] = data_i[35] & sel_one_hot_i[0];
assign data_masked[34] = data_i[34] & sel_one_hot_i[0];
assign data_masked[33] = data_i[33] & sel_one_hot_i[0];
assign data_masked[32] = data_i[32] & sel_one_hot_i[0];
assign data_masked[31] = data_i[31] & sel_one_hot_i[0];
assign data_masked[30] = data_i[30] & sel_one_hot_i[0];
assign data_masked[29] = data_i[29] & sel_one_hot_i[0];
assign data_masked[28] = data_i[28] & sel_one_hot_i[0];
assign data_masked[27] = data_i[27] & sel_one_hot_i[0];
assign data_masked[26] = data_i[26] & sel_one_hot_i[0];
assign data_masked[25] = data_i[25] & sel_one_hot_i[0];
assign data_masked[24] = data_i[24] & sel_one_hot_i[0];
assign data_masked[23] = data_i[23] & sel_one_hot_i[0];
assign data_masked[22] = data_i[22] & sel_one_hot_i[0];
assign data_masked[21] = data_i[21] & sel_one_hot_i[0];
assign data_masked[20] = data_i[20] & sel_one_hot_i[0];
assign data_masked[19] = data_i[19] & sel_one_hot_i[0];
assign data_masked[18] = data_i[18] & sel_one_hot_i[0];
assign data_masked[17] = data_i[17] & sel_one_hot_i[0];
assign data_masked[16] = data_i[16] & sel_one_hot_i[0];
assign data_masked[15] = data_i[15] & sel_one_hot_i[0];
assign data_masked[14] = data_i[14] & sel_one_hot_i[0];
assign data_masked[13] = data_i[13] & sel_one_hot_i[0];
assign data_masked[12] = data_i[12] & sel_one_hot_i[0];
assign data_masked[11] = data_i[11] & sel_one_hot_i[0];
assign data_masked[10] = data_i[10] & sel_one_hot_i[0];
assign data_masked[9] = data_i[9] & sel_one_hot_i[0];
assign data_masked[8] = data_i[8] & sel_one_hot_i[0];
assign data_masked[7] = data_i[7] & sel_one_hot_i[0];
assign data_masked[6] = data_i[6] & sel_one_hot_i[0];
assign data_masked[5] = data_i[5] & sel_one_hot_i[0];
assign data_masked[4] = data_i[4] & sel_one_hot_i[0];
assign data_masked[3] = data_i[3] & sel_one_hot_i[0];
assign data_masked[2] = data_i[2] & sel_one_hot_i[0];
assign data_masked[1] = data_i[1] & sel_one_hot_i[0];
assign data_masked[0] = data_i[0] & sel_one_hot_i[0];
assign data_masked[261] = data_i[261] & sel_one_hot_i[1];
assign data_masked[260] = data_i[260] & sel_one_hot_i[1];
assign data_masked[259] = data_i[259] & sel_one_hot_i[1];
assign data_masked[258] = data_i[258] & sel_one_hot_i[1];
assign data_masked[257] = data_i[257] & sel_one_hot_i[1];
assign data_masked[256] = data_i[256] & sel_one_hot_i[1];
assign data_masked[255] = data_i[255] & sel_one_hot_i[1];
assign data_masked[254] = data_i[254] & sel_one_hot_i[1];
assign data_masked[253] = data_i[253] & sel_one_hot_i[1];
assign data_masked[252] = data_i[252] & sel_one_hot_i[1];
assign data_masked[251] = data_i[251] & sel_one_hot_i[1];
assign data_masked[250] = data_i[250] & sel_one_hot_i[1];
assign data_masked[249] = data_i[249] & sel_one_hot_i[1];
assign data_masked[248] = data_i[248] & sel_one_hot_i[1];
assign data_masked[247] = data_i[247] & sel_one_hot_i[1];
assign data_masked[246] = data_i[246] & sel_one_hot_i[1];
assign data_masked[245] = data_i[245] & sel_one_hot_i[1];
assign data_masked[244] = data_i[244] & sel_one_hot_i[1];
assign data_masked[243] = data_i[243] & sel_one_hot_i[1];
assign data_masked[242] = data_i[242] & sel_one_hot_i[1];
assign data_masked[241] = data_i[241] & sel_one_hot_i[1];
assign data_masked[240] = data_i[240] & sel_one_hot_i[1];
assign data_masked[239] = data_i[239] & sel_one_hot_i[1];
assign data_masked[238] = data_i[238] & sel_one_hot_i[1];
assign data_masked[237] = data_i[237] & sel_one_hot_i[1];
assign data_masked[236] = data_i[236] & sel_one_hot_i[1];
assign data_masked[235] = data_i[235] & sel_one_hot_i[1];
assign data_masked[234] = data_i[234] & sel_one_hot_i[1];
assign data_masked[233] = data_i[233] & sel_one_hot_i[1];
assign data_masked[232] = data_i[232] & sel_one_hot_i[1];
assign data_masked[231] = data_i[231] & sel_one_hot_i[1];
assign data_masked[230] = data_i[230] & sel_one_hot_i[1];
assign data_masked[229] = data_i[229] & sel_one_hot_i[1];
assign data_masked[228] = data_i[228] & sel_one_hot_i[1];
assign data_masked[227] = data_i[227] & sel_one_hot_i[1];
assign data_masked[226] = data_i[226] & sel_one_hot_i[1];
assign data_masked[225] = data_i[225] & sel_one_hot_i[1];
assign data_masked[224] = data_i[224] & sel_one_hot_i[1];
assign data_masked[223] = data_i[223] & sel_one_hot_i[1];
assign data_masked[222] = data_i[222] & sel_one_hot_i[1];
assign data_masked[221] = data_i[221] & sel_one_hot_i[1];
assign data_masked[220] = data_i[220] & sel_one_hot_i[1];
assign data_masked[219] = data_i[219] & sel_one_hot_i[1];
assign data_masked[218] = data_i[218] & sel_one_hot_i[1];
assign data_masked[217] = data_i[217] & sel_one_hot_i[1];
assign data_masked[216] = data_i[216] & sel_one_hot_i[1];
assign data_masked[215] = data_i[215] & sel_one_hot_i[1];
assign data_masked[214] = data_i[214] & sel_one_hot_i[1];
assign data_masked[213] = data_i[213] & sel_one_hot_i[1];
assign data_masked[212] = data_i[212] & sel_one_hot_i[1];
assign data_masked[211] = data_i[211] & sel_one_hot_i[1];
assign data_masked[210] = data_i[210] & sel_one_hot_i[1];
assign data_masked[209] = data_i[209] & sel_one_hot_i[1];
assign data_masked[208] = data_i[208] & sel_one_hot_i[1];
assign data_masked[207] = data_i[207] & sel_one_hot_i[1];
assign data_masked[206] = data_i[206] & sel_one_hot_i[1];
assign data_masked[205] = data_i[205] & sel_one_hot_i[1];
assign data_masked[204] = data_i[204] & sel_one_hot_i[1];
assign data_masked[203] = data_i[203] & sel_one_hot_i[1];
assign data_masked[202] = data_i[202] & sel_one_hot_i[1];
assign data_masked[201] = data_i[201] & sel_one_hot_i[1];
assign data_masked[200] = data_i[200] & sel_one_hot_i[1];
assign data_masked[199] = data_i[199] & sel_one_hot_i[1];
assign data_masked[198] = data_i[198] & sel_one_hot_i[1];
assign data_masked[197] = data_i[197] & sel_one_hot_i[1];
assign data_masked[196] = data_i[196] & sel_one_hot_i[1];
assign data_masked[195] = data_i[195] & sel_one_hot_i[1];
assign data_masked[194] = data_i[194] & sel_one_hot_i[1];
assign data_masked[193] = data_i[193] & sel_one_hot_i[1];
assign data_masked[192] = data_i[192] & sel_one_hot_i[1];
assign data_masked[191] = data_i[191] & sel_one_hot_i[1];
assign data_masked[190] = data_i[190] & sel_one_hot_i[1];
assign data_masked[189] = data_i[189] & sel_one_hot_i[1];
assign data_masked[188] = data_i[188] & sel_one_hot_i[1];
assign data_masked[187] = data_i[187] & sel_one_hot_i[1];
assign data_masked[186] = data_i[186] & sel_one_hot_i[1];
assign data_masked[185] = data_i[185] & sel_one_hot_i[1];
assign data_masked[184] = data_i[184] & sel_one_hot_i[1];
assign data_masked[183] = data_i[183] & sel_one_hot_i[1];
assign data_masked[182] = data_i[182] & sel_one_hot_i[1];
assign data_masked[181] = data_i[181] & sel_one_hot_i[1];
assign data_masked[180] = data_i[180] & sel_one_hot_i[1];
assign data_masked[179] = data_i[179] & sel_one_hot_i[1];
assign data_masked[178] = data_i[178] & sel_one_hot_i[1];
assign data_masked[177] = data_i[177] & sel_one_hot_i[1];
assign data_masked[176] = data_i[176] & sel_one_hot_i[1];
assign data_masked[175] = data_i[175] & sel_one_hot_i[1];
assign data_masked[174] = data_i[174] & sel_one_hot_i[1];
assign data_masked[173] = data_i[173] & sel_one_hot_i[1];
assign data_masked[172] = data_i[172] & sel_one_hot_i[1];
assign data_masked[171] = data_i[171] & sel_one_hot_i[1];
assign data_masked[170] = data_i[170] & sel_one_hot_i[1];
assign data_masked[169] = data_i[169] & sel_one_hot_i[1];
assign data_masked[168] = data_i[168] & sel_one_hot_i[1];
assign data_masked[167] = data_i[167] & sel_one_hot_i[1];
assign data_masked[166] = data_i[166] & sel_one_hot_i[1];
assign data_masked[165] = data_i[165] & sel_one_hot_i[1];
assign data_masked[164] = data_i[164] & sel_one_hot_i[1];
assign data_masked[163] = data_i[163] & sel_one_hot_i[1];
assign data_masked[162] = data_i[162] & sel_one_hot_i[1];
assign data_masked[161] = data_i[161] & sel_one_hot_i[1];
assign data_masked[160] = data_i[160] & sel_one_hot_i[1];
assign data_masked[159] = data_i[159] & sel_one_hot_i[1];
assign data_masked[158] = data_i[158] & sel_one_hot_i[1];
assign data_masked[157] = data_i[157] & sel_one_hot_i[1];
assign data_masked[156] = data_i[156] & sel_one_hot_i[1];
assign data_masked[155] = data_i[155] & sel_one_hot_i[1];
assign data_masked[154] = data_i[154] & sel_one_hot_i[1];
assign data_masked[153] = data_i[153] & sel_one_hot_i[1];
assign data_masked[152] = data_i[152] & sel_one_hot_i[1];
assign data_masked[151] = data_i[151] & sel_one_hot_i[1];
assign data_masked[150] = data_i[150] & sel_one_hot_i[1];
assign data_masked[149] = data_i[149] & sel_one_hot_i[1];
assign data_masked[148] = data_i[148] & sel_one_hot_i[1];
assign data_masked[147] = data_i[147] & sel_one_hot_i[1];
assign data_masked[146] = data_i[146] & sel_one_hot_i[1];
assign data_masked[145] = data_i[145] & sel_one_hot_i[1];
assign data_masked[144] = data_i[144] & sel_one_hot_i[1];
assign data_masked[143] = data_i[143] & sel_one_hot_i[1];
assign data_masked[142] = data_i[142] & sel_one_hot_i[1];
assign data_masked[141] = data_i[141] & sel_one_hot_i[1];
assign data_masked[140] = data_i[140] & sel_one_hot_i[1];
assign data_masked[139] = data_i[139] & sel_one_hot_i[1];
assign data_masked[138] = data_i[138] & sel_one_hot_i[1];
assign data_masked[137] = data_i[137] & sel_one_hot_i[1];
assign data_masked[136] = data_i[136] & sel_one_hot_i[1];
assign data_masked[135] = data_i[135] & sel_one_hot_i[1];
assign data_masked[134] = data_i[134] & sel_one_hot_i[1];
assign data_masked[133] = data_i[133] & sel_one_hot_i[1];
assign data_masked[132] = data_i[132] & sel_one_hot_i[1];
assign data_masked[131] = data_i[131] & sel_one_hot_i[1];
assign data_masked[392] = data_i[392] & sel_one_hot_i[2];
assign data_masked[391] = data_i[391] & sel_one_hot_i[2];
assign data_masked[390] = data_i[390] & sel_one_hot_i[2];
assign data_masked[389] = data_i[389] & sel_one_hot_i[2];
assign data_masked[388] = data_i[388] & sel_one_hot_i[2];
assign data_masked[387] = data_i[387] & sel_one_hot_i[2];
assign data_masked[386] = data_i[386] & sel_one_hot_i[2];
assign data_masked[385] = data_i[385] & sel_one_hot_i[2];
assign data_masked[384] = data_i[384] & sel_one_hot_i[2];
assign data_masked[383] = data_i[383] & sel_one_hot_i[2];
assign data_masked[382] = data_i[382] & sel_one_hot_i[2];
assign data_masked[381] = data_i[381] & sel_one_hot_i[2];
assign data_masked[380] = data_i[380] & sel_one_hot_i[2];
assign data_masked[379] = data_i[379] & sel_one_hot_i[2];
assign data_masked[378] = data_i[378] & sel_one_hot_i[2];
assign data_masked[377] = data_i[377] & sel_one_hot_i[2];
assign data_masked[376] = data_i[376] & sel_one_hot_i[2];
assign data_masked[375] = data_i[375] & sel_one_hot_i[2];
assign data_masked[374] = data_i[374] & sel_one_hot_i[2];
assign data_masked[373] = data_i[373] & sel_one_hot_i[2];
assign data_masked[372] = data_i[372] & sel_one_hot_i[2];
assign data_masked[371] = data_i[371] & sel_one_hot_i[2];
assign data_masked[370] = data_i[370] & sel_one_hot_i[2];
assign data_masked[369] = data_i[369] & sel_one_hot_i[2];
assign data_masked[368] = data_i[368] & sel_one_hot_i[2];
assign data_masked[367] = data_i[367] & sel_one_hot_i[2];
assign data_masked[366] = data_i[366] & sel_one_hot_i[2];
assign data_masked[365] = data_i[365] & sel_one_hot_i[2];
assign data_masked[364] = data_i[364] & sel_one_hot_i[2];
assign data_masked[363] = data_i[363] & sel_one_hot_i[2];
assign data_masked[362] = data_i[362] & sel_one_hot_i[2];
assign data_masked[361] = data_i[361] & sel_one_hot_i[2];
assign data_masked[360] = data_i[360] & sel_one_hot_i[2];
assign data_masked[359] = data_i[359] & sel_one_hot_i[2];
assign data_masked[358] = data_i[358] & sel_one_hot_i[2];
assign data_masked[357] = data_i[357] & sel_one_hot_i[2];
assign data_masked[356] = data_i[356] & sel_one_hot_i[2];
assign data_masked[355] = data_i[355] & sel_one_hot_i[2];
assign data_masked[354] = data_i[354] & sel_one_hot_i[2];
assign data_masked[353] = data_i[353] & sel_one_hot_i[2];
assign data_masked[352] = data_i[352] & sel_one_hot_i[2];
assign data_masked[351] = data_i[351] & sel_one_hot_i[2];
assign data_masked[350] = data_i[350] & sel_one_hot_i[2];
assign data_masked[349] = data_i[349] & sel_one_hot_i[2];
assign data_masked[348] = data_i[348] & sel_one_hot_i[2];
assign data_masked[347] = data_i[347] & sel_one_hot_i[2];
assign data_masked[346] = data_i[346] & sel_one_hot_i[2];
assign data_masked[345] = data_i[345] & sel_one_hot_i[2];
assign data_masked[344] = data_i[344] & sel_one_hot_i[2];
assign data_masked[343] = data_i[343] & sel_one_hot_i[2];
assign data_masked[342] = data_i[342] & sel_one_hot_i[2];
assign data_masked[341] = data_i[341] & sel_one_hot_i[2];
assign data_masked[340] = data_i[340] & sel_one_hot_i[2];
assign data_masked[339] = data_i[339] & sel_one_hot_i[2];
assign data_masked[338] = data_i[338] & sel_one_hot_i[2];
assign data_masked[337] = data_i[337] & sel_one_hot_i[2];
assign data_masked[336] = data_i[336] & sel_one_hot_i[2];
assign data_masked[335] = data_i[335] & sel_one_hot_i[2];
assign data_masked[334] = data_i[334] & sel_one_hot_i[2];
assign data_masked[333] = data_i[333] & sel_one_hot_i[2];
assign data_masked[332] = data_i[332] & sel_one_hot_i[2];
assign data_masked[331] = data_i[331] & sel_one_hot_i[2];
assign data_masked[330] = data_i[330] & sel_one_hot_i[2];
assign data_masked[329] = data_i[329] & sel_one_hot_i[2];
assign data_masked[328] = data_i[328] & sel_one_hot_i[2];
assign data_masked[327] = data_i[327] & sel_one_hot_i[2];
assign data_masked[326] = data_i[326] & sel_one_hot_i[2];
assign data_masked[325] = data_i[325] & sel_one_hot_i[2];
assign data_masked[324] = data_i[324] & sel_one_hot_i[2];
assign data_masked[323] = data_i[323] & sel_one_hot_i[2];
assign data_masked[322] = data_i[322] & sel_one_hot_i[2];
assign data_masked[321] = data_i[321] & sel_one_hot_i[2];
assign data_masked[320] = data_i[320] & sel_one_hot_i[2];
assign data_masked[319] = data_i[319] & sel_one_hot_i[2];
assign data_masked[318] = data_i[318] & sel_one_hot_i[2];
assign data_masked[317] = data_i[317] & sel_one_hot_i[2];
assign data_masked[316] = data_i[316] & sel_one_hot_i[2];
assign data_masked[315] = data_i[315] & sel_one_hot_i[2];
assign data_masked[314] = data_i[314] & sel_one_hot_i[2];
assign data_masked[313] = data_i[313] & sel_one_hot_i[2];
assign data_masked[312] = data_i[312] & sel_one_hot_i[2];
assign data_masked[311] = data_i[311] & sel_one_hot_i[2];
assign data_masked[310] = data_i[310] & sel_one_hot_i[2];
assign data_masked[309] = data_i[309] & sel_one_hot_i[2];
assign data_masked[308] = data_i[308] & sel_one_hot_i[2];
assign data_masked[307] = data_i[307] & sel_one_hot_i[2];
assign data_masked[306] = data_i[306] & sel_one_hot_i[2];
assign data_masked[305] = data_i[305] & sel_one_hot_i[2];
assign data_masked[304] = data_i[304] & sel_one_hot_i[2];
assign data_masked[303] = data_i[303] & sel_one_hot_i[2];
assign data_masked[302] = data_i[302] & sel_one_hot_i[2];
assign data_masked[301] = data_i[301] & sel_one_hot_i[2];
assign data_masked[300] = data_i[300] & sel_one_hot_i[2];
assign data_masked[299] = data_i[299] & sel_one_hot_i[2];
assign data_masked[298] = data_i[298] & sel_one_hot_i[2];
assign data_masked[297] = data_i[297] & sel_one_hot_i[2];
assign data_masked[296] = data_i[296] & sel_one_hot_i[2];
assign data_masked[295] = data_i[295] & sel_one_hot_i[2];
assign data_masked[294] = data_i[294] & sel_one_hot_i[2];
assign data_masked[293] = data_i[293] & sel_one_hot_i[2];
assign data_masked[292] = data_i[292] & sel_one_hot_i[2];
assign data_masked[291] = data_i[291] & sel_one_hot_i[2];
assign data_masked[290] = data_i[290] & sel_one_hot_i[2];
assign data_masked[289] = data_i[289] & sel_one_hot_i[2];
assign data_masked[288] = data_i[288] & sel_one_hot_i[2];
assign data_masked[287] = data_i[287] & sel_one_hot_i[2];
assign data_masked[286] = data_i[286] & sel_one_hot_i[2];
assign data_masked[285] = data_i[285] & sel_one_hot_i[2];
assign data_masked[284] = data_i[284] & sel_one_hot_i[2];
assign data_masked[283] = data_i[283] & sel_one_hot_i[2];
assign data_masked[282] = data_i[282] & sel_one_hot_i[2];
assign data_masked[281] = data_i[281] & sel_one_hot_i[2];
assign data_masked[280] = data_i[280] & sel_one_hot_i[2];
assign data_masked[279] = data_i[279] & sel_one_hot_i[2];
assign data_masked[278] = data_i[278] & sel_one_hot_i[2];
assign data_masked[277] = data_i[277] & sel_one_hot_i[2];
assign data_masked[276] = data_i[276] & sel_one_hot_i[2];
assign data_masked[275] = data_i[275] & sel_one_hot_i[2];
assign data_masked[274] = data_i[274] & sel_one_hot_i[2];
assign data_masked[273] = data_i[273] & sel_one_hot_i[2];
assign data_masked[272] = data_i[272] & sel_one_hot_i[2];
assign data_masked[271] = data_i[271] & sel_one_hot_i[2];
assign data_masked[270] = data_i[270] & sel_one_hot_i[2];
assign data_masked[269] = data_i[269] & sel_one_hot_i[2];
assign data_masked[268] = data_i[268] & sel_one_hot_i[2];
assign data_masked[267] = data_i[267] & sel_one_hot_i[2];
assign data_masked[266] = data_i[266] & sel_one_hot_i[2];
assign data_masked[265] = data_i[265] & sel_one_hot_i[2];
assign data_masked[264] = data_i[264] & sel_one_hot_i[2];
assign data_masked[263] = data_i[263] & sel_one_hot_i[2];
assign data_masked[262] = data_i[262] & sel_one_hot_i[2];
assign data_masked[523] = data_i[523] & sel_one_hot_i[3];
assign data_masked[522] = data_i[522] & sel_one_hot_i[3];
assign data_masked[521] = data_i[521] & sel_one_hot_i[3];
assign data_masked[520] = data_i[520] & sel_one_hot_i[3];
assign data_masked[519] = data_i[519] & sel_one_hot_i[3];
assign data_masked[518] = data_i[518] & sel_one_hot_i[3];
assign data_masked[517] = data_i[517] & sel_one_hot_i[3];
assign data_masked[516] = data_i[516] & sel_one_hot_i[3];
assign data_masked[515] = data_i[515] & sel_one_hot_i[3];
assign data_masked[514] = data_i[514] & sel_one_hot_i[3];
assign data_masked[513] = data_i[513] & sel_one_hot_i[3];
assign data_masked[512] = data_i[512] & sel_one_hot_i[3];
assign data_masked[511] = data_i[511] & sel_one_hot_i[3];
assign data_masked[510] = data_i[510] & sel_one_hot_i[3];
assign data_masked[509] = data_i[509] & sel_one_hot_i[3];
assign data_masked[508] = data_i[508] & sel_one_hot_i[3];
assign data_masked[507] = data_i[507] & sel_one_hot_i[3];
assign data_masked[506] = data_i[506] & sel_one_hot_i[3];
assign data_masked[505] = data_i[505] & sel_one_hot_i[3];
assign data_masked[504] = data_i[504] & sel_one_hot_i[3];
assign data_masked[503] = data_i[503] & sel_one_hot_i[3];
assign data_masked[502] = data_i[502] & sel_one_hot_i[3];
assign data_masked[501] = data_i[501] & sel_one_hot_i[3];
assign data_masked[500] = data_i[500] & sel_one_hot_i[3];
assign data_masked[499] = data_i[499] & sel_one_hot_i[3];
assign data_masked[498] = data_i[498] & sel_one_hot_i[3];
assign data_masked[497] = data_i[497] & sel_one_hot_i[3];
assign data_masked[496] = data_i[496] & sel_one_hot_i[3];
assign data_masked[495] = data_i[495] & sel_one_hot_i[3];
assign data_masked[494] = data_i[494] & sel_one_hot_i[3];
assign data_masked[493] = data_i[493] & sel_one_hot_i[3];
assign data_masked[492] = data_i[492] & sel_one_hot_i[3];
assign data_masked[491] = data_i[491] & sel_one_hot_i[3];
assign data_masked[490] = data_i[490] & sel_one_hot_i[3];
assign data_masked[489] = data_i[489] & sel_one_hot_i[3];
assign data_masked[488] = data_i[488] & sel_one_hot_i[3];
assign data_masked[487] = data_i[487] & sel_one_hot_i[3];
assign data_masked[486] = data_i[486] & sel_one_hot_i[3];
assign data_masked[485] = data_i[485] & sel_one_hot_i[3];
assign data_masked[484] = data_i[484] & sel_one_hot_i[3];
assign data_masked[483] = data_i[483] & sel_one_hot_i[3];
assign data_masked[482] = data_i[482] & sel_one_hot_i[3];
assign data_masked[481] = data_i[481] & sel_one_hot_i[3];
assign data_masked[480] = data_i[480] & sel_one_hot_i[3];
assign data_masked[479] = data_i[479] & sel_one_hot_i[3];
assign data_masked[478] = data_i[478] & sel_one_hot_i[3];
assign data_masked[477] = data_i[477] & sel_one_hot_i[3];
assign data_masked[476] = data_i[476] & sel_one_hot_i[3];
assign data_masked[475] = data_i[475] & sel_one_hot_i[3];
assign data_masked[474] = data_i[474] & sel_one_hot_i[3];
assign data_masked[473] = data_i[473] & sel_one_hot_i[3];
assign data_masked[472] = data_i[472] & sel_one_hot_i[3];
assign data_masked[471] = data_i[471] & sel_one_hot_i[3];
assign data_masked[470] = data_i[470] & sel_one_hot_i[3];
assign data_masked[469] = data_i[469] & sel_one_hot_i[3];
assign data_masked[468] = data_i[468] & sel_one_hot_i[3];
assign data_masked[467] = data_i[467] & sel_one_hot_i[3];
assign data_masked[466] = data_i[466] & sel_one_hot_i[3];
assign data_masked[465] = data_i[465] & sel_one_hot_i[3];
assign data_masked[464] = data_i[464] & sel_one_hot_i[3];
assign data_masked[463] = data_i[463] & sel_one_hot_i[3];
assign data_masked[462] = data_i[462] & sel_one_hot_i[3];
assign data_masked[461] = data_i[461] & sel_one_hot_i[3];
assign data_masked[460] = data_i[460] & sel_one_hot_i[3];
assign data_masked[459] = data_i[459] & sel_one_hot_i[3];
assign data_masked[458] = data_i[458] & sel_one_hot_i[3];
assign data_masked[457] = data_i[457] & sel_one_hot_i[3];
assign data_masked[456] = data_i[456] & sel_one_hot_i[3];
assign data_masked[455] = data_i[455] & sel_one_hot_i[3];
assign data_masked[454] = data_i[454] & sel_one_hot_i[3];
assign data_masked[453] = data_i[453] & sel_one_hot_i[3];
assign data_masked[452] = data_i[452] & sel_one_hot_i[3];
assign data_masked[451] = data_i[451] & sel_one_hot_i[3];
assign data_masked[450] = data_i[450] & sel_one_hot_i[3];
assign data_masked[449] = data_i[449] & sel_one_hot_i[3];
assign data_masked[448] = data_i[448] & sel_one_hot_i[3];
assign data_masked[447] = data_i[447] & sel_one_hot_i[3];
assign data_masked[446] = data_i[446] & sel_one_hot_i[3];
assign data_masked[445] = data_i[445] & sel_one_hot_i[3];
assign data_masked[444] = data_i[444] & sel_one_hot_i[3];
assign data_masked[443] = data_i[443] & sel_one_hot_i[3];
assign data_masked[442] = data_i[442] & sel_one_hot_i[3];
assign data_masked[441] = data_i[441] & sel_one_hot_i[3];
assign data_masked[440] = data_i[440] & sel_one_hot_i[3];
assign data_masked[439] = data_i[439] & sel_one_hot_i[3];
assign data_masked[438] = data_i[438] & sel_one_hot_i[3];
assign data_masked[437] = data_i[437] & sel_one_hot_i[3];
assign data_masked[436] = data_i[436] & sel_one_hot_i[3];
assign data_masked[435] = data_i[435] & sel_one_hot_i[3];
assign data_masked[434] = data_i[434] & sel_one_hot_i[3];
assign data_masked[433] = data_i[433] & sel_one_hot_i[3];
assign data_masked[432] = data_i[432] & sel_one_hot_i[3];
assign data_masked[431] = data_i[431] & sel_one_hot_i[3];
assign data_masked[430] = data_i[430] & sel_one_hot_i[3];
assign data_masked[429] = data_i[429] & sel_one_hot_i[3];
assign data_masked[428] = data_i[428] & sel_one_hot_i[3];
assign data_masked[427] = data_i[427] & sel_one_hot_i[3];
assign data_masked[426] = data_i[426] & sel_one_hot_i[3];
assign data_masked[425] = data_i[425] & sel_one_hot_i[3];
assign data_masked[424] = data_i[424] & sel_one_hot_i[3];
assign data_masked[423] = data_i[423] & sel_one_hot_i[3];
assign data_masked[422] = data_i[422] & sel_one_hot_i[3];
assign data_masked[421] = data_i[421] & sel_one_hot_i[3];
assign data_masked[420] = data_i[420] & sel_one_hot_i[3];
assign data_masked[419] = data_i[419] & sel_one_hot_i[3];
assign data_masked[418] = data_i[418] & sel_one_hot_i[3];
assign data_masked[417] = data_i[417] & sel_one_hot_i[3];
assign data_masked[416] = data_i[416] & sel_one_hot_i[3];
assign data_masked[415] = data_i[415] & sel_one_hot_i[3];
assign data_masked[414] = data_i[414] & sel_one_hot_i[3];
assign data_masked[413] = data_i[413] & sel_one_hot_i[3];
assign data_masked[412] = data_i[412] & sel_one_hot_i[3];
assign data_masked[411] = data_i[411] & sel_one_hot_i[3];
assign data_masked[410] = data_i[410] & sel_one_hot_i[3];
assign data_masked[409] = data_i[409] & sel_one_hot_i[3];
assign data_masked[408] = data_i[408] & sel_one_hot_i[3];
assign data_masked[407] = data_i[407] & sel_one_hot_i[3];
assign data_masked[406] = data_i[406] & sel_one_hot_i[3];
assign data_masked[405] = data_i[405] & sel_one_hot_i[3];
assign data_masked[404] = data_i[404] & sel_one_hot_i[3];
assign data_masked[403] = data_i[403] & sel_one_hot_i[3];
assign data_masked[402] = data_i[402] & sel_one_hot_i[3];
assign data_masked[401] = data_i[401] & sel_one_hot_i[3];
assign data_masked[400] = data_i[400] & sel_one_hot_i[3];
assign data_masked[399] = data_i[399] & sel_one_hot_i[3];
assign data_masked[398] = data_i[398] & sel_one_hot_i[3];
assign data_masked[397] = data_i[397] & sel_one_hot_i[3];
assign data_masked[396] = data_i[396] & sel_one_hot_i[3];
assign data_masked[395] = data_i[395] & sel_one_hot_i[3];
assign data_masked[394] = data_i[394] & sel_one_hot_i[3];
assign data_masked[393] = data_i[393] & sel_one_hot_i[3];
assign data_o[0] = N1 | data_masked[0];
assign N1 = N0 | data_masked[131];
assign N0 = data_masked[393] | data_masked[262];
assign data_o[1] = N3 | data_masked[1];
assign N3 = N2 | data_masked[132];
assign N2 = data_masked[394] | data_masked[263];
assign data_o[2] = N5 | data_masked[2];
assign N5 = N4 | data_masked[133];
assign N4 = data_masked[395] | data_masked[264];
assign data_o[3] = N7 | data_masked[3];
assign N7 = N6 | data_masked[134];
assign N6 = data_masked[396] | data_masked[265];
assign data_o[4] = N9 | data_masked[4];
assign N9 = N8 | data_masked[135];
assign N8 = data_masked[397] | data_masked[266];
assign data_o[5] = N11 | data_masked[5];
assign N11 = N10 | data_masked[136];
assign N10 = data_masked[398] | data_masked[267];
assign data_o[6] = N13 | data_masked[6];
assign N13 = N12 | data_masked[137];
assign N12 = data_masked[399] | data_masked[268];
assign data_o[7] = N15 | data_masked[7];
assign N15 = N14 | data_masked[138];
assign N14 = data_masked[400] | data_masked[269];
assign data_o[8] = N17 | data_masked[8];
assign N17 = N16 | data_masked[139];
assign N16 = data_masked[401] | data_masked[270];
assign data_o[9] = N19 | data_masked[9];
assign N19 = N18 | data_masked[140];
assign N18 = data_masked[402] | data_masked[271];
assign data_o[10] = N21 | data_masked[10];
assign N21 = N20 | data_masked[141];
assign N20 = data_masked[403] | data_masked[272];
assign data_o[11] = N23 | data_masked[11];
assign N23 = N22 | data_masked[142];
assign N22 = data_masked[404] | data_masked[273];
assign data_o[12] = N25 | data_masked[12];
assign N25 = N24 | data_masked[143];
assign N24 = data_masked[405] | data_masked[274];
assign data_o[13] = N27 | data_masked[13];
assign N27 = N26 | data_masked[144];
assign N26 = data_masked[406] | data_masked[275];
assign data_o[14] = N29 | data_masked[14];
assign N29 = N28 | data_masked[145];
assign N28 = data_masked[407] | data_masked[276];
assign data_o[15] = N31 | data_masked[15];
assign N31 = N30 | data_masked[146];
assign N30 = data_masked[408] | data_masked[277];
assign data_o[16] = N33 | data_masked[16];
assign N33 = N32 | data_masked[147];
assign N32 = data_masked[409] | data_masked[278];
assign data_o[17] = N35 | data_masked[17];
assign N35 = N34 | data_masked[148];
assign N34 = data_masked[410] | data_masked[279];
assign data_o[18] = N37 | data_masked[18];
assign N37 = N36 | data_masked[149];
assign N36 = data_masked[411] | data_masked[280];
assign data_o[19] = N39 | data_masked[19];
assign N39 = N38 | data_masked[150];
assign N38 = data_masked[412] | data_masked[281];
assign data_o[20] = N41 | data_masked[20];
assign N41 = N40 | data_masked[151];
assign N40 = data_masked[413] | data_masked[282];
assign data_o[21] = N43 | data_masked[21];
assign N43 = N42 | data_masked[152];
assign N42 = data_masked[414] | data_masked[283];
assign data_o[22] = N45 | data_masked[22];
assign N45 = N44 | data_masked[153];
assign N44 = data_masked[415] | data_masked[284];
assign data_o[23] = N47 | data_masked[23];
assign N47 = N46 | data_masked[154];
assign N46 = data_masked[416] | data_masked[285];
assign data_o[24] = N49 | data_masked[24];
assign N49 = N48 | data_masked[155];
assign N48 = data_masked[417] | data_masked[286];
assign data_o[25] = N51 | data_masked[25];
assign N51 = N50 | data_masked[156];
assign N50 = data_masked[418] | data_masked[287];
assign data_o[26] = N53 | data_masked[26];
assign N53 = N52 | data_masked[157];
assign N52 = data_masked[419] | data_masked[288];
assign data_o[27] = N55 | data_masked[27];
assign N55 = N54 | data_masked[158];
assign N54 = data_masked[420] | data_masked[289];
assign data_o[28] = N57 | data_masked[28];
assign N57 = N56 | data_masked[159];
assign N56 = data_masked[421] | data_masked[290];
assign data_o[29] = N59 | data_masked[29];
assign N59 = N58 | data_masked[160];
assign N58 = data_masked[422] | data_masked[291];
assign data_o[30] = N61 | data_masked[30];
assign N61 = N60 | data_masked[161];
assign N60 = data_masked[423] | data_masked[292];
assign data_o[31] = N63 | data_masked[31];
assign N63 = N62 | data_masked[162];
assign N62 = data_masked[424] | data_masked[293];
assign data_o[32] = N65 | data_masked[32];
assign N65 = N64 | data_masked[163];
assign N64 = data_masked[425] | data_masked[294];
assign data_o[33] = N67 | data_masked[33];
assign N67 = N66 | data_masked[164];
assign N66 = data_masked[426] | data_masked[295];
assign data_o[34] = N69 | data_masked[34];
assign N69 = N68 | data_masked[165];
assign N68 = data_masked[427] | data_masked[296];
assign data_o[35] = N71 | data_masked[35];
assign N71 = N70 | data_masked[166];
assign N70 = data_masked[428] | data_masked[297];
assign data_o[36] = N73 | data_masked[36];
assign N73 = N72 | data_masked[167];
assign N72 = data_masked[429] | data_masked[298];
assign data_o[37] = N75 | data_masked[37];
assign N75 = N74 | data_masked[168];
assign N74 = data_masked[430] | data_masked[299];
assign data_o[38] = N77 | data_masked[38];
assign N77 = N76 | data_masked[169];
assign N76 = data_masked[431] | data_masked[300];
assign data_o[39] = N79 | data_masked[39];
assign N79 = N78 | data_masked[170];
assign N78 = data_masked[432] | data_masked[301];
assign data_o[40] = N81 | data_masked[40];
assign N81 = N80 | data_masked[171];
assign N80 = data_masked[433] | data_masked[302];
assign data_o[41] = N83 | data_masked[41];
assign N83 = N82 | data_masked[172];
assign N82 = data_masked[434] | data_masked[303];
assign data_o[42] = N85 | data_masked[42];
assign N85 = N84 | data_masked[173];
assign N84 = data_masked[435] | data_masked[304];
assign data_o[43] = N87 | data_masked[43];
assign N87 = N86 | data_masked[174];
assign N86 = data_masked[436] | data_masked[305];
assign data_o[44] = N89 | data_masked[44];
assign N89 = N88 | data_masked[175];
assign N88 = data_masked[437] | data_masked[306];
assign data_o[45] = N91 | data_masked[45];
assign N91 = N90 | data_masked[176];
assign N90 = data_masked[438] | data_masked[307];
assign data_o[46] = N93 | data_masked[46];
assign N93 = N92 | data_masked[177];
assign N92 = data_masked[439] | data_masked[308];
assign data_o[47] = N95 | data_masked[47];
assign N95 = N94 | data_masked[178];
assign N94 = data_masked[440] | data_masked[309];
assign data_o[48] = N97 | data_masked[48];
assign N97 = N96 | data_masked[179];
assign N96 = data_masked[441] | data_masked[310];
assign data_o[49] = N99 | data_masked[49];
assign N99 = N98 | data_masked[180];
assign N98 = data_masked[442] | data_masked[311];
assign data_o[50] = N101 | data_masked[50];
assign N101 = N100 | data_masked[181];
assign N100 = data_masked[443] | data_masked[312];
assign data_o[51] = N103 | data_masked[51];
assign N103 = N102 | data_masked[182];
assign N102 = data_masked[444] | data_masked[313];
assign data_o[52] = N105 | data_masked[52];
assign N105 = N104 | data_masked[183];
assign N104 = data_masked[445] | data_masked[314];
assign data_o[53] = N107 | data_masked[53];
assign N107 = N106 | data_masked[184];
assign N106 = data_masked[446] | data_masked[315];
assign data_o[54] = N109 | data_masked[54];
assign N109 = N108 | data_masked[185];
assign N108 = data_masked[447] | data_masked[316];
assign data_o[55] = N111 | data_masked[55];
assign N111 = N110 | data_masked[186];
assign N110 = data_masked[448] | data_masked[317];
assign data_o[56] = N113 | data_masked[56];
assign N113 = N112 | data_masked[187];
assign N112 = data_masked[449] | data_masked[318];
assign data_o[57] = N115 | data_masked[57];
assign N115 = N114 | data_masked[188];
assign N114 = data_masked[450] | data_masked[319];
assign data_o[58] = N117 | data_masked[58];
assign N117 = N116 | data_masked[189];
assign N116 = data_masked[451] | data_masked[320];
assign data_o[59] = N119 | data_masked[59];
assign N119 = N118 | data_masked[190];
assign N118 = data_masked[452] | data_masked[321];
assign data_o[60] = N121 | data_masked[60];
assign N121 = N120 | data_masked[191];
assign N120 = data_masked[453] | data_masked[322];
assign data_o[61] = N123 | data_masked[61];
assign N123 = N122 | data_masked[192];
assign N122 = data_masked[454] | data_masked[323];
assign data_o[62] = N125 | data_masked[62];
assign N125 = N124 | data_masked[193];
assign N124 = data_masked[455] | data_masked[324];
assign data_o[63] = N127 | data_masked[63];
assign N127 = N126 | data_masked[194];
assign N126 = data_masked[456] | data_masked[325];
assign data_o[64] = N129 | data_masked[64];
assign N129 = N128 | data_masked[195];
assign N128 = data_masked[457] | data_masked[326];
assign data_o[65] = N131 | data_masked[65];
assign N131 = N130 | data_masked[196];
assign N130 = data_masked[458] | data_masked[327];
assign data_o[66] = N133 | data_masked[66];
assign N133 = N132 | data_masked[197];
assign N132 = data_masked[459] | data_masked[328];
assign data_o[67] = N135 | data_masked[67];
assign N135 = N134 | data_masked[198];
assign N134 = data_masked[460] | data_masked[329];
assign data_o[68] = N137 | data_masked[68];
assign N137 = N136 | data_masked[199];
assign N136 = data_masked[461] | data_masked[330];
assign data_o[69] = N139 | data_masked[69];
assign N139 = N138 | data_masked[200];
assign N138 = data_masked[462] | data_masked[331];
assign data_o[70] = N141 | data_masked[70];
assign N141 = N140 | data_masked[201];
assign N140 = data_masked[463] | data_masked[332];
assign data_o[71] = N143 | data_masked[71];
assign N143 = N142 | data_masked[202];
assign N142 = data_masked[464] | data_masked[333];
assign data_o[72] = N145 | data_masked[72];
assign N145 = N144 | data_masked[203];
assign N144 = data_masked[465] | data_masked[334];
assign data_o[73] = N147 | data_masked[73];
assign N147 = N146 | data_masked[204];
assign N146 = data_masked[466] | data_masked[335];
assign data_o[74] = N149 | data_masked[74];
assign N149 = N148 | data_masked[205];
assign N148 = data_masked[467] | data_masked[336];
assign data_o[75] = N151 | data_masked[75];
assign N151 = N150 | data_masked[206];
assign N150 = data_masked[468] | data_masked[337];
assign data_o[76] = N153 | data_masked[76];
assign N153 = N152 | data_masked[207];
assign N152 = data_masked[469] | data_masked[338];
assign data_o[77] = N155 | data_masked[77];
assign N155 = N154 | data_masked[208];
assign N154 = data_masked[470] | data_masked[339];
assign data_o[78] = N157 | data_masked[78];
assign N157 = N156 | data_masked[209];
assign N156 = data_masked[471] | data_masked[340];
assign data_o[79] = N159 | data_masked[79];
assign N159 = N158 | data_masked[210];
assign N158 = data_masked[472] | data_masked[341];
assign data_o[80] = N161 | data_masked[80];
assign N161 = N160 | data_masked[211];
assign N160 = data_masked[473] | data_masked[342];
assign data_o[81] = N163 | data_masked[81];
assign N163 = N162 | data_masked[212];
assign N162 = data_masked[474] | data_masked[343];
assign data_o[82] = N165 | data_masked[82];
assign N165 = N164 | data_masked[213];
assign N164 = data_masked[475] | data_masked[344];
assign data_o[83] = N167 | data_masked[83];
assign N167 = N166 | data_masked[214];
assign N166 = data_masked[476] | data_masked[345];
assign data_o[84] = N169 | data_masked[84];
assign N169 = N168 | data_masked[215];
assign N168 = data_masked[477] | data_masked[346];
assign data_o[85] = N171 | data_masked[85];
assign N171 = N170 | data_masked[216];
assign N170 = data_masked[478] | data_masked[347];
assign data_o[86] = N173 | data_masked[86];
assign N173 = N172 | data_masked[217];
assign N172 = data_masked[479] | data_masked[348];
assign data_o[87] = N175 | data_masked[87];
assign N175 = N174 | data_masked[218];
assign N174 = data_masked[480] | data_masked[349];
assign data_o[88] = N177 | data_masked[88];
assign N177 = N176 | data_masked[219];
assign N176 = data_masked[481] | data_masked[350];
assign data_o[89] = N179 | data_masked[89];
assign N179 = N178 | data_masked[220];
assign N178 = data_masked[482] | data_masked[351];
assign data_o[90] = N181 | data_masked[90];
assign N181 = N180 | data_masked[221];
assign N180 = data_masked[483] | data_masked[352];
assign data_o[91] = N183 | data_masked[91];
assign N183 = N182 | data_masked[222];
assign N182 = data_masked[484] | data_masked[353];
assign data_o[92] = N185 | data_masked[92];
assign N185 = N184 | data_masked[223];
assign N184 = data_masked[485] | data_masked[354];
assign data_o[93] = N187 | data_masked[93];
assign N187 = N186 | data_masked[224];
assign N186 = data_masked[486] | data_masked[355];
assign data_o[94] = N189 | data_masked[94];
assign N189 = N188 | data_masked[225];
assign N188 = data_masked[487] | data_masked[356];
assign data_o[95] = N191 | data_masked[95];
assign N191 = N190 | data_masked[226];
assign N190 = data_masked[488] | data_masked[357];
assign data_o[96] = N193 | data_masked[96];
assign N193 = N192 | data_masked[227];
assign N192 = data_masked[489] | data_masked[358];
assign data_o[97] = N195 | data_masked[97];
assign N195 = N194 | data_masked[228];
assign N194 = data_masked[490] | data_masked[359];
assign data_o[98] = N197 | data_masked[98];
assign N197 = N196 | data_masked[229];
assign N196 = data_masked[491] | data_masked[360];
assign data_o[99] = N199 | data_masked[99];
assign N199 = N198 | data_masked[230];
assign N198 = data_masked[492] | data_masked[361];
assign data_o[100] = N201 | data_masked[100];
assign N201 = N200 | data_masked[231];
assign N200 = data_masked[493] | data_masked[362];
assign data_o[101] = N203 | data_masked[101];
assign N203 = N202 | data_masked[232];
assign N202 = data_masked[494] | data_masked[363];
assign data_o[102] = N205 | data_masked[102];
assign N205 = N204 | data_masked[233];
assign N204 = data_masked[495] | data_masked[364];
assign data_o[103] = N207 | data_masked[103];
assign N207 = N206 | data_masked[234];
assign N206 = data_masked[496] | data_masked[365];
assign data_o[104] = N209 | data_masked[104];
assign N209 = N208 | data_masked[235];
assign N208 = data_masked[497] | data_masked[366];
assign data_o[105] = N211 | data_masked[105];
assign N211 = N210 | data_masked[236];
assign N210 = data_masked[498] | data_masked[367];
assign data_o[106] = N213 | data_masked[106];
assign N213 = N212 | data_masked[237];
assign N212 = data_masked[499] | data_masked[368];
assign data_o[107] = N215 | data_masked[107];
assign N215 = N214 | data_masked[238];
assign N214 = data_masked[500] | data_masked[369];
assign data_o[108] = N217 | data_masked[108];
assign N217 = N216 | data_masked[239];
assign N216 = data_masked[501] | data_masked[370];
assign data_o[109] = N219 | data_masked[109];
assign N219 = N218 | data_masked[240];
assign N218 = data_masked[502] | data_masked[371];
assign data_o[110] = N221 | data_masked[110];
assign N221 = N220 | data_masked[241];
assign N220 = data_masked[503] | data_masked[372];
assign data_o[111] = N223 | data_masked[111];
assign N223 = N222 | data_masked[242];
assign N222 = data_masked[504] | data_masked[373];
assign data_o[112] = N225 | data_masked[112];
assign N225 = N224 | data_masked[243];
assign N224 = data_masked[505] | data_masked[374];
assign data_o[113] = N227 | data_masked[113];
assign N227 = N226 | data_masked[244];
assign N226 = data_masked[506] | data_masked[375];
assign data_o[114] = N229 | data_masked[114];
assign N229 = N228 | data_masked[245];
assign N228 = data_masked[507] | data_masked[376];
assign data_o[115] = N231 | data_masked[115];
assign N231 = N230 | data_masked[246];
assign N230 = data_masked[508] | data_masked[377];
assign data_o[116] = N233 | data_masked[116];
assign N233 = N232 | data_masked[247];
assign N232 = data_masked[509] | data_masked[378];
assign data_o[117] = N235 | data_masked[117];
assign N235 = N234 | data_masked[248];
assign N234 = data_masked[510] | data_masked[379];
assign data_o[118] = N237 | data_masked[118];
assign N237 = N236 | data_masked[249];
assign N236 = data_masked[511] | data_masked[380];
assign data_o[119] = N239 | data_masked[119];
assign N239 = N238 | data_masked[250];
assign N238 = data_masked[512] | data_masked[381];
assign data_o[120] = N241 | data_masked[120];
assign N241 = N240 | data_masked[251];
assign N240 = data_masked[513] | data_masked[382];
assign data_o[121] = N243 | data_masked[121];
assign N243 = N242 | data_masked[252];
assign N242 = data_masked[514] | data_masked[383];
assign data_o[122] = N245 | data_masked[122];
assign N245 = N244 | data_masked[253];
assign N244 = data_masked[515] | data_masked[384];
assign data_o[123] = N247 | data_masked[123];
assign N247 = N246 | data_masked[254];
assign N246 = data_masked[516] | data_masked[385];
assign data_o[124] = N249 | data_masked[124];
assign N249 = N248 | data_masked[255];
assign N248 = data_masked[517] | data_masked[386];
assign data_o[125] = N251 | data_masked[125];
assign N251 = N250 | data_masked[256];
assign N250 = data_masked[518] | data_masked[387];
assign data_o[126] = N253 | data_masked[126];
assign N253 = N252 | data_masked[257];
assign N252 = data_masked[519] | data_masked[388];
assign data_o[127] = N255 | data_masked[127];
assign N255 = N254 | data_masked[258];
assign N254 = data_masked[520] | data_masked[389];
assign data_o[128] = N257 | data_masked[128];
assign N257 = N256 | data_masked[259];
assign N256 = data_masked[521] | data_masked[390];
assign data_o[129] = N259 | data_masked[129];
assign N259 = N258 | data_masked[260];
assign N258 = data_masked[522] | data_masked[391];
assign data_o[130] = N261 | data_masked[130];
assign N261 = N260 | data_masked[261];
assign N260 = data_masked[523] | data_masked[392];
endmodule
|
module bsg_mem_1r1w_synth_width_p99_els_p2_read_write_same_addr_p0_harden_p0
(
w_clk_i,
w_reset_i,
w_v_i,
w_addr_i,
w_data_i,
r_v_i,
r_addr_i,
r_data_o
);
input [0:0] w_addr_i;
input [98:0] w_data_i;
input [0:0] r_addr_i;
output [98:0] r_data_o;
input w_clk_i;
input w_reset_i;
input w_v_i;
input r_v_i;
wire [98:0] r_data_o;
wire N0,N1,N2,N3,N4,N5,N7,N8;
reg [197:0] mem;
assign r_data_o[98] = (N3)? mem[98] :
(N0)? mem[197] : 1'b0;
assign N0 = r_addr_i[0];
assign r_data_o[97] = (N3)? mem[97] :
(N0)? mem[196] : 1'b0;
assign r_data_o[96] = (N3)? mem[96] :
(N0)? mem[195] : 1'b0;
assign r_data_o[95] = (N3)? mem[95] :
(N0)? mem[194] : 1'b0;
assign r_data_o[94] = (N3)? mem[94] :
(N0)? mem[193] : 1'b0;
assign r_data_o[93] = (N3)? mem[93] :
(N0)? mem[192] : 1'b0;
assign r_data_o[92] = (N3)? mem[92] :
(N0)? mem[191] : 1'b0;
assign r_data_o[91] = (N3)? mem[91] :
(N0)? mem[190] : 1'b0;
assign r_data_o[90] = (N3)? mem[90] :
(N0)? mem[189] : 1'b0;
assign r_data_o[89] = (N3)? mem[89] :
(N0)? mem[188] : 1'b0;
assign r_data_o[88] = (N3)? mem[88] :
(N0)? mem[187] : 1'b0;
assign r_data_o[87] = (N3)? mem[87] :
(N0)? mem[186] : 1'b0;
assign r_data_o[86] = (N3)? mem[86] :
(N0)? mem[185] : 1'b0;
assign r_data_o[85] = (N3)? mem[85] :
(N0)? mem[184] : 1'b0;
assign r_data_o[84] = (N3)? mem[84] :
(N0)? mem[183] : 1'b0;
assign r_data_o[83] = (N3)? mem[83] :
(N0)? mem[182] : 1'b0;
assign r_data_o[82] = (N3)? mem[82] :
(N0)? mem[181] : 1'b0;
assign r_data_o[81] = (N3)? mem[81] :
(N0)? mem[180] : 1'b0;
assign r_data_o[80] = (N3)? mem[80] :
(N0)? mem[179] : 1'b0;
assign r_data_o[79] = (N3)? mem[79] :
(N0)? mem[178] : 1'b0;
assign r_data_o[78] = (N3)? mem[78] :
(N0)? mem[177] : 1'b0;
assign r_data_o[77] = (N3)? mem[77] :
(N0)? mem[176] : 1'b0;
assign r_data_o[76] = (N3)? mem[76] :
(N0)? mem[175] : 1'b0;
assign r_data_o[75] = (N3)? mem[75] :
(N0)? mem[174] : 1'b0;
assign r_data_o[74] = (N3)? mem[74] :
(N0)? mem[173] : 1'b0;
assign r_data_o[73] = (N3)? mem[73] :
(N0)? mem[172] : 1'b0;
assign r_data_o[72] = (N3)? mem[72] :
(N0)? mem[171] : 1'b0;
assign r_data_o[71] = (N3)? mem[71] :
(N0)? mem[170] : 1'b0;
assign r_data_o[70] = (N3)? mem[70] :
(N0)? mem[169] : 1'b0;
assign r_data_o[69] = (N3)? mem[69] :
(N0)? mem[168] : 1'b0;
assign r_data_o[68] = (N3)? mem[68] :
(N0)? mem[167] : 1'b0;
assign r_data_o[67] = (N3)? mem[67] :
(N0)? mem[166] : 1'b0;
assign r_data_o[66] = (N3)? mem[66] :
(N0)? mem[165] : 1'b0;
assign r_data_o[65] = (N3)? mem[65] :
(N0)? mem[164] : 1'b0;
assign r_data_o[64] = (N3)? mem[64] :
(N0)? mem[163] : 1'b0;
assign r_data_o[63] = (N3)? mem[63] :
(N0)? mem[162] : 1'b0;
assign r_data_o[62] = (N3)? mem[62] :
(N0)? mem[161] : 1'b0;
assign r_data_o[61] = (N3)? mem[61] :
(N0)? mem[160] : 1'b0;
assign r_data_o[60] = (N3)? mem[60] :
(N0)? mem[159] : 1'b0;
assign r_data_o[59] = (N3)? mem[59] :
(N0)? mem[158] : 1'b0;
assign r_data_o[58] = (N3)? mem[58] :
(N0)? mem[157] : 1'b0;
assign r_data_o[57] = (N3)? mem[57] :
(N0)? mem[156] : 1'b0;
assign r_data_o[56] = (N3)? mem[56] :
(N0)? mem[155] : 1'b0;
assign r_data_o[55] = (N3)? mem[55] :
(N0)? mem[154] : 1'b0;
assign r_data_o[54] = (N3)? mem[54] :
(N0)? mem[153] : 1'b0;
assign r_data_o[53] = (N3)? mem[53] :
(N0)? mem[152] : 1'b0;
assign r_data_o[52] = (N3)? mem[52] :
(N0)? mem[151] : 1'b0;
assign r_data_o[51] = (N3)? mem[51] :
(N0)? mem[150] : 1'b0;
assign r_data_o[50] = (N3)? mem[50] :
(N0)? mem[149] : 1'b0;
assign r_data_o[49] = (N3)? mem[49] :
(N0)? mem[148] : 1'b0;
assign r_data_o[48] = (N3)? mem[48] :
(N0)? mem[147] : 1'b0;
assign r_data_o[47] = (N3)? mem[47] :
(N0)? mem[146] : 1'b0;
assign r_data_o[46] = (N3)? mem[46] :
(N0)? mem[145] : 1'b0;
assign r_data_o[45] = (N3)? mem[45] :
(N0)? mem[144] : 1'b0;
assign r_data_o[44] = (N3)? mem[44] :
(N0)? mem[143] : 1'b0;
assign r_data_o[43] = (N3)? mem[43] :
(N0)? mem[142] : 1'b0;
assign r_data_o[42] = (N3)? mem[42] :
(N0)? mem[141] : 1'b0;
assign r_data_o[41] = (N3)? mem[41] :
(N0)? mem[140] : 1'b0;
assign r_data_o[40] = (N3)? mem[40] :
(N0)? mem[139] : 1'b0;
assign r_data_o[39] = (N3)? mem[39] :
(N0)? mem[138] : 1'b0;
assign r_data_o[38] = (N3)? mem[38] :
(N0)? mem[137] : 1'b0;
assign r_data_o[37] = (N3)? mem[37] :
(N0)? mem[136] : 1'b0;
assign r_data_o[36] = (N3)? mem[36] :
(N0)? mem[135] : 1'b0;
assign r_data_o[35] = (N3)? mem[35] :
(N0)? mem[134] : 1'b0;
assign r_data_o[34] = (N3)? mem[34] :
(N0)? mem[133] : 1'b0;
assign r_data_o[33] = (N3)? mem[33] :
(N0)? mem[132] : 1'b0;
assign r_data_o[32] = (N3)? mem[32] :
(N0)? mem[131] : 1'b0;
assign r_data_o[31] = (N3)? mem[31] :
(N0)? mem[130] : 1'b0;
assign r_data_o[30] = (N3)? mem[30] :
(N0)? mem[129] : 1'b0;
assign r_data_o[29] = (N3)? mem[29] :
(N0)? mem[128] : 1'b0;
assign r_data_o[28] = (N3)? mem[28] :
(N0)? mem[127] : 1'b0;
assign r_data_o[27] = (N3)? mem[27] :
(N0)? mem[126] : 1'b0;
assign r_data_o[26] = (N3)? mem[26] :
(N0)? mem[125] : 1'b0;
assign r_data_o[25] = (N3)? mem[25] :
(N0)? mem[124] : 1'b0;
assign r_data_o[24] = (N3)? mem[24] :
(N0)? mem[123] : 1'b0;
assign r_data_o[23] = (N3)? mem[23] :
(N0)? mem[122] : 1'b0;
assign r_data_o[22] = (N3)? mem[22] :
(N0)? mem[121] : 1'b0;
assign r_data_o[21] = (N3)? mem[21] :
(N0)? mem[120] : 1'b0;
assign r_data_o[20] = (N3)? mem[20] :
(N0)? mem[119] : 1'b0;
assign r_data_o[19] = (N3)? mem[19] :
(N0)? mem[118] : 1'b0;
assign r_data_o[18] = (N3)? mem[18] :
(N0)? mem[117] : 1'b0;
assign r_data_o[17] = (N3)? mem[17] :
(N0)? mem[116] : 1'b0;
assign r_data_o[16] = (N3)? mem[16] :
(N0)? mem[115] : 1'b0;
assign r_data_o[15] = (N3)? mem[15] :
(N0)? mem[114] : 1'b0;
assign r_data_o[14] = (N3)? mem[14] :
(N0)? mem[113] : 1'b0;
assign r_data_o[13] = (N3)? mem[13] :
(N0)? mem[112] : 1'b0;
assign r_data_o[12] = (N3)? mem[12] :
(N0)? mem[111] : 1'b0;
assign r_data_o[11] = (N3)? mem[11] :
(N0)? mem[110] : 1'b0;
assign r_data_o[10] = (N3)? mem[10] :
(N0)? mem[109] : 1'b0;
assign r_data_o[9] = (N3)? mem[9] :
(N0)? mem[108] : 1'b0;
assign r_data_o[8] = (N3)? mem[8] :
(N0)? mem[107] : 1'b0;
assign r_data_o[7] = (N3)? mem[7] :
(N0)? mem[106] : 1'b0;
assign r_data_o[6] = (N3)? mem[6] :
(N0)? mem[105] : 1'b0;
assign r_data_o[5] = (N3)? mem[5] :
(N0)? mem[104] : 1'b0;
assign r_data_o[4] = (N3)? mem[4] :
(N0)? mem[103] : 1'b0;
assign r_data_o[3] = (N3)? mem[3] :
(N0)? mem[102] : 1'b0;
assign r_data_o[2] = (N3)? mem[2] :
(N0)? mem[101] : 1'b0;
assign r_data_o[1] = (N3)? mem[1] :
(N0)? mem[100] : 1'b0;
assign r_data_o[0] = (N3)? mem[0] :
(N0)? mem[99] : 1'b0;
assign N5 = ~w_addr_i[0];
assign { N8, N7 } = (N1)? { w_addr_i[0:0], N5 } :
(N2)? { 1'b0, 1'b0 } : 1'b0;
assign N1 = w_v_i;
assign N2 = N4;
assign N3 = ~r_addr_i[0];
assign N4 = ~w_v_i;
always @(posedge w_clk_i) begin
if(N8) begin
{ mem[197:99] } <= { w_data_i[98:0] };
end
if(N7) begin
{ mem[98:0] } <= { w_data_i[98:0] };
end
end
endmodule
|
module bsg_circular_ptr_slots_p16_max_add_p1
(
clk,
reset_i,
add_i,
o
);
input [0:0] add_i;
output [3:0] o;
input clk;
input reset_i;
wire N0,N1,N2,N3,N4,N5,N6,N7,N8,N9;
wire [3:0] genblk1_genblk1_ptr_r_p1;
reg [3:0] o;
assign genblk1_genblk1_ptr_r_p1 = o + 1'b1;
assign { N6, N5, N4, N3 } = (N0)? { 1'b0, 1'b0, 1'b0, 1'b0 } :
(N1)? genblk1_genblk1_ptr_r_p1 : 1'b0;
assign N0 = reset_i;
assign N1 = N2;
assign N2 = ~reset_i;
assign N7 = ~add_i[0];
assign N8 = N7 & N2;
assign N9 = ~N8;
always @(posedge clk) begin
if(N9) begin
{ o[3:0] } <= { N6, N5, N4, N3 };
end
end
endmodule
|
module bsg_mux_one_hot_width_p99_els_p2
(
data_i,
sel_one_hot_i,
data_o
);
input [197:0] data_i;
input [1:0] sel_one_hot_i;
output [98:0] data_o;
wire [98:0] data_o;
wire [197:0] data_masked;
assign data_masked[98] = data_i[98] & sel_one_hot_i[0];
assign data_masked[97] = data_i[97] & sel_one_hot_i[0];
assign data_masked[96] = data_i[96] & sel_one_hot_i[0];
assign data_masked[95] = data_i[95] & sel_one_hot_i[0];
assign data_masked[94] = data_i[94] & sel_one_hot_i[0];
assign data_masked[93] = data_i[93] & sel_one_hot_i[0];
assign data_masked[92] = data_i[92] & sel_one_hot_i[0];
assign data_masked[91] = data_i[91] & sel_one_hot_i[0];
assign data_masked[90] = data_i[90] & sel_one_hot_i[0];
assign data_masked[89] = data_i[89] & sel_one_hot_i[0];
assign data_masked[88] = data_i[88] & sel_one_hot_i[0];
assign data_masked[87] = data_i[87] & sel_one_hot_i[0];
assign data_masked[86] = data_i[86] & sel_one_hot_i[0];
assign data_masked[85] = data_i[85] & sel_one_hot_i[0];
assign data_masked[84] = data_i[84] & sel_one_hot_i[0];
assign data_masked[83] = data_i[83] & sel_one_hot_i[0];
assign data_masked[82] = data_i[82] & sel_one_hot_i[0];
assign data_masked[81] = data_i[81] & sel_one_hot_i[0];
assign data_masked[80] = data_i[80] & sel_one_hot_i[0];
assign data_masked[79] = data_i[79] & sel_one_hot_i[0];
assign data_masked[78] = data_i[78] & sel_one_hot_i[0];
assign data_masked[77] = data_i[77] & sel_one_hot_i[0];
assign data_masked[76] = data_i[76] & sel_one_hot_i[0];
assign data_masked[75] = data_i[75] & sel_one_hot_i[0];
assign data_masked[74] = data_i[74] & sel_one_hot_i[0];
assign data_masked[73] = data_i[73] & sel_one_hot_i[0];
assign data_masked[72] = data_i[72] & sel_one_hot_i[0];
assign data_masked[71] = data_i[71] & sel_one_hot_i[0];
assign data_masked[70] = data_i[70] & sel_one_hot_i[0];
assign data_masked[69] = data_i[69] & sel_one_hot_i[0];
assign data_masked[68] = data_i[68] & sel_one_hot_i[0];
assign data_masked[67] = data_i[67] & sel_one_hot_i[0];
assign data_masked[66] = data_i[66] & sel_one_hot_i[0];
assign data_masked[65] = data_i[65] & sel_one_hot_i[0];
assign data_masked[64] = data_i[64] & sel_one_hot_i[0];
assign data_masked[63] = data_i[63] & sel_one_hot_i[0];
assign data_masked[62] = data_i[62] & sel_one_hot_i[0];
assign data_masked[61] = data_i[61] & sel_one_hot_i[0];
assign data_masked[60] = data_i[60] & sel_one_hot_i[0];
assign data_masked[59] = data_i[59] & sel_one_hot_i[0];
assign data_masked[58] = data_i[58] & sel_one_hot_i[0];
assign data_masked[57] = data_i[57] & sel_one_hot_i[0];
assign data_masked[56] = data_i[56] & sel_one_hot_i[0];
assign data_masked[55] = data_i[55] & sel_one_hot_i[0];
assign data_masked[54] = data_i[54] & sel_one_hot_i[0];
assign data_masked[53] = data_i[53] & sel_one_hot_i[0];
assign data_masked[52] = data_i[52] & sel_one_hot_i[0];
assign data_masked[51] = data_i[51] & sel_one_hot_i[0];
assign data_masked[50] = data_i[50] & sel_one_hot_i[0];
assign data_masked[49] = data_i[49] & sel_one_hot_i[0];
assign data_masked[48] = data_i[48] & sel_one_hot_i[0];
assign data_masked[47] = data_i[47] & sel_one_hot_i[0];
assign data_masked[46] = data_i[46] & sel_one_hot_i[0];
assign data_masked[45] = data_i[45] & sel_one_hot_i[0];
assign data_masked[44] = data_i[44] & sel_one_hot_i[0];
assign data_masked[43] = data_i[43] & sel_one_hot_i[0];
assign data_masked[42] = data_i[42] & sel_one_hot_i[0];
assign data_masked[41] = data_i[41] & sel_one_hot_i[0];
assign data_masked[40] = data_i[40] & sel_one_hot_i[0];
assign data_masked[39] = data_i[39] & sel_one_hot_i[0];
assign data_masked[38] = data_i[38] & sel_one_hot_i[0];
assign data_masked[37] = data_i[37] & sel_one_hot_i[0];
assign data_masked[36] = data_i[36] & sel_one_hot_i[0];
assign data_masked[35] = data_i[35] & sel_one_hot_i[0];
assign data_masked[34] = data_i[34] & sel_one_hot_i[0];
assign data_masked[33] = data_i[33] & sel_one_hot_i[0];
assign data_masked[32] = data_i[32] & sel_one_hot_i[0];
assign data_masked[31] = data_i[31] & sel_one_hot_i[0];
assign data_masked[30] = data_i[30] & sel_one_hot_i[0];
assign data_masked[29] = data_i[29] & sel_one_hot_i[0];
assign data_masked[28] = data_i[28] & sel_one_hot_i[0];
assign data_masked[27] = data_i[27] & sel_one_hot_i[0];
assign data_masked[26] = data_i[26] & sel_one_hot_i[0];
assign data_masked[25] = data_i[25] & sel_one_hot_i[0];
assign data_masked[24] = data_i[24] & sel_one_hot_i[0];
assign data_masked[23] = data_i[23] & sel_one_hot_i[0];
assign data_masked[22] = data_i[22] & sel_one_hot_i[0];
assign data_masked[21] = data_i[21] & sel_one_hot_i[0];
assign data_masked[20] = data_i[20] & sel_one_hot_i[0];
assign data_masked[19] = data_i[19] & sel_one_hot_i[0];
assign data_masked[18] = data_i[18] & sel_one_hot_i[0];
assign data_masked[17] = data_i[17] & sel_one_hot_i[0];
assign data_masked[16] = data_i[16] & sel_one_hot_i[0];
assign data_masked[15] = data_i[15] & sel_one_hot_i[0];
assign data_masked[14] = data_i[14] & sel_one_hot_i[0];
assign data_masked[13] = data_i[13] & sel_one_hot_i[0];
assign data_masked[12] = data_i[12] & sel_one_hot_i[0];
assign data_masked[11] = data_i[11] & sel_one_hot_i[0];
assign data_masked[10] = data_i[10] & sel_one_hot_i[0];
assign data_masked[9] = data_i[9] & sel_one_hot_i[0];
assign data_masked[8] = data_i[8] & sel_one_hot_i[0];
assign data_masked[7] = data_i[7] & sel_one_hot_i[0];
assign data_masked[6] = data_i[6] & sel_one_hot_i[0];
assign data_masked[5] = data_i[5] & sel_one_hot_i[0];
assign data_masked[4] = data_i[4] & sel_one_hot_i[0];
assign data_masked[3] = data_i[3] & sel_one_hot_i[0];
assign data_masked[2] = data_i[2] & sel_one_hot_i[0];
assign data_masked[1] = data_i[1] & sel_one_hot_i[0];
assign data_masked[0] = data_i[0] & sel_one_hot_i[0];
assign data_masked[197] = data_i[197] & sel_one_hot_i[1];
assign data_masked[196] = data_i[196] & sel_one_hot_i[1];
assign data_masked[195] = data_i[195] & sel_one_hot_i[1];
assign data_masked[194] = data_i[194] & sel_one_hot_i[1];
assign data_masked[193] = data_i[193] & sel_one_hot_i[1];
assign data_masked[192] = data_i[192] & sel_one_hot_i[1];
assign data_masked[191] = data_i[191] & sel_one_hot_i[1];
assign data_masked[190] = data_i[190] & sel_one_hot_i[1];
assign data_masked[189] = data_i[189] & sel_one_hot_i[1];
assign data_masked[188] = data_i[188] & sel_one_hot_i[1];
assign data_masked[187] = data_i[187] & sel_one_hot_i[1];
assign data_masked[186] = data_i[186] & sel_one_hot_i[1];
assign data_masked[185] = data_i[185] & sel_one_hot_i[1];
assign data_masked[184] = data_i[184] & sel_one_hot_i[1];
assign data_masked[183] = data_i[183] & sel_one_hot_i[1];
assign data_masked[182] = data_i[182] & sel_one_hot_i[1];
assign data_masked[181] = data_i[181] & sel_one_hot_i[1];
assign data_masked[180] = data_i[180] & sel_one_hot_i[1];
assign data_masked[179] = data_i[179] & sel_one_hot_i[1];
assign data_masked[178] = data_i[178] & sel_one_hot_i[1];
assign data_masked[177] = data_i[177] & sel_one_hot_i[1];
assign data_masked[176] = data_i[176] & sel_one_hot_i[1];
assign data_masked[175] = data_i[175] & sel_one_hot_i[1];
assign data_masked[174] = data_i[174] & sel_one_hot_i[1];
assign data_masked[173] = data_i[173] & sel_one_hot_i[1];
assign data_masked[172] = data_i[172] & sel_one_hot_i[1];
assign data_masked[171] = data_i[171] & sel_one_hot_i[1];
assign data_masked[170] = data_i[170] & sel_one_hot_i[1];
assign data_masked[169] = data_i[169] & sel_one_hot_i[1];
assign data_masked[168] = data_i[168] & sel_one_hot_i[1];
assign data_masked[167] = data_i[167] & sel_one_hot_i[1];
assign data_masked[166] = data_i[166] & sel_one_hot_i[1];
assign data_masked[165] = data_i[165] & sel_one_hot_i[1];
assign data_masked[164] = data_i[164] & sel_one_hot_i[1];
assign data_masked[163] = data_i[163] & sel_one_hot_i[1];
assign data_masked[162] = data_i[162] & sel_one_hot_i[1];
assign data_masked[161] = data_i[161] & sel_one_hot_i[1];
assign data_masked[160] = data_i[160] & sel_one_hot_i[1];
assign data_masked[159] = data_i[159] & sel_one_hot_i[1];
assign data_masked[158] = data_i[158] & sel_one_hot_i[1];
assign data_masked[157] = data_i[157] & sel_one_hot_i[1];
assign data_masked[156] = data_i[156] & sel_one_hot_i[1];
assign data_masked[155] = data_i[155] & sel_one_hot_i[1];
assign data_masked[154] = data_i[154] & sel_one_hot_i[1];
assign data_masked[153] = data_i[153] & sel_one_hot_i[1];
assign data_masked[152] = data_i[152] & sel_one_hot_i[1];
assign data_masked[151] = data_i[151] & sel_one_hot_i[1];
assign data_masked[150] = data_i[150] & sel_one_hot_i[1];
assign data_masked[149] = data_i[149] & sel_one_hot_i[1];
assign data_masked[148] = data_i[148] & sel_one_hot_i[1];
assign data_masked[147] = data_i[147] & sel_one_hot_i[1];
assign data_masked[146] = data_i[146] & sel_one_hot_i[1];
assign data_masked[145] = data_i[145] & sel_one_hot_i[1];
assign data_masked[144] = data_i[144] & sel_one_hot_i[1];
assign data_masked[143] = data_i[143] & sel_one_hot_i[1];
assign data_masked[142] = data_i[142] & sel_one_hot_i[1];
assign data_masked[141] = data_i[141] & sel_one_hot_i[1];
assign data_masked[140] = data_i[140] & sel_one_hot_i[1];
assign data_masked[139] = data_i[139] & sel_one_hot_i[1];
assign data_masked[138] = data_i[138] & sel_one_hot_i[1];
assign data_masked[137] = data_i[137] & sel_one_hot_i[1];
assign data_masked[136] = data_i[136] & sel_one_hot_i[1];
assign data_masked[135] = data_i[135] & sel_one_hot_i[1];
assign data_masked[134] = data_i[134] & sel_one_hot_i[1];
assign data_masked[133] = data_i[133] & sel_one_hot_i[1];
assign data_masked[132] = data_i[132] & sel_one_hot_i[1];
assign data_masked[131] = data_i[131] & sel_one_hot_i[1];
assign data_masked[130] = data_i[130] & sel_one_hot_i[1];
assign data_masked[129] = data_i[129] & sel_one_hot_i[1];
assign data_masked[128] = data_i[128] & sel_one_hot_i[1];
assign data_masked[127] = data_i[127] & sel_one_hot_i[1];
assign data_masked[126] = data_i[126] & sel_one_hot_i[1];
assign data_masked[125] = data_i[125] & sel_one_hot_i[1];
assign data_masked[124] = data_i[124] & sel_one_hot_i[1];
assign data_masked[123] = data_i[123] & sel_one_hot_i[1];
assign data_masked[122] = data_i[122] & sel_one_hot_i[1];
assign data_masked[121] = data_i[121] & sel_one_hot_i[1];
assign data_masked[120] = data_i[120] & sel_one_hot_i[1];
assign data_masked[119] = data_i[119] & sel_one_hot_i[1];
assign data_masked[118] = data_i[118] & sel_one_hot_i[1];
assign data_masked[117] = data_i[117] & sel_one_hot_i[1];
assign data_masked[116] = data_i[116] & sel_one_hot_i[1];
assign data_masked[115] = data_i[115] & sel_one_hot_i[1];
assign data_masked[114] = data_i[114] & sel_one_hot_i[1];
assign data_masked[113] = data_i[113] & sel_one_hot_i[1];
assign data_masked[112] = data_i[112] & sel_one_hot_i[1];
assign data_masked[111] = data_i[111] & sel_one_hot_i[1];
assign data_masked[110] = data_i[110] & sel_one_hot_i[1];
assign data_masked[109] = data_i[109] & sel_one_hot_i[1];
assign data_masked[108] = data_i[108] & sel_one_hot_i[1];
assign data_masked[107] = data_i[107] & sel_one_hot_i[1];
assign data_masked[106] = data_i[106] & sel_one_hot_i[1];
assign data_masked[105] = data_i[105] & sel_one_hot_i[1];
assign data_masked[104] = data_i[104] & sel_one_hot_i[1];
assign data_masked[103] = data_i[103] & sel_one_hot_i[1];
assign data_masked[102] = data_i[102] & sel_one_hot_i[1];
assign data_masked[101] = data_i[101] & sel_one_hot_i[1];
assign data_masked[100] = data_i[100] & sel_one_hot_i[1];
assign data_masked[99] = data_i[99] & sel_one_hot_i[1];
assign data_o[0] = data_masked[99] | data_masked[0];
assign data_o[1] = data_masked[100] | data_masked[1];
assign data_o[2] = data_masked[101] | data_masked[2];
assign data_o[3] = data_masked[102] | data_masked[3];
assign data_o[4] = data_masked[103] | data_masked[4];
assign data_o[5] = data_masked[104] | data_masked[5];
assign data_o[6] = data_masked[105] | data_masked[6];
assign data_o[7] = data_masked[106] | data_masked[7];
assign data_o[8] = data_masked[107] | data_masked[8];
assign data_o[9] = data_masked[108] | data_masked[9];
assign data_o[10] = data_masked[109] | data_masked[10];
assign data_o[11] = data_masked[110] | data_masked[11];
assign data_o[12] = data_masked[111] | data_masked[12];
assign data_o[13] = data_masked[112] | data_masked[13];
assign data_o[14] = data_masked[113] | data_masked[14];
assign data_o[15] = data_masked[114] | data_masked[15];
assign data_o[16] = data_masked[115] | data_masked[16];
assign data_o[17] = data_masked[116] | data_masked[17];
assign data_o[18] = data_masked[117] | data_masked[18];
assign data_o[19] = data_masked[118] | data_masked[19];
assign data_o[20] = data_masked[119] | data_masked[20];
assign data_o[21] = data_masked[120] | data_masked[21];
assign data_o[22] = data_masked[121] | data_masked[22];
assign data_o[23] = data_masked[122] | data_masked[23];
assign data_o[24] = data_masked[123] | data_masked[24];
assign data_o[25] = data_masked[124] | data_masked[25];
assign data_o[26] = data_masked[125] | data_masked[26];
assign data_o[27] = data_masked[126] | data_masked[27];
assign data_o[28] = data_masked[127] | data_masked[28];
assign data_o[29] = data_masked[128] | data_masked[29];
assign data_o[30] = data_masked[129] | data_masked[30];
assign data_o[31] = data_masked[130] | data_masked[31];
assign data_o[32] = data_masked[131] | data_masked[32];
assign data_o[33] = data_masked[132] | data_masked[33];
assign data_o[34] = data_masked[133] | data_masked[34];
assign data_o[35] = data_masked[134] | data_masked[35];
assign data_o[36] = data_masked[135] | data_masked[36];
assign data_o[37] = data_masked[136] | data_masked[37];
assign data_o[38] = data_masked[137] | data_masked[38];
assign data_o[39] = data_masked[138] | data_masked[39];
assign data_o[40] = data_masked[139] | data_masked[40];
assign data_o[41] = data_masked[140] | data_masked[41];
assign data_o[42] = data_masked[141] | data_masked[42];
assign data_o[43] = data_masked[142] | data_masked[43];
assign data_o[44] = data_masked[143] | data_masked[44];
assign data_o[45] = data_masked[144] | data_masked[45];
assign data_o[46] = data_masked[145] | data_masked[46];
assign data_o[47] = data_masked[146] | data_masked[47];
assign data_o[48] = data_masked[147] | data_masked[48];
assign data_o[49] = data_masked[148] | data_masked[49];
assign data_o[50] = data_masked[149] | data_masked[50];
assign data_o[51] = data_masked[150] | data_masked[51];
assign data_o[52] = data_masked[151] | data_masked[52];
assign data_o[53] = data_masked[152] | data_masked[53];
assign data_o[54] = data_masked[153] | data_masked[54];
assign data_o[55] = data_masked[154] | data_masked[55];
assign data_o[56] = data_masked[155] | data_masked[56];
assign data_o[57] = data_masked[156] | data_masked[57];
assign data_o[58] = data_masked[157] | data_masked[58];
assign data_o[59] = data_masked[158] | data_masked[59];
assign data_o[60] = data_masked[159] | data_masked[60];
assign data_o[61] = data_masked[160] | data_masked[61];
assign data_o[62] = data_masked[161] | data_masked[62];
assign data_o[63] = data_masked[162] | data_masked[63];
assign data_o[64] = data_masked[163] | data_masked[64];
assign data_o[65] = data_masked[164] | data_masked[65];
assign data_o[66] = data_masked[165] | data_masked[66];
assign data_o[67] = data_masked[166] | data_masked[67];
assign data_o[68] = data_masked[167] | data_masked[68];
assign data_o[69] = data_masked[168] | data_masked[69];
assign data_o[70] = data_masked[169] | data_masked[70];
assign data_o[71] = data_masked[170] | data_masked[71];
assign data_o[72] = data_masked[171] | data_masked[72];
assign data_o[73] = data_masked[172] | data_masked[73];
assign data_o[74] = data_masked[173] | data_masked[74];
assign data_o[75] = data_masked[174] | data_masked[75];
assign data_o[76] = data_masked[175] | data_masked[76];
assign data_o[77] = data_masked[176] | data_masked[77];
assign data_o[78] = data_masked[177] | data_masked[78];
assign data_o[79] = data_masked[178] | data_masked[79];
assign data_o[80] = data_masked[179] | data_masked[80];
assign data_o[81] = data_masked[180] | data_masked[81];
assign data_o[82] = data_masked[181] | data_masked[82];
assign data_o[83] = data_masked[182] | data_masked[83];
assign data_o[84] = data_masked[183] | data_masked[84];
assign data_o[85] = data_masked[184] | data_masked[85];
assign data_o[86] = data_masked[185] | data_masked[86];
assign data_o[87] = data_masked[186] | data_masked[87];
assign data_o[88] = data_masked[187] | data_masked[88];
assign data_o[89] = data_masked[188] | data_masked[89];
assign data_o[90] = data_masked[189] | data_masked[90];
assign data_o[91] = data_masked[190] | data_masked[91];
assign data_o[92] = data_masked[191] | data_masked[92];
assign data_o[93] = data_masked[192] | data_masked[93];
assign data_o[94] = data_masked[193] | data_masked[94];
assign data_o[95] = data_masked[194] | data_masked[95];
assign data_o[96] = data_masked[195] | data_masked[96];
assign data_o[97] = data_masked[196] | data_masked[97];
assign data_o[98] = data_masked[197] | data_masked[98];
endmodule
|
module bsg_swap_width_p128
(
data_i,
swap_i,
data_o
);
input [255:0] data_i;
output [255:0] data_o;
input swap_i;
wire [255:0] data_o;
wire N0,N1,N2;
assign data_o = (N0)? { data_i[127:0], data_i[255:128] } :
(N1)? data_i : 1'b0;
assign N0 = swap_i;
assign N1 = N2;
assign N2 = ~swap_i;
endmodule
|
module bp_be_dcache_lce_req_data_width_p64_paddr_width_p22_num_cce_p1_num_lce_p2_ways_p8
(
clk_i,
reset_i,
lce_id_i,
load_miss_i,
store_miss_i,
miss_addr_i,
lru_way_i,
dirty_i,
uncached_load_req_i,
uncached_store_req_i,
store_data_i,
size_op_i,
cache_miss_o,
miss_addr_o,
tr_data_received_i,
cce_data_received_i,
uncached_data_received_i,
set_tag_received_i,
set_tag_wakeup_received_i,
lce_req_o,
lce_req_v_o,
lce_req_ready_i,
lce_resp_o,
lce_resp_v_o,
lce_resp_yumi_i
);
input [0:0] lce_id_i;
input [21:0] miss_addr_i;
input [2:0] lru_way_i;
input [7:0] dirty_i;
input [63:0] store_data_i;
input [1:0] size_op_i;
output [21:0] miss_addr_o;
output [96:0] lce_req_o;
output [25:0] lce_resp_o;
input clk_i;
input reset_i;
input load_miss_i;
input store_miss_i;
input uncached_load_req_i;
input uncached_store_req_i;
input tr_data_received_i;
input cce_data_received_i;
input uncached_data_received_i;
input set_tag_received_i;
input set_tag_wakeup_received_i;
input lce_req_ready_i;
input lce_resp_yumi_i;
output cache_miss_o;
output lce_req_v_o;
output lce_resp_v_o;
wire [96:0] lce_req_o;
wire [25:0] lce_resp_o;
wire cache_miss_o,lce_req_v_o,lce_resp_v_o,N0,N1,N2,N3,N4,N5,N6,N7,N8,N9,N10,N11,
tr_data_received,cce_data_received,set_tag_received,N12,N13,N14,N15,N16,N17,N18,N19,
N20,N21,N22,N23,N24,N25,N26,N27,N28,dirty_lru_flopped_n,tr_data_received_n,
cce_data_received_n,set_tag_received_n,N29,N30,N31,N32,N33,N34,N35,N36,N37,N38,N39,
N40,N41,N42,N43,N44,N45,N46,N47,N48,N49,N50,N51,N52,N53,N54,N55,N56,N57,N58,N59,
N60,N61,N62,N63,N64,N65,N66,N67,N68,N69,N70,N71,N72,N73,N74,N75,N76,N77,N78,N79,
N80,N81,N82,N83,N84,N85,N86,N87,N88,N89,N90,N91,N92,N93,N94,N95,N96,N97,N98,N99,
N100,N101,N102,N103,N104,N105,N106,N107,N108,N109,N110,N111,N112,N113,N114,N115,
N116,N117,N118,N119,N120,N121,N122,N123,N124,N125,N126,N127,N128,N129,N130,N131,
N132,N133,N134,N135,N136,N137,N138,N139,N140,N141,N142,N143,N144,N145,N146,N147,
N148,N149,N150,N151,N152,N153,N154,N155,N156,N157,N158,N159,N160,N161,N162,N163,
N164,N165,N166,N167,N168,N169,N170,N171,N172,N173,N174,N175,N176,N177,N178,N179,
N180,N181,N182,N183,N184,N185,N186,N187,N188,N189,N190,N191,N192,N193,N194,N195,
N196,N197,N198,N199,N200,N201,N202,N203,N204,N205,N206,N207,N208,N209,N210,N211,
N212,N213,N214,N215,N216,N217,N218,N219,N220,N221,N222,N223,N224,N225,N226,N227,
N228,N229,N230,N231,N232,N233,N234,N235,N236,N237,N238,N239,N240,N241,N242,N243,
N244,N245,N246,N247,N248,N249,N250,N251,N252,N253,N254,N255,N256;
wire [2:0] state_n;
reg size_op_r,dirty_lru_flopped_r,tr_data_received_r,cce_data_received_r,
set_tag_received_r,load_not_store_r,dirty_r;
reg [2:0] state_r,lru_way_r;
reg [21:0] miss_addr_o;
assign lce_resp_o[23] = 1'b1;
assign lce_resp_o[25] = 1'b0;
assign lce_req_o[29] = 1'b0;
assign lce_req_o[32] = 1'b0;
assign lce_resp_o[21] = miss_addr_o[21];
assign lce_resp_o[20] = miss_addr_o[20];
assign lce_resp_o[19] = miss_addr_o[19];
assign lce_resp_o[18] = miss_addr_o[18];
assign lce_resp_o[17] = miss_addr_o[17];
assign lce_resp_o[16] = miss_addr_o[16];
assign lce_resp_o[15] = miss_addr_o[15];
assign lce_resp_o[14] = miss_addr_o[14];
assign lce_resp_o[13] = miss_addr_o[13];
assign lce_resp_o[12] = miss_addr_o[12];
assign lce_resp_o[11] = miss_addr_o[11];
assign lce_resp_o[10] = miss_addr_o[10];
assign lce_resp_o[9] = miss_addr_o[9];
assign lce_resp_o[8] = miss_addr_o[8];
assign lce_resp_o[7] = miss_addr_o[7];
assign lce_resp_o[6] = miss_addr_o[6];
assign lce_resp_o[5] = miss_addr_o[5];
assign lce_resp_o[4] = miss_addr_o[4];
assign lce_resp_o[3] = miss_addr_o[3];
assign lce_resp_o[2] = miss_addr_o[2];
assign lce_resp_o[1] = miss_addr_o[1];
assign lce_resp_o[0] = miss_addr_o[0];
assign lce_resp_o[24] = lce_id_i[0];
assign lce_req_o[31] = lce_id_i[0];
assign N28 = (N20)? dirty_i[0] :
(N22)? dirty_i[1] :
(N24)? dirty_i[2] :
(N26)? dirty_i[3] :
(N21)? dirty_i[4] :
(N23)? dirty_i[5] :
(N25)? dirty_i[6] :
(N27)? dirty_i[7] : 1'b0;
assign N32 = N29 & N30;
assign N33 = N32 & N31;
assign N34 = state_r[2] | state_r[1];
assign N35 = N34 | N31;
assign N37 = state_r[2] | N30;
assign N38 = N37 | state_r[0];
assign N40 = N29 | state_r[1];
assign N41 = N40 | N31;
assign N43 = state_r[2] | N30;
assign N44 = N43 | N31;
assign N46 = N29 | state_r[1];
assign N47 = N46 | state_r[0];
assign N49 = state_r[2] & state_r[1];
assign lce_req_o[6:4] = (N0)? lru_way_r :
(N1)? lru_way_i : 1'b0;
assign N0 = dirty_lru_flopped_r;
assign N1 = N12;
assign lce_req_o[3] = (N0)? dirty_r :
(N1)? N28 : 1'b0;
assign N57 = (N2)? 1'b1 :
(N167)? 1'b1 :
(N170)? N54 :
(N53)? 1'b0 : 1'b0;
assign N2 = N50;
assign { N59, N58 } = (N2)? { 1'b0, 1'b1 } :
(N167)? { 1'b1, 1'b0 } :
(N170)? { 1'b0, 1'b0 } :
(N53)? { 1'b0, 1'b0 } : 1'b0;
assign N60 = (N2)? 1'b0 :
(N167)? 1'b0 :
(N170)? 1'b1 :
(N53)? 1'b0 : 1'b0;
assign { N146, N145, N144, N143, N142, N141, N140, N139, N138, N137, N136, N135, N134, N133, N132, N131, N130, N129, N128, N127, N126, N125, N124, N123, N122, N121, N120, N119, N118, N117, N116, N115, N114, N113, N112, N111, N110, N109, N108, N107, N106, N105, N104, N103, N102, N101, N100, N99, N98, N97, N96, N95, N94, N93, N92, N91, N90, N89, N88, N87, N86, N85, N84, N83, N82, N81, N80, N79, N78, N77, N76, N75, N74, N73, N72, N71, N70, N69, N68, N67, N66, N65, N64, N63, N62, N61 } = (N2)? { 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, miss_addr_o } :
(N167)? { 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, miss_addr_o } :
(N170)? { store_data_i, miss_addr_i } :
(N53)? { 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, miss_addr_o } : 1'b0;
assign { N158, N157, N156 } = (N3)? { 1'b0, 1'b1, 1'b1 } :
(N174)? { 1'b1, 1'b0, 1'b0 } :
(N155)? { 1'b1, 1'b0, 1'b1 } : 1'b0;
assign N3 = tr_data_received;
assign { N161, N160, N159 } = (N4)? { 1'b0, 1'b0, 1'b0 } :
(N172)? { N158, N157, N156 } :
(N153)? { 1'b1, 1'b0, 1'b1 } : 1'b0;
assign N4 = N151;
assign lce_req_o[1:0] = (N5)? { 1'b0, size_op_r } :
(N163)? size_op_i : 1'b0;
assign N5 = N39;
assign lce_req_o[2] = (N6)? N60 :
(N7)? 1'b0 :
(N5)? 1'b1 :
(N8)? 1'b0 :
(N9)? 1'b0 :
(N10)? 1'b0 :
(N11)? 1'b0 : 1'b0;
assign N6 = N33;
assign N7 = N36;
assign N8 = N42;
assign N9 = N45;
assign N10 = N48;
assign N11 = N49;
assign { lce_req_o[96:33], lce_req_o[28:7] } = (N6)? { N146, N145, N144, N143, N142, N141, N140, N139, N138, N137, N136, N135, N134, N133, N132, N131, N130, N129, N128, N127, N126, N125, N124, N123, N122, N121, N120, N119, N118, N117, N116, N115, N114, N113, N112, N111, N110, N109, N108, N107, N106, N105, N104, N103, N102, N101, N100, N99, N98, N97, N96, N95, N94, N93, N92, N91, N90, N89, N88, N87, N86, N85, N84, N83, N82, N81, N80, N79, N78, N77, N76, N75, N74, N73, N72, N71, N70, N69, N68, N67, N66, N65, N64, N63, N62, N61 } :
(N165)? { 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, miss_addr_o } : 1'b0;
assign lce_req_o[30] = (N7)? N147 :
(N166)? 1'b0 : 1'b0;
assign dirty_lru_flopped_n = (N6)? 1'b0 :
(N7)? 1'b1 : 1'b0;
assign tr_data_received_n = (N6)? 1'b0 :
(N8)? 1'b1 : 1'b0;
assign cce_data_received_n = (N6)? 1'b0 :
(N8)? 1'b1 : 1'b0;
assign set_tag_received_n = (N6)? 1'b0 :
(N8)? 1'b1 : 1'b0;
assign cache_miss_o = (N6)? N57 :
(N7)? 1'b1 :
(N5)? 1'b1 :
(N8)? 1'b1 :
(N9)? 1'b1 :
(N10)? 1'b1 :
(N11)? 1'b0 : 1'b0;
assign state_n = (N6)? { 1'b0, N59, N58 } :
(N7)? { lce_req_ready_i, 1'b0, 1'b1 } :
(N5)? { lce_req_ready_i, N54, lce_req_ready_i } :
(N8)? { N161, N160, N159 } :
(N9)? { 1'b0, N162, N162 } :
(N10)? { N162, 1'b0, 1'b0 } :
(N11)? { 1'b0, 1'b0, 1'b0 } : 1'b0;
assign lce_req_v_o = (N6)? N60 :
(N7)? 1'b1 :
(N5)? 1'b1 :
(N8)? 1'b0 :
(N9)? 1'b0 :
(N10)? 1'b0 :
(N11)? 1'b0 : 1'b0;
assign lce_resp_v_o = (N6)? 1'b0 :
(N7)? 1'b0 :
(N5)? 1'b0 :
(N8)? 1'b0 :
(N9)? 1'b1 :
(N10)? 1'b1 :
(N11)? 1'b0 : 1'b0;
assign lce_resp_o[22] = (N6)? 1'b0 :
(N7)? 1'b0 :
(N5)? 1'b0 :
(N8)? 1'b0 :
(N9)? 1'b0 :
(N10)? 1'b1 :
(N11)? 1'b0 : 1'b0;
assign tr_data_received = tr_data_received_r | tr_data_received_i;
assign cce_data_received = cce_data_received_r | cce_data_received_i;
assign set_tag_received = set_tag_received_r | set_tag_received_i;
assign N12 = ~dirty_lru_flopped_r;
assign N13 = ~lru_way_i[0];
assign N14 = ~lru_way_i[1];
assign N15 = N13 & N14;
assign N16 = N13 & lru_way_i[1];
assign N17 = lru_way_i[0] & N14;
assign N18 = lru_way_i[0] & lru_way_i[1];
assign N19 = ~lru_way_i[2];
assign N20 = N15 & N19;
assign N21 = N15 & lru_way_i[2];
assign N22 = N17 & N19;
assign N23 = N17 & lru_way_i[2];
assign N24 = N16 & N19;
assign N25 = N16 & lru_way_i[2];
assign N26 = N18 & N19;
assign N27 = N18 & lru_way_i[2];
assign N29 = ~state_r[2];
assign N30 = ~state_r[1];
assign N31 = ~state_r[0];
assign N36 = ~N35;
assign N39 = ~N38;
assign N42 = ~N41;
assign N45 = ~N44;
assign N48 = ~N47;
assign N50 = load_miss_i | store_miss_i;
assign N51 = uncached_load_req_i | N50;
assign N52 = uncached_store_req_i | N51;
assign N53 = ~N52;
assign N54 = ~lce_req_ready_i;
assign N55 = ~N51;
assign N56 = ~N50;
assign N147 = ~load_not_store_r;
assign N148 = ~tr_data_received_i;
assign N149 = ~cce_data_received_i;
assign N150 = ~set_tag_received_i;
assign N151 = set_tag_wakeup_received_i | uncached_data_received_i;
assign N152 = set_tag_received | N151;
assign N153 = ~N152;
assign N154 = cce_data_received | tr_data_received;
assign N155 = ~N154;
assign N162 = ~lce_resp_yumi_i;
assign N163 = N38;
assign N164 = ~N33;
assign N165 = N164;
assign N166 = N35;
assign N167 = uncached_load_req_i & N56;
assign N168 = ~uncached_load_req_i;
assign N169 = N56 & N168;
assign N170 = uncached_store_req_i & N169;
assign N171 = ~N151;
assign N172 = set_tag_received & N171;
assign N173 = ~tr_data_received;
assign N174 = cce_data_received & N173;
assign N175 = ~reset_i;
assign N176 = N33 & N175;
assign N177 = N50 & N176;
assign N178 = N55 & N176;
assign N179 = N177 | N178;
assign N180 = N36 & N175;
assign N181 = N179 | N180;
assign N182 = N39 & N175;
assign N183 = N181 | N182;
assign N184 = N42 & N175;
assign N185 = N183 | N184;
assign N186 = N45 & N175;
assign N187 = N185 | N186;
assign N188 = N48 & N175;
assign N189 = N187 | N188;
assign N190 = N49 & N175;
assign N191 = N189 | N190;
assign N192 = ~N191;
assign N193 = N175 & N192;
assign N194 = N56 & N33;
assign N195 = N194 | N39;
assign N196 = N195 | N42;
assign N197 = N196 | N45;
assign N198 = N197 | N48;
assign N199 = N198 | N49;
assign N200 = ~N199;
assign N201 = N55 & N33;
assign N202 = N201 | N36;
assign N203 = N202 | N39;
assign N204 = N148 & N42;
assign N205 = N203 | N204;
assign N206 = N205 | N45;
assign N207 = N206 | N48;
assign N208 = N207 | N49;
assign N209 = ~N208;
assign N210 = N149 & N42;
assign N211 = N203 | N210;
assign N212 = N211 | N45;
assign N213 = N212 | N48;
assign N214 = N213 | N49;
assign N215 = ~N214;
assign N216 = N150 & N42;
assign N217 = N203 | N216;
assign N218 = N217 | N45;
assign N219 = N218 | N48;
assign N220 = N219 | N49;
assign N221 = ~N220;
assign N222 = N56 & N176;
assign N223 = N222 | N180;
assign N224 = N223 | N182;
assign N225 = N224 | N184;
assign N226 = N225 | N186;
assign N227 = N226 | N188;
assign N228 = N227 | N190;
assign N229 = ~N228;
assign N230 = N175 & N229;
assign N231 = dirty_lru_flopped_r & N180;
assign N232 = N176 | N231;
assign N233 = N232 | N182;
assign N234 = N233 | N184;
assign N235 = N234 | N186;
assign N236 = N235 | N188;
assign N237 = N236 | N190;
assign N238 = ~N237;
assign N239 = N175 & N238;
assign N240 = dirty_lru_flopped_r & N180;
assign N241 = N176 | N240;
assign N242 = N241 | N182;
assign N243 = N242 | N184;
assign N244 = N243 | N186;
assign N245 = N244 | N188;
assign N246 = N245 | N190;
assign N247 = ~N246;
assign N248 = N175 & N247;
assign N249 = N178 | N180;
assign N250 = N249 | N182;
assign N251 = N250 | N184;
assign N252 = N251 | N186;
assign N253 = N252 | N188;
assign N254 = N253 | N190;
assign N255 = ~N254;
assign N256 = N175 & N255;
always @(posedge clk_i) begin
if(N193) begin
size_op_r <= size_op_i[0];
end
if(reset_i) begin
{ state_r[2:0] } <= { 1'b0, 1'b0, 1'b0 };
end else if(1'b1) begin
{ state_r[2:0] } <= { state_n[2:0] };
end
if(reset_i) begin
dirty_lru_flopped_r <= 1'b0;
end else if(N200) begin
dirty_lru_flopped_r <= dirty_lru_flopped_n;
end
if(reset_i) begin
tr_data_received_r <= 1'b0;
end else if(N209) begin
tr_data_received_r <= tr_data_received_n;
end
if(reset_i) begin
cce_data_received_r <= 1'b0;
end else if(N215) begin
cce_data_received_r <= cce_data_received_n;
end
if(reset_i) begin
set_tag_received_r <= 1'b0;
end else if(N221) begin
set_tag_received_r <= set_tag_received_n;
end
if(N230) begin
load_not_store_r <= load_miss_i;
end
if(N239) begin
{ lru_way_r[2:0] } <= { lru_way_i[2:0] };
end
if(N248) begin
dirty_r <= N28;
end
if(N256) begin
{ miss_addr_o[21:0] } <= { miss_addr_i[21:0] };
end
end
endmodule
|
module bsg_mux_one_hot_width_p99_els_p4
(
data_i,
sel_one_hot_i,
data_o
);
input [395:0] data_i;
input [3:0] sel_one_hot_i;
output [98:0] data_o;
wire [98:0] data_o;
wire N0,N1,N2,N3,N4,N5,N6,N7,N8,N9,N10,N11,N12,N13,N14,N15,N16,N17,N18,N19,N20,N21,
N22,N23,N24,N25,N26,N27,N28,N29,N30,N31,N32,N33,N34,N35,N36,N37,N38,N39,N40,N41,
N42,N43,N44,N45,N46,N47,N48,N49,N50,N51,N52,N53,N54,N55,N56,N57,N58,N59,N60,N61,
N62,N63,N64,N65,N66,N67,N68,N69,N70,N71,N72,N73,N74,N75,N76,N77,N78,N79,N80,N81,
N82,N83,N84,N85,N86,N87,N88,N89,N90,N91,N92,N93,N94,N95,N96,N97,N98,N99,N100,N101,
N102,N103,N104,N105,N106,N107,N108,N109,N110,N111,N112,N113,N114,N115,N116,N117,
N118,N119,N120,N121,N122,N123,N124,N125,N126,N127,N128,N129,N130,N131,N132,N133,
N134,N135,N136,N137,N138,N139,N140,N141,N142,N143,N144,N145,N146,N147,N148,N149,
N150,N151,N152,N153,N154,N155,N156,N157,N158,N159,N160,N161,N162,N163,N164,N165,
N166,N167,N168,N169,N170,N171,N172,N173,N174,N175,N176,N177,N178,N179,N180,N181,
N182,N183,N184,N185,N186,N187,N188,N189,N190,N191,N192,N193,N194,N195,N196,N197;
wire [395:0] data_masked;
assign data_masked[98] = data_i[98] & sel_one_hot_i[0];
assign data_masked[97] = data_i[97] & sel_one_hot_i[0];
assign data_masked[96] = data_i[96] & sel_one_hot_i[0];
assign data_masked[95] = data_i[95] & sel_one_hot_i[0];
assign data_masked[94] = data_i[94] & sel_one_hot_i[0];
assign data_masked[93] = data_i[93] & sel_one_hot_i[0];
assign data_masked[92] = data_i[92] & sel_one_hot_i[0];
assign data_masked[91] = data_i[91] & sel_one_hot_i[0];
assign data_masked[90] = data_i[90] & sel_one_hot_i[0];
assign data_masked[89] = data_i[89] & sel_one_hot_i[0];
assign data_masked[88] = data_i[88] & sel_one_hot_i[0];
assign data_masked[87] = data_i[87] & sel_one_hot_i[0];
assign data_masked[86] = data_i[86] & sel_one_hot_i[0];
assign data_masked[85] = data_i[85] & sel_one_hot_i[0];
assign data_masked[84] = data_i[84] & sel_one_hot_i[0];
assign data_masked[83] = data_i[83] & sel_one_hot_i[0];
assign data_masked[82] = data_i[82] & sel_one_hot_i[0];
assign data_masked[81] = data_i[81] & sel_one_hot_i[0];
assign data_masked[80] = data_i[80] & sel_one_hot_i[0];
assign data_masked[79] = data_i[79] & sel_one_hot_i[0];
assign data_masked[78] = data_i[78] & sel_one_hot_i[0];
assign data_masked[77] = data_i[77] & sel_one_hot_i[0];
assign data_masked[76] = data_i[76] & sel_one_hot_i[0];
assign data_masked[75] = data_i[75] & sel_one_hot_i[0];
assign data_masked[74] = data_i[74] & sel_one_hot_i[0];
assign data_masked[73] = data_i[73] & sel_one_hot_i[0];
assign data_masked[72] = data_i[72] & sel_one_hot_i[0];
assign data_masked[71] = data_i[71] & sel_one_hot_i[0];
assign data_masked[70] = data_i[70] & sel_one_hot_i[0];
assign data_masked[69] = data_i[69] & sel_one_hot_i[0];
assign data_masked[68] = data_i[68] & sel_one_hot_i[0];
assign data_masked[67] = data_i[67] & sel_one_hot_i[0];
assign data_masked[66] = data_i[66] & sel_one_hot_i[0];
assign data_masked[65] = data_i[65] & sel_one_hot_i[0];
assign data_masked[64] = data_i[64] & sel_one_hot_i[0];
assign data_masked[63] = data_i[63] & sel_one_hot_i[0];
assign data_masked[62] = data_i[62] & sel_one_hot_i[0];
assign data_masked[61] = data_i[61] & sel_one_hot_i[0];
assign data_masked[60] = data_i[60] & sel_one_hot_i[0];
assign data_masked[59] = data_i[59] & sel_one_hot_i[0];
assign data_masked[58] = data_i[58] & sel_one_hot_i[0];
assign data_masked[57] = data_i[57] & sel_one_hot_i[0];
assign data_masked[56] = data_i[56] & sel_one_hot_i[0];
assign data_masked[55] = data_i[55] & sel_one_hot_i[0];
assign data_masked[54] = data_i[54] & sel_one_hot_i[0];
assign data_masked[53] = data_i[53] & sel_one_hot_i[0];
assign data_masked[52] = data_i[52] & sel_one_hot_i[0];
assign data_masked[51] = data_i[51] & sel_one_hot_i[0];
assign data_masked[50] = data_i[50] & sel_one_hot_i[0];
assign data_masked[49] = data_i[49] & sel_one_hot_i[0];
assign data_masked[48] = data_i[48] & sel_one_hot_i[0];
assign data_masked[47] = data_i[47] & sel_one_hot_i[0];
assign data_masked[46] = data_i[46] & sel_one_hot_i[0];
assign data_masked[45] = data_i[45] & sel_one_hot_i[0];
assign data_masked[44] = data_i[44] & sel_one_hot_i[0];
assign data_masked[43] = data_i[43] & sel_one_hot_i[0];
assign data_masked[42] = data_i[42] & sel_one_hot_i[0];
assign data_masked[41] = data_i[41] & sel_one_hot_i[0];
assign data_masked[40] = data_i[40] & sel_one_hot_i[0];
assign data_masked[39] = data_i[39] & sel_one_hot_i[0];
assign data_masked[38] = data_i[38] & sel_one_hot_i[0];
assign data_masked[37] = data_i[37] & sel_one_hot_i[0];
assign data_masked[36] = data_i[36] & sel_one_hot_i[0];
assign data_masked[35] = data_i[35] & sel_one_hot_i[0];
assign data_masked[34] = data_i[34] & sel_one_hot_i[0];
assign data_masked[33] = data_i[33] & sel_one_hot_i[0];
assign data_masked[32] = data_i[32] & sel_one_hot_i[0];
assign data_masked[31] = data_i[31] & sel_one_hot_i[0];
assign data_masked[30] = data_i[30] & sel_one_hot_i[0];
assign data_masked[29] = data_i[29] & sel_one_hot_i[0];
assign data_masked[28] = data_i[28] & sel_one_hot_i[0];
assign data_masked[27] = data_i[27] & sel_one_hot_i[0];
assign data_masked[26] = data_i[26] & sel_one_hot_i[0];
assign data_masked[25] = data_i[25] & sel_one_hot_i[0];
assign data_masked[24] = data_i[24] & sel_one_hot_i[0];
assign data_masked[23] = data_i[23] & sel_one_hot_i[0];
assign data_masked[22] = data_i[22] & sel_one_hot_i[0];
assign data_masked[21] = data_i[21] & sel_one_hot_i[0];
assign data_masked[20] = data_i[20] & sel_one_hot_i[0];
assign data_masked[19] = data_i[19] & sel_one_hot_i[0];
assign data_masked[18] = data_i[18] & sel_one_hot_i[0];
assign data_masked[17] = data_i[17] & sel_one_hot_i[0];
assign data_masked[16] = data_i[16] & sel_one_hot_i[0];
assign data_masked[15] = data_i[15] & sel_one_hot_i[0];
assign data_masked[14] = data_i[14] & sel_one_hot_i[0];
assign data_masked[13] = data_i[13] & sel_one_hot_i[0];
assign data_masked[12] = data_i[12] & sel_one_hot_i[0];
assign data_masked[11] = data_i[11] & sel_one_hot_i[0];
assign data_masked[10] = data_i[10] & sel_one_hot_i[0];
assign data_masked[9] = data_i[9] & sel_one_hot_i[0];
assign data_masked[8] = data_i[8] & sel_one_hot_i[0];
assign data_masked[7] = data_i[7] & sel_one_hot_i[0];
assign data_masked[6] = data_i[6] & sel_one_hot_i[0];
assign data_masked[5] = data_i[5] & sel_one_hot_i[0];
assign data_masked[4] = data_i[4] & sel_one_hot_i[0];
assign data_masked[3] = data_i[3] & sel_one_hot_i[0];
assign data_masked[2] = data_i[2] & sel_one_hot_i[0];
assign data_masked[1] = data_i[1] & sel_one_hot_i[0];
assign data_masked[0] = data_i[0] & sel_one_hot_i[0];
assign data_masked[197] = data_i[197] & sel_one_hot_i[1];
assign data_masked[196] = data_i[196] & sel_one_hot_i[1];
assign data_masked[195] = data_i[195] & sel_one_hot_i[1];
assign data_masked[194] = data_i[194] & sel_one_hot_i[1];
assign data_masked[193] = data_i[193] & sel_one_hot_i[1];
assign data_masked[192] = data_i[192] & sel_one_hot_i[1];
assign data_masked[191] = data_i[191] & sel_one_hot_i[1];
assign data_masked[190] = data_i[190] & sel_one_hot_i[1];
assign data_masked[189] = data_i[189] & sel_one_hot_i[1];
assign data_masked[188] = data_i[188] & sel_one_hot_i[1];
assign data_masked[187] = data_i[187] & sel_one_hot_i[1];
assign data_masked[186] = data_i[186] & sel_one_hot_i[1];
assign data_masked[185] = data_i[185] & sel_one_hot_i[1];
assign data_masked[184] = data_i[184] & sel_one_hot_i[1];
assign data_masked[183] = data_i[183] & sel_one_hot_i[1];
assign data_masked[182] = data_i[182] & sel_one_hot_i[1];
assign data_masked[181] = data_i[181] & sel_one_hot_i[1];
assign data_masked[180] = data_i[180] & sel_one_hot_i[1];
assign data_masked[179] = data_i[179] & sel_one_hot_i[1];
assign data_masked[178] = data_i[178] & sel_one_hot_i[1];
assign data_masked[177] = data_i[177] & sel_one_hot_i[1];
assign data_masked[176] = data_i[176] & sel_one_hot_i[1];
assign data_masked[175] = data_i[175] & sel_one_hot_i[1];
assign data_masked[174] = data_i[174] & sel_one_hot_i[1];
assign data_masked[173] = data_i[173] & sel_one_hot_i[1];
assign data_masked[172] = data_i[172] & sel_one_hot_i[1];
assign data_masked[171] = data_i[171] & sel_one_hot_i[1];
assign data_masked[170] = data_i[170] & sel_one_hot_i[1];
assign data_masked[169] = data_i[169] & sel_one_hot_i[1];
assign data_masked[168] = data_i[168] & sel_one_hot_i[1];
assign data_masked[167] = data_i[167] & sel_one_hot_i[1];
assign data_masked[166] = data_i[166] & sel_one_hot_i[1];
assign data_masked[165] = data_i[165] & sel_one_hot_i[1];
assign data_masked[164] = data_i[164] & sel_one_hot_i[1];
assign data_masked[163] = data_i[163] & sel_one_hot_i[1];
assign data_masked[162] = data_i[162] & sel_one_hot_i[1];
assign data_masked[161] = data_i[161] & sel_one_hot_i[1];
assign data_masked[160] = data_i[160] & sel_one_hot_i[1];
assign data_masked[159] = data_i[159] & sel_one_hot_i[1];
assign data_masked[158] = data_i[158] & sel_one_hot_i[1];
assign data_masked[157] = data_i[157] & sel_one_hot_i[1];
assign data_masked[156] = data_i[156] & sel_one_hot_i[1];
assign data_masked[155] = data_i[155] & sel_one_hot_i[1];
assign data_masked[154] = data_i[154] & sel_one_hot_i[1];
assign data_masked[153] = data_i[153] & sel_one_hot_i[1];
assign data_masked[152] = data_i[152] & sel_one_hot_i[1];
assign data_masked[151] = data_i[151] & sel_one_hot_i[1];
assign data_masked[150] = data_i[150] & sel_one_hot_i[1];
assign data_masked[149] = data_i[149] & sel_one_hot_i[1];
assign data_masked[148] = data_i[148] & sel_one_hot_i[1];
assign data_masked[147] = data_i[147] & sel_one_hot_i[1];
assign data_masked[146] = data_i[146] & sel_one_hot_i[1];
assign data_masked[145] = data_i[145] & sel_one_hot_i[1];
assign data_masked[144] = data_i[144] & sel_one_hot_i[1];
assign data_masked[143] = data_i[143] & sel_one_hot_i[1];
assign data_masked[142] = data_i[142] & sel_one_hot_i[1];
assign data_masked[141] = data_i[141] & sel_one_hot_i[1];
assign data_masked[140] = data_i[140] & sel_one_hot_i[1];
assign data_masked[139] = data_i[139] & sel_one_hot_i[1];
assign data_masked[138] = data_i[138] & sel_one_hot_i[1];
assign data_masked[137] = data_i[137] & sel_one_hot_i[1];
assign data_masked[136] = data_i[136] & sel_one_hot_i[1];
assign data_masked[135] = data_i[135] & sel_one_hot_i[1];
assign data_masked[134] = data_i[134] & sel_one_hot_i[1];
assign data_masked[133] = data_i[133] & sel_one_hot_i[1];
assign data_masked[132] = data_i[132] & sel_one_hot_i[1];
assign data_masked[131] = data_i[131] & sel_one_hot_i[1];
assign data_masked[130] = data_i[130] & sel_one_hot_i[1];
assign data_masked[129] = data_i[129] & sel_one_hot_i[1];
assign data_masked[128] = data_i[128] & sel_one_hot_i[1];
assign data_masked[127] = data_i[127] & sel_one_hot_i[1];
assign data_masked[126] = data_i[126] & sel_one_hot_i[1];
assign data_masked[125] = data_i[125] & sel_one_hot_i[1];
assign data_masked[124] = data_i[124] & sel_one_hot_i[1];
assign data_masked[123] = data_i[123] & sel_one_hot_i[1];
assign data_masked[122] = data_i[122] & sel_one_hot_i[1];
assign data_masked[121] = data_i[121] & sel_one_hot_i[1];
assign data_masked[120] = data_i[120] & sel_one_hot_i[1];
assign data_masked[119] = data_i[119] & sel_one_hot_i[1];
assign data_masked[118] = data_i[118] & sel_one_hot_i[1];
assign data_masked[117] = data_i[117] & sel_one_hot_i[1];
assign data_masked[116] = data_i[116] & sel_one_hot_i[1];
assign data_masked[115] = data_i[115] & sel_one_hot_i[1];
assign data_masked[114] = data_i[114] & sel_one_hot_i[1];
assign data_masked[113] = data_i[113] & sel_one_hot_i[1];
assign data_masked[112] = data_i[112] & sel_one_hot_i[1];
assign data_masked[111] = data_i[111] & sel_one_hot_i[1];
assign data_masked[110] = data_i[110] & sel_one_hot_i[1];
assign data_masked[109] = data_i[109] & sel_one_hot_i[1];
assign data_masked[108] = data_i[108] & sel_one_hot_i[1];
assign data_masked[107] = data_i[107] & sel_one_hot_i[1];
assign data_masked[106] = data_i[106] & sel_one_hot_i[1];
assign data_masked[105] = data_i[105] & sel_one_hot_i[1];
assign data_masked[104] = data_i[104] & sel_one_hot_i[1];
assign data_masked[103] = data_i[103] & sel_one_hot_i[1];
assign data_masked[102] = data_i[102] & sel_one_hot_i[1];
assign data_masked[101] = data_i[101] & sel_one_hot_i[1];
assign data_masked[100] = data_i[100] & sel_one_hot_i[1];
assign data_masked[99] = data_i[99] & sel_one_hot_i[1];
assign data_masked[296] = data_i[296] & sel_one_hot_i[2];
assign data_masked[295] = data_i[295] & sel_one_hot_i[2];
assign data_masked[294] = data_i[294] & sel_one_hot_i[2];
assign data_masked[293] = data_i[293] & sel_one_hot_i[2];
assign data_masked[292] = data_i[292] & sel_one_hot_i[2];
assign data_masked[291] = data_i[291] & sel_one_hot_i[2];
assign data_masked[290] = data_i[290] & sel_one_hot_i[2];
assign data_masked[289] = data_i[289] & sel_one_hot_i[2];
assign data_masked[288] = data_i[288] & sel_one_hot_i[2];
assign data_masked[287] = data_i[287] & sel_one_hot_i[2];
assign data_masked[286] = data_i[286] & sel_one_hot_i[2];
assign data_masked[285] = data_i[285] & sel_one_hot_i[2];
assign data_masked[284] = data_i[284] & sel_one_hot_i[2];
assign data_masked[283] = data_i[283] & sel_one_hot_i[2];
assign data_masked[282] = data_i[282] & sel_one_hot_i[2];
assign data_masked[281] = data_i[281] & sel_one_hot_i[2];
assign data_masked[280] = data_i[280] & sel_one_hot_i[2];
assign data_masked[279] = data_i[279] & sel_one_hot_i[2];
assign data_masked[278] = data_i[278] & sel_one_hot_i[2];
assign data_masked[277] = data_i[277] & sel_one_hot_i[2];
assign data_masked[276] = data_i[276] & sel_one_hot_i[2];
assign data_masked[275] = data_i[275] & sel_one_hot_i[2];
assign data_masked[274] = data_i[274] & sel_one_hot_i[2];
assign data_masked[273] = data_i[273] & sel_one_hot_i[2];
assign data_masked[272] = data_i[272] & sel_one_hot_i[2];
assign data_masked[271] = data_i[271] & sel_one_hot_i[2];
assign data_masked[270] = data_i[270] & sel_one_hot_i[2];
assign data_masked[269] = data_i[269] & sel_one_hot_i[2];
assign data_masked[268] = data_i[268] & sel_one_hot_i[2];
assign data_masked[267] = data_i[267] & sel_one_hot_i[2];
assign data_masked[266] = data_i[266] & sel_one_hot_i[2];
assign data_masked[265] = data_i[265] & sel_one_hot_i[2];
assign data_masked[264] = data_i[264] & sel_one_hot_i[2];
assign data_masked[263] = data_i[263] & sel_one_hot_i[2];
assign data_masked[262] = data_i[262] & sel_one_hot_i[2];
assign data_masked[261] = data_i[261] & sel_one_hot_i[2];
assign data_masked[260] = data_i[260] & sel_one_hot_i[2];
assign data_masked[259] = data_i[259] & sel_one_hot_i[2];
assign data_masked[258] = data_i[258] & sel_one_hot_i[2];
assign data_masked[257] = data_i[257] & sel_one_hot_i[2];
assign data_masked[256] = data_i[256] & sel_one_hot_i[2];
assign data_masked[255] = data_i[255] & sel_one_hot_i[2];
assign data_masked[254] = data_i[254] & sel_one_hot_i[2];
assign data_masked[253] = data_i[253] & sel_one_hot_i[2];
assign data_masked[252] = data_i[252] & sel_one_hot_i[2];
assign data_masked[251] = data_i[251] & sel_one_hot_i[2];
assign data_masked[250] = data_i[250] & sel_one_hot_i[2];
assign data_masked[249] = data_i[249] & sel_one_hot_i[2];
assign data_masked[248] = data_i[248] & sel_one_hot_i[2];
assign data_masked[247] = data_i[247] & sel_one_hot_i[2];
assign data_masked[246] = data_i[246] & sel_one_hot_i[2];
assign data_masked[245] = data_i[245] & sel_one_hot_i[2];
assign data_masked[244] = data_i[244] & sel_one_hot_i[2];
assign data_masked[243] = data_i[243] & sel_one_hot_i[2];
assign data_masked[242] = data_i[242] & sel_one_hot_i[2];
assign data_masked[241] = data_i[241] & sel_one_hot_i[2];
assign data_masked[240] = data_i[240] & sel_one_hot_i[2];
assign data_masked[239] = data_i[239] & sel_one_hot_i[2];
assign data_masked[238] = data_i[238] & sel_one_hot_i[2];
assign data_masked[237] = data_i[237] & sel_one_hot_i[2];
assign data_masked[236] = data_i[236] & sel_one_hot_i[2];
assign data_masked[235] = data_i[235] & sel_one_hot_i[2];
assign data_masked[234] = data_i[234] & sel_one_hot_i[2];
assign data_masked[233] = data_i[233] & sel_one_hot_i[2];
assign data_masked[232] = data_i[232] & sel_one_hot_i[2];
assign data_masked[231] = data_i[231] & sel_one_hot_i[2];
assign data_masked[230] = data_i[230] & sel_one_hot_i[2];
assign data_masked[229] = data_i[229] & sel_one_hot_i[2];
assign data_masked[228] = data_i[228] & sel_one_hot_i[2];
assign data_masked[227] = data_i[227] & sel_one_hot_i[2];
assign data_masked[226] = data_i[226] & sel_one_hot_i[2];
assign data_masked[225] = data_i[225] & sel_one_hot_i[2];
assign data_masked[224] = data_i[224] & sel_one_hot_i[2];
assign data_masked[223] = data_i[223] & sel_one_hot_i[2];
assign data_masked[222] = data_i[222] & sel_one_hot_i[2];
assign data_masked[221] = data_i[221] & sel_one_hot_i[2];
assign data_masked[220] = data_i[220] & sel_one_hot_i[2];
assign data_masked[219] = data_i[219] & sel_one_hot_i[2];
assign data_masked[218] = data_i[218] & sel_one_hot_i[2];
assign data_masked[217] = data_i[217] & sel_one_hot_i[2];
assign data_masked[216] = data_i[216] & sel_one_hot_i[2];
assign data_masked[215] = data_i[215] & sel_one_hot_i[2];
assign data_masked[214] = data_i[214] & sel_one_hot_i[2];
assign data_masked[213] = data_i[213] & sel_one_hot_i[2];
assign data_masked[212] = data_i[212] & sel_one_hot_i[2];
assign data_masked[211] = data_i[211] & sel_one_hot_i[2];
assign data_masked[210] = data_i[210] & sel_one_hot_i[2];
assign data_masked[209] = data_i[209] & sel_one_hot_i[2];
assign data_masked[208] = data_i[208] & sel_one_hot_i[2];
assign data_masked[207] = data_i[207] & sel_one_hot_i[2];
assign data_masked[206] = data_i[206] & sel_one_hot_i[2];
assign data_masked[205] = data_i[205] & sel_one_hot_i[2];
assign data_masked[204] = data_i[204] & sel_one_hot_i[2];
assign data_masked[203] = data_i[203] & sel_one_hot_i[2];
assign data_masked[202] = data_i[202] & sel_one_hot_i[2];
assign data_masked[201] = data_i[201] & sel_one_hot_i[2];
assign data_masked[200] = data_i[200] & sel_one_hot_i[2];
assign data_masked[199] = data_i[199] & sel_one_hot_i[2];
assign data_masked[198] = data_i[198] & sel_one_hot_i[2];
assign data_masked[395] = data_i[395] & sel_one_hot_i[3];
assign data_masked[394] = data_i[394] & sel_one_hot_i[3];
assign data_masked[393] = data_i[393] & sel_one_hot_i[3];
assign data_masked[392] = data_i[392] & sel_one_hot_i[3];
assign data_masked[391] = data_i[391] & sel_one_hot_i[3];
assign data_masked[390] = data_i[390] & sel_one_hot_i[3];
assign data_masked[389] = data_i[389] & sel_one_hot_i[3];
assign data_masked[388] = data_i[388] & sel_one_hot_i[3];
assign data_masked[387] = data_i[387] & sel_one_hot_i[3];
assign data_masked[386] = data_i[386] & sel_one_hot_i[3];
assign data_masked[385] = data_i[385] & sel_one_hot_i[3];
assign data_masked[384] = data_i[384] & sel_one_hot_i[3];
assign data_masked[383] = data_i[383] & sel_one_hot_i[3];
assign data_masked[382] = data_i[382] & sel_one_hot_i[3];
assign data_masked[381] = data_i[381] & sel_one_hot_i[3];
assign data_masked[380] = data_i[380] & sel_one_hot_i[3];
assign data_masked[379] = data_i[379] & sel_one_hot_i[3];
assign data_masked[378] = data_i[378] & sel_one_hot_i[3];
assign data_masked[377] = data_i[377] & sel_one_hot_i[3];
assign data_masked[376] = data_i[376] & sel_one_hot_i[3];
assign data_masked[375] = data_i[375] & sel_one_hot_i[3];
assign data_masked[374] = data_i[374] & sel_one_hot_i[3];
assign data_masked[373] = data_i[373] & sel_one_hot_i[3];
assign data_masked[372] = data_i[372] & sel_one_hot_i[3];
assign data_masked[371] = data_i[371] & sel_one_hot_i[3];
assign data_masked[370] = data_i[370] & sel_one_hot_i[3];
assign data_masked[369] = data_i[369] & sel_one_hot_i[3];
assign data_masked[368] = data_i[368] & sel_one_hot_i[3];
assign data_masked[367] = data_i[367] & sel_one_hot_i[3];
assign data_masked[366] = data_i[366] & sel_one_hot_i[3];
assign data_masked[365] = data_i[365] & sel_one_hot_i[3];
assign data_masked[364] = data_i[364] & sel_one_hot_i[3];
assign data_masked[363] = data_i[363] & sel_one_hot_i[3];
assign data_masked[362] = data_i[362] & sel_one_hot_i[3];
assign data_masked[361] = data_i[361] & sel_one_hot_i[3];
assign data_masked[360] = data_i[360] & sel_one_hot_i[3];
assign data_masked[359] = data_i[359] & sel_one_hot_i[3];
assign data_masked[358] = data_i[358] & sel_one_hot_i[3];
assign data_masked[357] = data_i[357] & sel_one_hot_i[3];
assign data_masked[356] = data_i[356] & sel_one_hot_i[3];
assign data_masked[355] = data_i[355] & sel_one_hot_i[3];
assign data_masked[354] = data_i[354] & sel_one_hot_i[3];
assign data_masked[353] = data_i[353] & sel_one_hot_i[3];
assign data_masked[352] = data_i[352] & sel_one_hot_i[3];
assign data_masked[351] = data_i[351] & sel_one_hot_i[3];
assign data_masked[350] = data_i[350] & sel_one_hot_i[3];
assign data_masked[349] = data_i[349] & sel_one_hot_i[3];
assign data_masked[348] = data_i[348] & sel_one_hot_i[3];
assign data_masked[347] = data_i[347] & sel_one_hot_i[3];
assign data_masked[346] = data_i[346] & sel_one_hot_i[3];
assign data_masked[345] = data_i[345] & sel_one_hot_i[3];
assign data_masked[344] = data_i[344] & sel_one_hot_i[3];
assign data_masked[343] = data_i[343] & sel_one_hot_i[3];
assign data_masked[342] = data_i[342] & sel_one_hot_i[3];
assign data_masked[341] = data_i[341] & sel_one_hot_i[3];
assign data_masked[340] = data_i[340] & sel_one_hot_i[3];
assign data_masked[339] = data_i[339] & sel_one_hot_i[3];
assign data_masked[338] = data_i[338] & sel_one_hot_i[3];
assign data_masked[337] = data_i[337] & sel_one_hot_i[3];
assign data_masked[336] = data_i[336] & sel_one_hot_i[3];
assign data_masked[335] = data_i[335] & sel_one_hot_i[3];
assign data_masked[334] = data_i[334] & sel_one_hot_i[3];
assign data_masked[333] = data_i[333] & sel_one_hot_i[3];
assign data_masked[332] = data_i[332] & sel_one_hot_i[3];
assign data_masked[331] = data_i[331] & sel_one_hot_i[3];
assign data_masked[330] = data_i[330] & sel_one_hot_i[3];
assign data_masked[329] = data_i[329] & sel_one_hot_i[3];
assign data_masked[328] = data_i[328] & sel_one_hot_i[3];
assign data_masked[327] = data_i[327] & sel_one_hot_i[3];
assign data_masked[326] = data_i[326] & sel_one_hot_i[3];
assign data_masked[325] = data_i[325] & sel_one_hot_i[3];
assign data_masked[324] = data_i[324] & sel_one_hot_i[3];
assign data_masked[323] = data_i[323] & sel_one_hot_i[3];
assign data_masked[322] = data_i[322] & sel_one_hot_i[3];
assign data_masked[321] = data_i[321] & sel_one_hot_i[3];
assign data_masked[320] = data_i[320] & sel_one_hot_i[3];
assign data_masked[319] = data_i[319] & sel_one_hot_i[3];
assign data_masked[318] = data_i[318] & sel_one_hot_i[3];
assign data_masked[317] = data_i[317] & sel_one_hot_i[3];
assign data_masked[316] = data_i[316] & sel_one_hot_i[3];
assign data_masked[315] = data_i[315] & sel_one_hot_i[3];
assign data_masked[314] = data_i[314] & sel_one_hot_i[3];
assign data_masked[313] = data_i[313] & sel_one_hot_i[3];
assign data_masked[312] = data_i[312] & sel_one_hot_i[3];
assign data_masked[311] = data_i[311] & sel_one_hot_i[3];
assign data_masked[310] = data_i[310] & sel_one_hot_i[3];
assign data_masked[309] = data_i[309] & sel_one_hot_i[3];
assign data_masked[308] = data_i[308] & sel_one_hot_i[3];
assign data_masked[307] = data_i[307] & sel_one_hot_i[3];
assign data_masked[306] = data_i[306] & sel_one_hot_i[3];
assign data_masked[305] = data_i[305] & sel_one_hot_i[3];
assign data_masked[304] = data_i[304] & sel_one_hot_i[3];
assign data_masked[303] = data_i[303] & sel_one_hot_i[3];
assign data_masked[302] = data_i[302] & sel_one_hot_i[3];
assign data_masked[301] = data_i[301] & sel_one_hot_i[3];
assign data_masked[300] = data_i[300] & sel_one_hot_i[3];
assign data_masked[299] = data_i[299] & sel_one_hot_i[3];
assign data_masked[298] = data_i[298] & sel_one_hot_i[3];
assign data_masked[297] = data_i[297] & sel_one_hot_i[3];
assign data_o[0] = N1 | data_masked[0];
assign N1 = N0 | data_masked[99];
assign N0 = data_masked[297] | data_masked[198];
assign data_o[1] = N3 | data_masked[1];
assign N3 = N2 | data_masked[100];
assign N2 = data_masked[298] | data_masked[199];
assign data_o[2] = N5 | data_masked[2];
assign N5 = N4 | data_masked[101];
assign N4 = data_masked[299] | data_masked[200];
assign data_o[3] = N7 | data_masked[3];
assign N7 = N6 | data_masked[102];
assign N6 = data_masked[300] | data_masked[201];
assign data_o[4] = N9 | data_masked[4];
assign N9 = N8 | data_masked[103];
assign N8 = data_masked[301] | data_masked[202];
assign data_o[5] = N11 | data_masked[5];
assign N11 = N10 | data_masked[104];
assign N10 = data_masked[302] | data_masked[203];
assign data_o[6] = N13 | data_masked[6];
assign N13 = N12 | data_masked[105];
assign N12 = data_masked[303] | data_masked[204];
assign data_o[7] = N15 | data_masked[7];
assign N15 = N14 | data_masked[106];
assign N14 = data_masked[304] | data_masked[205];
assign data_o[8] = N17 | data_masked[8];
assign N17 = N16 | data_masked[107];
assign N16 = data_masked[305] | data_masked[206];
assign data_o[9] = N19 | data_masked[9];
assign N19 = N18 | data_masked[108];
assign N18 = data_masked[306] | data_masked[207];
assign data_o[10] = N21 | data_masked[10];
assign N21 = N20 | data_masked[109];
assign N20 = data_masked[307] | data_masked[208];
assign data_o[11] = N23 | data_masked[11];
assign N23 = N22 | data_masked[110];
assign N22 = data_masked[308] | data_masked[209];
assign data_o[12] = N25 | data_masked[12];
assign N25 = N24 | data_masked[111];
assign N24 = data_masked[309] | data_masked[210];
assign data_o[13] = N27 | data_masked[13];
assign N27 = N26 | data_masked[112];
assign N26 = data_masked[310] | data_masked[211];
assign data_o[14] = N29 | data_masked[14];
assign N29 = N28 | data_masked[113];
assign N28 = data_masked[311] | data_masked[212];
assign data_o[15] = N31 | data_masked[15];
assign N31 = N30 | data_masked[114];
assign N30 = data_masked[312] | data_masked[213];
assign data_o[16] = N33 | data_masked[16];
assign N33 = N32 | data_masked[115];
assign N32 = data_masked[313] | data_masked[214];
assign data_o[17] = N35 | data_masked[17];
assign N35 = N34 | data_masked[116];
assign N34 = data_masked[314] | data_masked[215];
assign data_o[18] = N37 | data_masked[18];
assign N37 = N36 | data_masked[117];
assign N36 = data_masked[315] | data_masked[216];
assign data_o[19] = N39 | data_masked[19];
assign N39 = N38 | data_masked[118];
assign N38 = data_masked[316] | data_masked[217];
assign data_o[20] = N41 | data_masked[20];
assign N41 = N40 | data_masked[119];
assign N40 = data_masked[317] | data_masked[218];
assign data_o[21] = N43 | data_masked[21];
assign N43 = N42 | data_masked[120];
assign N42 = data_masked[318] | data_masked[219];
assign data_o[22] = N45 | data_masked[22];
assign N45 = N44 | data_masked[121];
assign N44 = data_masked[319] | data_masked[220];
assign data_o[23] = N47 | data_masked[23];
assign N47 = N46 | data_masked[122];
assign N46 = data_masked[320] | data_masked[221];
assign data_o[24] = N49 | data_masked[24];
assign N49 = N48 | data_masked[123];
assign N48 = data_masked[321] | data_masked[222];
assign data_o[25] = N51 | data_masked[25];
assign N51 = N50 | data_masked[124];
assign N50 = data_masked[322] | data_masked[223];
assign data_o[26] = N53 | data_masked[26];
assign N53 = N52 | data_masked[125];
assign N52 = data_masked[323] | data_masked[224];
assign data_o[27] = N55 | data_masked[27];
assign N55 = N54 | data_masked[126];
assign N54 = data_masked[324] | data_masked[225];
assign data_o[28] = N57 | data_masked[28];
assign N57 = N56 | data_masked[127];
assign N56 = data_masked[325] | data_masked[226];
assign data_o[29] = N59 | data_masked[29];
assign N59 = N58 | data_masked[128];
assign N58 = data_masked[326] | data_masked[227];
assign data_o[30] = N61 | data_masked[30];
assign N61 = N60 | data_masked[129];
assign N60 = data_masked[327] | data_masked[228];
assign data_o[31] = N63 | data_masked[31];
assign N63 = N62 | data_masked[130];
assign N62 = data_masked[328] | data_masked[229];
assign data_o[32] = N65 | data_masked[32];
assign N65 = N64 | data_masked[131];
assign N64 = data_masked[329] | data_masked[230];
assign data_o[33] = N67 | data_masked[33];
assign N67 = N66 | data_masked[132];
assign N66 = data_masked[330] | data_masked[231];
assign data_o[34] = N69 | data_masked[34];
assign N69 = N68 | data_masked[133];
assign N68 = data_masked[331] | data_masked[232];
assign data_o[35] = N71 | data_masked[35];
assign N71 = N70 | data_masked[134];
assign N70 = data_masked[332] | data_masked[233];
assign data_o[36] = N73 | data_masked[36];
assign N73 = N72 | data_masked[135];
assign N72 = data_masked[333] | data_masked[234];
assign data_o[37] = N75 | data_masked[37];
assign N75 = N74 | data_masked[136];
assign N74 = data_masked[334] | data_masked[235];
assign data_o[38] = N77 | data_masked[38];
assign N77 = N76 | data_masked[137];
assign N76 = data_masked[335] | data_masked[236];
assign data_o[39] = N79 | data_masked[39];
assign N79 = N78 | data_masked[138];
assign N78 = data_masked[336] | data_masked[237];
assign data_o[40] = N81 | data_masked[40];
assign N81 = N80 | data_masked[139];
assign N80 = data_masked[337] | data_masked[238];
assign data_o[41] = N83 | data_masked[41];
assign N83 = N82 | data_masked[140];
assign N82 = data_masked[338] | data_masked[239];
assign data_o[42] = N85 | data_masked[42];
assign N85 = N84 | data_masked[141];
assign N84 = data_masked[339] | data_masked[240];
assign data_o[43] = N87 | data_masked[43];
assign N87 = N86 | data_masked[142];
assign N86 = data_masked[340] | data_masked[241];
assign data_o[44] = N89 | data_masked[44];
assign N89 = N88 | data_masked[143];
assign N88 = data_masked[341] | data_masked[242];
assign data_o[45] = N91 | data_masked[45];
assign N91 = N90 | data_masked[144];
assign N90 = data_masked[342] | data_masked[243];
assign data_o[46] = N93 | data_masked[46];
assign N93 = N92 | data_masked[145];
assign N92 = data_masked[343] | data_masked[244];
assign data_o[47] = N95 | data_masked[47];
assign N95 = N94 | data_masked[146];
assign N94 = data_masked[344] | data_masked[245];
assign data_o[48] = N97 | data_masked[48];
assign N97 = N96 | data_masked[147];
assign N96 = data_masked[345] | data_masked[246];
assign data_o[49] = N99 | data_masked[49];
assign N99 = N98 | data_masked[148];
assign N98 = data_masked[346] | data_masked[247];
assign data_o[50] = N101 | data_masked[50];
assign N101 = N100 | data_masked[149];
assign N100 = data_masked[347] | data_masked[248];
assign data_o[51] = N103 | data_masked[51];
assign N103 = N102 | data_masked[150];
assign N102 = data_masked[348] | data_masked[249];
assign data_o[52] = N105 | data_masked[52];
assign N105 = N104 | data_masked[151];
assign N104 = data_masked[349] | data_masked[250];
assign data_o[53] = N107 | data_masked[53];
assign N107 = N106 | data_masked[152];
assign N106 = data_masked[350] | data_masked[251];
assign data_o[54] = N109 | data_masked[54];
assign N109 = N108 | data_masked[153];
assign N108 = data_masked[351] | data_masked[252];
assign data_o[55] = N111 | data_masked[55];
assign N111 = N110 | data_masked[154];
assign N110 = data_masked[352] | data_masked[253];
assign data_o[56] = N113 | data_masked[56];
assign N113 = N112 | data_masked[155];
assign N112 = data_masked[353] | data_masked[254];
assign data_o[57] = N115 | data_masked[57];
assign N115 = N114 | data_masked[156];
assign N114 = data_masked[354] | data_masked[255];
assign data_o[58] = N117 | data_masked[58];
assign N117 = N116 | data_masked[157];
assign N116 = data_masked[355] | data_masked[256];
assign data_o[59] = N119 | data_masked[59];
assign N119 = N118 | data_masked[158];
assign N118 = data_masked[356] | data_masked[257];
assign data_o[60] = N121 | data_masked[60];
assign N121 = N120 | data_masked[159];
assign N120 = data_masked[357] | data_masked[258];
assign data_o[61] = N123 | data_masked[61];
assign N123 = N122 | data_masked[160];
assign N122 = data_masked[358] | data_masked[259];
assign data_o[62] = N125 | data_masked[62];
assign N125 = N124 | data_masked[161];
assign N124 = data_masked[359] | data_masked[260];
assign data_o[63] = N127 | data_masked[63];
assign N127 = N126 | data_masked[162];
assign N126 = data_masked[360] | data_masked[261];
assign data_o[64] = N129 | data_masked[64];
assign N129 = N128 | data_masked[163];
assign N128 = data_masked[361] | data_masked[262];
assign data_o[65] = N131 | data_masked[65];
assign N131 = N130 | data_masked[164];
assign N130 = data_masked[362] | data_masked[263];
assign data_o[66] = N133 | data_masked[66];
assign N133 = N132 | data_masked[165];
assign N132 = data_masked[363] | data_masked[264];
assign data_o[67] = N135 | data_masked[67];
assign N135 = N134 | data_masked[166];
assign N134 = data_masked[364] | data_masked[265];
assign data_o[68] = N137 | data_masked[68];
assign N137 = N136 | data_masked[167];
assign N136 = data_masked[365] | data_masked[266];
assign data_o[69] = N139 | data_masked[69];
assign N139 = N138 | data_masked[168];
assign N138 = data_masked[366] | data_masked[267];
assign data_o[70] = N141 | data_masked[70];
assign N141 = N140 | data_masked[169];
assign N140 = data_masked[367] | data_masked[268];
assign data_o[71] = N143 | data_masked[71];
assign N143 = N142 | data_masked[170];
assign N142 = data_masked[368] | data_masked[269];
assign data_o[72] = N145 | data_masked[72];
assign N145 = N144 | data_masked[171];
assign N144 = data_masked[369] | data_masked[270];
assign data_o[73] = N147 | data_masked[73];
assign N147 = N146 | data_masked[172];
assign N146 = data_masked[370] | data_masked[271];
assign data_o[74] = N149 | data_masked[74];
assign N149 = N148 | data_masked[173];
assign N148 = data_masked[371] | data_masked[272];
assign data_o[75] = N151 | data_masked[75];
assign N151 = N150 | data_masked[174];
assign N150 = data_masked[372] | data_masked[273];
assign data_o[76] = N153 | data_masked[76];
assign N153 = N152 | data_masked[175];
assign N152 = data_masked[373] | data_masked[274];
assign data_o[77] = N155 | data_masked[77];
assign N155 = N154 | data_masked[176];
assign N154 = data_masked[374] | data_masked[275];
assign data_o[78] = N157 | data_masked[78];
assign N157 = N156 | data_masked[177];
assign N156 = data_masked[375] | data_masked[276];
assign data_o[79] = N159 | data_masked[79];
assign N159 = N158 | data_masked[178];
assign N158 = data_masked[376] | data_masked[277];
assign data_o[80] = N161 | data_masked[80];
assign N161 = N160 | data_masked[179];
assign N160 = data_masked[377] | data_masked[278];
assign data_o[81] = N163 | data_masked[81];
assign N163 = N162 | data_masked[180];
assign N162 = data_masked[378] | data_masked[279];
assign data_o[82] = N165 | data_masked[82];
assign N165 = N164 | data_masked[181];
assign N164 = data_masked[379] | data_masked[280];
assign data_o[83] = N167 | data_masked[83];
assign N167 = N166 | data_masked[182];
assign N166 = data_masked[380] | data_masked[281];
assign data_o[84] = N169 | data_masked[84];
assign N169 = N168 | data_masked[183];
assign N168 = data_masked[381] | data_masked[282];
assign data_o[85] = N171 | data_masked[85];
assign N171 = N170 | data_masked[184];
assign N170 = data_masked[382] | data_masked[283];
assign data_o[86] = N173 | data_masked[86];
assign N173 = N172 | data_masked[185];
assign N172 = data_masked[383] | data_masked[284];
assign data_o[87] = N175 | data_masked[87];
assign N175 = N174 | data_masked[186];
assign N174 = data_masked[384] | data_masked[285];
assign data_o[88] = N177 | data_masked[88];
assign N177 = N176 | data_masked[187];
assign N176 = data_masked[385] | data_masked[286];
assign data_o[89] = N179 | data_masked[89];
assign N179 = N178 | data_masked[188];
assign N178 = data_masked[386] | data_masked[287];
assign data_o[90] = N181 | data_masked[90];
assign N181 = N180 | data_masked[189];
assign N180 = data_masked[387] | data_masked[288];
assign data_o[91] = N183 | data_masked[91];
assign N183 = N182 | data_masked[190];
assign N182 = data_masked[388] | data_masked[289];
assign data_o[92] = N185 | data_masked[92];
assign N185 = N184 | data_masked[191];
assign N184 = data_masked[389] | data_masked[290];
assign data_o[93] = N187 | data_masked[93];
assign N187 = N186 | data_masked[192];
assign N186 = data_masked[390] | data_masked[291];
assign data_o[94] = N189 | data_masked[94];
assign N189 = N188 | data_masked[193];
assign N188 = data_masked[391] | data_masked[292];
assign data_o[95] = N191 | data_masked[95];
assign N191 = N190 | data_masked[194];
assign N190 = data_masked[392] | data_masked[293];
assign data_o[96] = N193 | data_masked[96];
assign N193 = N192 | data_masked[195];
assign N192 = data_masked[393] | data_masked[294];
assign data_o[97] = N195 | data_masked[97];
assign N195 = N194 | data_masked[196];
assign N194 = data_masked[394] | data_masked[295];
assign data_o[98] = N197 | data_masked[98];
assign N197 = N196 | data_masked[197];
assign N196 = data_masked[395] | data_masked[296];
endmodule
|
module bsg_mux_one_hot_width_p136_els_p4
(
data_i,
sel_one_hot_i,
data_o
);
input [543:0] data_i;
input [3:0] sel_one_hot_i;
output [135:0] data_o;
wire [135:0] data_o;
wire N0,N1,N2,N3,N4,N5,N6,N7,N8,N9,N10,N11,N12,N13,N14,N15,N16,N17,N18,N19,N20,N21,
N22,N23,N24,N25,N26,N27,N28,N29,N30,N31,N32,N33,N34,N35,N36,N37,N38,N39,N40,N41,
N42,N43,N44,N45,N46,N47,N48,N49,N50,N51,N52,N53,N54,N55,N56,N57,N58,N59,N60,N61,
N62,N63,N64,N65,N66,N67,N68,N69,N70,N71,N72,N73,N74,N75,N76,N77,N78,N79,N80,N81,
N82,N83,N84,N85,N86,N87,N88,N89,N90,N91,N92,N93,N94,N95,N96,N97,N98,N99,N100,N101,
N102,N103,N104,N105,N106,N107,N108,N109,N110,N111,N112,N113,N114,N115,N116,N117,
N118,N119,N120,N121,N122,N123,N124,N125,N126,N127,N128,N129,N130,N131,N132,N133,
N134,N135,N136,N137,N138,N139,N140,N141,N142,N143,N144,N145,N146,N147,N148,N149,
N150,N151,N152,N153,N154,N155,N156,N157,N158,N159,N160,N161,N162,N163,N164,N165,
N166,N167,N168,N169,N170,N171,N172,N173,N174,N175,N176,N177,N178,N179,N180,N181,
N182,N183,N184,N185,N186,N187,N188,N189,N190,N191,N192,N193,N194,N195,N196,N197,
N198,N199,N200,N201,N202,N203,N204,N205,N206,N207,N208,N209,N210,N211,N212,N213,
N214,N215,N216,N217,N218,N219,N220,N221,N222,N223,N224,N225,N226,N227,N228,N229,
N230,N231,N232,N233,N234,N235,N236,N237,N238,N239,N240,N241,N242,N243,N244,N245,
N246,N247,N248,N249,N250,N251,N252,N253,N254,N255,N256,N257,N258,N259,N260,N261,
N262,N263,N264,N265,N266,N267,N268,N269,N270,N271;
wire [543:0] data_masked;
assign data_masked[135] = data_i[135] & sel_one_hot_i[0];
assign data_masked[134] = data_i[134] & sel_one_hot_i[0];
assign data_masked[133] = data_i[133] & sel_one_hot_i[0];
assign data_masked[132] = data_i[132] & sel_one_hot_i[0];
assign data_masked[131] = data_i[131] & sel_one_hot_i[0];
assign data_masked[130] = data_i[130] & sel_one_hot_i[0];
assign data_masked[129] = data_i[129] & sel_one_hot_i[0];
assign data_masked[128] = data_i[128] & sel_one_hot_i[0];
assign data_masked[127] = data_i[127] & sel_one_hot_i[0];
assign data_masked[126] = data_i[126] & sel_one_hot_i[0];
assign data_masked[125] = data_i[125] & sel_one_hot_i[0];
assign data_masked[124] = data_i[124] & sel_one_hot_i[0];
assign data_masked[123] = data_i[123] & sel_one_hot_i[0];
assign data_masked[122] = data_i[122] & sel_one_hot_i[0];
assign data_masked[121] = data_i[121] & sel_one_hot_i[0];
assign data_masked[120] = data_i[120] & sel_one_hot_i[0];
assign data_masked[119] = data_i[119] & sel_one_hot_i[0];
assign data_masked[118] = data_i[118] & sel_one_hot_i[0];
assign data_masked[117] = data_i[117] & sel_one_hot_i[0];
assign data_masked[116] = data_i[116] & sel_one_hot_i[0];
assign data_masked[115] = data_i[115] & sel_one_hot_i[0];
assign data_masked[114] = data_i[114] & sel_one_hot_i[0];
assign data_masked[113] = data_i[113] & sel_one_hot_i[0];
assign data_masked[112] = data_i[112] & sel_one_hot_i[0];
assign data_masked[111] = data_i[111] & sel_one_hot_i[0];
assign data_masked[110] = data_i[110] & sel_one_hot_i[0];
assign data_masked[109] = data_i[109] & sel_one_hot_i[0];
assign data_masked[108] = data_i[108] & sel_one_hot_i[0];
assign data_masked[107] = data_i[107] & sel_one_hot_i[0];
assign data_masked[106] = data_i[106] & sel_one_hot_i[0];
assign data_masked[105] = data_i[105] & sel_one_hot_i[0];
assign data_masked[104] = data_i[104] & sel_one_hot_i[0];
assign data_masked[103] = data_i[103] & sel_one_hot_i[0];
assign data_masked[102] = data_i[102] & sel_one_hot_i[0];
assign data_masked[101] = data_i[101] & sel_one_hot_i[0];
assign data_masked[100] = data_i[100] & sel_one_hot_i[0];
assign data_masked[99] = data_i[99] & sel_one_hot_i[0];
assign data_masked[98] = data_i[98] & sel_one_hot_i[0];
assign data_masked[97] = data_i[97] & sel_one_hot_i[0];
assign data_masked[96] = data_i[96] & sel_one_hot_i[0];
assign data_masked[95] = data_i[95] & sel_one_hot_i[0];
assign data_masked[94] = data_i[94] & sel_one_hot_i[0];
assign data_masked[93] = data_i[93] & sel_one_hot_i[0];
assign data_masked[92] = data_i[92] & sel_one_hot_i[0];
assign data_masked[91] = data_i[91] & sel_one_hot_i[0];
assign data_masked[90] = data_i[90] & sel_one_hot_i[0];
assign data_masked[89] = data_i[89] & sel_one_hot_i[0];
assign data_masked[88] = data_i[88] & sel_one_hot_i[0];
assign data_masked[87] = data_i[87] & sel_one_hot_i[0];
assign data_masked[86] = data_i[86] & sel_one_hot_i[0];
assign data_masked[85] = data_i[85] & sel_one_hot_i[0];
assign data_masked[84] = data_i[84] & sel_one_hot_i[0];
assign data_masked[83] = data_i[83] & sel_one_hot_i[0];
assign data_masked[82] = data_i[82] & sel_one_hot_i[0];
assign data_masked[81] = data_i[81] & sel_one_hot_i[0];
assign data_masked[80] = data_i[80] & sel_one_hot_i[0];
assign data_masked[79] = data_i[79] & sel_one_hot_i[0];
assign data_masked[78] = data_i[78] & sel_one_hot_i[0];
assign data_masked[77] = data_i[77] & sel_one_hot_i[0];
assign data_masked[76] = data_i[76] & sel_one_hot_i[0];
assign data_masked[75] = data_i[75] & sel_one_hot_i[0];
assign data_masked[74] = data_i[74] & sel_one_hot_i[0];
assign data_masked[73] = data_i[73] & sel_one_hot_i[0];
assign data_masked[72] = data_i[72] & sel_one_hot_i[0];
assign data_masked[71] = data_i[71] & sel_one_hot_i[0];
assign data_masked[70] = data_i[70] & sel_one_hot_i[0];
assign data_masked[69] = data_i[69] & sel_one_hot_i[0];
assign data_masked[68] = data_i[68] & sel_one_hot_i[0];
assign data_masked[67] = data_i[67] & sel_one_hot_i[0];
assign data_masked[66] = data_i[66] & sel_one_hot_i[0];
assign data_masked[65] = data_i[65] & sel_one_hot_i[0];
assign data_masked[64] = data_i[64] & sel_one_hot_i[0];
assign data_masked[63] = data_i[63] & sel_one_hot_i[0];
assign data_masked[62] = data_i[62] & sel_one_hot_i[0];
assign data_masked[61] = data_i[61] & sel_one_hot_i[0];
assign data_masked[60] = data_i[60] & sel_one_hot_i[0];
assign data_masked[59] = data_i[59] & sel_one_hot_i[0];
assign data_masked[58] = data_i[58] & sel_one_hot_i[0];
assign data_masked[57] = data_i[57] & sel_one_hot_i[0];
assign data_masked[56] = data_i[56] & sel_one_hot_i[0];
assign data_masked[55] = data_i[55] & sel_one_hot_i[0];
assign data_masked[54] = data_i[54] & sel_one_hot_i[0];
assign data_masked[53] = data_i[53] & sel_one_hot_i[0];
assign data_masked[52] = data_i[52] & sel_one_hot_i[0];
assign data_masked[51] = data_i[51] & sel_one_hot_i[0];
assign data_masked[50] = data_i[50] & sel_one_hot_i[0];
assign data_masked[49] = data_i[49] & sel_one_hot_i[0];
assign data_masked[48] = data_i[48] & sel_one_hot_i[0];
assign data_masked[47] = data_i[47] & sel_one_hot_i[0];
assign data_masked[46] = data_i[46] & sel_one_hot_i[0];
assign data_masked[45] = data_i[45] & sel_one_hot_i[0];
assign data_masked[44] = data_i[44] & sel_one_hot_i[0];
assign data_masked[43] = data_i[43] & sel_one_hot_i[0];
assign data_masked[42] = data_i[42] & sel_one_hot_i[0];
assign data_masked[41] = data_i[41] & sel_one_hot_i[0];
assign data_masked[40] = data_i[40] & sel_one_hot_i[0];
assign data_masked[39] = data_i[39] & sel_one_hot_i[0];
assign data_masked[38] = data_i[38] & sel_one_hot_i[0];
assign data_masked[37] = data_i[37] & sel_one_hot_i[0];
assign data_masked[36] = data_i[36] & sel_one_hot_i[0];
assign data_masked[35] = data_i[35] & sel_one_hot_i[0];
assign data_masked[34] = data_i[34] & sel_one_hot_i[0];
assign data_masked[33] = data_i[33] & sel_one_hot_i[0];
assign data_masked[32] = data_i[32] & sel_one_hot_i[0];
assign data_masked[31] = data_i[31] & sel_one_hot_i[0];
assign data_masked[30] = data_i[30] & sel_one_hot_i[0];
assign data_masked[29] = data_i[29] & sel_one_hot_i[0];
assign data_masked[28] = data_i[28] & sel_one_hot_i[0];
assign data_masked[27] = data_i[27] & sel_one_hot_i[0];
assign data_masked[26] = data_i[26] & sel_one_hot_i[0];
assign data_masked[25] = data_i[25] & sel_one_hot_i[0];
assign data_masked[24] = data_i[24] & sel_one_hot_i[0];
assign data_masked[23] = data_i[23] & sel_one_hot_i[0];
assign data_masked[22] = data_i[22] & sel_one_hot_i[0];
assign data_masked[21] = data_i[21] & sel_one_hot_i[0];
assign data_masked[20] = data_i[20] & sel_one_hot_i[0];
assign data_masked[19] = data_i[19] & sel_one_hot_i[0];
assign data_masked[18] = data_i[18] & sel_one_hot_i[0];
assign data_masked[17] = data_i[17] & sel_one_hot_i[0];
assign data_masked[16] = data_i[16] & sel_one_hot_i[0];
assign data_masked[15] = data_i[15] & sel_one_hot_i[0];
assign data_masked[14] = data_i[14] & sel_one_hot_i[0];
assign data_masked[13] = data_i[13] & sel_one_hot_i[0];
assign data_masked[12] = data_i[12] & sel_one_hot_i[0];
assign data_masked[11] = data_i[11] & sel_one_hot_i[0];
assign data_masked[10] = data_i[10] & sel_one_hot_i[0];
assign data_masked[9] = data_i[9] & sel_one_hot_i[0];
assign data_masked[8] = data_i[8] & sel_one_hot_i[0];
assign data_masked[7] = data_i[7] & sel_one_hot_i[0];
assign data_masked[6] = data_i[6] & sel_one_hot_i[0];
assign data_masked[5] = data_i[5] & sel_one_hot_i[0];
assign data_masked[4] = data_i[4] & sel_one_hot_i[0];
assign data_masked[3] = data_i[3] & sel_one_hot_i[0];
assign data_masked[2] = data_i[2] & sel_one_hot_i[0];
assign data_masked[1] = data_i[1] & sel_one_hot_i[0];
assign data_masked[0] = data_i[0] & sel_one_hot_i[0];
assign data_masked[271] = data_i[271] & sel_one_hot_i[1];
assign data_masked[270] = data_i[270] & sel_one_hot_i[1];
assign data_masked[269] = data_i[269] & sel_one_hot_i[1];
assign data_masked[268] = data_i[268] & sel_one_hot_i[1];
assign data_masked[267] = data_i[267] & sel_one_hot_i[1];
assign data_masked[266] = data_i[266] & sel_one_hot_i[1];
assign data_masked[265] = data_i[265] & sel_one_hot_i[1];
assign data_masked[264] = data_i[264] & sel_one_hot_i[1];
assign data_masked[263] = data_i[263] & sel_one_hot_i[1];
assign data_masked[262] = data_i[262] & sel_one_hot_i[1];
assign data_masked[261] = data_i[261] & sel_one_hot_i[1];
assign data_masked[260] = data_i[260] & sel_one_hot_i[1];
assign data_masked[259] = data_i[259] & sel_one_hot_i[1];
assign data_masked[258] = data_i[258] & sel_one_hot_i[1];
assign data_masked[257] = data_i[257] & sel_one_hot_i[1];
assign data_masked[256] = data_i[256] & sel_one_hot_i[1];
assign data_masked[255] = data_i[255] & sel_one_hot_i[1];
assign data_masked[254] = data_i[254] & sel_one_hot_i[1];
assign data_masked[253] = data_i[253] & sel_one_hot_i[1];
assign data_masked[252] = data_i[252] & sel_one_hot_i[1];
assign data_masked[251] = data_i[251] & sel_one_hot_i[1];
assign data_masked[250] = data_i[250] & sel_one_hot_i[1];
assign data_masked[249] = data_i[249] & sel_one_hot_i[1];
assign data_masked[248] = data_i[248] & sel_one_hot_i[1];
assign data_masked[247] = data_i[247] & sel_one_hot_i[1];
assign data_masked[246] = data_i[246] & sel_one_hot_i[1];
assign data_masked[245] = data_i[245] & sel_one_hot_i[1];
assign data_masked[244] = data_i[244] & sel_one_hot_i[1];
assign data_masked[243] = data_i[243] & sel_one_hot_i[1];
assign data_masked[242] = data_i[242] & sel_one_hot_i[1];
assign data_masked[241] = data_i[241] & sel_one_hot_i[1];
assign data_masked[240] = data_i[240] & sel_one_hot_i[1];
assign data_masked[239] = data_i[239] & sel_one_hot_i[1];
assign data_masked[238] = data_i[238] & sel_one_hot_i[1];
assign data_masked[237] = data_i[237] & sel_one_hot_i[1];
assign data_masked[236] = data_i[236] & sel_one_hot_i[1];
assign data_masked[235] = data_i[235] & sel_one_hot_i[1];
assign data_masked[234] = data_i[234] & sel_one_hot_i[1];
assign data_masked[233] = data_i[233] & sel_one_hot_i[1];
assign data_masked[232] = data_i[232] & sel_one_hot_i[1];
assign data_masked[231] = data_i[231] & sel_one_hot_i[1];
assign data_masked[230] = data_i[230] & sel_one_hot_i[1];
assign data_masked[229] = data_i[229] & sel_one_hot_i[1];
assign data_masked[228] = data_i[228] & sel_one_hot_i[1];
assign data_masked[227] = data_i[227] & sel_one_hot_i[1];
assign data_masked[226] = data_i[226] & sel_one_hot_i[1];
assign data_masked[225] = data_i[225] & sel_one_hot_i[1];
assign data_masked[224] = data_i[224] & sel_one_hot_i[1];
assign data_masked[223] = data_i[223] & sel_one_hot_i[1];
assign data_masked[222] = data_i[222] & sel_one_hot_i[1];
assign data_masked[221] = data_i[221] & sel_one_hot_i[1];
assign data_masked[220] = data_i[220] & sel_one_hot_i[1];
assign data_masked[219] = data_i[219] & sel_one_hot_i[1];
assign data_masked[218] = data_i[218] & sel_one_hot_i[1];
assign data_masked[217] = data_i[217] & sel_one_hot_i[1];
assign data_masked[216] = data_i[216] & sel_one_hot_i[1];
assign data_masked[215] = data_i[215] & sel_one_hot_i[1];
assign data_masked[214] = data_i[214] & sel_one_hot_i[1];
assign data_masked[213] = data_i[213] & sel_one_hot_i[1];
assign data_masked[212] = data_i[212] & sel_one_hot_i[1];
assign data_masked[211] = data_i[211] & sel_one_hot_i[1];
assign data_masked[210] = data_i[210] & sel_one_hot_i[1];
assign data_masked[209] = data_i[209] & sel_one_hot_i[1];
assign data_masked[208] = data_i[208] & sel_one_hot_i[1];
assign data_masked[207] = data_i[207] & sel_one_hot_i[1];
assign data_masked[206] = data_i[206] & sel_one_hot_i[1];
assign data_masked[205] = data_i[205] & sel_one_hot_i[1];
assign data_masked[204] = data_i[204] & sel_one_hot_i[1];
assign data_masked[203] = data_i[203] & sel_one_hot_i[1];
assign data_masked[202] = data_i[202] & sel_one_hot_i[1];
assign data_masked[201] = data_i[201] & sel_one_hot_i[1];
assign data_masked[200] = data_i[200] & sel_one_hot_i[1];
assign data_masked[199] = data_i[199] & sel_one_hot_i[1];
assign data_masked[198] = data_i[198] & sel_one_hot_i[1];
assign data_masked[197] = data_i[197] & sel_one_hot_i[1];
assign data_masked[196] = data_i[196] & sel_one_hot_i[1];
assign data_masked[195] = data_i[195] & sel_one_hot_i[1];
assign data_masked[194] = data_i[194] & sel_one_hot_i[1];
assign data_masked[193] = data_i[193] & sel_one_hot_i[1];
assign data_masked[192] = data_i[192] & sel_one_hot_i[1];
assign data_masked[191] = data_i[191] & sel_one_hot_i[1];
assign data_masked[190] = data_i[190] & sel_one_hot_i[1];
assign data_masked[189] = data_i[189] & sel_one_hot_i[1];
assign data_masked[188] = data_i[188] & sel_one_hot_i[1];
assign data_masked[187] = data_i[187] & sel_one_hot_i[1];
assign data_masked[186] = data_i[186] & sel_one_hot_i[1];
assign data_masked[185] = data_i[185] & sel_one_hot_i[1];
assign data_masked[184] = data_i[184] & sel_one_hot_i[1];
assign data_masked[183] = data_i[183] & sel_one_hot_i[1];
assign data_masked[182] = data_i[182] & sel_one_hot_i[1];
assign data_masked[181] = data_i[181] & sel_one_hot_i[1];
assign data_masked[180] = data_i[180] & sel_one_hot_i[1];
assign data_masked[179] = data_i[179] & sel_one_hot_i[1];
assign data_masked[178] = data_i[178] & sel_one_hot_i[1];
assign data_masked[177] = data_i[177] & sel_one_hot_i[1];
assign data_masked[176] = data_i[176] & sel_one_hot_i[1];
assign data_masked[175] = data_i[175] & sel_one_hot_i[1];
assign data_masked[174] = data_i[174] & sel_one_hot_i[1];
assign data_masked[173] = data_i[173] & sel_one_hot_i[1];
assign data_masked[172] = data_i[172] & sel_one_hot_i[1];
assign data_masked[171] = data_i[171] & sel_one_hot_i[1];
assign data_masked[170] = data_i[170] & sel_one_hot_i[1];
assign data_masked[169] = data_i[169] & sel_one_hot_i[1];
assign data_masked[168] = data_i[168] & sel_one_hot_i[1];
assign data_masked[167] = data_i[167] & sel_one_hot_i[1];
assign data_masked[166] = data_i[166] & sel_one_hot_i[1];
assign data_masked[165] = data_i[165] & sel_one_hot_i[1];
assign data_masked[164] = data_i[164] & sel_one_hot_i[1];
assign data_masked[163] = data_i[163] & sel_one_hot_i[1];
assign data_masked[162] = data_i[162] & sel_one_hot_i[1];
assign data_masked[161] = data_i[161] & sel_one_hot_i[1];
assign data_masked[160] = data_i[160] & sel_one_hot_i[1];
assign data_masked[159] = data_i[159] & sel_one_hot_i[1];
assign data_masked[158] = data_i[158] & sel_one_hot_i[1];
assign data_masked[157] = data_i[157] & sel_one_hot_i[1];
assign data_masked[156] = data_i[156] & sel_one_hot_i[1];
assign data_masked[155] = data_i[155] & sel_one_hot_i[1];
assign data_masked[154] = data_i[154] & sel_one_hot_i[1];
assign data_masked[153] = data_i[153] & sel_one_hot_i[1];
assign data_masked[152] = data_i[152] & sel_one_hot_i[1];
assign data_masked[151] = data_i[151] & sel_one_hot_i[1];
assign data_masked[150] = data_i[150] & sel_one_hot_i[1];
assign data_masked[149] = data_i[149] & sel_one_hot_i[1];
assign data_masked[148] = data_i[148] & sel_one_hot_i[1];
assign data_masked[147] = data_i[147] & sel_one_hot_i[1];
assign data_masked[146] = data_i[146] & sel_one_hot_i[1];
assign data_masked[145] = data_i[145] & sel_one_hot_i[1];
assign data_masked[144] = data_i[144] & sel_one_hot_i[1];
assign data_masked[143] = data_i[143] & sel_one_hot_i[1];
assign data_masked[142] = data_i[142] & sel_one_hot_i[1];
assign data_masked[141] = data_i[141] & sel_one_hot_i[1];
assign data_masked[140] = data_i[140] & sel_one_hot_i[1];
assign data_masked[139] = data_i[139] & sel_one_hot_i[1];
assign data_masked[138] = data_i[138] & sel_one_hot_i[1];
assign data_masked[137] = data_i[137] & sel_one_hot_i[1];
assign data_masked[136] = data_i[136] & sel_one_hot_i[1];
assign data_masked[407] = data_i[407] & sel_one_hot_i[2];
assign data_masked[406] = data_i[406] & sel_one_hot_i[2];
assign data_masked[405] = data_i[405] & sel_one_hot_i[2];
assign data_masked[404] = data_i[404] & sel_one_hot_i[2];
assign data_masked[403] = data_i[403] & sel_one_hot_i[2];
assign data_masked[402] = data_i[402] & sel_one_hot_i[2];
assign data_masked[401] = data_i[401] & sel_one_hot_i[2];
assign data_masked[400] = data_i[400] & sel_one_hot_i[2];
assign data_masked[399] = data_i[399] & sel_one_hot_i[2];
assign data_masked[398] = data_i[398] & sel_one_hot_i[2];
assign data_masked[397] = data_i[397] & sel_one_hot_i[2];
assign data_masked[396] = data_i[396] & sel_one_hot_i[2];
assign data_masked[395] = data_i[395] & sel_one_hot_i[2];
assign data_masked[394] = data_i[394] & sel_one_hot_i[2];
assign data_masked[393] = data_i[393] & sel_one_hot_i[2];
assign data_masked[392] = data_i[392] & sel_one_hot_i[2];
assign data_masked[391] = data_i[391] & sel_one_hot_i[2];
assign data_masked[390] = data_i[390] & sel_one_hot_i[2];
assign data_masked[389] = data_i[389] & sel_one_hot_i[2];
assign data_masked[388] = data_i[388] & sel_one_hot_i[2];
assign data_masked[387] = data_i[387] & sel_one_hot_i[2];
assign data_masked[386] = data_i[386] & sel_one_hot_i[2];
assign data_masked[385] = data_i[385] & sel_one_hot_i[2];
assign data_masked[384] = data_i[384] & sel_one_hot_i[2];
assign data_masked[383] = data_i[383] & sel_one_hot_i[2];
assign data_masked[382] = data_i[382] & sel_one_hot_i[2];
assign data_masked[381] = data_i[381] & sel_one_hot_i[2];
assign data_masked[380] = data_i[380] & sel_one_hot_i[2];
assign data_masked[379] = data_i[379] & sel_one_hot_i[2];
assign data_masked[378] = data_i[378] & sel_one_hot_i[2];
assign data_masked[377] = data_i[377] & sel_one_hot_i[2];
assign data_masked[376] = data_i[376] & sel_one_hot_i[2];
assign data_masked[375] = data_i[375] & sel_one_hot_i[2];
assign data_masked[374] = data_i[374] & sel_one_hot_i[2];
assign data_masked[373] = data_i[373] & sel_one_hot_i[2];
assign data_masked[372] = data_i[372] & sel_one_hot_i[2];
assign data_masked[371] = data_i[371] & sel_one_hot_i[2];
assign data_masked[370] = data_i[370] & sel_one_hot_i[2];
assign data_masked[369] = data_i[369] & sel_one_hot_i[2];
assign data_masked[368] = data_i[368] & sel_one_hot_i[2];
assign data_masked[367] = data_i[367] & sel_one_hot_i[2];
assign data_masked[366] = data_i[366] & sel_one_hot_i[2];
assign data_masked[365] = data_i[365] & sel_one_hot_i[2];
assign data_masked[364] = data_i[364] & sel_one_hot_i[2];
assign data_masked[363] = data_i[363] & sel_one_hot_i[2];
assign data_masked[362] = data_i[362] & sel_one_hot_i[2];
assign data_masked[361] = data_i[361] & sel_one_hot_i[2];
assign data_masked[360] = data_i[360] & sel_one_hot_i[2];
assign data_masked[359] = data_i[359] & sel_one_hot_i[2];
assign data_masked[358] = data_i[358] & sel_one_hot_i[2];
assign data_masked[357] = data_i[357] & sel_one_hot_i[2];
assign data_masked[356] = data_i[356] & sel_one_hot_i[2];
assign data_masked[355] = data_i[355] & sel_one_hot_i[2];
assign data_masked[354] = data_i[354] & sel_one_hot_i[2];
assign data_masked[353] = data_i[353] & sel_one_hot_i[2];
assign data_masked[352] = data_i[352] & sel_one_hot_i[2];
assign data_masked[351] = data_i[351] & sel_one_hot_i[2];
assign data_masked[350] = data_i[350] & sel_one_hot_i[2];
assign data_masked[349] = data_i[349] & sel_one_hot_i[2];
assign data_masked[348] = data_i[348] & sel_one_hot_i[2];
assign data_masked[347] = data_i[347] & sel_one_hot_i[2];
assign data_masked[346] = data_i[346] & sel_one_hot_i[2];
assign data_masked[345] = data_i[345] & sel_one_hot_i[2];
assign data_masked[344] = data_i[344] & sel_one_hot_i[2];
assign data_masked[343] = data_i[343] & sel_one_hot_i[2];
assign data_masked[342] = data_i[342] & sel_one_hot_i[2];
assign data_masked[341] = data_i[341] & sel_one_hot_i[2];
assign data_masked[340] = data_i[340] & sel_one_hot_i[2];
assign data_masked[339] = data_i[339] & sel_one_hot_i[2];
assign data_masked[338] = data_i[338] & sel_one_hot_i[2];
assign data_masked[337] = data_i[337] & sel_one_hot_i[2];
assign data_masked[336] = data_i[336] & sel_one_hot_i[2];
assign data_masked[335] = data_i[335] & sel_one_hot_i[2];
assign data_masked[334] = data_i[334] & sel_one_hot_i[2];
assign data_masked[333] = data_i[333] & sel_one_hot_i[2];
assign data_masked[332] = data_i[332] & sel_one_hot_i[2];
assign data_masked[331] = data_i[331] & sel_one_hot_i[2];
assign data_masked[330] = data_i[330] & sel_one_hot_i[2];
assign data_masked[329] = data_i[329] & sel_one_hot_i[2];
assign data_masked[328] = data_i[328] & sel_one_hot_i[2];
assign data_masked[327] = data_i[327] & sel_one_hot_i[2];
assign data_masked[326] = data_i[326] & sel_one_hot_i[2];
assign data_masked[325] = data_i[325] & sel_one_hot_i[2];
assign data_masked[324] = data_i[324] & sel_one_hot_i[2];
assign data_masked[323] = data_i[323] & sel_one_hot_i[2];
assign data_masked[322] = data_i[322] & sel_one_hot_i[2];
assign data_masked[321] = data_i[321] & sel_one_hot_i[2];
assign data_masked[320] = data_i[320] & sel_one_hot_i[2];
assign data_masked[319] = data_i[319] & sel_one_hot_i[2];
assign data_masked[318] = data_i[318] & sel_one_hot_i[2];
assign data_masked[317] = data_i[317] & sel_one_hot_i[2];
assign data_masked[316] = data_i[316] & sel_one_hot_i[2];
assign data_masked[315] = data_i[315] & sel_one_hot_i[2];
assign data_masked[314] = data_i[314] & sel_one_hot_i[2];
assign data_masked[313] = data_i[313] & sel_one_hot_i[2];
assign data_masked[312] = data_i[312] & sel_one_hot_i[2];
assign data_masked[311] = data_i[311] & sel_one_hot_i[2];
assign data_masked[310] = data_i[310] & sel_one_hot_i[2];
assign data_masked[309] = data_i[309] & sel_one_hot_i[2];
assign data_masked[308] = data_i[308] & sel_one_hot_i[2];
assign data_masked[307] = data_i[307] & sel_one_hot_i[2];
assign data_masked[306] = data_i[306] & sel_one_hot_i[2];
assign data_masked[305] = data_i[305] & sel_one_hot_i[2];
assign data_masked[304] = data_i[304] & sel_one_hot_i[2];
assign data_masked[303] = data_i[303] & sel_one_hot_i[2];
assign data_masked[302] = data_i[302] & sel_one_hot_i[2];
assign data_masked[301] = data_i[301] & sel_one_hot_i[2];
assign data_masked[300] = data_i[300] & sel_one_hot_i[2];
assign data_masked[299] = data_i[299] & sel_one_hot_i[2];
assign data_masked[298] = data_i[298] & sel_one_hot_i[2];
assign data_masked[297] = data_i[297] & sel_one_hot_i[2];
assign data_masked[296] = data_i[296] & sel_one_hot_i[2];
assign data_masked[295] = data_i[295] & sel_one_hot_i[2];
assign data_masked[294] = data_i[294] & sel_one_hot_i[2];
assign data_masked[293] = data_i[293] & sel_one_hot_i[2];
assign data_masked[292] = data_i[292] & sel_one_hot_i[2];
assign data_masked[291] = data_i[291] & sel_one_hot_i[2];
assign data_masked[290] = data_i[290] & sel_one_hot_i[2];
assign data_masked[289] = data_i[289] & sel_one_hot_i[2];
assign data_masked[288] = data_i[288] & sel_one_hot_i[2];
assign data_masked[287] = data_i[287] & sel_one_hot_i[2];
assign data_masked[286] = data_i[286] & sel_one_hot_i[2];
assign data_masked[285] = data_i[285] & sel_one_hot_i[2];
assign data_masked[284] = data_i[284] & sel_one_hot_i[2];
assign data_masked[283] = data_i[283] & sel_one_hot_i[2];
assign data_masked[282] = data_i[282] & sel_one_hot_i[2];
assign data_masked[281] = data_i[281] & sel_one_hot_i[2];
assign data_masked[280] = data_i[280] & sel_one_hot_i[2];
assign data_masked[279] = data_i[279] & sel_one_hot_i[2];
assign data_masked[278] = data_i[278] & sel_one_hot_i[2];
assign data_masked[277] = data_i[277] & sel_one_hot_i[2];
assign data_masked[276] = data_i[276] & sel_one_hot_i[2];
assign data_masked[275] = data_i[275] & sel_one_hot_i[2];
assign data_masked[274] = data_i[274] & sel_one_hot_i[2];
assign data_masked[273] = data_i[273] & sel_one_hot_i[2];
assign data_masked[272] = data_i[272] & sel_one_hot_i[2];
assign data_masked[543] = data_i[543] & sel_one_hot_i[3];
assign data_masked[542] = data_i[542] & sel_one_hot_i[3];
assign data_masked[541] = data_i[541] & sel_one_hot_i[3];
assign data_masked[540] = data_i[540] & sel_one_hot_i[3];
assign data_masked[539] = data_i[539] & sel_one_hot_i[3];
assign data_masked[538] = data_i[538] & sel_one_hot_i[3];
assign data_masked[537] = data_i[537] & sel_one_hot_i[3];
assign data_masked[536] = data_i[536] & sel_one_hot_i[3];
assign data_masked[535] = data_i[535] & sel_one_hot_i[3];
assign data_masked[534] = data_i[534] & sel_one_hot_i[3];
assign data_masked[533] = data_i[533] & sel_one_hot_i[3];
assign data_masked[532] = data_i[532] & sel_one_hot_i[3];
assign data_masked[531] = data_i[531] & sel_one_hot_i[3];
assign data_masked[530] = data_i[530] & sel_one_hot_i[3];
assign data_masked[529] = data_i[529] & sel_one_hot_i[3];
assign data_masked[528] = data_i[528] & sel_one_hot_i[3];
assign data_masked[527] = data_i[527] & sel_one_hot_i[3];
assign data_masked[526] = data_i[526] & sel_one_hot_i[3];
assign data_masked[525] = data_i[525] & sel_one_hot_i[3];
assign data_masked[524] = data_i[524] & sel_one_hot_i[3];
assign data_masked[523] = data_i[523] & sel_one_hot_i[3];
assign data_masked[522] = data_i[522] & sel_one_hot_i[3];
assign data_masked[521] = data_i[521] & sel_one_hot_i[3];
assign data_masked[520] = data_i[520] & sel_one_hot_i[3];
assign data_masked[519] = data_i[519] & sel_one_hot_i[3];
assign data_masked[518] = data_i[518] & sel_one_hot_i[3];
assign data_masked[517] = data_i[517] & sel_one_hot_i[3];
assign data_masked[516] = data_i[516] & sel_one_hot_i[3];
assign data_masked[515] = data_i[515] & sel_one_hot_i[3];
assign data_masked[514] = data_i[514] & sel_one_hot_i[3];
assign data_masked[513] = data_i[513] & sel_one_hot_i[3];
assign data_masked[512] = data_i[512] & sel_one_hot_i[3];
assign data_masked[511] = data_i[511] & sel_one_hot_i[3];
assign data_masked[510] = data_i[510] & sel_one_hot_i[3];
assign data_masked[509] = data_i[509] & sel_one_hot_i[3];
assign data_masked[508] = data_i[508] & sel_one_hot_i[3];
assign data_masked[507] = data_i[507] & sel_one_hot_i[3];
assign data_masked[506] = data_i[506] & sel_one_hot_i[3];
assign data_masked[505] = data_i[505] & sel_one_hot_i[3];
assign data_masked[504] = data_i[504] & sel_one_hot_i[3];
assign data_masked[503] = data_i[503] & sel_one_hot_i[3];
assign data_masked[502] = data_i[502] & sel_one_hot_i[3];
assign data_masked[501] = data_i[501] & sel_one_hot_i[3];
assign data_masked[500] = data_i[500] & sel_one_hot_i[3];
assign data_masked[499] = data_i[499] & sel_one_hot_i[3];
assign data_masked[498] = data_i[498] & sel_one_hot_i[3];
assign data_masked[497] = data_i[497] & sel_one_hot_i[3];
assign data_masked[496] = data_i[496] & sel_one_hot_i[3];
assign data_masked[495] = data_i[495] & sel_one_hot_i[3];
assign data_masked[494] = data_i[494] & sel_one_hot_i[3];
assign data_masked[493] = data_i[493] & sel_one_hot_i[3];
assign data_masked[492] = data_i[492] & sel_one_hot_i[3];
assign data_masked[491] = data_i[491] & sel_one_hot_i[3];
assign data_masked[490] = data_i[490] & sel_one_hot_i[3];
assign data_masked[489] = data_i[489] & sel_one_hot_i[3];
assign data_masked[488] = data_i[488] & sel_one_hot_i[3];
assign data_masked[487] = data_i[487] & sel_one_hot_i[3];
assign data_masked[486] = data_i[486] & sel_one_hot_i[3];
assign data_masked[485] = data_i[485] & sel_one_hot_i[3];
assign data_masked[484] = data_i[484] & sel_one_hot_i[3];
assign data_masked[483] = data_i[483] & sel_one_hot_i[3];
assign data_masked[482] = data_i[482] & sel_one_hot_i[3];
assign data_masked[481] = data_i[481] & sel_one_hot_i[3];
assign data_masked[480] = data_i[480] & sel_one_hot_i[3];
assign data_masked[479] = data_i[479] & sel_one_hot_i[3];
assign data_masked[478] = data_i[478] & sel_one_hot_i[3];
assign data_masked[477] = data_i[477] & sel_one_hot_i[3];
assign data_masked[476] = data_i[476] & sel_one_hot_i[3];
assign data_masked[475] = data_i[475] & sel_one_hot_i[3];
assign data_masked[474] = data_i[474] & sel_one_hot_i[3];
assign data_masked[473] = data_i[473] & sel_one_hot_i[3];
assign data_masked[472] = data_i[472] & sel_one_hot_i[3];
assign data_masked[471] = data_i[471] & sel_one_hot_i[3];
assign data_masked[470] = data_i[470] & sel_one_hot_i[3];
assign data_masked[469] = data_i[469] & sel_one_hot_i[3];
assign data_masked[468] = data_i[468] & sel_one_hot_i[3];
assign data_masked[467] = data_i[467] & sel_one_hot_i[3];
assign data_masked[466] = data_i[466] & sel_one_hot_i[3];
assign data_masked[465] = data_i[465] & sel_one_hot_i[3];
assign data_masked[464] = data_i[464] & sel_one_hot_i[3];
assign data_masked[463] = data_i[463] & sel_one_hot_i[3];
assign data_masked[462] = data_i[462] & sel_one_hot_i[3];
assign data_masked[461] = data_i[461] & sel_one_hot_i[3];
assign data_masked[460] = data_i[460] & sel_one_hot_i[3];
assign data_masked[459] = data_i[459] & sel_one_hot_i[3];
assign data_masked[458] = data_i[458] & sel_one_hot_i[3];
assign data_masked[457] = data_i[457] & sel_one_hot_i[3];
assign data_masked[456] = data_i[456] & sel_one_hot_i[3];
assign data_masked[455] = data_i[455] & sel_one_hot_i[3];
assign data_masked[454] = data_i[454] & sel_one_hot_i[3];
assign data_masked[453] = data_i[453] & sel_one_hot_i[3];
assign data_masked[452] = data_i[452] & sel_one_hot_i[3];
assign data_masked[451] = data_i[451] & sel_one_hot_i[3];
assign data_masked[450] = data_i[450] & sel_one_hot_i[3];
assign data_masked[449] = data_i[449] & sel_one_hot_i[3];
assign data_masked[448] = data_i[448] & sel_one_hot_i[3];
assign data_masked[447] = data_i[447] & sel_one_hot_i[3];
assign data_masked[446] = data_i[446] & sel_one_hot_i[3];
assign data_masked[445] = data_i[445] & sel_one_hot_i[3];
assign data_masked[444] = data_i[444] & sel_one_hot_i[3];
assign data_masked[443] = data_i[443] & sel_one_hot_i[3];
assign data_masked[442] = data_i[442] & sel_one_hot_i[3];
assign data_masked[441] = data_i[441] & sel_one_hot_i[3];
assign data_masked[440] = data_i[440] & sel_one_hot_i[3];
assign data_masked[439] = data_i[439] & sel_one_hot_i[3];
assign data_masked[438] = data_i[438] & sel_one_hot_i[3];
assign data_masked[437] = data_i[437] & sel_one_hot_i[3];
assign data_masked[436] = data_i[436] & sel_one_hot_i[3];
assign data_masked[435] = data_i[435] & sel_one_hot_i[3];
assign data_masked[434] = data_i[434] & sel_one_hot_i[3];
assign data_masked[433] = data_i[433] & sel_one_hot_i[3];
assign data_masked[432] = data_i[432] & sel_one_hot_i[3];
assign data_masked[431] = data_i[431] & sel_one_hot_i[3];
assign data_masked[430] = data_i[430] & sel_one_hot_i[3];
assign data_masked[429] = data_i[429] & sel_one_hot_i[3];
assign data_masked[428] = data_i[428] & sel_one_hot_i[3];
assign data_masked[427] = data_i[427] & sel_one_hot_i[3];
assign data_masked[426] = data_i[426] & sel_one_hot_i[3];
assign data_masked[425] = data_i[425] & sel_one_hot_i[3];
assign data_masked[424] = data_i[424] & sel_one_hot_i[3];
assign data_masked[423] = data_i[423] & sel_one_hot_i[3];
assign data_masked[422] = data_i[422] & sel_one_hot_i[3];
assign data_masked[421] = data_i[421] & sel_one_hot_i[3];
assign data_masked[420] = data_i[420] & sel_one_hot_i[3];
assign data_masked[419] = data_i[419] & sel_one_hot_i[3];
assign data_masked[418] = data_i[418] & sel_one_hot_i[3];
assign data_masked[417] = data_i[417] & sel_one_hot_i[3];
assign data_masked[416] = data_i[416] & sel_one_hot_i[3];
assign data_masked[415] = data_i[415] & sel_one_hot_i[3];
assign data_masked[414] = data_i[414] & sel_one_hot_i[3];
assign data_masked[413] = data_i[413] & sel_one_hot_i[3];
assign data_masked[412] = data_i[412] & sel_one_hot_i[3];
assign data_masked[411] = data_i[411] & sel_one_hot_i[3];
assign data_masked[410] = data_i[410] & sel_one_hot_i[3];
assign data_masked[409] = data_i[409] & sel_one_hot_i[3];
assign data_masked[408] = data_i[408] & sel_one_hot_i[3];
assign data_o[0] = N1 | data_masked[0];
assign N1 = N0 | data_masked[136];
assign N0 = data_masked[408] | data_masked[272];
assign data_o[1] = N3 | data_masked[1];
assign N3 = N2 | data_masked[137];
assign N2 = data_masked[409] | data_masked[273];
assign data_o[2] = N5 | data_masked[2];
assign N5 = N4 | data_masked[138];
assign N4 = data_masked[410] | data_masked[274];
assign data_o[3] = N7 | data_masked[3];
assign N7 = N6 | data_masked[139];
assign N6 = data_masked[411] | data_masked[275];
assign data_o[4] = N9 | data_masked[4];
assign N9 = N8 | data_masked[140];
assign N8 = data_masked[412] | data_masked[276];
assign data_o[5] = N11 | data_masked[5];
assign N11 = N10 | data_masked[141];
assign N10 = data_masked[413] | data_masked[277];
assign data_o[6] = N13 | data_masked[6];
assign N13 = N12 | data_masked[142];
assign N12 = data_masked[414] | data_masked[278];
assign data_o[7] = N15 | data_masked[7];
assign N15 = N14 | data_masked[143];
assign N14 = data_masked[415] | data_masked[279];
assign data_o[8] = N17 | data_masked[8];
assign N17 = N16 | data_masked[144];
assign N16 = data_masked[416] | data_masked[280];
assign data_o[9] = N19 | data_masked[9];
assign N19 = N18 | data_masked[145];
assign N18 = data_masked[417] | data_masked[281];
assign data_o[10] = N21 | data_masked[10];
assign N21 = N20 | data_masked[146];
assign N20 = data_masked[418] | data_masked[282];
assign data_o[11] = N23 | data_masked[11];
assign N23 = N22 | data_masked[147];
assign N22 = data_masked[419] | data_masked[283];
assign data_o[12] = N25 | data_masked[12];
assign N25 = N24 | data_masked[148];
assign N24 = data_masked[420] | data_masked[284];
assign data_o[13] = N27 | data_masked[13];
assign N27 = N26 | data_masked[149];
assign N26 = data_masked[421] | data_masked[285];
assign data_o[14] = N29 | data_masked[14];
assign N29 = N28 | data_masked[150];
assign N28 = data_masked[422] | data_masked[286];
assign data_o[15] = N31 | data_masked[15];
assign N31 = N30 | data_masked[151];
assign N30 = data_masked[423] | data_masked[287];
assign data_o[16] = N33 | data_masked[16];
assign N33 = N32 | data_masked[152];
assign N32 = data_masked[424] | data_masked[288];
assign data_o[17] = N35 | data_masked[17];
assign N35 = N34 | data_masked[153];
assign N34 = data_masked[425] | data_masked[289];
assign data_o[18] = N37 | data_masked[18];
assign N37 = N36 | data_masked[154];
assign N36 = data_masked[426] | data_masked[290];
assign data_o[19] = N39 | data_masked[19];
assign N39 = N38 | data_masked[155];
assign N38 = data_masked[427] | data_masked[291];
assign data_o[20] = N41 | data_masked[20];
assign N41 = N40 | data_masked[156];
assign N40 = data_masked[428] | data_masked[292];
assign data_o[21] = N43 | data_masked[21];
assign N43 = N42 | data_masked[157];
assign N42 = data_masked[429] | data_masked[293];
assign data_o[22] = N45 | data_masked[22];
assign N45 = N44 | data_masked[158];
assign N44 = data_masked[430] | data_masked[294];
assign data_o[23] = N47 | data_masked[23];
assign N47 = N46 | data_masked[159];
assign N46 = data_masked[431] | data_masked[295];
assign data_o[24] = N49 | data_masked[24];
assign N49 = N48 | data_masked[160];
assign N48 = data_masked[432] | data_masked[296];
assign data_o[25] = N51 | data_masked[25];
assign N51 = N50 | data_masked[161];
assign N50 = data_masked[433] | data_masked[297];
assign data_o[26] = N53 | data_masked[26];
assign N53 = N52 | data_masked[162];
assign N52 = data_masked[434] | data_masked[298];
assign data_o[27] = N55 | data_masked[27];
assign N55 = N54 | data_masked[163];
assign N54 = data_masked[435] | data_masked[299];
assign data_o[28] = N57 | data_masked[28];
assign N57 = N56 | data_masked[164];
assign N56 = data_masked[436] | data_masked[300];
assign data_o[29] = N59 | data_masked[29];
assign N59 = N58 | data_masked[165];
assign N58 = data_masked[437] | data_masked[301];
assign data_o[30] = N61 | data_masked[30];
assign N61 = N60 | data_masked[166];
assign N60 = data_masked[438] | data_masked[302];
assign data_o[31] = N63 | data_masked[31];
assign N63 = N62 | data_masked[167];
assign N62 = data_masked[439] | data_masked[303];
assign data_o[32] = N65 | data_masked[32];
assign N65 = N64 | data_masked[168];
assign N64 = data_masked[440] | data_masked[304];
assign data_o[33] = N67 | data_masked[33];
assign N67 = N66 | data_masked[169];
assign N66 = data_masked[441] | data_masked[305];
assign data_o[34] = N69 | data_masked[34];
assign N69 = N68 | data_masked[170];
assign N68 = data_masked[442] | data_masked[306];
assign data_o[35] = N71 | data_masked[35];
assign N71 = N70 | data_masked[171];
assign N70 = data_masked[443] | data_masked[307];
assign data_o[36] = N73 | data_masked[36];
assign N73 = N72 | data_masked[172];
assign N72 = data_masked[444] | data_masked[308];
assign data_o[37] = N75 | data_masked[37];
assign N75 = N74 | data_masked[173];
assign N74 = data_masked[445] | data_masked[309];
assign data_o[38] = N77 | data_masked[38];
assign N77 = N76 | data_masked[174];
assign N76 = data_masked[446] | data_masked[310];
assign data_o[39] = N79 | data_masked[39];
assign N79 = N78 | data_masked[175];
assign N78 = data_masked[447] | data_masked[311];
assign data_o[40] = N81 | data_masked[40];
assign N81 = N80 | data_masked[176];
assign N80 = data_masked[448] | data_masked[312];
assign data_o[41] = N83 | data_masked[41];
assign N83 = N82 | data_masked[177];
assign N82 = data_masked[449] | data_masked[313];
assign data_o[42] = N85 | data_masked[42];
assign N85 = N84 | data_masked[178];
assign N84 = data_masked[450] | data_masked[314];
assign data_o[43] = N87 | data_masked[43];
assign N87 = N86 | data_masked[179];
assign N86 = data_masked[451] | data_masked[315];
assign data_o[44] = N89 | data_masked[44];
assign N89 = N88 | data_masked[180];
assign N88 = data_masked[452] | data_masked[316];
assign data_o[45] = N91 | data_masked[45];
assign N91 = N90 | data_masked[181];
assign N90 = data_masked[453] | data_masked[317];
assign data_o[46] = N93 | data_masked[46];
assign N93 = N92 | data_masked[182];
assign N92 = data_masked[454] | data_masked[318];
assign data_o[47] = N95 | data_masked[47];
assign N95 = N94 | data_masked[183];
assign N94 = data_masked[455] | data_masked[319];
assign data_o[48] = N97 | data_masked[48];
assign N97 = N96 | data_masked[184];
assign N96 = data_masked[456] | data_masked[320];
assign data_o[49] = N99 | data_masked[49];
assign N99 = N98 | data_masked[185];
assign N98 = data_masked[457] | data_masked[321];
assign data_o[50] = N101 | data_masked[50];
assign N101 = N100 | data_masked[186];
assign N100 = data_masked[458] | data_masked[322];
assign data_o[51] = N103 | data_masked[51];
assign N103 = N102 | data_masked[187];
assign N102 = data_masked[459] | data_masked[323];
assign data_o[52] = N105 | data_masked[52];
assign N105 = N104 | data_masked[188];
assign N104 = data_masked[460] | data_masked[324];
assign data_o[53] = N107 | data_masked[53];
assign N107 = N106 | data_masked[189];
assign N106 = data_masked[461] | data_masked[325];
assign data_o[54] = N109 | data_masked[54];
assign N109 = N108 | data_masked[190];
assign N108 = data_masked[462] | data_masked[326];
assign data_o[55] = N111 | data_masked[55];
assign N111 = N110 | data_masked[191];
assign N110 = data_masked[463] | data_masked[327];
assign data_o[56] = N113 | data_masked[56];
assign N113 = N112 | data_masked[192];
assign N112 = data_masked[464] | data_masked[328];
assign data_o[57] = N115 | data_masked[57];
assign N115 = N114 | data_masked[193];
assign N114 = data_masked[465] | data_masked[329];
assign data_o[58] = N117 | data_masked[58];
assign N117 = N116 | data_masked[194];
assign N116 = data_masked[466] | data_masked[330];
assign data_o[59] = N119 | data_masked[59];
assign N119 = N118 | data_masked[195];
assign N118 = data_masked[467] | data_masked[331];
assign data_o[60] = N121 | data_masked[60];
assign N121 = N120 | data_masked[196];
assign N120 = data_masked[468] | data_masked[332];
assign data_o[61] = N123 | data_masked[61];
assign N123 = N122 | data_masked[197];
assign N122 = data_masked[469] | data_masked[333];
assign data_o[62] = N125 | data_masked[62];
assign N125 = N124 | data_masked[198];
assign N124 = data_masked[470] | data_masked[334];
assign data_o[63] = N127 | data_masked[63];
assign N127 = N126 | data_masked[199];
assign N126 = data_masked[471] | data_masked[335];
assign data_o[64] = N129 | data_masked[64];
assign N129 = N128 | data_masked[200];
assign N128 = data_masked[472] | data_masked[336];
assign data_o[65] = N131 | data_masked[65];
assign N131 = N130 | data_masked[201];
assign N130 = data_masked[473] | data_masked[337];
assign data_o[66] = N133 | data_masked[66];
assign N133 = N132 | data_masked[202];
assign N132 = data_masked[474] | data_masked[338];
assign data_o[67] = N135 | data_masked[67];
assign N135 = N134 | data_masked[203];
assign N134 = data_masked[475] | data_masked[339];
assign data_o[68] = N137 | data_masked[68];
assign N137 = N136 | data_masked[204];
assign N136 = data_masked[476] | data_masked[340];
assign data_o[69] = N139 | data_masked[69];
assign N139 = N138 | data_masked[205];
assign N138 = data_masked[477] | data_masked[341];
assign data_o[70] = N141 | data_masked[70];
assign N141 = N140 | data_masked[206];
assign N140 = data_masked[478] | data_masked[342];
assign data_o[71] = N143 | data_masked[71];
assign N143 = N142 | data_masked[207];
assign N142 = data_masked[479] | data_masked[343];
assign data_o[72] = N145 | data_masked[72];
assign N145 = N144 | data_masked[208];
assign N144 = data_masked[480] | data_masked[344];
assign data_o[73] = N147 | data_masked[73];
assign N147 = N146 | data_masked[209];
assign N146 = data_masked[481] | data_masked[345];
assign data_o[74] = N149 | data_masked[74];
assign N149 = N148 | data_masked[210];
assign N148 = data_masked[482] | data_masked[346];
assign data_o[75] = N151 | data_masked[75];
assign N151 = N150 | data_masked[211];
assign N150 = data_masked[483] | data_masked[347];
assign data_o[76] = N153 | data_masked[76];
assign N153 = N152 | data_masked[212];
assign N152 = data_masked[484] | data_masked[348];
assign data_o[77] = N155 | data_masked[77];
assign N155 = N154 | data_masked[213];
assign N154 = data_masked[485] | data_masked[349];
assign data_o[78] = N157 | data_masked[78];
assign N157 = N156 | data_masked[214];
assign N156 = data_masked[486] | data_masked[350];
assign data_o[79] = N159 | data_masked[79];
assign N159 = N158 | data_masked[215];
assign N158 = data_masked[487] | data_masked[351];
assign data_o[80] = N161 | data_masked[80];
assign N161 = N160 | data_masked[216];
assign N160 = data_masked[488] | data_masked[352];
assign data_o[81] = N163 | data_masked[81];
assign N163 = N162 | data_masked[217];
assign N162 = data_masked[489] | data_masked[353];
assign data_o[82] = N165 | data_masked[82];
assign N165 = N164 | data_masked[218];
assign N164 = data_masked[490] | data_masked[354];
assign data_o[83] = N167 | data_masked[83];
assign N167 = N166 | data_masked[219];
assign N166 = data_masked[491] | data_masked[355];
assign data_o[84] = N169 | data_masked[84];
assign N169 = N168 | data_masked[220];
assign N168 = data_masked[492] | data_masked[356];
assign data_o[85] = N171 | data_masked[85];
assign N171 = N170 | data_masked[221];
assign N170 = data_masked[493] | data_masked[357];
assign data_o[86] = N173 | data_masked[86];
assign N173 = N172 | data_masked[222];
assign N172 = data_masked[494] | data_masked[358];
assign data_o[87] = N175 | data_masked[87];
assign N175 = N174 | data_masked[223];
assign N174 = data_masked[495] | data_masked[359];
assign data_o[88] = N177 | data_masked[88];
assign N177 = N176 | data_masked[224];
assign N176 = data_masked[496] | data_masked[360];
assign data_o[89] = N179 | data_masked[89];
assign N179 = N178 | data_masked[225];
assign N178 = data_masked[497] | data_masked[361];
assign data_o[90] = N181 | data_masked[90];
assign N181 = N180 | data_masked[226];
assign N180 = data_masked[498] | data_masked[362];
assign data_o[91] = N183 | data_masked[91];
assign N183 = N182 | data_masked[227];
assign N182 = data_masked[499] | data_masked[363];
assign data_o[92] = N185 | data_masked[92];
assign N185 = N184 | data_masked[228];
assign N184 = data_masked[500] | data_masked[364];
assign data_o[93] = N187 | data_masked[93];
assign N187 = N186 | data_masked[229];
assign N186 = data_masked[501] | data_masked[365];
assign data_o[94] = N189 | data_masked[94];
assign N189 = N188 | data_masked[230];
assign N188 = data_masked[502] | data_masked[366];
assign data_o[95] = N191 | data_masked[95];
assign N191 = N190 | data_masked[231];
assign N190 = data_masked[503] | data_masked[367];
assign data_o[96] = N193 | data_masked[96];
assign N193 = N192 | data_masked[232];
assign N192 = data_masked[504] | data_masked[368];
assign data_o[97] = N195 | data_masked[97];
assign N195 = N194 | data_masked[233];
assign N194 = data_masked[505] | data_masked[369];
assign data_o[98] = N197 | data_masked[98];
assign N197 = N196 | data_masked[234];
assign N196 = data_masked[506] | data_masked[370];
assign data_o[99] = N199 | data_masked[99];
assign N199 = N198 | data_masked[235];
assign N198 = data_masked[507] | data_masked[371];
assign data_o[100] = N201 | data_masked[100];
assign N201 = N200 | data_masked[236];
assign N200 = data_masked[508] | data_masked[372];
assign data_o[101] = N203 | data_masked[101];
assign N203 = N202 | data_masked[237];
assign N202 = data_masked[509] | data_masked[373];
assign data_o[102] = N205 | data_masked[102];
assign N205 = N204 | data_masked[238];
assign N204 = data_masked[510] | data_masked[374];
assign data_o[103] = N207 | data_masked[103];
assign N207 = N206 | data_masked[239];
assign N206 = data_masked[511] | data_masked[375];
assign data_o[104] = N209 | data_masked[104];
assign N209 = N208 | data_masked[240];
assign N208 = data_masked[512] | data_masked[376];
assign data_o[105] = N211 | data_masked[105];
assign N211 = N210 | data_masked[241];
assign N210 = data_masked[513] | data_masked[377];
assign data_o[106] = N213 | data_masked[106];
assign N213 = N212 | data_masked[242];
assign N212 = data_masked[514] | data_masked[378];
assign data_o[107] = N215 | data_masked[107];
assign N215 = N214 | data_masked[243];
assign N214 = data_masked[515] | data_masked[379];
assign data_o[108] = N217 | data_masked[108];
assign N217 = N216 | data_masked[244];
assign N216 = data_masked[516] | data_masked[380];
assign data_o[109] = N219 | data_masked[109];
assign N219 = N218 | data_masked[245];
assign N218 = data_masked[517] | data_masked[381];
assign data_o[110] = N221 | data_masked[110];
assign N221 = N220 | data_masked[246];
assign N220 = data_masked[518] | data_masked[382];
assign data_o[111] = N223 | data_masked[111];
assign N223 = N222 | data_masked[247];
assign N222 = data_masked[519] | data_masked[383];
assign data_o[112] = N225 | data_masked[112];
assign N225 = N224 | data_masked[248];
assign N224 = data_masked[520] | data_masked[384];
assign data_o[113] = N227 | data_masked[113];
assign N227 = N226 | data_masked[249];
assign N226 = data_masked[521] | data_masked[385];
assign data_o[114] = N229 | data_masked[114];
assign N229 = N228 | data_masked[250];
assign N228 = data_masked[522] | data_masked[386];
assign data_o[115] = N231 | data_masked[115];
assign N231 = N230 | data_masked[251];
assign N230 = data_masked[523] | data_masked[387];
assign data_o[116] = N233 | data_masked[116];
assign N233 = N232 | data_masked[252];
assign N232 = data_masked[524] | data_masked[388];
assign data_o[117] = N235 | data_masked[117];
assign N235 = N234 | data_masked[253];
assign N234 = data_masked[525] | data_masked[389];
assign data_o[118] = N237 | data_masked[118];
assign N237 = N236 | data_masked[254];
assign N236 = data_masked[526] | data_masked[390];
assign data_o[119] = N239 | data_masked[119];
assign N239 = N238 | data_masked[255];
assign N238 = data_masked[527] | data_masked[391];
assign data_o[120] = N241 | data_masked[120];
assign N241 = N240 | data_masked[256];
assign N240 = data_masked[528] | data_masked[392];
assign data_o[121] = N243 | data_masked[121];
assign N243 = N242 | data_masked[257];
assign N242 = data_masked[529] | data_masked[393];
assign data_o[122] = N245 | data_masked[122];
assign N245 = N244 | data_masked[258];
assign N244 = data_masked[530] | data_masked[394];
assign data_o[123] = N247 | data_masked[123];
assign N247 = N246 | data_masked[259];
assign N246 = data_masked[531] | data_masked[395];
assign data_o[124] = N249 | data_masked[124];
assign N249 = N248 | data_masked[260];
assign N248 = data_masked[532] | data_masked[396];
assign data_o[125] = N251 | data_masked[125];
assign N251 = N250 | data_masked[261];
assign N250 = data_masked[533] | data_masked[397];
assign data_o[126] = N253 | data_masked[126];
assign N253 = N252 | data_masked[262];
assign N252 = data_masked[534] | data_masked[398];
assign data_o[127] = N255 | data_masked[127];
assign N255 = N254 | data_masked[263];
assign N254 = data_masked[535] | data_masked[399];
assign data_o[128] = N257 | data_masked[128];
assign N257 = N256 | data_masked[264];
assign N256 = data_masked[536] | data_masked[400];
assign data_o[129] = N259 | data_masked[129];
assign N259 = N258 | data_masked[265];
assign N258 = data_masked[537] | data_masked[401];
assign data_o[130] = N261 | data_masked[130];
assign N261 = N260 | data_masked[266];
assign N260 = data_masked[538] | data_masked[402];
assign data_o[131] = N263 | data_masked[131];
assign N263 = N262 | data_masked[267];
assign N262 = data_masked[539] | data_masked[403];
assign data_o[132] = N265 | data_masked[132];
assign N265 = N264 | data_masked[268];
assign N264 = data_masked[540] | data_masked[404];
assign data_o[133] = N267 | data_masked[133];
assign N267 = N266 | data_masked[269];
assign N266 = data_masked[541] | data_masked[405];
assign data_o[134] = N269 | data_masked[134];
assign N269 = N268 | data_masked[270];
assign N268 = data_masked[542] | data_masked[406];
assign data_o[135] = N271 | data_masked[135];
assign N271 = N270 | data_masked[271];
assign N270 = data_masked[543] | data_masked[407];
endmodule
|
module bsg_dff_width_p45
(
clk_i,
data_i,
data_o
);
input [44:0] data_i;
output [44:0] data_o;
input clk_i;
reg [44:0] data_o;
always @(posedge clk_i) begin
if(1'b1) begin
{ data_o[44:0] } <= { data_i[44:0] };
end
end
endmodule
|
module bsg_circular_ptr_slots_p2_max_add_p1
(
clk,
reset_i,
add_i,
o
);
input [0:0] add_i;
output [0:0] o;
input clk;
input reset_i;
wire N0,N1,N2,N3,N4,N5,N6;
wire [0:0] genblk1_genblk1_ptr_r_p1;
reg [0:0] o;
assign genblk1_genblk1_ptr_r_p1[0] = o[0] ^ 1'b1;
assign N3 = (N0)? 1'b0 :
(N1)? genblk1_genblk1_ptr_r_p1[0] : 1'b0;
assign N0 = reset_i;
assign N1 = N2;
assign N2 = ~reset_i;
assign N4 = ~add_i[0];
assign N5 = N4 & N2;
assign N6 = ~N5;
always @(posedge clk) begin
if(N6) begin
{ o[0:0] } <= { N3 };
end
end
endmodule
|
module bsg_mem_1r1w_synth_width_p131_els_p2_read_write_same_addr_p0_harden_p0
(
w_clk_i,
w_reset_i,
w_v_i,
w_addr_i,
w_data_i,
r_v_i,
r_addr_i,
r_data_o
);
input [0:0] w_addr_i;
input [130:0] w_data_i;
input [0:0] r_addr_i;
output [130:0] r_data_o;
input w_clk_i;
input w_reset_i;
input w_v_i;
input r_v_i;
wire [130:0] r_data_o;
wire N0,N1,N2,N3,N4,N5,N7,N8,N9,N10;
reg [261:0] mem;
assign r_data_o[130] = (N3)? mem[130] :
(N0)? mem[261] : 1'b0;
assign N0 = r_addr_i[0];
assign r_data_o[129] = (N3)? mem[129] :
(N0)? mem[260] : 1'b0;
assign r_data_o[128] = (N3)? mem[128] :
(N0)? mem[259] : 1'b0;
assign r_data_o[127] = (N3)? mem[127] :
(N0)? mem[258] : 1'b0;
assign r_data_o[126] = (N3)? mem[126] :
(N0)? mem[257] : 1'b0;
assign r_data_o[125] = (N3)? mem[125] :
(N0)? mem[256] : 1'b0;
assign r_data_o[124] = (N3)? mem[124] :
(N0)? mem[255] : 1'b0;
assign r_data_o[123] = (N3)? mem[123] :
(N0)? mem[254] : 1'b0;
assign r_data_o[122] = (N3)? mem[122] :
(N0)? mem[253] : 1'b0;
assign r_data_o[121] = (N3)? mem[121] :
(N0)? mem[252] : 1'b0;
assign r_data_o[120] = (N3)? mem[120] :
(N0)? mem[251] : 1'b0;
assign r_data_o[119] = (N3)? mem[119] :
(N0)? mem[250] : 1'b0;
assign r_data_o[118] = (N3)? mem[118] :
(N0)? mem[249] : 1'b0;
assign r_data_o[117] = (N3)? mem[117] :
(N0)? mem[248] : 1'b0;
assign r_data_o[116] = (N3)? mem[116] :
(N0)? mem[247] : 1'b0;
assign r_data_o[115] = (N3)? mem[115] :
(N0)? mem[246] : 1'b0;
assign r_data_o[114] = (N3)? mem[114] :
(N0)? mem[245] : 1'b0;
assign r_data_o[113] = (N3)? mem[113] :
(N0)? mem[244] : 1'b0;
assign r_data_o[112] = (N3)? mem[112] :
(N0)? mem[243] : 1'b0;
assign r_data_o[111] = (N3)? mem[111] :
(N0)? mem[242] : 1'b0;
assign r_data_o[110] = (N3)? mem[110] :
(N0)? mem[241] : 1'b0;
assign r_data_o[109] = (N3)? mem[109] :
(N0)? mem[240] : 1'b0;
assign r_data_o[108] = (N3)? mem[108] :
(N0)? mem[239] : 1'b0;
assign r_data_o[107] = (N3)? mem[107] :
(N0)? mem[238] : 1'b0;
assign r_data_o[106] = (N3)? mem[106] :
(N0)? mem[237] : 1'b0;
assign r_data_o[105] = (N3)? mem[105] :
(N0)? mem[236] : 1'b0;
assign r_data_o[104] = (N3)? mem[104] :
(N0)? mem[235] : 1'b0;
assign r_data_o[103] = (N3)? mem[103] :
(N0)? mem[234] : 1'b0;
assign r_data_o[102] = (N3)? mem[102] :
(N0)? mem[233] : 1'b0;
assign r_data_o[101] = (N3)? mem[101] :
(N0)? mem[232] : 1'b0;
assign r_data_o[100] = (N3)? mem[100] :
(N0)? mem[231] : 1'b0;
assign r_data_o[99] = (N3)? mem[99] :
(N0)? mem[230] : 1'b0;
assign r_data_o[98] = (N3)? mem[98] :
(N0)? mem[229] : 1'b0;
assign r_data_o[97] = (N3)? mem[97] :
(N0)? mem[228] : 1'b0;
assign r_data_o[96] = (N3)? mem[96] :
(N0)? mem[227] : 1'b0;
assign r_data_o[95] = (N3)? mem[95] :
(N0)? mem[226] : 1'b0;
assign r_data_o[94] = (N3)? mem[94] :
(N0)? mem[225] : 1'b0;
assign r_data_o[93] = (N3)? mem[93] :
(N0)? mem[224] : 1'b0;
assign r_data_o[92] = (N3)? mem[92] :
(N0)? mem[223] : 1'b0;
assign r_data_o[91] = (N3)? mem[91] :
(N0)? mem[222] : 1'b0;
assign r_data_o[90] = (N3)? mem[90] :
(N0)? mem[221] : 1'b0;
assign r_data_o[89] = (N3)? mem[89] :
(N0)? mem[220] : 1'b0;
assign r_data_o[88] = (N3)? mem[88] :
(N0)? mem[219] : 1'b0;
assign r_data_o[87] = (N3)? mem[87] :
(N0)? mem[218] : 1'b0;
assign r_data_o[86] = (N3)? mem[86] :
(N0)? mem[217] : 1'b0;
assign r_data_o[85] = (N3)? mem[85] :
(N0)? mem[216] : 1'b0;
assign r_data_o[84] = (N3)? mem[84] :
(N0)? mem[215] : 1'b0;
assign r_data_o[83] = (N3)? mem[83] :
(N0)? mem[214] : 1'b0;
assign r_data_o[82] = (N3)? mem[82] :
(N0)? mem[213] : 1'b0;
assign r_data_o[81] = (N3)? mem[81] :
(N0)? mem[212] : 1'b0;
assign r_data_o[80] = (N3)? mem[80] :
(N0)? mem[211] : 1'b0;
assign r_data_o[79] = (N3)? mem[79] :
(N0)? mem[210] : 1'b0;
assign r_data_o[78] = (N3)? mem[78] :
(N0)? mem[209] : 1'b0;
assign r_data_o[77] = (N3)? mem[77] :
(N0)? mem[208] : 1'b0;
assign r_data_o[76] = (N3)? mem[76] :
(N0)? mem[207] : 1'b0;
assign r_data_o[75] = (N3)? mem[75] :
(N0)? mem[206] : 1'b0;
assign r_data_o[74] = (N3)? mem[74] :
(N0)? mem[205] : 1'b0;
assign r_data_o[73] = (N3)? mem[73] :
(N0)? mem[204] : 1'b0;
assign r_data_o[72] = (N3)? mem[72] :
(N0)? mem[203] : 1'b0;
assign r_data_o[71] = (N3)? mem[71] :
(N0)? mem[202] : 1'b0;
assign r_data_o[70] = (N3)? mem[70] :
(N0)? mem[201] : 1'b0;
assign r_data_o[69] = (N3)? mem[69] :
(N0)? mem[200] : 1'b0;
assign r_data_o[68] = (N3)? mem[68] :
(N0)? mem[199] : 1'b0;
assign r_data_o[67] = (N3)? mem[67] :
(N0)? mem[198] : 1'b0;
assign r_data_o[66] = (N3)? mem[66] :
(N0)? mem[197] : 1'b0;
assign r_data_o[65] = (N3)? mem[65] :
(N0)? mem[196] : 1'b0;
assign r_data_o[64] = (N3)? mem[64] :
(N0)? mem[195] : 1'b0;
assign r_data_o[63] = (N3)? mem[63] :
(N0)? mem[194] : 1'b0;
assign r_data_o[62] = (N3)? mem[62] :
(N0)? mem[193] : 1'b0;
assign r_data_o[61] = (N3)? mem[61] :
(N0)? mem[192] : 1'b0;
assign r_data_o[60] = (N3)? mem[60] :
(N0)? mem[191] : 1'b0;
assign r_data_o[59] = (N3)? mem[59] :
(N0)? mem[190] : 1'b0;
assign r_data_o[58] = (N3)? mem[58] :
(N0)? mem[189] : 1'b0;
assign r_data_o[57] = (N3)? mem[57] :
(N0)? mem[188] : 1'b0;
assign r_data_o[56] = (N3)? mem[56] :
(N0)? mem[187] : 1'b0;
assign r_data_o[55] = (N3)? mem[55] :
(N0)? mem[186] : 1'b0;
assign r_data_o[54] = (N3)? mem[54] :
(N0)? mem[185] : 1'b0;
assign r_data_o[53] = (N3)? mem[53] :
(N0)? mem[184] : 1'b0;
assign r_data_o[52] = (N3)? mem[52] :
(N0)? mem[183] : 1'b0;
assign r_data_o[51] = (N3)? mem[51] :
(N0)? mem[182] : 1'b0;
assign r_data_o[50] = (N3)? mem[50] :
(N0)? mem[181] : 1'b0;
assign r_data_o[49] = (N3)? mem[49] :
(N0)? mem[180] : 1'b0;
assign r_data_o[48] = (N3)? mem[48] :
(N0)? mem[179] : 1'b0;
assign r_data_o[47] = (N3)? mem[47] :
(N0)? mem[178] : 1'b0;
assign r_data_o[46] = (N3)? mem[46] :
(N0)? mem[177] : 1'b0;
assign r_data_o[45] = (N3)? mem[45] :
(N0)? mem[176] : 1'b0;
assign r_data_o[44] = (N3)? mem[44] :
(N0)? mem[175] : 1'b0;
assign r_data_o[43] = (N3)? mem[43] :
(N0)? mem[174] : 1'b0;
assign r_data_o[42] = (N3)? mem[42] :
(N0)? mem[173] : 1'b0;
assign r_data_o[41] = (N3)? mem[41] :
(N0)? mem[172] : 1'b0;
assign r_data_o[40] = (N3)? mem[40] :
(N0)? mem[171] : 1'b0;
assign r_data_o[39] = (N3)? mem[39] :
(N0)? mem[170] : 1'b0;
assign r_data_o[38] = (N3)? mem[38] :
(N0)? mem[169] : 1'b0;
assign r_data_o[37] = (N3)? mem[37] :
(N0)? mem[168] : 1'b0;
assign r_data_o[36] = (N3)? mem[36] :
(N0)? mem[167] : 1'b0;
assign r_data_o[35] = (N3)? mem[35] :
(N0)? mem[166] : 1'b0;
assign r_data_o[34] = (N3)? mem[34] :
(N0)? mem[165] : 1'b0;
assign r_data_o[33] = (N3)? mem[33] :
(N0)? mem[164] : 1'b0;
assign r_data_o[32] = (N3)? mem[32] :
(N0)? mem[163] : 1'b0;
assign r_data_o[31] = (N3)? mem[31] :
(N0)? mem[162] : 1'b0;
assign r_data_o[30] = (N3)? mem[30] :
(N0)? mem[161] : 1'b0;
assign r_data_o[29] = (N3)? mem[29] :
(N0)? mem[160] : 1'b0;
assign r_data_o[28] = (N3)? mem[28] :
(N0)? mem[159] : 1'b0;
assign r_data_o[27] = (N3)? mem[27] :
(N0)? mem[158] : 1'b0;
assign r_data_o[26] = (N3)? mem[26] :
(N0)? mem[157] : 1'b0;
assign r_data_o[25] = (N3)? mem[25] :
(N0)? mem[156] : 1'b0;
assign r_data_o[24] = (N3)? mem[24] :
(N0)? mem[155] : 1'b0;
assign r_data_o[23] = (N3)? mem[23] :
(N0)? mem[154] : 1'b0;
assign r_data_o[22] = (N3)? mem[22] :
(N0)? mem[153] : 1'b0;
assign r_data_o[21] = (N3)? mem[21] :
(N0)? mem[152] : 1'b0;
assign r_data_o[20] = (N3)? mem[20] :
(N0)? mem[151] : 1'b0;
assign r_data_o[19] = (N3)? mem[19] :
(N0)? mem[150] : 1'b0;
assign r_data_o[18] = (N3)? mem[18] :
(N0)? mem[149] : 1'b0;
assign r_data_o[17] = (N3)? mem[17] :
(N0)? mem[148] : 1'b0;
assign r_data_o[16] = (N3)? mem[16] :
(N0)? mem[147] : 1'b0;
assign r_data_o[15] = (N3)? mem[15] :
(N0)? mem[146] : 1'b0;
assign r_data_o[14] = (N3)? mem[14] :
(N0)? mem[145] : 1'b0;
assign r_data_o[13] = (N3)? mem[13] :
(N0)? mem[144] : 1'b0;
assign r_data_o[12] = (N3)? mem[12] :
(N0)? mem[143] : 1'b0;
assign r_data_o[11] = (N3)? mem[11] :
(N0)? mem[142] : 1'b0;
assign r_data_o[10] = (N3)? mem[10] :
(N0)? mem[141] : 1'b0;
assign r_data_o[9] = (N3)? mem[9] :
(N0)? mem[140] : 1'b0;
assign r_data_o[8] = (N3)? mem[8] :
(N0)? mem[139] : 1'b0;
assign r_data_o[7] = (N3)? mem[7] :
(N0)? mem[138] : 1'b0;
assign r_data_o[6] = (N3)? mem[6] :
(N0)? mem[137] : 1'b0;
assign r_data_o[5] = (N3)? mem[5] :
(N0)? mem[136] : 1'b0;
assign r_data_o[4] = (N3)? mem[4] :
(N0)? mem[135] : 1'b0;
assign r_data_o[3] = (N3)? mem[3] :
(N0)? mem[134] : 1'b0;
assign r_data_o[2] = (N3)? mem[2] :
(N0)? mem[133] : 1'b0;
assign r_data_o[1] = (N3)? mem[1] :
(N0)? mem[132] : 1'b0;
assign r_data_o[0] = (N3)? mem[0] :
(N0)? mem[131] : 1'b0;
assign N5 = ~w_addr_i[0];
assign { N10, N9, N8, N7 } = (N1)? { w_addr_i[0:0], w_addr_i[0:0], N5, N5 } :
(N2)? { 1'b0, 1'b0, 1'b0, 1'b0 } : 1'b0;
assign N1 = w_v_i;
assign N2 = N4;
assign N3 = ~r_addr_i[0];
assign N4 = ~w_v_i;
always @(posedge w_clk_i) begin
if(N9) begin
{ mem[261:163], mem[131:131] } <= { w_data_i[130:32], w_data_i[0:0] };
end
if(N10) begin
{ mem[162:132] } <= { w_data_i[31:1] };
end
if(N7) begin
{ mem[130:32], mem[0:0] } <= { w_data_i[130:32], w_data_i[0:0] };
end
if(N8) begin
{ mem[31:1] } <= { w_data_i[31:1] };
end
end
endmodule
|
module bsg_mem_1r1w_synth_width_p109_els_p2_read_write_same_addr_p0_harden_p0
(
w_clk_i,
w_reset_i,
w_v_i,
w_addr_i,
w_data_i,
r_v_i,
r_addr_i,
r_data_o
);
input [0:0] w_addr_i;
input [108:0] w_data_i;
input [0:0] r_addr_i;
output [108:0] r_data_o;
input w_clk_i;
input w_reset_i;
input w_v_i;
input r_v_i;
wire [108:0] r_data_o;
wire N0,N1,N2,N3,N4,N5,N7,N8,N9,N10;
reg [217:0] mem;
assign r_data_o[108] = (N3)? mem[108] :
(N0)? mem[217] : 1'b0;
assign N0 = r_addr_i[0];
assign r_data_o[107] = (N3)? mem[107] :
(N0)? mem[216] : 1'b0;
assign r_data_o[106] = (N3)? mem[106] :
(N0)? mem[215] : 1'b0;
assign r_data_o[105] = (N3)? mem[105] :
(N0)? mem[214] : 1'b0;
assign r_data_o[104] = (N3)? mem[104] :
(N0)? mem[213] : 1'b0;
assign r_data_o[103] = (N3)? mem[103] :
(N0)? mem[212] : 1'b0;
assign r_data_o[102] = (N3)? mem[102] :
(N0)? mem[211] : 1'b0;
assign r_data_o[101] = (N3)? mem[101] :
(N0)? mem[210] : 1'b0;
assign r_data_o[100] = (N3)? mem[100] :
(N0)? mem[209] : 1'b0;
assign r_data_o[99] = (N3)? mem[99] :
(N0)? mem[208] : 1'b0;
assign r_data_o[98] = (N3)? mem[98] :
(N0)? mem[207] : 1'b0;
assign r_data_o[97] = (N3)? mem[97] :
(N0)? mem[206] : 1'b0;
assign r_data_o[96] = (N3)? mem[96] :
(N0)? mem[205] : 1'b0;
assign r_data_o[95] = (N3)? mem[95] :
(N0)? mem[204] : 1'b0;
assign r_data_o[94] = (N3)? mem[94] :
(N0)? mem[203] : 1'b0;
assign r_data_o[93] = (N3)? mem[93] :
(N0)? mem[202] : 1'b0;
assign r_data_o[92] = (N3)? mem[92] :
(N0)? mem[201] : 1'b0;
assign r_data_o[91] = (N3)? mem[91] :
(N0)? mem[200] : 1'b0;
assign r_data_o[90] = (N3)? mem[90] :
(N0)? mem[199] : 1'b0;
assign r_data_o[89] = (N3)? mem[89] :
(N0)? mem[198] : 1'b0;
assign r_data_o[88] = (N3)? mem[88] :
(N0)? mem[197] : 1'b0;
assign r_data_o[87] = (N3)? mem[87] :
(N0)? mem[196] : 1'b0;
assign r_data_o[86] = (N3)? mem[86] :
(N0)? mem[195] : 1'b0;
assign r_data_o[85] = (N3)? mem[85] :
(N0)? mem[194] : 1'b0;
assign r_data_o[84] = (N3)? mem[84] :
(N0)? mem[193] : 1'b0;
assign r_data_o[83] = (N3)? mem[83] :
(N0)? mem[192] : 1'b0;
assign r_data_o[82] = (N3)? mem[82] :
(N0)? mem[191] : 1'b0;
assign r_data_o[81] = (N3)? mem[81] :
(N0)? mem[190] : 1'b0;
assign r_data_o[80] = (N3)? mem[80] :
(N0)? mem[189] : 1'b0;
assign r_data_o[79] = (N3)? mem[79] :
(N0)? mem[188] : 1'b0;
assign r_data_o[78] = (N3)? mem[78] :
(N0)? mem[187] : 1'b0;
assign r_data_o[77] = (N3)? mem[77] :
(N0)? mem[186] : 1'b0;
assign r_data_o[76] = (N3)? mem[76] :
(N0)? mem[185] : 1'b0;
assign r_data_o[75] = (N3)? mem[75] :
(N0)? mem[184] : 1'b0;
assign r_data_o[74] = (N3)? mem[74] :
(N0)? mem[183] : 1'b0;
assign r_data_o[73] = (N3)? mem[73] :
(N0)? mem[182] : 1'b0;
assign r_data_o[72] = (N3)? mem[72] :
(N0)? mem[181] : 1'b0;
assign r_data_o[71] = (N3)? mem[71] :
(N0)? mem[180] : 1'b0;
assign r_data_o[70] = (N3)? mem[70] :
(N0)? mem[179] : 1'b0;
assign r_data_o[69] = (N3)? mem[69] :
(N0)? mem[178] : 1'b0;
assign r_data_o[68] = (N3)? mem[68] :
(N0)? mem[177] : 1'b0;
assign r_data_o[67] = (N3)? mem[67] :
(N0)? mem[176] : 1'b0;
assign r_data_o[66] = (N3)? mem[66] :
(N0)? mem[175] : 1'b0;
assign r_data_o[65] = (N3)? mem[65] :
(N0)? mem[174] : 1'b0;
assign r_data_o[64] = (N3)? mem[64] :
(N0)? mem[173] : 1'b0;
assign r_data_o[63] = (N3)? mem[63] :
(N0)? mem[172] : 1'b0;
assign r_data_o[62] = (N3)? mem[62] :
(N0)? mem[171] : 1'b0;
assign r_data_o[61] = (N3)? mem[61] :
(N0)? mem[170] : 1'b0;
assign r_data_o[60] = (N3)? mem[60] :
(N0)? mem[169] : 1'b0;
assign r_data_o[59] = (N3)? mem[59] :
(N0)? mem[168] : 1'b0;
assign r_data_o[58] = (N3)? mem[58] :
(N0)? mem[167] : 1'b0;
assign r_data_o[57] = (N3)? mem[57] :
(N0)? mem[166] : 1'b0;
assign r_data_o[56] = (N3)? mem[56] :
(N0)? mem[165] : 1'b0;
assign r_data_o[55] = (N3)? mem[55] :
(N0)? mem[164] : 1'b0;
assign r_data_o[54] = (N3)? mem[54] :
(N0)? mem[163] : 1'b0;
assign r_data_o[53] = (N3)? mem[53] :
(N0)? mem[162] : 1'b0;
assign r_data_o[52] = (N3)? mem[52] :
(N0)? mem[161] : 1'b0;
assign r_data_o[51] = (N3)? mem[51] :
(N0)? mem[160] : 1'b0;
assign r_data_o[50] = (N3)? mem[50] :
(N0)? mem[159] : 1'b0;
assign r_data_o[49] = (N3)? mem[49] :
(N0)? mem[158] : 1'b0;
assign r_data_o[48] = (N3)? mem[48] :
(N0)? mem[157] : 1'b0;
assign r_data_o[47] = (N3)? mem[47] :
(N0)? mem[156] : 1'b0;
assign r_data_o[46] = (N3)? mem[46] :
(N0)? mem[155] : 1'b0;
assign r_data_o[45] = (N3)? mem[45] :
(N0)? mem[154] : 1'b0;
assign r_data_o[44] = (N3)? mem[44] :
(N0)? mem[153] : 1'b0;
assign r_data_o[43] = (N3)? mem[43] :
(N0)? mem[152] : 1'b0;
assign r_data_o[42] = (N3)? mem[42] :
(N0)? mem[151] : 1'b0;
assign r_data_o[41] = (N3)? mem[41] :
(N0)? mem[150] : 1'b0;
assign r_data_o[40] = (N3)? mem[40] :
(N0)? mem[149] : 1'b0;
assign r_data_o[39] = (N3)? mem[39] :
(N0)? mem[148] : 1'b0;
assign r_data_o[38] = (N3)? mem[38] :
(N0)? mem[147] : 1'b0;
assign r_data_o[37] = (N3)? mem[37] :
(N0)? mem[146] : 1'b0;
assign r_data_o[36] = (N3)? mem[36] :
(N0)? mem[145] : 1'b0;
assign r_data_o[35] = (N3)? mem[35] :
(N0)? mem[144] : 1'b0;
assign r_data_o[34] = (N3)? mem[34] :
(N0)? mem[143] : 1'b0;
assign r_data_o[33] = (N3)? mem[33] :
(N0)? mem[142] : 1'b0;
assign r_data_o[32] = (N3)? mem[32] :
(N0)? mem[141] : 1'b0;
assign r_data_o[31] = (N3)? mem[31] :
(N0)? mem[140] : 1'b0;
assign r_data_o[30] = (N3)? mem[30] :
(N0)? mem[139] : 1'b0;
assign r_data_o[29] = (N3)? mem[29] :
(N0)? mem[138] : 1'b0;
assign r_data_o[28] = (N3)? mem[28] :
(N0)? mem[137] : 1'b0;
assign r_data_o[27] = (N3)? mem[27] :
(N0)? mem[136] : 1'b0;
assign r_data_o[26] = (N3)? mem[26] :
(N0)? mem[135] : 1'b0;
assign r_data_o[25] = (N3)? mem[25] :
(N0)? mem[134] : 1'b0;
assign r_data_o[24] = (N3)? mem[24] :
(N0)? mem[133] : 1'b0;
assign r_data_o[23] = (N3)? mem[23] :
(N0)? mem[132] : 1'b0;
assign r_data_o[22] = (N3)? mem[22] :
(N0)? mem[131] : 1'b0;
assign r_data_o[21] = (N3)? mem[21] :
(N0)? mem[130] : 1'b0;
assign r_data_o[20] = (N3)? mem[20] :
(N0)? mem[129] : 1'b0;
assign r_data_o[19] = (N3)? mem[19] :
(N0)? mem[128] : 1'b0;
assign r_data_o[18] = (N3)? mem[18] :
(N0)? mem[127] : 1'b0;
assign r_data_o[17] = (N3)? mem[17] :
(N0)? mem[126] : 1'b0;
assign r_data_o[16] = (N3)? mem[16] :
(N0)? mem[125] : 1'b0;
assign r_data_o[15] = (N3)? mem[15] :
(N0)? mem[124] : 1'b0;
assign r_data_o[14] = (N3)? mem[14] :
(N0)? mem[123] : 1'b0;
assign r_data_o[13] = (N3)? mem[13] :
(N0)? mem[122] : 1'b0;
assign r_data_o[12] = (N3)? mem[12] :
(N0)? mem[121] : 1'b0;
assign r_data_o[11] = (N3)? mem[11] :
(N0)? mem[120] : 1'b0;
assign r_data_o[10] = (N3)? mem[10] :
(N0)? mem[119] : 1'b0;
assign r_data_o[9] = (N3)? mem[9] :
(N0)? mem[118] : 1'b0;
assign r_data_o[8] = (N3)? mem[8] :
(N0)? mem[117] : 1'b0;
assign r_data_o[7] = (N3)? mem[7] :
(N0)? mem[116] : 1'b0;
assign r_data_o[6] = (N3)? mem[6] :
(N0)? mem[115] : 1'b0;
assign r_data_o[5] = (N3)? mem[5] :
(N0)? mem[114] : 1'b0;
assign r_data_o[4] = (N3)? mem[4] :
(N0)? mem[113] : 1'b0;
assign r_data_o[3] = (N3)? mem[3] :
(N0)? mem[112] : 1'b0;
assign r_data_o[2] = (N3)? mem[2] :
(N0)? mem[111] : 1'b0;
assign r_data_o[1] = (N3)? mem[1] :
(N0)? mem[110] : 1'b0;
assign r_data_o[0] = (N3)? mem[0] :
(N0)? mem[109] : 1'b0;
assign N5 = ~w_addr_i[0];
assign { N10, N9, N8, N7 } = (N1)? { w_addr_i[0:0], w_addr_i[0:0], N5, N5 } :
(N2)? { 1'b0, 1'b0, 1'b0, 1'b0 } : 1'b0;
assign N1 = w_v_i;
assign N2 = N4;
assign N3 = ~r_addr_i[0];
assign N4 = ~w_v_i;
always @(posedge w_clk_i) begin
if(N9) begin
{ mem[217:119], mem[109:109] } <= { w_data_i[108:10], w_data_i[0:0] };
end
if(N10) begin
{ mem[118:110] } <= { w_data_i[9:1] };
end
if(N7) begin
{ mem[108:10], mem[0:0] } <= { w_data_i[108:10], w_data_i[0:0] };
end
if(N8) begin
{ mem[9:1] } <= { w_data_i[9:1] };
end
end
endmodule
|
module bsg_mem_1r1w_synth_width_p97_els_p2_read_write_same_addr_p0_harden_p0
(
w_clk_i,
w_reset_i,
w_v_i,
w_addr_i,
w_data_i,
r_v_i,
r_addr_i,
r_data_o
);
input [0:0] w_addr_i;
input [96:0] w_data_i;
input [0:0] r_addr_i;
output [96:0] r_data_o;
input w_clk_i;
input w_reset_i;
input w_v_i;
input r_v_i;
wire [96:0] r_data_o;
wire N0,N1,N2,N3,N4,N5,N7,N8;
reg [193:0] mem;
assign r_data_o[96] = (N3)? mem[96] :
(N0)? mem[193] : 1'b0;
assign N0 = r_addr_i[0];
assign r_data_o[95] = (N3)? mem[95] :
(N0)? mem[192] : 1'b0;
assign r_data_o[94] = (N3)? mem[94] :
(N0)? mem[191] : 1'b0;
assign r_data_o[93] = (N3)? mem[93] :
(N0)? mem[190] : 1'b0;
assign r_data_o[92] = (N3)? mem[92] :
(N0)? mem[189] : 1'b0;
assign r_data_o[91] = (N3)? mem[91] :
(N0)? mem[188] : 1'b0;
assign r_data_o[90] = (N3)? mem[90] :
(N0)? mem[187] : 1'b0;
assign r_data_o[89] = (N3)? mem[89] :
(N0)? mem[186] : 1'b0;
assign r_data_o[88] = (N3)? mem[88] :
(N0)? mem[185] : 1'b0;
assign r_data_o[87] = (N3)? mem[87] :
(N0)? mem[184] : 1'b0;
assign r_data_o[86] = (N3)? mem[86] :
(N0)? mem[183] : 1'b0;
assign r_data_o[85] = (N3)? mem[85] :
(N0)? mem[182] : 1'b0;
assign r_data_o[84] = (N3)? mem[84] :
(N0)? mem[181] : 1'b0;
assign r_data_o[83] = (N3)? mem[83] :
(N0)? mem[180] : 1'b0;
assign r_data_o[82] = (N3)? mem[82] :
(N0)? mem[179] : 1'b0;
assign r_data_o[81] = (N3)? mem[81] :
(N0)? mem[178] : 1'b0;
assign r_data_o[80] = (N3)? mem[80] :
(N0)? mem[177] : 1'b0;
assign r_data_o[79] = (N3)? mem[79] :
(N0)? mem[176] : 1'b0;
assign r_data_o[78] = (N3)? mem[78] :
(N0)? mem[175] : 1'b0;
assign r_data_o[77] = (N3)? mem[77] :
(N0)? mem[174] : 1'b0;
assign r_data_o[76] = (N3)? mem[76] :
(N0)? mem[173] : 1'b0;
assign r_data_o[75] = (N3)? mem[75] :
(N0)? mem[172] : 1'b0;
assign r_data_o[74] = (N3)? mem[74] :
(N0)? mem[171] : 1'b0;
assign r_data_o[73] = (N3)? mem[73] :
(N0)? mem[170] : 1'b0;
assign r_data_o[72] = (N3)? mem[72] :
(N0)? mem[169] : 1'b0;
assign r_data_o[71] = (N3)? mem[71] :
(N0)? mem[168] : 1'b0;
assign r_data_o[70] = (N3)? mem[70] :
(N0)? mem[167] : 1'b0;
assign r_data_o[69] = (N3)? mem[69] :
(N0)? mem[166] : 1'b0;
assign r_data_o[68] = (N3)? mem[68] :
(N0)? mem[165] : 1'b0;
assign r_data_o[67] = (N3)? mem[67] :
(N0)? mem[164] : 1'b0;
assign r_data_o[66] = (N3)? mem[66] :
(N0)? mem[163] : 1'b0;
assign r_data_o[65] = (N3)? mem[65] :
(N0)? mem[162] : 1'b0;
assign r_data_o[64] = (N3)? mem[64] :
(N0)? mem[161] : 1'b0;
assign r_data_o[63] = (N3)? mem[63] :
(N0)? mem[160] : 1'b0;
assign r_data_o[62] = (N3)? mem[62] :
(N0)? mem[159] : 1'b0;
assign r_data_o[61] = (N3)? mem[61] :
(N0)? mem[158] : 1'b0;
assign r_data_o[60] = (N3)? mem[60] :
(N0)? mem[157] : 1'b0;
assign r_data_o[59] = (N3)? mem[59] :
(N0)? mem[156] : 1'b0;
assign r_data_o[58] = (N3)? mem[58] :
(N0)? mem[155] : 1'b0;
assign r_data_o[57] = (N3)? mem[57] :
(N0)? mem[154] : 1'b0;
assign r_data_o[56] = (N3)? mem[56] :
(N0)? mem[153] : 1'b0;
assign r_data_o[55] = (N3)? mem[55] :
(N0)? mem[152] : 1'b0;
assign r_data_o[54] = (N3)? mem[54] :
(N0)? mem[151] : 1'b0;
assign r_data_o[53] = (N3)? mem[53] :
(N0)? mem[150] : 1'b0;
assign r_data_o[52] = (N3)? mem[52] :
(N0)? mem[149] : 1'b0;
assign r_data_o[51] = (N3)? mem[51] :
(N0)? mem[148] : 1'b0;
assign r_data_o[50] = (N3)? mem[50] :
(N0)? mem[147] : 1'b0;
assign r_data_o[49] = (N3)? mem[49] :
(N0)? mem[146] : 1'b0;
assign r_data_o[48] = (N3)? mem[48] :
(N0)? mem[145] : 1'b0;
assign r_data_o[47] = (N3)? mem[47] :
(N0)? mem[144] : 1'b0;
assign r_data_o[46] = (N3)? mem[46] :
(N0)? mem[143] : 1'b0;
assign r_data_o[45] = (N3)? mem[45] :
(N0)? mem[142] : 1'b0;
assign r_data_o[44] = (N3)? mem[44] :
(N0)? mem[141] : 1'b0;
assign r_data_o[43] = (N3)? mem[43] :
(N0)? mem[140] : 1'b0;
assign r_data_o[42] = (N3)? mem[42] :
(N0)? mem[139] : 1'b0;
assign r_data_o[41] = (N3)? mem[41] :
(N0)? mem[138] : 1'b0;
assign r_data_o[40] = (N3)? mem[40] :
(N0)? mem[137] : 1'b0;
assign r_data_o[39] = (N3)? mem[39] :
(N0)? mem[136] : 1'b0;
assign r_data_o[38] = (N3)? mem[38] :
(N0)? mem[135] : 1'b0;
assign r_data_o[37] = (N3)? mem[37] :
(N0)? mem[134] : 1'b0;
assign r_data_o[36] = (N3)? mem[36] :
(N0)? mem[133] : 1'b0;
assign r_data_o[35] = (N3)? mem[35] :
(N0)? mem[132] : 1'b0;
assign r_data_o[34] = (N3)? mem[34] :
(N0)? mem[131] : 1'b0;
assign r_data_o[33] = (N3)? mem[33] :
(N0)? mem[130] : 1'b0;
assign r_data_o[32] = (N3)? mem[32] :
(N0)? mem[129] : 1'b0;
assign r_data_o[31] = (N3)? mem[31] :
(N0)? mem[128] : 1'b0;
assign r_data_o[30] = (N3)? mem[30] :
(N0)? mem[127] : 1'b0;
assign r_data_o[29] = (N3)? mem[29] :
(N0)? mem[126] : 1'b0;
assign r_data_o[28] = (N3)? mem[28] :
(N0)? mem[125] : 1'b0;
assign r_data_o[27] = (N3)? mem[27] :
(N0)? mem[124] : 1'b0;
assign r_data_o[26] = (N3)? mem[26] :
(N0)? mem[123] : 1'b0;
assign r_data_o[25] = (N3)? mem[25] :
(N0)? mem[122] : 1'b0;
assign r_data_o[24] = (N3)? mem[24] :
(N0)? mem[121] : 1'b0;
assign r_data_o[23] = (N3)? mem[23] :
(N0)? mem[120] : 1'b0;
assign r_data_o[22] = (N3)? mem[22] :
(N0)? mem[119] : 1'b0;
assign r_data_o[21] = (N3)? mem[21] :
(N0)? mem[118] : 1'b0;
assign r_data_o[20] = (N3)? mem[20] :
(N0)? mem[117] : 1'b0;
assign r_data_o[19] = (N3)? mem[19] :
(N0)? mem[116] : 1'b0;
assign r_data_o[18] = (N3)? mem[18] :
(N0)? mem[115] : 1'b0;
assign r_data_o[17] = (N3)? mem[17] :
(N0)? mem[114] : 1'b0;
assign r_data_o[16] = (N3)? mem[16] :
(N0)? mem[113] : 1'b0;
assign r_data_o[15] = (N3)? mem[15] :
(N0)? mem[112] : 1'b0;
assign r_data_o[14] = (N3)? mem[14] :
(N0)? mem[111] : 1'b0;
assign r_data_o[13] = (N3)? mem[13] :
(N0)? mem[110] : 1'b0;
assign r_data_o[12] = (N3)? mem[12] :
(N0)? mem[109] : 1'b0;
assign r_data_o[11] = (N3)? mem[11] :
(N0)? mem[108] : 1'b0;
assign r_data_o[10] = (N3)? mem[10] :
(N0)? mem[107] : 1'b0;
assign r_data_o[9] = (N3)? mem[9] :
(N0)? mem[106] : 1'b0;
assign r_data_o[8] = (N3)? mem[8] :
(N0)? mem[105] : 1'b0;
assign r_data_o[7] = (N3)? mem[7] :
(N0)? mem[104] : 1'b0;
assign r_data_o[6] = (N3)? mem[6] :
(N0)? mem[103] : 1'b0;
assign r_data_o[5] = (N3)? mem[5] :
(N0)? mem[102] : 1'b0;
assign r_data_o[4] = (N3)? mem[4] :
(N0)? mem[101] : 1'b0;
assign r_data_o[3] = (N3)? mem[3] :
(N0)? mem[100] : 1'b0;
assign r_data_o[2] = (N3)? mem[2] :
(N0)? mem[99] : 1'b0;
assign r_data_o[1] = (N3)? mem[1] :
(N0)? mem[98] : 1'b0;
assign r_data_o[0] = (N3)? mem[0] :
(N0)? mem[97] : 1'b0;
assign N5 = ~w_addr_i[0];
assign { N8, N7 } = (N1)? { w_addr_i[0:0], N5 } :
(N2)? { 1'b0, 1'b0 } : 1'b0;
assign N1 = w_v_i;
assign N2 = N4;
assign N3 = ~r_addr_i[0];
assign N4 = ~w_v_i;
always @(posedge w_clk_i) begin
if(N8) begin
{ mem[193:97] } <= { w_data_i[96:0] };
end
if(N7) begin
{ mem[96:0] } <= { w_data_i[96:0] };
end
end
endmodule
|
module bp_be_detector_vaddr_width_p39_paddr_width_p22_asid_width_p10_branch_metadata_fwd_width_p36_load_to_use_forwarding_p1
(
clk_i,
reset_i,
calc_status_i,
expected_npc_i,
mmu_cmd_ready_i,
chk_dispatch_v_o,
chk_roll_o,
chk_poison_isd_o,
chk_poison_ex1_o,
chk_poison_ex2_o,
chk_poison_ex3_o
);
input [306:0] calc_status_i;
input [63:0] expected_npc_i;
input clk_i;
input reset_i;
input mmu_cmd_ready_i;
output chk_dispatch_v_o;
output chk_roll_o;
output chk_poison_isd_o;
output chk_poison_ex1_o;
output chk_poison_ex2_o;
output chk_poison_ex3_o;
wire chk_dispatch_v_o,chk_roll_o,chk_poison_isd_o,chk_poison_ex1_o,chk_poison_ex2_o,
chk_poison_ex3_o,N0,N1,N2,N3,N4,N5,stall_haz_v,data_haz_v,struct_haz_v,N6,
mispredict_v,N7,N8,N9,N10,N11,N12,N13,N14,N15,N16,N17,N18,N19,N20,N21,N22,N23,N24,N25,
N26,N27,N28,N29,N30,N31,N32,N33,N34,N35,N36,N37,N38,N39,N40,N41,N42,N43,N44,N45,
N46,N47,N48,N49,N50,N51,N52;
wire [2:0] rs1_match_vector,rs2_match_vector,frs1_data_haz_v,frs2_data_haz_v;
wire [1:0] irs1_data_haz_v,irs2_data_haz_v;
assign chk_roll_o = calc_status_i[3];
assign N0 = calc_status_i[303:299] == calc_status_i[73:69];
assign N1 = calc_status_i[296:292] == calc_status_i[73:69];
assign N2 = calc_status_i[303:299] == calc_status_i[84:80];
assign N3 = calc_status_i[296:292] == calc_status_i[84:80];
assign N4 = calc_status_i[303:299] == calc_status_i[95:91];
assign N5 = calc_status_i[296:292] == calc_status_i[95:91];
assign N6 = calc_status_i[187:124] != expected_npc_i;
assign N7 = calc_status_i[302] | calc_status_i[303];
assign N8 = calc_status_i[301] | N7;
assign N9 = calc_status_i[300] | N8;
assign N10 = calc_status_i[299] | N9;
assign N11 = calc_status_i[295] | calc_status_i[296];
assign N12 = calc_status_i[294] | N11;
assign N13 = calc_status_i[293] | N12;
assign N14 = calc_status_i[292] | N13;
assign rs1_match_vector[0] = N10 & N0;
assign rs2_match_vector[0] = N14 & N1;
assign rs1_match_vector[1] = N10 & N2;
assign rs2_match_vector[1] = N14 & N3;
assign rs1_match_vector[2] = N10 & N4;
assign rs2_match_vector[2] = N14 & N5;
assign irs1_data_haz_v[0] = N15 & N16;
assign N15 = calc_status_i[305] & rs1_match_vector[0];
assign N16 = calc_status_i[78] | calc_status_i[77];
assign irs2_data_haz_v[0] = N17 & N18;
assign N17 = calc_status_i[298] & rs2_match_vector[0];
assign N18 = calc_status_i[78] | calc_status_i[77];
assign frs1_data_haz_v[0] = N19 & N20;
assign N19 = calc_status_i[304] & rs1_match_vector[0];
assign N20 = calc_status_i[76] | calc_status_i[75];
assign frs2_data_haz_v[0] = N21 & N22;
assign N21 = calc_status_i[297] & rs2_match_vector[0];
assign N22 = calc_status_i[76] | calc_status_i[75];
assign irs1_data_haz_v[1] = N23 & calc_status_i[88];
assign N23 = calc_status_i[305] & rs1_match_vector[1];
assign irs2_data_haz_v[1] = N24 & calc_status_i[88];
assign N24 = calc_status_i[298] & rs2_match_vector[1];
assign frs1_data_haz_v[1] = N25 & N26;
assign N25 = calc_status_i[304] & rs1_match_vector[1];
assign N26 = calc_status_i[87] | calc_status_i[86];
assign frs2_data_haz_v[1] = N27 & N28;
assign N27 = calc_status_i[297] & rs2_match_vector[1];
assign N28 = calc_status_i[87] | calc_status_i[86];
assign frs1_data_haz_v[2] = N29 & calc_status_i[97];
assign N29 = calc_status_i[304] & rs1_match_vector[2];
assign frs2_data_haz_v[2] = N30 & calc_status_i[97];
assign N30 = calc_status_i[297] & rs2_match_vector[2];
assign stall_haz_v = N32 | calc_status_i[107];
assign N32 = N31 | calc_status_i[96];
assign N31 = calc_status_i[74] | calc_status_i[85];
assign data_haz_v = N39 | N41;
assign N39 = N36 | N38;
assign N36 = N34 | N35;
assign N34 = stall_haz_v | N33;
assign N33 = irs1_data_haz_v[1] | irs1_data_haz_v[0];
assign N35 = irs2_data_haz_v[1] | irs2_data_haz_v[0];
assign N38 = N37 | frs1_data_haz_v[0];
assign N37 = frs1_data_haz_v[2] | frs1_data_haz_v[1];
assign N41 = N40 | frs2_data_haz_v[0];
assign N40 = frs2_data_haz_v[2] | frs2_data_haz_v[1];
assign struct_haz_v = ~mmu_cmd_ready_i;
assign mispredict_v = calc_status_i[188] & N6;
assign chk_dispatch_v_o = N43 | calc_status_i[3];
assign N43 = ~N42;
assign N42 = data_haz_v | struct_haz_v;
assign chk_poison_isd_o = N45 | calc_status_i[1];
assign N45 = N44 | calc_status_i[2];
assign N44 = reset_i | calc_status_i[3];
assign chk_poison_ex1_o = N48 | calc_status_i[1];
assign N48 = N47 | calc_status_i[2];
assign N47 = N46 | calc_status_i[3];
assign N46 = reset_i | mispredict_v;
assign chk_poison_ex2_o = N50 | calc_status_i[1];
assign N50 = N49 | calc_status_i[2];
assign N49 = reset_i | calc_status_i[3];
assign chk_poison_ex3_o = N52 | calc_status_i[1];
assign N52 = N51 | calc_status_i[2];
assign N51 = reset_i | calc_status_i[3];
endmodule
|
module bsg_swap_width_p256
(
data_i,
swap_i,
data_o
);
input [511:0] data_i;
output [511:0] data_o;
input swap_i;
wire [511:0] data_o;
wire N0,N1,N2;
assign data_o = (N0)? { data_i[255:0], data_i[511:256] } :
(N1)? data_i : 1'b0;
assign N0 = swap_i;
assign N1 = N2;
assign N2 = ~swap_i;
endmodule
|
module bp_be_pipe_fp
(
clk_i,
reset_i,
kill_ex1_i,
kill_ex2_i,
kill_ex3_i,
kill_ex4_i,
decode_i,
rs1_i,
rs2_i,
data_o
);
input [50:0] decode_i;
input [63:0] rs1_i;
input [63:0] rs2_i;
output [63:0] data_o;
input clk_i;
input reset_i;
input kill_ex1_i;
input kill_ex2_i;
input kill_ex3_i;
input kill_ex4_i;
wire [63:0] data_o;
assign data_o[0] = 1'b0;
assign data_o[1] = 1'b0;
assign data_o[2] = 1'b0;
assign data_o[3] = 1'b0;
assign data_o[4] = 1'b0;
assign data_o[5] = 1'b0;
assign data_o[6] = 1'b0;
assign data_o[7] = 1'b0;
assign data_o[8] = 1'b0;
assign data_o[9] = 1'b0;
assign data_o[10] = 1'b0;
assign data_o[11] = 1'b0;
assign data_o[12] = 1'b0;
assign data_o[13] = 1'b0;
assign data_o[14] = 1'b0;
assign data_o[15] = 1'b0;
assign data_o[16] = 1'b0;
assign data_o[17] = 1'b0;
assign data_o[18] = 1'b0;
assign data_o[19] = 1'b0;
assign data_o[20] = 1'b0;
assign data_o[21] = 1'b0;
assign data_o[22] = 1'b0;
assign data_o[23] = 1'b0;
assign data_o[24] = 1'b0;
assign data_o[25] = 1'b0;
assign data_o[26] = 1'b0;
assign data_o[27] = 1'b0;
assign data_o[28] = 1'b0;
assign data_o[29] = 1'b0;
assign data_o[30] = 1'b0;
assign data_o[31] = 1'b0;
assign data_o[32] = 1'b0;
assign data_o[33] = 1'b0;
assign data_o[34] = 1'b0;
assign data_o[35] = 1'b0;
assign data_o[36] = 1'b0;
assign data_o[37] = 1'b0;
assign data_o[38] = 1'b0;
assign data_o[39] = 1'b0;
assign data_o[40] = 1'b0;
assign data_o[41] = 1'b0;
assign data_o[42] = 1'b0;
assign data_o[43] = 1'b0;
assign data_o[44] = 1'b0;
assign data_o[45] = 1'b0;
assign data_o[46] = 1'b0;
assign data_o[47] = 1'b0;
assign data_o[48] = 1'b0;
assign data_o[49] = 1'b0;
assign data_o[50] = 1'b0;
assign data_o[51] = 1'b0;
assign data_o[52] = 1'b0;
assign data_o[53] = 1'b0;
assign data_o[54] = 1'b0;
assign data_o[55] = 1'b0;
assign data_o[56] = 1'b0;
assign data_o[57] = 1'b0;
assign data_o[58] = 1'b0;
assign data_o[59] = 1'b0;
assign data_o[60] = 1'b0;
assign data_o[61] = 1'b0;
assign data_o[62] = 1'b0;
assign data_o[63] = 1'b0;
endmodule
|
module bsg_mux_width_p131_els_p4
(
data_i,
sel_i,
data_o
);
input [523:0] data_i;
input [1:0] sel_i;
output [130:0] data_o;
wire [130:0] data_o;
wire N0,N1,N2,N3,N4,N5;
assign data_o[130] = (N2)? data_i[130] :
(N4)? data_i[261] :
(N3)? data_i[392] :
(N5)? data_i[523] : 1'b0;
assign data_o[129] = (N2)? data_i[129] :
(N4)? data_i[260] :
(N3)? data_i[391] :
(N5)? data_i[522] : 1'b0;
assign data_o[128] = (N2)? data_i[128] :
(N4)? data_i[259] :
(N3)? data_i[390] :
(N5)? data_i[521] : 1'b0;
assign data_o[127] = (N2)? data_i[127] :
(N4)? data_i[258] :
(N3)? data_i[389] :
(N5)? data_i[520] : 1'b0;
assign data_o[126] = (N2)? data_i[126] :
(N4)? data_i[257] :
(N3)? data_i[388] :
(N5)? data_i[519] : 1'b0;
assign data_o[125] = (N2)? data_i[125] :
(N4)? data_i[256] :
(N3)? data_i[387] :
(N5)? data_i[518] : 1'b0;
assign data_o[124] = (N2)? data_i[124] :
(N4)? data_i[255] :
(N3)? data_i[386] :
(N5)? data_i[517] : 1'b0;
assign data_o[123] = (N2)? data_i[123] :
(N4)? data_i[254] :
(N3)? data_i[385] :
(N5)? data_i[516] : 1'b0;
assign data_o[122] = (N2)? data_i[122] :
(N4)? data_i[253] :
(N3)? data_i[384] :
(N5)? data_i[515] : 1'b0;
assign data_o[121] = (N2)? data_i[121] :
(N4)? data_i[252] :
(N3)? data_i[383] :
(N5)? data_i[514] : 1'b0;
assign data_o[120] = (N2)? data_i[120] :
(N4)? data_i[251] :
(N3)? data_i[382] :
(N5)? data_i[513] : 1'b0;
assign data_o[119] = (N2)? data_i[119] :
(N4)? data_i[250] :
(N3)? data_i[381] :
(N5)? data_i[512] : 1'b0;
assign data_o[118] = (N2)? data_i[118] :
(N4)? data_i[249] :
(N3)? data_i[380] :
(N5)? data_i[511] : 1'b0;
assign data_o[117] = (N2)? data_i[117] :
(N4)? data_i[248] :
(N3)? data_i[379] :
(N5)? data_i[510] : 1'b0;
assign data_o[116] = (N2)? data_i[116] :
(N4)? data_i[247] :
(N3)? data_i[378] :
(N5)? data_i[509] : 1'b0;
assign data_o[115] = (N2)? data_i[115] :
(N4)? data_i[246] :
(N3)? data_i[377] :
(N5)? data_i[508] : 1'b0;
assign data_o[114] = (N2)? data_i[114] :
(N4)? data_i[245] :
(N3)? data_i[376] :
(N5)? data_i[507] : 1'b0;
assign data_o[113] = (N2)? data_i[113] :
(N4)? data_i[244] :
(N3)? data_i[375] :
(N5)? data_i[506] : 1'b0;
assign data_o[112] = (N2)? data_i[112] :
(N4)? data_i[243] :
(N3)? data_i[374] :
(N5)? data_i[505] : 1'b0;
assign data_o[111] = (N2)? data_i[111] :
(N4)? data_i[242] :
(N3)? data_i[373] :
(N5)? data_i[504] : 1'b0;
assign data_o[110] = (N2)? data_i[110] :
(N4)? data_i[241] :
(N3)? data_i[372] :
(N5)? data_i[503] : 1'b0;
assign data_o[109] = (N2)? data_i[109] :
(N4)? data_i[240] :
(N3)? data_i[371] :
(N5)? data_i[502] : 1'b0;
assign data_o[108] = (N2)? data_i[108] :
(N4)? data_i[239] :
(N3)? data_i[370] :
(N5)? data_i[501] : 1'b0;
assign data_o[107] = (N2)? data_i[107] :
(N4)? data_i[238] :
(N3)? data_i[369] :
(N5)? data_i[500] : 1'b0;
assign data_o[106] = (N2)? data_i[106] :
(N4)? data_i[237] :
(N3)? data_i[368] :
(N5)? data_i[499] : 1'b0;
assign data_o[105] = (N2)? data_i[105] :
(N4)? data_i[236] :
(N3)? data_i[367] :
(N5)? data_i[498] : 1'b0;
assign data_o[104] = (N2)? data_i[104] :
(N4)? data_i[235] :
(N3)? data_i[366] :
(N5)? data_i[497] : 1'b0;
assign data_o[103] = (N2)? data_i[103] :
(N4)? data_i[234] :
(N3)? data_i[365] :
(N5)? data_i[496] : 1'b0;
assign data_o[102] = (N2)? data_i[102] :
(N4)? data_i[233] :
(N3)? data_i[364] :
(N5)? data_i[495] : 1'b0;
assign data_o[101] = (N2)? data_i[101] :
(N4)? data_i[232] :
(N3)? data_i[363] :
(N5)? data_i[494] : 1'b0;
assign data_o[100] = (N2)? data_i[100] :
(N4)? data_i[231] :
(N3)? data_i[362] :
(N5)? data_i[493] : 1'b0;
assign data_o[99] = (N2)? data_i[99] :
(N4)? data_i[230] :
(N3)? data_i[361] :
(N5)? data_i[492] : 1'b0;
assign data_o[98] = (N2)? data_i[98] :
(N4)? data_i[229] :
(N3)? data_i[360] :
(N5)? data_i[491] : 1'b0;
assign data_o[97] = (N2)? data_i[97] :
(N4)? data_i[228] :
(N3)? data_i[359] :
(N5)? data_i[490] : 1'b0;
assign data_o[96] = (N2)? data_i[96] :
(N4)? data_i[227] :
(N3)? data_i[358] :
(N5)? data_i[489] : 1'b0;
assign data_o[95] = (N2)? data_i[95] :
(N4)? data_i[226] :
(N3)? data_i[357] :
(N5)? data_i[488] : 1'b0;
assign data_o[94] = (N2)? data_i[94] :
(N4)? data_i[225] :
(N3)? data_i[356] :
(N5)? data_i[487] : 1'b0;
assign data_o[93] = (N2)? data_i[93] :
(N4)? data_i[224] :
(N3)? data_i[355] :
(N5)? data_i[486] : 1'b0;
assign data_o[92] = (N2)? data_i[92] :
(N4)? data_i[223] :
(N3)? data_i[354] :
(N5)? data_i[485] : 1'b0;
assign data_o[91] = (N2)? data_i[91] :
(N4)? data_i[222] :
(N3)? data_i[353] :
(N5)? data_i[484] : 1'b0;
assign data_o[90] = (N2)? data_i[90] :
(N4)? data_i[221] :
(N3)? data_i[352] :
(N5)? data_i[483] : 1'b0;
assign data_o[89] = (N2)? data_i[89] :
(N4)? data_i[220] :
(N3)? data_i[351] :
(N5)? data_i[482] : 1'b0;
assign data_o[88] = (N2)? data_i[88] :
(N4)? data_i[219] :
(N3)? data_i[350] :
(N5)? data_i[481] : 1'b0;
assign data_o[87] = (N2)? data_i[87] :
(N4)? data_i[218] :
(N3)? data_i[349] :
(N5)? data_i[480] : 1'b0;
assign data_o[86] = (N2)? data_i[86] :
(N4)? data_i[217] :
(N3)? data_i[348] :
(N5)? data_i[479] : 1'b0;
assign data_o[85] = (N2)? data_i[85] :
(N4)? data_i[216] :
(N3)? data_i[347] :
(N5)? data_i[478] : 1'b0;
assign data_o[84] = (N2)? data_i[84] :
(N4)? data_i[215] :
(N3)? data_i[346] :
(N5)? data_i[477] : 1'b0;
assign data_o[83] = (N2)? data_i[83] :
(N4)? data_i[214] :
(N3)? data_i[345] :
(N5)? data_i[476] : 1'b0;
assign data_o[82] = (N2)? data_i[82] :
(N4)? data_i[213] :
(N3)? data_i[344] :
(N5)? data_i[475] : 1'b0;
assign data_o[81] = (N2)? data_i[81] :
(N4)? data_i[212] :
(N3)? data_i[343] :
(N5)? data_i[474] : 1'b0;
assign data_o[80] = (N2)? data_i[80] :
(N4)? data_i[211] :
(N3)? data_i[342] :
(N5)? data_i[473] : 1'b0;
assign data_o[79] = (N2)? data_i[79] :
(N4)? data_i[210] :
(N3)? data_i[341] :
(N5)? data_i[472] : 1'b0;
assign data_o[78] = (N2)? data_i[78] :
(N4)? data_i[209] :
(N3)? data_i[340] :
(N5)? data_i[471] : 1'b0;
assign data_o[77] = (N2)? data_i[77] :
(N4)? data_i[208] :
(N3)? data_i[339] :
(N5)? data_i[470] : 1'b0;
assign data_o[76] = (N2)? data_i[76] :
(N4)? data_i[207] :
(N3)? data_i[338] :
(N5)? data_i[469] : 1'b0;
assign data_o[75] = (N2)? data_i[75] :
(N4)? data_i[206] :
(N3)? data_i[337] :
(N5)? data_i[468] : 1'b0;
assign data_o[74] = (N2)? data_i[74] :
(N4)? data_i[205] :
(N3)? data_i[336] :
(N5)? data_i[467] : 1'b0;
assign data_o[73] = (N2)? data_i[73] :
(N4)? data_i[204] :
(N3)? data_i[335] :
(N5)? data_i[466] : 1'b0;
assign data_o[72] = (N2)? data_i[72] :
(N4)? data_i[203] :
(N3)? data_i[334] :
(N5)? data_i[465] : 1'b0;
assign data_o[71] = (N2)? data_i[71] :
(N4)? data_i[202] :
(N3)? data_i[333] :
(N5)? data_i[464] : 1'b0;
assign data_o[70] = (N2)? data_i[70] :
(N4)? data_i[201] :
(N3)? data_i[332] :
(N5)? data_i[463] : 1'b0;
assign data_o[69] = (N2)? data_i[69] :
(N4)? data_i[200] :
(N3)? data_i[331] :
(N5)? data_i[462] : 1'b0;
assign data_o[68] = (N2)? data_i[68] :
(N4)? data_i[199] :
(N3)? data_i[330] :
(N5)? data_i[461] : 1'b0;
assign data_o[67] = (N2)? data_i[67] :
(N4)? data_i[198] :
(N3)? data_i[329] :
(N5)? data_i[460] : 1'b0;
assign data_o[66] = (N2)? data_i[66] :
(N4)? data_i[197] :
(N3)? data_i[328] :
(N5)? data_i[459] : 1'b0;
assign data_o[65] = (N2)? data_i[65] :
(N4)? data_i[196] :
(N3)? data_i[327] :
(N5)? data_i[458] : 1'b0;
assign data_o[64] = (N2)? data_i[64] :
(N4)? data_i[195] :
(N3)? data_i[326] :
(N5)? data_i[457] : 1'b0;
assign data_o[63] = (N2)? data_i[63] :
(N4)? data_i[194] :
(N3)? data_i[325] :
(N5)? data_i[456] : 1'b0;
assign data_o[62] = (N2)? data_i[62] :
(N4)? data_i[193] :
(N3)? data_i[324] :
(N5)? data_i[455] : 1'b0;
assign data_o[61] = (N2)? data_i[61] :
(N4)? data_i[192] :
(N3)? data_i[323] :
(N5)? data_i[454] : 1'b0;
assign data_o[60] = (N2)? data_i[60] :
(N4)? data_i[191] :
(N3)? data_i[322] :
(N5)? data_i[453] : 1'b0;
assign data_o[59] = (N2)? data_i[59] :
(N4)? data_i[190] :
(N3)? data_i[321] :
(N5)? data_i[452] : 1'b0;
assign data_o[58] = (N2)? data_i[58] :
(N4)? data_i[189] :
(N3)? data_i[320] :
(N5)? data_i[451] : 1'b0;
assign data_o[57] = (N2)? data_i[57] :
(N4)? data_i[188] :
(N3)? data_i[319] :
(N5)? data_i[450] : 1'b0;
assign data_o[56] = (N2)? data_i[56] :
(N4)? data_i[187] :
(N3)? data_i[318] :
(N5)? data_i[449] : 1'b0;
assign data_o[55] = (N2)? data_i[55] :
(N4)? data_i[186] :
(N3)? data_i[317] :
(N5)? data_i[448] : 1'b0;
assign data_o[54] = (N2)? data_i[54] :
(N4)? data_i[185] :
(N3)? data_i[316] :
(N5)? data_i[447] : 1'b0;
assign data_o[53] = (N2)? data_i[53] :
(N4)? data_i[184] :
(N3)? data_i[315] :
(N5)? data_i[446] : 1'b0;
assign data_o[52] = (N2)? data_i[52] :
(N4)? data_i[183] :
(N3)? data_i[314] :
(N5)? data_i[445] : 1'b0;
assign data_o[51] = (N2)? data_i[51] :
(N4)? data_i[182] :
(N3)? data_i[313] :
(N5)? data_i[444] : 1'b0;
assign data_o[50] = (N2)? data_i[50] :
(N4)? data_i[181] :
(N3)? data_i[312] :
(N5)? data_i[443] : 1'b0;
assign data_o[49] = (N2)? data_i[49] :
(N4)? data_i[180] :
(N3)? data_i[311] :
(N5)? data_i[442] : 1'b0;
assign data_o[48] = (N2)? data_i[48] :
(N4)? data_i[179] :
(N3)? data_i[310] :
(N5)? data_i[441] : 1'b0;
assign data_o[47] = (N2)? data_i[47] :
(N4)? data_i[178] :
(N3)? data_i[309] :
(N5)? data_i[440] : 1'b0;
assign data_o[46] = (N2)? data_i[46] :
(N4)? data_i[177] :
(N3)? data_i[308] :
(N5)? data_i[439] : 1'b0;
assign data_o[45] = (N2)? data_i[45] :
(N4)? data_i[176] :
(N3)? data_i[307] :
(N5)? data_i[438] : 1'b0;
assign data_o[44] = (N2)? data_i[44] :
(N4)? data_i[175] :
(N3)? data_i[306] :
(N5)? data_i[437] : 1'b0;
assign data_o[43] = (N2)? data_i[43] :
(N4)? data_i[174] :
(N3)? data_i[305] :
(N5)? data_i[436] : 1'b0;
assign data_o[42] = (N2)? data_i[42] :
(N4)? data_i[173] :
(N3)? data_i[304] :
(N5)? data_i[435] : 1'b0;
assign data_o[41] = (N2)? data_i[41] :
(N4)? data_i[172] :
(N3)? data_i[303] :
(N5)? data_i[434] : 1'b0;
assign data_o[40] = (N2)? data_i[40] :
(N4)? data_i[171] :
(N3)? data_i[302] :
(N5)? data_i[433] : 1'b0;
assign data_o[39] = (N2)? data_i[39] :
(N4)? data_i[170] :
(N3)? data_i[301] :
(N5)? data_i[432] : 1'b0;
assign data_o[38] = (N2)? data_i[38] :
(N4)? data_i[169] :
(N3)? data_i[300] :
(N5)? data_i[431] : 1'b0;
assign data_o[37] = (N2)? data_i[37] :
(N4)? data_i[168] :
(N3)? data_i[299] :
(N5)? data_i[430] : 1'b0;
assign data_o[36] = (N2)? data_i[36] :
(N4)? data_i[167] :
(N3)? data_i[298] :
(N5)? data_i[429] : 1'b0;
assign data_o[35] = (N2)? data_i[35] :
(N4)? data_i[166] :
(N3)? data_i[297] :
(N5)? data_i[428] : 1'b0;
assign data_o[34] = (N2)? data_i[34] :
(N4)? data_i[165] :
(N3)? data_i[296] :
(N5)? data_i[427] : 1'b0;
assign data_o[33] = (N2)? data_i[33] :
(N4)? data_i[164] :
(N3)? data_i[295] :
(N5)? data_i[426] : 1'b0;
assign data_o[32] = (N2)? data_i[32] :
(N4)? data_i[163] :
(N3)? data_i[294] :
(N5)? data_i[425] : 1'b0;
assign data_o[31] = (N2)? data_i[31] :
(N4)? data_i[162] :
(N3)? data_i[293] :
(N5)? data_i[424] : 1'b0;
assign data_o[30] = (N2)? data_i[30] :
(N4)? data_i[161] :
(N3)? data_i[292] :
(N5)? data_i[423] : 1'b0;
assign data_o[29] = (N2)? data_i[29] :
(N4)? data_i[160] :
(N3)? data_i[291] :
(N5)? data_i[422] : 1'b0;
assign data_o[28] = (N2)? data_i[28] :
(N4)? data_i[159] :
(N3)? data_i[290] :
(N5)? data_i[421] : 1'b0;
assign data_o[27] = (N2)? data_i[27] :
(N4)? data_i[158] :
(N3)? data_i[289] :
(N5)? data_i[420] : 1'b0;
assign data_o[26] = (N2)? data_i[26] :
(N4)? data_i[157] :
(N3)? data_i[288] :
(N5)? data_i[419] : 1'b0;
assign data_o[25] = (N2)? data_i[25] :
(N4)? data_i[156] :
(N3)? data_i[287] :
(N5)? data_i[418] : 1'b0;
assign data_o[24] = (N2)? data_i[24] :
(N4)? data_i[155] :
(N3)? data_i[286] :
(N5)? data_i[417] : 1'b0;
assign data_o[23] = (N2)? data_i[23] :
(N4)? data_i[154] :
(N3)? data_i[285] :
(N5)? data_i[416] : 1'b0;
assign data_o[22] = (N2)? data_i[22] :
(N4)? data_i[153] :
(N3)? data_i[284] :
(N5)? data_i[415] : 1'b0;
assign data_o[21] = (N2)? data_i[21] :
(N4)? data_i[152] :
(N3)? data_i[283] :
(N5)? data_i[414] : 1'b0;
assign data_o[20] = (N2)? data_i[20] :
(N4)? data_i[151] :
(N3)? data_i[282] :
(N5)? data_i[413] : 1'b0;
assign data_o[19] = (N2)? data_i[19] :
(N4)? data_i[150] :
(N3)? data_i[281] :
(N5)? data_i[412] : 1'b0;
assign data_o[18] = (N2)? data_i[18] :
(N4)? data_i[149] :
(N3)? data_i[280] :
(N5)? data_i[411] : 1'b0;
assign data_o[17] = (N2)? data_i[17] :
(N4)? data_i[148] :
(N3)? data_i[279] :
(N5)? data_i[410] : 1'b0;
assign data_o[16] = (N2)? data_i[16] :
(N4)? data_i[147] :
(N3)? data_i[278] :
(N5)? data_i[409] : 1'b0;
assign data_o[15] = (N2)? data_i[15] :
(N4)? data_i[146] :
(N3)? data_i[277] :
(N5)? data_i[408] : 1'b0;
assign data_o[14] = (N2)? data_i[14] :
(N4)? data_i[145] :
(N3)? data_i[276] :
(N5)? data_i[407] : 1'b0;
assign data_o[13] = (N2)? data_i[13] :
(N4)? data_i[144] :
(N3)? data_i[275] :
(N5)? data_i[406] : 1'b0;
assign data_o[12] = (N2)? data_i[12] :
(N4)? data_i[143] :
(N3)? data_i[274] :
(N5)? data_i[405] : 1'b0;
assign data_o[11] = (N2)? data_i[11] :
(N4)? data_i[142] :
(N3)? data_i[273] :
(N5)? data_i[404] : 1'b0;
assign data_o[10] = (N2)? data_i[10] :
(N4)? data_i[141] :
(N3)? data_i[272] :
(N5)? data_i[403] : 1'b0;
assign data_o[9] = (N2)? data_i[9] :
(N4)? data_i[140] :
(N3)? data_i[271] :
(N5)? data_i[402] : 1'b0;
assign data_o[8] = (N2)? data_i[8] :
(N4)? data_i[139] :
(N3)? data_i[270] :
(N5)? data_i[401] : 1'b0;
assign data_o[7] = (N2)? data_i[7] :
(N4)? data_i[138] :
(N3)? data_i[269] :
(N5)? data_i[400] : 1'b0;
assign data_o[6] = (N2)? data_i[6] :
(N4)? data_i[137] :
(N3)? data_i[268] :
(N5)? data_i[399] : 1'b0;
assign data_o[5] = (N2)? data_i[5] :
(N4)? data_i[136] :
(N3)? data_i[267] :
(N5)? data_i[398] : 1'b0;
assign data_o[4] = (N2)? data_i[4] :
(N4)? data_i[135] :
(N3)? data_i[266] :
(N5)? data_i[397] : 1'b0;
assign data_o[3] = (N2)? data_i[3] :
(N4)? data_i[134] :
(N3)? data_i[265] :
(N5)? data_i[396] : 1'b0;
assign data_o[2] = (N2)? data_i[2] :
(N4)? data_i[133] :
(N3)? data_i[264] :
(N5)? data_i[395] : 1'b0;
assign data_o[1] = (N2)? data_i[1] :
(N4)? data_i[132] :
(N3)? data_i[263] :
(N5)? data_i[394] : 1'b0;
assign data_o[0] = (N2)? data_i[0] :
(N4)? data_i[131] :
(N3)? data_i[262] :
(N5)? data_i[393] : 1'b0;
assign N0 = ~sel_i[0];
assign N1 = ~sel_i[1];
assign N2 = N0 & N1;
assign N3 = N0 & sel_i[1];
assign N4 = sel_i[0] & N1;
assign N5 = sel_i[0] & sel_i[1];
endmodule
|
module bp_me_network_pkt_encode_data_cmd_num_lce_p2_lce_assoc_p8_block_size_in_bits_p512_max_num_flit_p4_x_cord_width_p1_y_cord_width_p1
(
payload_i,
packet_o
);
input [517:0] payload_i;
output [521:0] packet_o;
wire [521:0] packet_o;
wire N0,N1,N2,N3,N4,N5,N6,N7,N8,N9,N10,N11;
assign packet_o[1] = 1'b1;
assign packet_o[521] = payload_i[517];
assign packet_o[520] = payload_i[516];
assign packet_o[519] = payload_i[515];
assign packet_o[518] = payload_i[514];
assign packet_o[517] = payload_i[513];
assign packet_o[516] = payload_i[512];
assign packet_o[515] = payload_i[511];
assign packet_o[514] = payload_i[510];
assign packet_o[513] = payload_i[509];
assign packet_o[512] = payload_i[508];
assign packet_o[511] = payload_i[507];
assign packet_o[510] = payload_i[506];
assign packet_o[509] = payload_i[505];
assign packet_o[508] = payload_i[504];
assign packet_o[507] = payload_i[503];
assign packet_o[506] = payload_i[502];
assign packet_o[505] = payload_i[501];
assign packet_o[504] = payload_i[500];
assign packet_o[503] = payload_i[499];
assign packet_o[502] = payload_i[498];
assign packet_o[501] = payload_i[497];
assign packet_o[500] = payload_i[496];
assign packet_o[499] = payload_i[495];
assign packet_o[498] = payload_i[494];
assign packet_o[497] = payload_i[493];
assign packet_o[496] = payload_i[492];
assign packet_o[495] = payload_i[491];
assign packet_o[494] = payload_i[490];
assign packet_o[493] = payload_i[489];
assign packet_o[492] = payload_i[488];
assign packet_o[491] = payload_i[487];
assign packet_o[490] = payload_i[486];
assign packet_o[489] = payload_i[485];
assign packet_o[488] = payload_i[484];
assign packet_o[487] = payload_i[483];
assign packet_o[486] = payload_i[482];
assign packet_o[485] = payload_i[481];
assign packet_o[484] = payload_i[480];
assign packet_o[483] = payload_i[479];
assign packet_o[482] = payload_i[478];
assign packet_o[481] = payload_i[477];
assign packet_o[480] = payload_i[476];
assign packet_o[479] = payload_i[475];
assign packet_o[478] = payload_i[474];
assign packet_o[477] = payload_i[473];
assign packet_o[476] = payload_i[472];
assign packet_o[475] = payload_i[471];
assign packet_o[474] = payload_i[470];
assign packet_o[473] = payload_i[469];
assign packet_o[472] = payload_i[468];
assign packet_o[471] = payload_i[467];
assign packet_o[470] = payload_i[466];
assign packet_o[469] = payload_i[465];
assign packet_o[468] = payload_i[464];
assign packet_o[467] = payload_i[463];
assign packet_o[466] = payload_i[462];
assign packet_o[465] = payload_i[461];
assign packet_o[464] = payload_i[460];
assign packet_o[463] = payload_i[459];
assign packet_o[462] = payload_i[458];
assign packet_o[461] = payload_i[457];
assign packet_o[460] = payload_i[456];
assign packet_o[459] = payload_i[455];
assign packet_o[458] = payload_i[454];
assign packet_o[457] = payload_i[453];
assign packet_o[456] = payload_i[452];
assign packet_o[455] = payload_i[451];
assign packet_o[454] = payload_i[450];
assign packet_o[453] = payload_i[449];
assign packet_o[452] = payload_i[448];
assign packet_o[451] = payload_i[447];
assign packet_o[450] = payload_i[446];
assign packet_o[449] = payload_i[445];
assign packet_o[448] = payload_i[444];
assign packet_o[447] = payload_i[443];
assign packet_o[446] = payload_i[442];
assign packet_o[445] = payload_i[441];
assign packet_o[444] = payload_i[440];
assign packet_o[443] = payload_i[439];
assign packet_o[442] = payload_i[438];
assign packet_o[441] = payload_i[437];
assign packet_o[440] = payload_i[436];
assign packet_o[439] = payload_i[435];
assign packet_o[438] = payload_i[434];
assign packet_o[437] = payload_i[433];
assign packet_o[436] = payload_i[432];
assign packet_o[435] = payload_i[431];
assign packet_o[434] = payload_i[430];
assign packet_o[433] = payload_i[429];
assign packet_o[432] = payload_i[428];
assign packet_o[431] = payload_i[427];
assign packet_o[430] = payload_i[426];
assign packet_o[429] = payload_i[425];
assign packet_o[428] = payload_i[424];
assign packet_o[427] = payload_i[423];
assign packet_o[426] = payload_i[422];
assign packet_o[425] = payload_i[421];
assign packet_o[424] = payload_i[420];
assign packet_o[423] = payload_i[419];
assign packet_o[422] = payload_i[418];
assign packet_o[421] = payload_i[417];
assign packet_o[420] = payload_i[416];
assign packet_o[419] = payload_i[415];
assign packet_o[418] = payload_i[414];
assign packet_o[417] = payload_i[413];
assign packet_o[416] = payload_i[412];
assign packet_o[415] = payload_i[411];
assign packet_o[414] = payload_i[410];
assign packet_o[413] = payload_i[409];
assign packet_o[412] = payload_i[408];
assign packet_o[411] = payload_i[407];
assign packet_o[410] = payload_i[406];
assign packet_o[409] = payload_i[405];
assign packet_o[408] = payload_i[404];
assign packet_o[407] = payload_i[403];
assign packet_o[406] = payload_i[402];
assign packet_o[405] = payload_i[401];
assign packet_o[404] = payload_i[400];
assign packet_o[403] = payload_i[399];
assign packet_o[402] = payload_i[398];
assign packet_o[401] = payload_i[397];
assign packet_o[400] = payload_i[396];
assign packet_o[399] = payload_i[395];
assign packet_o[398] = payload_i[394];
assign packet_o[397] = payload_i[393];
assign packet_o[396] = payload_i[392];
assign packet_o[395] = payload_i[391];
assign packet_o[394] = payload_i[390];
assign packet_o[393] = payload_i[389];
assign packet_o[392] = payload_i[388];
assign packet_o[391] = payload_i[387];
assign packet_o[390] = payload_i[386];
assign packet_o[389] = payload_i[385];
assign packet_o[388] = payload_i[384];
assign packet_o[387] = payload_i[383];
assign packet_o[386] = payload_i[382];
assign packet_o[385] = payload_i[381];
assign packet_o[384] = payload_i[380];
assign packet_o[383] = payload_i[379];
assign packet_o[382] = payload_i[378];
assign packet_o[381] = payload_i[377];
assign packet_o[380] = payload_i[376];
assign packet_o[379] = payload_i[375];
assign packet_o[378] = payload_i[374];
assign packet_o[377] = payload_i[373];
assign packet_o[376] = payload_i[372];
assign packet_o[375] = payload_i[371];
assign packet_o[374] = payload_i[370];
assign packet_o[373] = payload_i[369];
assign packet_o[372] = payload_i[368];
assign packet_o[371] = payload_i[367];
assign packet_o[370] = payload_i[366];
assign packet_o[369] = payload_i[365];
assign packet_o[368] = payload_i[364];
assign packet_o[367] = payload_i[363];
assign packet_o[366] = payload_i[362];
assign packet_o[365] = payload_i[361];
assign packet_o[364] = payload_i[360];
assign packet_o[363] = payload_i[359];
assign packet_o[362] = payload_i[358];
assign packet_o[361] = payload_i[357];
assign packet_o[360] = payload_i[356];
assign packet_o[359] = payload_i[355];
assign packet_o[358] = payload_i[354];
assign packet_o[357] = payload_i[353];
assign packet_o[356] = payload_i[352];
assign packet_o[355] = payload_i[351];
assign packet_o[354] = payload_i[350];
assign packet_o[353] = payload_i[349];
assign packet_o[352] = payload_i[348];
assign packet_o[351] = payload_i[347];
assign packet_o[350] = payload_i[346];
assign packet_o[349] = payload_i[345];
assign packet_o[348] = payload_i[344];
assign packet_o[347] = payload_i[343];
assign packet_o[346] = payload_i[342];
assign packet_o[345] = payload_i[341];
assign packet_o[344] = payload_i[340];
assign packet_o[343] = payload_i[339];
assign packet_o[342] = payload_i[338];
assign packet_o[341] = payload_i[337];
assign packet_o[340] = payload_i[336];
assign packet_o[339] = payload_i[335];
assign packet_o[338] = payload_i[334];
assign packet_o[337] = payload_i[333];
assign packet_o[336] = payload_i[332];
assign packet_o[335] = payload_i[331];
assign packet_o[334] = payload_i[330];
assign packet_o[333] = payload_i[329];
assign packet_o[332] = payload_i[328];
assign packet_o[331] = payload_i[327];
assign packet_o[330] = payload_i[326];
assign packet_o[329] = payload_i[325];
assign packet_o[328] = payload_i[324];
assign packet_o[327] = payload_i[323];
assign packet_o[326] = payload_i[322];
assign packet_o[325] = payload_i[321];
assign packet_o[324] = payload_i[320];
assign packet_o[323] = payload_i[319];
assign packet_o[322] = payload_i[318];
assign packet_o[321] = payload_i[317];
assign packet_o[320] = payload_i[316];
assign packet_o[319] = payload_i[315];
assign packet_o[318] = payload_i[314];
assign packet_o[317] = payload_i[313];
assign packet_o[316] = payload_i[312];
assign packet_o[315] = payload_i[311];
assign packet_o[314] = payload_i[310];
assign packet_o[313] = payload_i[309];
assign packet_o[312] = payload_i[308];
assign packet_o[311] = payload_i[307];
assign packet_o[310] = payload_i[306];
assign packet_o[309] = payload_i[305];
assign packet_o[308] = payload_i[304];
assign packet_o[307] = payload_i[303];
assign packet_o[306] = payload_i[302];
assign packet_o[305] = payload_i[301];
assign packet_o[304] = payload_i[300];
assign packet_o[303] = payload_i[299];
assign packet_o[302] = payload_i[298];
assign packet_o[301] = payload_i[297];
assign packet_o[300] = payload_i[296];
assign packet_o[299] = payload_i[295];
assign packet_o[298] = payload_i[294];
assign packet_o[297] = payload_i[293];
assign packet_o[296] = payload_i[292];
assign packet_o[295] = payload_i[291];
assign packet_o[294] = payload_i[290];
assign packet_o[293] = payload_i[289];
assign packet_o[292] = payload_i[288];
assign packet_o[291] = payload_i[287];
assign packet_o[290] = payload_i[286];
assign packet_o[289] = payload_i[285];
assign packet_o[288] = payload_i[284];
assign packet_o[287] = payload_i[283];
assign packet_o[286] = payload_i[282];
assign packet_o[285] = payload_i[281];
assign packet_o[284] = payload_i[280];
assign packet_o[283] = payload_i[279];
assign packet_o[282] = payload_i[278];
assign packet_o[281] = payload_i[277];
assign packet_o[280] = payload_i[276];
assign packet_o[279] = payload_i[275];
assign packet_o[278] = payload_i[274];
assign packet_o[277] = payload_i[273];
assign packet_o[276] = payload_i[272];
assign packet_o[275] = payload_i[271];
assign packet_o[274] = payload_i[270];
assign packet_o[273] = payload_i[269];
assign packet_o[272] = payload_i[268];
assign packet_o[271] = payload_i[267];
assign packet_o[270] = payload_i[266];
assign packet_o[269] = payload_i[265];
assign packet_o[268] = payload_i[264];
assign packet_o[267] = payload_i[263];
assign packet_o[266] = payload_i[262];
assign packet_o[265] = payload_i[261];
assign packet_o[264] = payload_i[260];
assign packet_o[263] = payload_i[259];
assign packet_o[262] = payload_i[258];
assign packet_o[261] = payload_i[257];
assign packet_o[260] = payload_i[256];
assign packet_o[259] = payload_i[255];
assign packet_o[258] = payload_i[254];
assign packet_o[257] = payload_i[253];
assign packet_o[256] = payload_i[252];
assign packet_o[255] = payload_i[251];
assign packet_o[254] = payload_i[250];
assign packet_o[253] = payload_i[249];
assign packet_o[252] = payload_i[248];
assign packet_o[251] = payload_i[247];
assign packet_o[250] = payload_i[246];
assign packet_o[249] = payload_i[245];
assign packet_o[248] = payload_i[244];
assign packet_o[247] = payload_i[243];
assign packet_o[246] = payload_i[242];
assign packet_o[245] = payload_i[241];
assign packet_o[244] = payload_i[240];
assign packet_o[243] = payload_i[239];
assign packet_o[242] = payload_i[238];
assign packet_o[241] = payload_i[237];
assign packet_o[240] = payload_i[236];
assign packet_o[239] = payload_i[235];
assign packet_o[238] = payload_i[234];
assign packet_o[237] = payload_i[233];
assign packet_o[236] = payload_i[232];
assign packet_o[235] = payload_i[231];
assign packet_o[234] = payload_i[230];
assign packet_o[233] = payload_i[229];
assign packet_o[232] = payload_i[228];
assign packet_o[231] = payload_i[227];
assign packet_o[230] = payload_i[226];
assign packet_o[229] = payload_i[225];
assign packet_o[228] = payload_i[224];
assign packet_o[227] = payload_i[223];
assign packet_o[226] = payload_i[222];
assign packet_o[225] = payload_i[221];
assign packet_o[224] = payload_i[220];
assign packet_o[223] = payload_i[219];
assign packet_o[222] = payload_i[218];
assign packet_o[221] = payload_i[217];
assign packet_o[220] = payload_i[216];
assign packet_o[219] = payload_i[215];
assign packet_o[218] = payload_i[214];
assign packet_o[217] = payload_i[213];
assign packet_o[216] = payload_i[212];
assign packet_o[215] = payload_i[211];
assign packet_o[214] = payload_i[210];
assign packet_o[213] = payload_i[209];
assign packet_o[212] = payload_i[208];
assign packet_o[211] = payload_i[207];
assign packet_o[210] = payload_i[206];
assign packet_o[209] = payload_i[205];
assign packet_o[208] = payload_i[204];
assign packet_o[207] = payload_i[203];
assign packet_o[206] = payload_i[202];
assign packet_o[205] = payload_i[201];
assign packet_o[204] = payload_i[200];
assign packet_o[203] = payload_i[199];
assign packet_o[202] = payload_i[198];
assign packet_o[201] = payload_i[197];
assign packet_o[200] = payload_i[196];
assign packet_o[199] = payload_i[195];
assign packet_o[198] = payload_i[194];
assign packet_o[197] = payload_i[193];
assign packet_o[196] = payload_i[192];
assign packet_o[195] = payload_i[191];
assign packet_o[194] = payload_i[190];
assign packet_o[193] = payload_i[189];
assign packet_o[192] = payload_i[188];
assign packet_o[191] = payload_i[187];
assign packet_o[190] = payload_i[186];
assign packet_o[189] = payload_i[185];
assign packet_o[188] = payload_i[184];
assign packet_o[187] = payload_i[183];
assign packet_o[186] = payload_i[182];
assign packet_o[185] = payload_i[181];
assign packet_o[184] = payload_i[180];
assign packet_o[183] = payload_i[179];
assign packet_o[182] = payload_i[178];
assign packet_o[181] = payload_i[177];
assign packet_o[180] = payload_i[176];
assign packet_o[179] = payload_i[175];
assign packet_o[178] = payload_i[174];
assign packet_o[177] = payload_i[173];
assign packet_o[176] = payload_i[172];
assign packet_o[175] = payload_i[171];
assign packet_o[174] = payload_i[170];
assign packet_o[173] = payload_i[169];
assign packet_o[172] = payload_i[168];
assign packet_o[171] = payload_i[167];
assign packet_o[170] = payload_i[166];
assign packet_o[169] = payload_i[165];
assign packet_o[168] = payload_i[164];
assign packet_o[167] = payload_i[163];
assign packet_o[166] = payload_i[162];
assign packet_o[165] = payload_i[161];
assign packet_o[164] = payload_i[160];
assign packet_o[163] = payload_i[159];
assign packet_o[162] = payload_i[158];
assign packet_o[161] = payload_i[157];
assign packet_o[160] = payload_i[156];
assign packet_o[159] = payload_i[155];
assign packet_o[158] = payload_i[154];
assign packet_o[157] = payload_i[153];
assign packet_o[156] = payload_i[152];
assign packet_o[155] = payload_i[151];
assign packet_o[154] = payload_i[150];
assign packet_o[153] = payload_i[149];
assign packet_o[152] = payload_i[148];
assign packet_o[151] = payload_i[147];
assign packet_o[150] = payload_i[146];
assign packet_o[149] = payload_i[145];
assign packet_o[148] = payload_i[144];
assign packet_o[147] = payload_i[143];
assign packet_o[146] = payload_i[142];
assign packet_o[145] = payload_i[141];
assign packet_o[144] = payload_i[140];
assign packet_o[143] = payload_i[139];
assign packet_o[142] = payload_i[138];
assign packet_o[141] = payload_i[137];
assign packet_o[140] = payload_i[136];
assign packet_o[139] = payload_i[135];
assign packet_o[138] = payload_i[134];
assign packet_o[137] = payload_i[133];
assign packet_o[136] = payload_i[132];
assign packet_o[135] = payload_i[131];
assign packet_o[134] = payload_i[130];
assign packet_o[133] = payload_i[129];
assign packet_o[132] = payload_i[128];
assign packet_o[131] = payload_i[127];
assign packet_o[130] = payload_i[126];
assign packet_o[129] = payload_i[125];
assign packet_o[128] = payload_i[124];
assign packet_o[127] = payload_i[123];
assign packet_o[126] = payload_i[122];
assign packet_o[125] = payload_i[121];
assign packet_o[124] = payload_i[120];
assign packet_o[123] = payload_i[119];
assign packet_o[122] = payload_i[118];
assign packet_o[121] = payload_i[117];
assign packet_o[120] = payload_i[116];
assign packet_o[119] = payload_i[115];
assign packet_o[118] = payload_i[114];
assign packet_o[117] = payload_i[113];
assign packet_o[116] = payload_i[112];
assign packet_o[115] = payload_i[111];
assign packet_o[114] = payload_i[110];
assign packet_o[113] = payload_i[109];
assign packet_o[112] = payload_i[108];
assign packet_o[111] = payload_i[107];
assign packet_o[110] = payload_i[106];
assign packet_o[109] = payload_i[105];
assign packet_o[108] = payload_i[104];
assign packet_o[107] = payload_i[103];
assign packet_o[106] = payload_i[102];
assign packet_o[105] = payload_i[101];
assign packet_o[104] = payload_i[100];
assign packet_o[103] = payload_i[99];
assign packet_o[102] = payload_i[98];
assign packet_o[101] = payload_i[97];
assign packet_o[100] = payload_i[96];
assign packet_o[99] = payload_i[95];
assign packet_o[98] = payload_i[94];
assign packet_o[97] = payload_i[93];
assign packet_o[96] = payload_i[92];
assign packet_o[95] = payload_i[91];
assign packet_o[94] = payload_i[90];
assign packet_o[93] = payload_i[89];
assign packet_o[92] = payload_i[88];
assign packet_o[91] = payload_i[87];
assign packet_o[90] = payload_i[86];
assign packet_o[89] = payload_i[85];
assign packet_o[88] = payload_i[84];
assign packet_o[87] = payload_i[83];
assign packet_o[86] = payload_i[82];
assign packet_o[85] = payload_i[81];
assign packet_o[84] = payload_i[80];
assign packet_o[83] = payload_i[79];
assign packet_o[82] = payload_i[78];
assign packet_o[81] = payload_i[77];
assign packet_o[80] = payload_i[76];
assign packet_o[79] = payload_i[75];
assign packet_o[78] = payload_i[74];
assign packet_o[77] = payload_i[73];
assign packet_o[76] = payload_i[72];
assign packet_o[75] = payload_i[71];
assign packet_o[74] = payload_i[70];
assign packet_o[73] = payload_i[69];
assign packet_o[72] = payload_i[68];
assign packet_o[71] = payload_i[67];
assign packet_o[70] = payload_i[66];
assign packet_o[69] = payload_i[65];
assign packet_o[68] = payload_i[64];
assign packet_o[67] = payload_i[63];
assign packet_o[66] = payload_i[62];
assign packet_o[65] = payload_i[61];
assign packet_o[64] = payload_i[60];
assign packet_o[63] = payload_i[59];
assign packet_o[62] = payload_i[58];
assign packet_o[61] = payload_i[57];
assign packet_o[60] = payload_i[56];
assign packet_o[59] = payload_i[55];
assign packet_o[58] = payload_i[54];
assign packet_o[57] = payload_i[53];
assign packet_o[56] = payload_i[52];
assign packet_o[55] = payload_i[51];
assign packet_o[54] = payload_i[50];
assign packet_o[53] = payload_i[49];
assign packet_o[52] = payload_i[48];
assign packet_o[51] = payload_i[47];
assign packet_o[50] = payload_i[46];
assign packet_o[49] = payload_i[45];
assign packet_o[48] = payload_i[44];
assign packet_o[47] = payload_i[43];
assign packet_o[46] = payload_i[42];
assign packet_o[45] = payload_i[41];
assign packet_o[44] = payload_i[40];
assign packet_o[43] = payload_i[39];
assign packet_o[42] = payload_i[38];
assign packet_o[41] = payload_i[37];
assign packet_o[40] = payload_i[36];
assign packet_o[39] = payload_i[35];
assign packet_o[38] = payload_i[34];
assign packet_o[37] = payload_i[33];
assign packet_o[36] = payload_i[32];
assign packet_o[35] = payload_i[31];
assign packet_o[34] = payload_i[30];
assign packet_o[33] = payload_i[29];
assign packet_o[32] = payload_i[28];
assign packet_o[31] = payload_i[27];
assign packet_o[30] = payload_i[26];
assign packet_o[29] = payload_i[25];
assign packet_o[28] = payload_i[24];
assign packet_o[27] = payload_i[23];
assign packet_o[26] = payload_i[22];
assign packet_o[25] = payload_i[21];
assign packet_o[24] = payload_i[20];
assign packet_o[23] = payload_i[19];
assign packet_o[22] = payload_i[18];
assign packet_o[21] = payload_i[17];
assign packet_o[20] = payload_i[16];
assign packet_o[19] = payload_i[15];
assign packet_o[18] = payload_i[14];
assign packet_o[17] = payload_i[13];
assign packet_o[16] = payload_i[12];
assign packet_o[15] = payload_i[11];
assign packet_o[14] = payload_i[10];
assign packet_o[13] = payload_i[9];
assign packet_o[12] = payload_i[8];
assign packet_o[11] = payload_i[7];
assign packet_o[10] = payload_i[6];
assign packet_o[0] = payload_i[5];
assign packet_o[9] = payload_i[5];
assign packet_o[8] = payload_i[4];
assign packet_o[7] = payload_i[3];
assign packet_o[6] = payload_i[2];
assign packet_o[5] = payload_i[1];
assign packet_o[4] = payload_i[0];
assign N6 = N4 & N5;
assign N7 = payload_i[4] | N5;
assign N9 = N4 | payload_i[3];
assign N11 = payload_i[4] & payload_i[3];
assign packet_o[3:2] = (N0)? { 1'b1, 1'b1 } :
(N1)? { 1'b1, 1'b1 } :
(N2)? { 1'b0, 1'b0 } :
(N3)? { 1'b0, 1'b0 } : 1'b0;
assign N0 = N6;
assign N1 = N8;
assign N2 = N10;
assign N3 = N11;
assign N4 = ~payload_i[4];
assign N5 = ~payload_i[3];
assign N8 = ~N7;
assign N10 = ~N9;
endmodule
|
module itlb_vaddr_width_p39_paddr_width_p22_eaddr_width_p64_tag_width_p10_btb_indx_width_p9_bht_indx_width_p5_ras_addr_width_p22_asid_width_p10_ppn_start_bit_p12
(
clk_i,
reset_i,
fe_itlb_i,
fe_itlb_v_i,
fe_itlb_ready_o,
pc_gen_itlb_i,
pc_gen_itlb_v_i,
pc_gen_itlb_ready_o,
itlb_icache_o,
itlb_icache_data_resp_v_o,
itlb_icache_data_resp_ready_i,
itlb_fe_o,
itlb_fe_v_o,
itlb_fe_ready_i
);
input [108:0] fe_itlb_i;
input [63:0] pc_gen_itlb_i;
output [9:0] itlb_icache_o;
output [133:0] itlb_fe_o;
input clk_i;
input reset_i;
input fe_itlb_v_i;
input pc_gen_itlb_v_i;
input itlb_icache_data_resp_ready_i;
input itlb_fe_ready_i;
output fe_itlb_ready_o;
output pc_gen_itlb_ready_o;
output itlb_icache_data_resp_v_o;
output itlb_fe_v_o;
wire [133:0] itlb_fe_o;
wire fe_itlb_ready_o,pc_gen_itlb_ready_o,itlb_icache_data_resp_v_o,itlb_fe_v_o;
reg [9:0] itlb_icache_o;
assign pc_gen_itlb_ready_o = 1'b1;
assign itlb_icache_data_resp_v_o = 1'b1;
assign fe_itlb_ready_o = 1'b0;
assign itlb_fe_v_o = 1'b0;
always @(posedge clk_i) begin
if(1'b1) begin
{ itlb_icache_o[9:0] } <= { pc_gen_itlb_i[21:12] };
end
end
endmodule
|
module bsg_circular_ptr_slots_p16_max_add_p15
(
clk,
reset_i,
add_i,
o
);
input [3:0] add_i;
output [3:0] o;
input clk;
input reset_i;
wire N0,N1,N2,N3,N4,N5,N6;
wire [3:0] ptr_n;
reg [3:0] o;
assign ptr_n = o + add_i;
assign { N6, N5, N4, N3 } = (N0)? { 1'b0, 1'b0, 1'b0, 1'b0 } :
(N1)? ptr_n : 1'b0;
assign N0 = reset_i;
assign N1 = N2;
assign N2 = ~reset_i;
always @(posedge clk) begin
if(1'b1) begin
{ o[3:0] } <= { N6, N5, N4, N3 };
end
end
endmodule
|
module bsg_dff_width_p600
(
clk_i,
data_i,
data_o
);
input [599:0] data_i;
output [599:0] data_o;
input clk_i;
reg [599:0] data_o;
always @(posedge clk_i) begin
if(1'b1) begin
{ data_o[599:0] } <= { data_i[599:0] };
end
end
endmodule
|
module bsg_swap_width_p64
(
data_i,
swap_i,
data_o
);
input [127:0] data_i;
output [127:0] data_o;
input swap_i;
wire [127:0] data_o;
wire N0,N1,N2;
assign data_o = (N0)? { data_i[63:0], data_i[127:64] } :
(N1)? data_i : 1'b0;
assign N0 = swap_i;
assign N1 = N2;
assign N2 = ~swap_i;
endmodule
|
module bp_fe_lce_data_cmd_data_width_p64_paddr_width_p22_lce_data_width_p512_num_cce_p1_num_lce_p2_sets_p64_ways_p8
(
cce_data_received_o,
tr_data_received_o,
miss_addr_i,
lce_data_cmd_i,
lce_data_cmd_v_i,
lce_data_cmd_yumi_o,
data_mem_pkt_v_o,
data_mem_pkt_o,
data_mem_pkt_yumi_i
);
input [21:0] miss_addr_i;
input [517:0] lce_data_cmd_i;
output [521:0] data_mem_pkt_o;
input lce_data_cmd_v_i;
input data_mem_pkt_yumi_i;
output cce_data_received_o;
output tr_data_received_o;
output lce_data_cmd_yumi_o;
output data_mem_pkt_v_o;
wire [521:0] data_mem_pkt_o;
wire cce_data_received_o,tr_data_received_o,lce_data_cmd_yumi_o,data_mem_pkt_v_o,
data_mem_pkt_yumi_i,lce_data_cmd_v_i,N0,N1,N2,N3,N4;
assign data_mem_pkt_o[512] = 1'b1;
assign data_mem_pkt_o[515] = lce_data_cmd_i[2];
assign data_mem_pkt_o[514] = lce_data_cmd_i[1];
assign data_mem_pkt_o[513] = lce_data_cmd_i[0];
assign data_mem_pkt_o[511] = lce_data_cmd_i[517];
assign data_mem_pkt_o[510] = lce_data_cmd_i[516];
assign data_mem_pkt_o[509] = lce_data_cmd_i[515];
assign data_mem_pkt_o[508] = lce_data_cmd_i[514];
assign data_mem_pkt_o[507] = lce_data_cmd_i[513];
assign data_mem_pkt_o[506] = lce_data_cmd_i[512];
assign data_mem_pkt_o[505] = lce_data_cmd_i[511];
assign data_mem_pkt_o[504] = lce_data_cmd_i[510];
assign data_mem_pkt_o[503] = lce_data_cmd_i[509];
assign data_mem_pkt_o[502] = lce_data_cmd_i[508];
assign data_mem_pkt_o[501] = lce_data_cmd_i[507];
assign data_mem_pkt_o[500] = lce_data_cmd_i[506];
assign data_mem_pkt_o[499] = lce_data_cmd_i[505];
assign data_mem_pkt_o[498] = lce_data_cmd_i[504];
assign data_mem_pkt_o[497] = lce_data_cmd_i[503];
assign data_mem_pkt_o[496] = lce_data_cmd_i[502];
assign data_mem_pkt_o[495] = lce_data_cmd_i[501];
assign data_mem_pkt_o[494] = lce_data_cmd_i[500];
assign data_mem_pkt_o[493] = lce_data_cmd_i[499];
assign data_mem_pkt_o[492] = lce_data_cmd_i[498];
assign data_mem_pkt_o[491] = lce_data_cmd_i[497];
assign data_mem_pkt_o[490] = lce_data_cmd_i[496];
assign data_mem_pkt_o[489] = lce_data_cmd_i[495];
assign data_mem_pkt_o[488] = lce_data_cmd_i[494];
assign data_mem_pkt_o[487] = lce_data_cmd_i[493];
assign data_mem_pkt_o[486] = lce_data_cmd_i[492];
assign data_mem_pkt_o[485] = lce_data_cmd_i[491];
assign data_mem_pkt_o[484] = lce_data_cmd_i[490];
assign data_mem_pkt_o[483] = lce_data_cmd_i[489];
assign data_mem_pkt_o[482] = lce_data_cmd_i[488];
assign data_mem_pkt_o[481] = lce_data_cmd_i[487];
assign data_mem_pkt_o[480] = lce_data_cmd_i[486];
assign data_mem_pkt_o[479] = lce_data_cmd_i[485];
assign data_mem_pkt_o[478] = lce_data_cmd_i[484];
assign data_mem_pkt_o[477] = lce_data_cmd_i[483];
assign data_mem_pkt_o[476] = lce_data_cmd_i[482];
assign data_mem_pkt_o[475] = lce_data_cmd_i[481];
assign data_mem_pkt_o[474] = lce_data_cmd_i[480];
assign data_mem_pkt_o[473] = lce_data_cmd_i[479];
assign data_mem_pkt_o[472] = lce_data_cmd_i[478];
assign data_mem_pkt_o[471] = lce_data_cmd_i[477];
assign data_mem_pkt_o[470] = lce_data_cmd_i[476];
assign data_mem_pkt_o[469] = lce_data_cmd_i[475];
assign data_mem_pkt_o[468] = lce_data_cmd_i[474];
assign data_mem_pkt_o[467] = lce_data_cmd_i[473];
assign data_mem_pkt_o[466] = lce_data_cmd_i[472];
assign data_mem_pkt_o[465] = lce_data_cmd_i[471];
assign data_mem_pkt_o[464] = lce_data_cmd_i[470];
assign data_mem_pkt_o[463] = lce_data_cmd_i[469];
assign data_mem_pkt_o[462] = lce_data_cmd_i[468];
assign data_mem_pkt_o[461] = lce_data_cmd_i[467];
assign data_mem_pkt_o[460] = lce_data_cmd_i[466];
assign data_mem_pkt_o[459] = lce_data_cmd_i[465];
assign data_mem_pkt_o[458] = lce_data_cmd_i[464];
assign data_mem_pkt_o[457] = lce_data_cmd_i[463];
assign data_mem_pkt_o[456] = lce_data_cmd_i[462];
assign data_mem_pkt_o[455] = lce_data_cmd_i[461];
assign data_mem_pkt_o[454] = lce_data_cmd_i[460];
assign data_mem_pkt_o[453] = lce_data_cmd_i[459];
assign data_mem_pkt_o[452] = lce_data_cmd_i[458];
assign data_mem_pkt_o[451] = lce_data_cmd_i[457];
assign data_mem_pkt_o[450] = lce_data_cmd_i[456];
assign data_mem_pkt_o[449] = lce_data_cmd_i[455];
assign data_mem_pkt_o[448] = lce_data_cmd_i[454];
assign data_mem_pkt_o[447] = lce_data_cmd_i[453];
assign data_mem_pkt_o[446] = lce_data_cmd_i[452];
assign data_mem_pkt_o[445] = lce_data_cmd_i[451];
assign data_mem_pkt_o[444] = lce_data_cmd_i[450];
assign data_mem_pkt_o[443] = lce_data_cmd_i[449];
assign data_mem_pkt_o[442] = lce_data_cmd_i[448];
assign data_mem_pkt_o[441] = lce_data_cmd_i[447];
assign data_mem_pkt_o[440] = lce_data_cmd_i[446];
assign data_mem_pkt_o[439] = lce_data_cmd_i[445];
assign data_mem_pkt_o[438] = lce_data_cmd_i[444];
assign data_mem_pkt_o[437] = lce_data_cmd_i[443];
assign data_mem_pkt_o[436] = lce_data_cmd_i[442];
assign data_mem_pkt_o[435] = lce_data_cmd_i[441];
assign data_mem_pkt_o[434] = lce_data_cmd_i[440];
assign data_mem_pkt_o[433] = lce_data_cmd_i[439];
assign data_mem_pkt_o[432] = lce_data_cmd_i[438];
assign data_mem_pkt_o[431] = lce_data_cmd_i[437];
assign data_mem_pkt_o[430] = lce_data_cmd_i[436];
assign data_mem_pkt_o[429] = lce_data_cmd_i[435];
assign data_mem_pkt_o[428] = lce_data_cmd_i[434];
assign data_mem_pkt_o[427] = lce_data_cmd_i[433];
assign data_mem_pkt_o[426] = lce_data_cmd_i[432];
assign data_mem_pkt_o[425] = lce_data_cmd_i[431];
assign data_mem_pkt_o[424] = lce_data_cmd_i[430];
assign data_mem_pkt_o[423] = lce_data_cmd_i[429];
assign data_mem_pkt_o[422] = lce_data_cmd_i[428];
assign data_mem_pkt_o[421] = lce_data_cmd_i[427];
assign data_mem_pkt_o[420] = lce_data_cmd_i[426];
assign data_mem_pkt_o[419] = lce_data_cmd_i[425];
assign data_mem_pkt_o[418] = lce_data_cmd_i[424];
assign data_mem_pkt_o[417] = lce_data_cmd_i[423];
assign data_mem_pkt_o[416] = lce_data_cmd_i[422];
assign data_mem_pkt_o[415] = lce_data_cmd_i[421];
assign data_mem_pkt_o[414] = lce_data_cmd_i[420];
assign data_mem_pkt_o[413] = lce_data_cmd_i[419];
assign data_mem_pkt_o[412] = lce_data_cmd_i[418];
assign data_mem_pkt_o[411] = lce_data_cmd_i[417];
assign data_mem_pkt_o[410] = lce_data_cmd_i[416];
assign data_mem_pkt_o[409] = lce_data_cmd_i[415];
assign data_mem_pkt_o[408] = lce_data_cmd_i[414];
assign data_mem_pkt_o[407] = lce_data_cmd_i[413];
assign data_mem_pkt_o[406] = lce_data_cmd_i[412];
assign data_mem_pkt_o[405] = lce_data_cmd_i[411];
assign data_mem_pkt_o[404] = lce_data_cmd_i[410];
assign data_mem_pkt_o[403] = lce_data_cmd_i[409];
assign data_mem_pkt_o[402] = lce_data_cmd_i[408];
assign data_mem_pkt_o[401] = lce_data_cmd_i[407];
assign data_mem_pkt_o[400] = lce_data_cmd_i[406];
assign data_mem_pkt_o[399] = lce_data_cmd_i[405];
assign data_mem_pkt_o[398] = lce_data_cmd_i[404];
assign data_mem_pkt_o[397] = lce_data_cmd_i[403];
assign data_mem_pkt_o[396] = lce_data_cmd_i[402];
assign data_mem_pkt_o[395] = lce_data_cmd_i[401];
assign data_mem_pkt_o[394] = lce_data_cmd_i[400];
assign data_mem_pkt_o[393] = lce_data_cmd_i[399];
assign data_mem_pkt_o[392] = lce_data_cmd_i[398];
assign data_mem_pkt_o[391] = lce_data_cmd_i[397];
assign data_mem_pkt_o[390] = lce_data_cmd_i[396];
assign data_mem_pkt_o[389] = lce_data_cmd_i[395];
assign data_mem_pkt_o[388] = lce_data_cmd_i[394];
assign data_mem_pkt_o[387] = lce_data_cmd_i[393];
assign data_mem_pkt_o[386] = lce_data_cmd_i[392];
assign data_mem_pkt_o[385] = lce_data_cmd_i[391];
assign data_mem_pkt_o[384] = lce_data_cmd_i[390];
assign data_mem_pkt_o[383] = lce_data_cmd_i[389];
assign data_mem_pkt_o[382] = lce_data_cmd_i[388];
assign data_mem_pkt_o[381] = lce_data_cmd_i[387];
assign data_mem_pkt_o[380] = lce_data_cmd_i[386];
assign data_mem_pkt_o[379] = lce_data_cmd_i[385];
assign data_mem_pkt_o[378] = lce_data_cmd_i[384];
assign data_mem_pkt_o[377] = lce_data_cmd_i[383];
assign data_mem_pkt_o[376] = lce_data_cmd_i[382];
assign data_mem_pkt_o[375] = lce_data_cmd_i[381];
assign data_mem_pkt_o[374] = lce_data_cmd_i[380];
assign data_mem_pkt_o[373] = lce_data_cmd_i[379];
assign data_mem_pkt_o[372] = lce_data_cmd_i[378];
assign data_mem_pkt_o[371] = lce_data_cmd_i[377];
assign data_mem_pkt_o[370] = lce_data_cmd_i[376];
assign data_mem_pkt_o[369] = lce_data_cmd_i[375];
assign data_mem_pkt_o[368] = lce_data_cmd_i[374];
assign data_mem_pkt_o[367] = lce_data_cmd_i[373];
assign data_mem_pkt_o[366] = lce_data_cmd_i[372];
assign data_mem_pkt_o[365] = lce_data_cmd_i[371];
assign data_mem_pkt_o[364] = lce_data_cmd_i[370];
assign data_mem_pkt_o[363] = lce_data_cmd_i[369];
assign data_mem_pkt_o[362] = lce_data_cmd_i[368];
assign data_mem_pkt_o[361] = lce_data_cmd_i[367];
assign data_mem_pkt_o[360] = lce_data_cmd_i[366];
assign data_mem_pkt_o[359] = lce_data_cmd_i[365];
assign data_mem_pkt_o[358] = lce_data_cmd_i[364];
assign data_mem_pkt_o[357] = lce_data_cmd_i[363];
assign data_mem_pkt_o[356] = lce_data_cmd_i[362];
assign data_mem_pkt_o[355] = lce_data_cmd_i[361];
assign data_mem_pkt_o[354] = lce_data_cmd_i[360];
assign data_mem_pkt_o[353] = lce_data_cmd_i[359];
assign data_mem_pkt_o[352] = lce_data_cmd_i[358];
assign data_mem_pkt_o[351] = lce_data_cmd_i[357];
assign data_mem_pkt_o[350] = lce_data_cmd_i[356];
assign data_mem_pkt_o[349] = lce_data_cmd_i[355];
assign data_mem_pkt_o[348] = lce_data_cmd_i[354];
assign data_mem_pkt_o[347] = lce_data_cmd_i[353];
assign data_mem_pkt_o[346] = lce_data_cmd_i[352];
assign data_mem_pkt_o[345] = lce_data_cmd_i[351];
assign data_mem_pkt_o[344] = lce_data_cmd_i[350];
assign data_mem_pkt_o[343] = lce_data_cmd_i[349];
assign data_mem_pkt_o[342] = lce_data_cmd_i[348];
assign data_mem_pkt_o[341] = lce_data_cmd_i[347];
assign data_mem_pkt_o[340] = lce_data_cmd_i[346];
assign data_mem_pkt_o[339] = lce_data_cmd_i[345];
assign data_mem_pkt_o[338] = lce_data_cmd_i[344];
assign data_mem_pkt_o[337] = lce_data_cmd_i[343];
assign data_mem_pkt_o[336] = lce_data_cmd_i[342];
assign data_mem_pkt_o[335] = lce_data_cmd_i[341];
assign data_mem_pkt_o[334] = lce_data_cmd_i[340];
assign data_mem_pkt_o[333] = lce_data_cmd_i[339];
assign data_mem_pkt_o[332] = lce_data_cmd_i[338];
assign data_mem_pkt_o[331] = lce_data_cmd_i[337];
assign data_mem_pkt_o[330] = lce_data_cmd_i[336];
assign data_mem_pkt_o[329] = lce_data_cmd_i[335];
assign data_mem_pkt_o[328] = lce_data_cmd_i[334];
assign data_mem_pkt_o[327] = lce_data_cmd_i[333];
assign data_mem_pkt_o[326] = lce_data_cmd_i[332];
assign data_mem_pkt_o[325] = lce_data_cmd_i[331];
assign data_mem_pkt_o[324] = lce_data_cmd_i[330];
assign data_mem_pkt_o[323] = lce_data_cmd_i[329];
assign data_mem_pkt_o[322] = lce_data_cmd_i[328];
assign data_mem_pkt_o[321] = lce_data_cmd_i[327];
assign data_mem_pkt_o[320] = lce_data_cmd_i[326];
assign data_mem_pkt_o[319] = lce_data_cmd_i[325];
assign data_mem_pkt_o[318] = lce_data_cmd_i[324];
assign data_mem_pkt_o[317] = lce_data_cmd_i[323];
assign data_mem_pkt_o[316] = lce_data_cmd_i[322];
assign data_mem_pkt_o[315] = lce_data_cmd_i[321];
assign data_mem_pkt_o[314] = lce_data_cmd_i[320];
assign data_mem_pkt_o[313] = lce_data_cmd_i[319];
assign data_mem_pkt_o[312] = lce_data_cmd_i[318];
assign data_mem_pkt_o[311] = lce_data_cmd_i[317];
assign data_mem_pkt_o[310] = lce_data_cmd_i[316];
assign data_mem_pkt_o[309] = lce_data_cmd_i[315];
assign data_mem_pkt_o[308] = lce_data_cmd_i[314];
assign data_mem_pkt_o[307] = lce_data_cmd_i[313];
assign data_mem_pkt_o[306] = lce_data_cmd_i[312];
assign data_mem_pkt_o[305] = lce_data_cmd_i[311];
assign data_mem_pkt_o[304] = lce_data_cmd_i[310];
assign data_mem_pkt_o[303] = lce_data_cmd_i[309];
assign data_mem_pkt_o[302] = lce_data_cmd_i[308];
assign data_mem_pkt_o[301] = lce_data_cmd_i[307];
assign data_mem_pkt_o[300] = lce_data_cmd_i[306];
assign data_mem_pkt_o[299] = lce_data_cmd_i[305];
assign data_mem_pkt_o[298] = lce_data_cmd_i[304];
assign data_mem_pkt_o[297] = lce_data_cmd_i[303];
assign data_mem_pkt_o[296] = lce_data_cmd_i[302];
assign data_mem_pkt_o[295] = lce_data_cmd_i[301];
assign data_mem_pkt_o[294] = lce_data_cmd_i[300];
assign data_mem_pkt_o[293] = lce_data_cmd_i[299];
assign data_mem_pkt_o[292] = lce_data_cmd_i[298];
assign data_mem_pkt_o[291] = lce_data_cmd_i[297];
assign data_mem_pkt_o[290] = lce_data_cmd_i[296];
assign data_mem_pkt_o[289] = lce_data_cmd_i[295];
assign data_mem_pkt_o[288] = lce_data_cmd_i[294];
assign data_mem_pkt_o[287] = lce_data_cmd_i[293];
assign data_mem_pkt_o[286] = lce_data_cmd_i[292];
assign data_mem_pkt_o[285] = lce_data_cmd_i[291];
assign data_mem_pkt_o[284] = lce_data_cmd_i[290];
assign data_mem_pkt_o[283] = lce_data_cmd_i[289];
assign data_mem_pkt_o[282] = lce_data_cmd_i[288];
assign data_mem_pkt_o[281] = lce_data_cmd_i[287];
assign data_mem_pkt_o[280] = lce_data_cmd_i[286];
assign data_mem_pkt_o[279] = lce_data_cmd_i[285];
assign data_mem_pkt_o[278] = lce_data_cmd_i[284];
assign data_mem_pkt_o[277] = lce_data_cmd_i[283];
assign data_mem_pkt_o[276] = lce_data_cmd_i[282];
assign data_mem_pkt_o[275] = lce_data_cmd_i[281];
assign data_mem_pkt_o[274] = lce_data_cmd_i[280];
assign data_mem_pkt_o[273] = lce_data_cmd_i[279];
assign data_mem_pkt_o[272] = lce_data_cmd_i[278];
assign data_mem_pkt_o[271] = lce_data_cmd_i[277];
assign data_mem_pkt_o[270] = lce_data_cmd_i[276];
assign data_mem_pkt_o[269] = lce_data_cmd_i[275];
assign data_mem_pkt_o[268] = lce_data_cmd_i[274];
assign data_mem_pkt_o[267] = lce_data_cmd_i[273];
assign data_mem_pkt_o[266] = lce_data_cmd_i[272];
assign data_mem_pkt_o[265] = lce_data_cmd_i[271];
assign data_mem_pkt_o[264] = lce_data_cmd_i[270];
assign data_mem_pkt_o[263] = lce_data_cmd_i[269];
assign data_mem_pkt_o[262] = lce_data_cmd_i[268];
assign data_mem_pkt_o[261] = lce_data_cmd_i[267];
assign data_mem_pkt_o[260] = lce_data_cmd_i[266];
assign data_mem_pkt_o[259] = lce_data_cmd_i[265];
assign data_mem_pkt_o[258] = lce_data_cmd_i[264];
assign data_mem_pkt_o[257] = lce_data_cmd_i[263];
assign data_mem_pkt_o[256] = lce_data_cmd_i[262];
assign data_mem_pkt_o[255] = lce_data_cmd_i[261];
assign data_mem_pkt_o[254] = lce_data_cmd_i[260];
assign data_mem_pkt_o[253] = lce_data_cmd_i[259];
assign data_mem_pkt_o[252] = lce_data_cmd_i[258];
assign data_mem_pkt_o[251] = lce_data_cmd_i[257];
assign data_mem_pkt_o[250] = lce_data_cmd_i[256];
assign data_mem_pkt_o[249] = lce_data_cmd_i[255];
assign data_mem_pkt_o[248] = lce_data_cmd_i[254];
assign data_mem_pkt_o[247] = lce_data_cmd_i[253];
assign data_mem_pkt_o[246] = lce_data_cmd_i[252];
assign data_mem_pkt_o[245] = lce_data_cmd_i[251];
assign data_mem_pkt_o[244] = lce_data_cmd_i[250];
assign data_mem_pkt_o[243] = lce_data_cmd_i[249];
assign data_mem_pkt_o[242] = lce_data_cmd_i[248];
assign data_mem_pkt_o[241] = lce_data_cmd_i[247];
assign data_mem_pkt_o[240] = lce_data_cmd_i[246];
assign data_mem_pkt_o[239] = lce_data_cmd_i[245];
assign data_mem_pkt_o[238] = lce_data_cmd_i[244];
assign data_mem_pkt_o[237] = lce_data_cmd_i[243];
assign data_mem_pkt_o[236] = lce_data_cmd_i[242];
assign data_mem_pkt_o[235] = lce_data_cmd_i[241];
assign data_mem_pkt_o[234] = lce_data_cmd_i[240];
assign data_mem_pkt_o[233] = lce_data_cmd_i[239];
assign data_mem_pkt_o[232] = lce_data_cmd_i[238];
assign data_mem_pkt_o[231] = lce_data_cmd_i[237];
assign data_mem_pkt_o[230] = lce_data_cmd_i[236];
assign data_mem_pkt_o[229] = lce_data_cmd_i[235];
assign data_mem_pkt_o[228] = lce_data_cmd_i[234];
assign data_mem_pkt_o[227] = lce_data_cmd_i[233];
assign data_mem_pkt_o[226] = lce_data_cmd_i[232];
assign data_mem_pkt_o[225] = lce_data_cmd_i[231];
assign data_mem_pkt_o[224] = lce_data_cmd_i[230];
assign data_mem_pkt_o[223] = lce_data_cmd_i[229];
assign data_mem_pkt_o[222] = lce_data_cmd_i[228];
assign data_mem_pkt_o[221] = lce_data_cmd_i[227];
assign data_mem_pkt_o[220] = lce_data_cmd_i[226];
assign data_mem_pkt_o[219] = lce_data_cmd_i[225];
assign data_mem_pkt_o[218] = lce_data_cmd_i[224];
assign data_mem_pkt_o[217] = lce_data_cmd_i[223];
assign data_mem_pkt_o[216] = lce_data_cmd_i[222];
assign data_mem_pkt_o[215] = lce_data_cmd_i[221];
assign data_mem_pkt_o[214] = lce_data_cmd_i[220];
assign data_mem_pkt_o[213] = lce_data_cmd_i[219];
assign data_mem_pkt_o[212] = lce_data_cmd_i[218];
assign data_mem_pkt_o[211] = lce_data_cmd_i[217];
assign data_mem_pkt_o[210] = lce_data_cmd_i[216];
assign data_mem_pkt_o[209] = lce_data_cmd_i[215];
assign data_mem_pkt_o[208] = lce_data_cmd_i[214];
assign data_mem_pkt_o[207] = lce_data_cmd_i[213];
assign data_mem_pkt_o[206] = lce_data_cmd_i[212];
assign data_mem_pkt_o[205] = lce_data_cmd_i[211];
assign data_mem_pkt_o[204] = lce_data_cmd_i[210];
assign data_mem_pkt_o[203] = lce_data_cmd_i[209];
assign data_mem_pkt_o[202] = lce_data_cmd_i[208];
assign data_mem_pkt_o[201] = lce_data_cmd_i[207];
assign data_mem_pkt_o[200] = lce_data_cmd_i[206];
assign data_mem_pkt_o[199] = lce_data_cmd_i[205];
assign data_mem_pkt_o[198] = lce_data_cmd_i[204];
assign data_mem_pkt_o[197] = lce_data_cmd_i[203];
assign data_mem_pkt_o[196] = lce_data_cmd_i[202];
assign data_mem_pkt_o[195] = lce_data_cmd_i[201];
assign data_mem_pkt_o[194] = lce_data_cmd_i[200];
assign data_mem_pkt_o[193] = lce_data_cmd_i[199];
assign data_mem_pkt_o[192] = lce_data_cmd_i[198];
assign data_mem_pkt_o[191] = lce_data_cmd_i[197];
assign data_mem_pkt_o[190] = lce_data_cmd_i[196];
assign data_mem_pkt_o[189] = lce_data_cmd_i[195];
assign data_mem_pkt_o[188] = lce_data_cmd_i[194];
assign data_mem_pkt_o[187] = lce_data_cmd_i[193];
assign data_mem_pkt_o[186] = lce_data_cmd_i[192];
assign data_mem_pkt_o[185] = lce_data_cmd_i[191];
assign data_mem_pkt_o[184] = lce_data_cmd_i[190];
assign data_mem_pkt_o[183] = lce_data_cmd_i[189];
assign data_mem_pkt_o[182] = lce_data_cmd_i[188];
assign data_mem_pkt_o[181] = lce_data_cmd_i[187];
assign data_mem_pkt_o[180] = lce_data_cmd_i[186];
assign data_mem_pkt_o[179] = lce_data_cmd_i[185];
assign data_mem_pkt_o[178] = lce_data_cmd_i[184];
assign data_mem_pkt_o[177] = lce_data_cmd_i[183];
assign data_mem_pkt_o[176] = lce_data_cmd_i[182];
assign data_mem_pkt_o[175] = lce_data_cmd_i[181];
assign data_mem_pkt_o[174] = lce_data_cmd_i[180];
assign data_mem_pkt_o[173] = lce_data_cmd_i[179];
assign data_mem_pkt_o[172] = lce_data_cmd_i[178];
assign data_mem_pkt_o[171] = lce_data_cmd_i[177];
assign data_mem_pkt_o[170] = lce_data_cmd_i[176];
assign data_mem_pkt_o[169] = lce_data_cmd_i[175];
assign data_mem_pkt_o[168] = lce_data_cmd_i[174];
assign data_mem_pkt_o[167] = lce_data_cmd_i[173];
assign data_mem_pkt_o[166] = lce_data_cmd_i[172];
assign data_mem_pkt_o[165] = lce_data_cmd_i[171];
assign data_mem_pkt_o[164] = lce_data_cmd_i[170];
assign data_mem_pkt_o[163] = lce_data_cmd_i[169];
assign data_mem_pkt_o[162] = lce_data_cmd_i[168];
assign data_mem_pkt_o[161] = lce_data_cmd_i[167];
assign data_mem_pkt_o[160] = lce_data_cmd_i[166];
assign data_mem_pkt_o[159] = lce_data_cmd_i[165];
assign data_mem_pkt_o[158] = lce_data_cmd_i[164];
assign data_mem_pkt_o[157] = lce_data_cmd_i[163];
assign data_mem_pkt_o[156] = lce_data_cmd_i[162];
assign data_mem_pkt_o[155] = lce_data_cmd_i[161];
assign data_mem_pkt_o[154] = lce_data_cmd_i[160];
assign data_mem_pkt_o[153] = lce_data_cmd_i[159];
assign data_mem_pkt_o[152] = lce_data_cmd_i[158];
assign data_mem_pkt_o[151] = lce_data_cmd_i[157];
assign data_mem_pkt_o[150] = lce_data_cmd_i[156];
assign data_mem_pkt_o[149] = lce_data_cmd_i[155];
assign data_mem_pkt_o[148] = lce_data_cmd_i[154];
assign data_mem_pkt_o[147] = lce_data_cmd_i[153];
assign data_mem_pkt_o[146] = lce_data_cmd_i[152];
assign data_mem_pkt_o[145] = lce_data_cmd_i[151];
assign data_mem_pkt_o[144] = lce_data_cmd_i[150];
assign data_mem_pkt_o[143] = lce_data_cmd_i[149];
assign data_mem_pkt_o[142] = lce_data_cmd_i[148];
assign data_mem_pkt_o[141] = lce_data_cmd_i[147];
assign data_mem_pkt_o[140] = lce_data_cmd_i[146];
assign data_mem_pkt_o[139] = lce_data_cmd_i[145];
assign data_mem_pkt_o[138] = lce_data_cmd_i[144];
assign data_mem_pkt_o[137] = lce_data_cmd_i[143];
assign data_mem_pkt_o[136] = lce_data_cmd_i[142];
assign data_mem_pkt_o[135] = lce_data_cmd_i[141];
assign data_mem_pkt_o[134] = lce_data_cmd_i[140];
assign data_mem_pkt_o[133] = lce_data_cmd_i[139];
assign data_mem_pkt_o[132] = lce_data_cmd_i[138];
assign data_mem_pkt_o[131] = lce_data_cmd_i[137];
assign data_mem_pkt_o[130] = lce_data_cmd_i[136];
assign data_mem_pkt_o[129] = lce_data_cmd_i[135];
assign data_mem_pkt_o[128] = lce_data_cmd_i[134];
assign data_mem_pkt_o[127] = lce_data_cmd_i[133];
assign data_mem_pkt_o[126] = lce_data_cmd_i[132];
assign data_mem_pkt_o[125] = lce_data_cmd_i[131];
assign data_mem_pkt_o[124] = lce_data_cmd_i[130];
assign data_mem_pkt_o[123] = lce_data_cmd_i[129];
assign data_mem_pkt_o[122] = lce_data_cmd_i[128];
assign data_mem_pkt_o[121] = lce_data_cmd_i[127];
assign data_mem_pkt_o[120] = lce_data_cmd_i[126];
assign data_mem_pkt_o[119] = lce_data_cmd_i[125];
assign data_mem_pkt_o[118] = lce_data_cmd_i[124];
assign data_mem_pkt_o[117] = lce_data_cmd_i[123];
assign data_mem_pkt_o[116] = lce_data_cmd_i[122];
assign data_mem_pkt_o[115] = lce_data_cmd_i[121];
assign data_mem_pkt_o[114] = lce_data_cmd_i[120];
assign data_mem_pkt_o[113] = lce_data_cmd_i[119];
assign data_mem_pkt_o[112] = lce_data_cmd_i[118];
assign data_mem_pkt_o[111] = lce_data_cmd_i[117];
assign data_mem_pkt_o[110] = lce_data_cmd_i[116];
assign data_mem_pkt_o[109] = lce_data_cmd_i[115];
assign data_mem_pkt_o[108] = lce_data_cmd_i[114];
assign data_mem_pkt_o[107] = lce_data_cmd_i[113];
assign data_mem_pkt_o[106] = lce_data_cmd_i[112];
assign data_mem_pkt_o[105] = lce_data_cmd_i[111];
assign data_mem_pkt_o[104] = lce_data_cmd_i[110];
assign data_mem_pkt_o[103] = lce_data_cmd_i[109];
assign data_mem_pkt_o[102] = lce_data_cmd_i[108];
assign data_mem_pkt_o[101] = lce_data_cmd_i[107];
assign data_mem_pkt_o[100] = lce_data_cmd_i[106];
assign data_mem_pkt_o[99] = lce_data_cmd_i[105];
assign data_mem_pkt_o[98] = lce_data_cmd_i[104];
assign data_mem_pkt_o[97] = lce_data_cmd_i[103];
assign data_mem_pkt_o[96] = lce_data_cmd_i[102];
assign data_mem_pkt_o[95] = lce_data_cmd_i[101];
assign data_mem_pkt_o[94] = lce_data_cmd_i[100];
assign data_mem_pkt_o[93] = lce_data_cmd_i[99];
assign data_mem_pkt_o[92] = lce_data_cmd_i[98];
assign data_mem_pkt_o[91] = lce_data_cmd_i[97];
assign data_mem_pkt_o[90] = lce_data_cmd_i[96];
assign data_mem_pkt_o[89] = lce_data_cmd_i[95];
assign data_mem_pkt_o[88] = lce_data_cmd_i[94];
assign data_mem_pkt_o[87] = lce_data_cmd_i[93];
assign data_mem_pkt_o[86] = lce_data_cmd_i[92];
assign data_mem_pkt_o[85] = lce_data_cmd_i[91];
assign data_mem_pkt_o[84] = lce_data_cmd_i[90];
assign data_mem_pkt_o[83] = lce_data_cmd_i[89];
assign data_mem_pkt_o[82] = lce_data_cmd_i[88];
assign data_mem_pkt_o[81] = lce_data_cmd_i[87];
assign data_mem_pkt_o[80] = lce_data_cmd_i[86];
assign data_mem_pkt_o[79] = lce_data_cmd_i[85];
assign data_mem_pkt_o[78] = lce_data_cmd_i[84];
assign data_mem_pkt_o[77] = lce_data_cmd_i[83];
assign data_mem_pkt_o[76] = lce_data_cmd_i[82];
assign data_mem_pkt_o[75] = lce_data_cmd_i[81];
assign data_mem_pkt_o[74] = lce_data_cmd_i[80];
assign data_mem_pkt_o[73] = lce_data_cmd_i[79];
assign data_mem_pkt_o[72] = lce_data_cmd_i[78];
assign data_mem_pkt_o[71] = lce_data_cmd_i[77];
assign data_mem_pkt_o[70] = lce_data_cmd_i[76];
assign data_mem_pkt_o[69] = lce_data_cmd_i[75];
assign data_mem_pkt_o[68] = lce_data_cmd_i[74];
assign data_mem_pkt_o[67] = lce_data_cmd_i[73];
assign data_mem_pkt_o[66] = lce_data_cmd_i[72];
assign data_mem_pkt_o[65] = lce_data_cmd_i[71];
assign data_mem_pkt_o[64] = lce_data_cmd_i[70];
assign data_mem_pkt_o[63] = lce_data_cmd_i[69];
assign data_mem_pkt_o[62] = lce_data_cmd_i[68];
assign data_mem_pkt_o[61] = lce_data_cmd_i[67];
assign data_mem_pkt_o[60] = lce_data_cmd_i[66];
assign data_mem_pkt_o[59] = lce_data_cmd_i[65];
assign data_mem_pkt_o[58] = lce_data_cmd_i[64];
assign data_mem_pkt_o[57] = lce_data_cmd_i[63];
assign data_mem_pkt_o[56] = lce_data_cmd_i[62];
assign data_mem_pkt_o[55] = lce_data_cmd_i[61];
assign data_mem_pkt_o[54] = lce_data_cmd_i[60];
assign data_mem_pkt_o[53] = lce_data_cmd_i[59];
assign data_mem_pkt_o[52] = lce_data_cmd_i[58];
assign data_mem_pkt_o[51] = lce_data_cmd_i[57];
assign data_mem_pkt_o[50] = lce_data_cmd_i[56];
assign data_mem_pkt_o[49] = lce_data_cmd_i[55];
assign data_mem_pkt_o[48] = lce_data_cmd_i[54];
assign data_mem_pkt_o[47] = lce_data_cmd_i[53];
assign data_mem_pkt_o[46] = lce_data_cmd_i[52];
assign data_mem_pkt_o[45] = lce_data_cmd_i[51];
assign data_mem_pkt_o[44] = lce_data_cmd_i[50];
assign data_mem_pkt_o[43] = lce_data_cmd_i[49];
assign data_mem_pkt_o[42] = lce_data_cmd_i[48];
assign data_mem_pkt_o[41] = lce_data_cmd_i[47];
assign data_mem_pkt_o[40] = lce_data_cmd_i[46];
assign data_mem_pkt_o[39] = lce_data_cmd_i[45];
assign data_mem_pkt_o[38] = lce_data_cmd_i[44];
assign data_mem_pkt_o[37] = lce_data_cmd_i[43];
assign data_mem_pkt_o[36] = lce_data_cmd_i[42];
assign data_mem_pkt_o[35] = lce_data_cmd_i[41];
assign data_mem_pkt_o[34] = lce_data_cmd_i[40];
assign data_mem_pkt_o[33] = lce_data_cmd_i[39];
assign data_mem_pkt_o[32] = lce_data_cmd_i[38];
assign data_mem_pkt_o[31] = lce_data_cmd_i[37];
assign data_mem_pkt_o[30] = lce_data_cmd_i[36];
assign data_mem_pkt_o[29] = lce_data_cmd_i[35];
assign data_mem_pkt_o[28] = lce_data_cmd_i[34];
assign data_mem_pkt_o[27] = lce_data_cmd_i[33];
assign data_mem_pkt_o[26] = lce_data_cmd_i[32];
assign data_mem_pkt_o[25] = lce_data_cmd_i[31];
assign data_mem_pkt_o[24] = lce_data_cmd_i[30];
assign data_mem_pkt_o[23] = lce_data_cmd_i[29];
assign data_mem_pkt_o[22] = lce_data_cmd_i[28];
assign data_mem_pkt_o[21] = lce_data_cmd_i[27];
assign data_mem_pkt_o[20] = lce_data_cmd_i[26];
assign data_mem_pkt_o[19] = lce_data_cmd_i[25];
assign data_mem_pkt_o[18] = lce_data_cmd_i[24];
assign data_mem_pkt_o[17] = lce_data_cmd_i[23];
assign data_mem_pkt_o[16] = lce_data_cmd_i[22];
assign data_mem_pkt_o[15] = lce_data_cmd_i[21];
assign data_mem_pkt_o[14] = lce_data_cmd_i[20];
assign data_mem_pkt_o[13] = lce_data_cmd_i[19];
assign data_mem_pkt_o[12] = lce_data_cmd_i[18];
assign data_mem_pkt_o[11] = lce_data_cmd_i[17];
assign data_mem_pkt_o[10] = lce_data_cmd_i[16];
assign data_mem_pkt_o[9] = lce_data_cmd_i[15];
assign data_mem_pkt_o[8] = lce_data_cmd_i[14];
assign data_mem_pkt_o[7] = lce_data_cmd_i[13];
assign data_mem_pkt_o[6] = lce_data_cmd_i[12];
assign data_mem_pkt_o[5] = lce_data_cmd_i[11];
assign data_mem_pkt_o[4] = lce_data_cmd_i[10];
assign data_mem_pkt_o[3] = lce_data_cmd_i[9];
assign data_mem_pkt_o[2] = lce_data_cmd_i[8];
assign data_mem_pkt_o[1] = lce_data_cmd_i[7];
assign data_mem_pkt_o[0] = lce_data_cmd_i[6];
assign lce_data_cmd_yumi_o = data_mem_pkt_yumi_i;
assign data_mem_pkt_v_o = lce_data_cmd_v_i;
assign data_mem_pkt_o[521] = miss_addr_i[11];
assign data_mem_pkt_o[520] = miss_addr_i[10];
assign data_mem_pkt_o[519] = miss_addr_i[9];
assign data_mem_pkt_o[518] = miss_addr_i[8];
assign data_mem_pkt_o[517] = miss_addr_i[7];
assign data_mem_pkt_o[516] = miss_addr_i[6];
assign N0 = ~lce_data_cmd_i[3];
assign N1 = N0 | lce_data_cmd_i[4];
assign N2 = ~N1;
assign N3 = lce_data_cmd_i[3] | lce_data_cmd_i[4];
assign N4 = ~N3;
assign cce_data_received_o = data_mem_pkt_yumi_i & N2;
assign tr_data_received_o = data_mem_pkt_yumi_i & N4;
endmodule
|
module bsg_dff_width_p386
(
clk_i,
data_i,
data_o
);
input [385:0] data_i;
output [385:0] data_o;
input clk_i;
reg [385:0] data_o;
always @(posedge clk_i) begin
if(1'b1) begin
{ data_o[385:0] } <= { data_i[385:0] };
end
end
endmodule
|
module bsg_dff_en_width_p64
(
clk_i,
data_i,
en_i,
data_o
);
input [63:0] data_i;
output [63:0] data_o;
input clk_i;
input en_i;
reg [63:0] data_o;
always @(posedge clk_i) begin
if(en_i) begin
{ data_o[63:0] } <= { data_i[63:0] };
end
end
endmodule
|
module bsg_mux_width_p136_els_p4
(
data_i,
sel_i,
data_o
);
input [543:0] data_i;
input [1:0] sel_i;
output [135:0] data_o;
wire [135:0] data_o;
wire N0,N1,N2,N3,N4,N5;
assign data_o[135] = (N2)? data_i[135] :
(N4)? data_i[271] :
(N3)? data_i[407] :
(N5)? data_i[543] : 1'b0;
assign data_o[134] = (N2)? data_i[134] :
(N4)? data_i[270] :
(N3)? data_i[406] :
(N5)? data_i[542] : 1'b0;
assign data_o[133] = (N2)? data_i[133] :
(N4)? data_i[269] :
(N3)? data_i[405] :
(N5)? data_i[541] : 1'b0;
assign data_o[132] = (N2)? data_i[132] :
(N4)? data_i[268] :
(N3)? data_i[404] :
(N5)? data_i[540] : 1'b0;
assign data_o[131] = (N2)? data_i[131] :
(N4)? data_i[267] :
(N3)? data_i[403] :
(N5)? data_i[539] : 1'b0;
assign data_o[130] = (N2)? data_i[130] :
(N4)? data_i[266] :
(N3)? data_i[402] :
(N5)? data_i[538] : 1'b0;
assign data_o[129] = (N2)? data_i[129] :
(N4)? data_i[265] :
(N3)? data_i[401] :
(N5)? data_i[537] : 1'b0;
assign data_o[128] = (N2)? data_i[128] :
(N4)? data_i[264] :
(N3)? data_i[400] :
(N5)? data_i[536] : 1'b0;
assign data_o[127] = (N2)? data_i[127] :
(N4)? data_i[263] :
(N3)? data_i[399] :
(N5)? data_i[535] : 1'b0;
assign data_o[126] = (N2)? data_i[126] :
(N4)? data_i[262] :
(N3)? data_i[398] :
(N5)? data_i[534] : 1'b0;
assign data_o[125] = (N2)? data_i[125] :
(N4)? data_i[261] :
(N3)? data_i[397] :
(N5)? data_i[533] : 1'b0;
assign data_o[124] = (N2)? data_i[124] :
(N4)? data_i[260] :
(N3)? data_i[396] :
(N5)? data_i[532] : 1'b0;
assign data_o[123] = (N2)? data_i[123] :
(N4)? data_i[259] :
(N3)? data_i[395] :
(N5)? data_i[531] : 1'b0;
assign data_o[122] = (N2)? data_i[122] :
(N4)? data_i[258] :
(N3)? data_i[394] :
(N5)? data_i[530] : 1'b0;
assign data_o[121] = (N2)? data_i[121] :
(N4)? data_i[257] :
(N3)? data_i[393] :
(N5)? data_i[529] : 1'b0;
assign data_o[120] = (N2)? data_i[120] :
(N4)? data_i[256] :
(N3)? data_i[392] :
(N5)? data_i[528] : 1'b0;
assign data_o[119] = (N2)? data_i[119] :
(N4)? data_i[255] :
(N3)? data_i[391] :
(N5)? data_i[527] : 1'b0;
assign data_o[118] = (N2)? data_i[118] :
(N4)? data_i[254] :
(N3)? data_i[390] :
(N5)? data_i[526] : 1'b0;
assign data_o[117] = (N2)? data_i[117] :
(N4)? data_i[253] :
(N3)? data_i[389] :
(N5)? data_i[525] : 1'b0;
assign data_o[116] = (N2)? data_i[116] :
(N4)? data_i[252] :
(N3)? data_i[388] :
(N5)? data_i[524] : 1'b0;
assign data_o[115] = (N2)? data_i[115] :
(N4)? data_i[251] :
(N3)? data_i[387] :
(N5)? data_i[523] : 1'b0;
assign data_o[114] = (N2)? data_i[114] :
(N4)? data_i[250] :
(N3)? data_i[386] :
(N5)? data_i[522] : 1'b0;
assign data_o[113] = (N2)? data_i[113] :
(N4)? data_i[249] :
(N3)? data_i[385] :
(N5)? data_i[521] : 1'b0;
assign data_o[112] = (N2)? data_i[112] :
(N4)? data_i[248] :
(N3)? data_i[384] :
(N5)? data_i[520] : 1'b0;
assign data_o[111] = (N2)? data_i[111] :
(N4)? data_i[247] :
(N3)? data_i[383] :
(N5)? data_i[519] : 1'b0;
assign data_o[110] = (N2)? data_i[110] :
(N4)? data_i[246] :
(N3)? data_i[382] :
(N5)? data_i[518] : 1'b0;
assign data_o[109] = (N2)? data_i[109] :
(N4)? data_i[245] :
(N3)? data_i[381] :
(N5)? data_i[517] : 1'b0;
assign data_o[108] = (N2)? data_i[108] :
(N4)? data_i[244] :
(N3)? data_i[380] :
(N5)? data_i[516] : 1'b0;
assign data_o[107] = (N2)? data_i[107] :
(N4)? data_i[243] :
(N3)? data_i[379] :
(N5)? data_i[515] : 1'b0;
assign data_o[106] = (N2)? data_i[106] :
(N4)? data_i[242] :
(N3)? data_i[378] :
(N5)? data_i[514] : 1'b0;
assign data_o[105] = (N2)? data_i[105] :
(N4)? data_i[241] :
(N3)? data_i[377] :
(N5)? data_i[513] : 1'b0;
assign data_o[104] = (N2)? data_i[104] :
(N4)? data_i[240] :
(N3)? data_i[376] :
(N5)? data_i[512] : 1'b0;
assign data_o[103] = (N2)? data_i[103] :
(N4)? data_i[239] :
(N3)? data_i[375] :
(N5)? data_i[511] : 1'b0;
assign data_o[102] = (N2)? data_i[102] :
(N4)? data_i[238] :
(N3)? data_i[374] :
(N5)? data_i[510] : 1'b0;
assign data_o[101] = (N2)? data_i[101] :
(N4)? data_i[237] :
(N3)? data_i[373] :
(N5)? data_i[509] : 1'b0;
assign data_o[100] = (N2)? data_i[100] :
(N4)? data_i[236] :
(N3)? data_i[372] :
(N5)? data_i[508] : 1'b0;
assign data_o[99] = (N2)? data_i[99] :
(N4)? data_i[235] :
(N3)? data_i[371] :
(N5)? data_i[507] : 1'b0;
assign data_o[98] = (N2)? data_i[98] :
(N4)? data_i[234] :
(N3)? data_i[370] :
(N5)? data_i[506] : 1'b0;
assign data_o[97] = (N2)? data_i[97] :
(N4)? data_i[233] :
(N3)? data_i[369] :
(N5)? data_i[505] : 1'b0;
assign data_o[96] = (N2)? data_i[96] :
(N4)? data_i[232] :
(N3)? data_i[368] :
(N5)? data_i[504] : 1'b0;
assign data_o[95] = (N2)? data_i[95] :
(N4)? data_i[231] :
(N3)? data_i[367] :
(N5)? data_i[503] : 1'b0;
assign data_o[94] = (N2)? data_i[94] :
(N4)? data_i[230] :
(N3)? data_i[366] :
(N5)? data_i[502] : 1'b0;
assign data_o[93] = (N2)? data_i[93] :
(N4)? data_i[229] :
(N3)? data_i[365] :
(N5)? data_i[501] : 1'b0;
assign data_o[92] = (N2)? data_i[92] :
(N4)? data_i[228] :
(N3)? data_i[364] :
(N5)? data_i[500] : 1'b0;
assign data_o[91] = (N2)? data_i[91] :
(N4)? data_i[227] :
(N3)? data_i[363] :
(N5)? data_i[499] : 1'b0;
assign data_o[90] = (N2)? data_i[90] :
(N4)? data_i[226] :
(N3)? data_i[362] :
(N5)? data_i[498] : 1'b0;
assign data_o[89] = (N2)? data_i[89] :
(N4)? data_i[225] :
(N3)? data_i[361] :
(N5)? data_i[497] : 1'b0;
assign data_o[88] = (N2)? data_i[88] :
(N4)? data_i[224] :
(N3)? data_i[360] :
(N5)? data_i[496] : 1'b0;
assign data_o[87] = (N2)? data_i[87] :
(N4)? data_i[223] :
(N3)? data_i[359] :
(N5)? data_i[495] : 1'b0;
assign data_o[86] = (N2)? data_i[86] :
(N4)? data_i[222] :
(N3)? data_i[358] :
(N5)? data_i[494] : 1'b0;
assign data_o[85] = (N2)? data_i[85] :
(N4)? data_i[221] :
(N3)? data_i[357] :
(N5)? data_i[493] : 1'b0;
assign data_o[84] = (N2)? data_i[84] :
(N4)? data_i[220] :
(N3)? data_i[356] :
(N5)? data_i[492] : 1'b0;
assign data_o[83] = (N2)? data_i[83] :
(N4)? data_i[219] :
(N3)? data_i[355] :
(N5)? data_i[491] : 1'b0;
assign data_o[82] = (N2)? data_i[82] :
(N4)? data_i[218] :
(N3)? data_i[354] :
(N5)? data_i[490] : 1'b0;
assign data_o[81] = (N2)? data_i[81] :
(N4)? data_i[217] :
(N3)? data_i[353] :
(N5)? data_i[489] : 1'b0;
assign data_o[80] = (N2)? data_i[80] :
(N4)? data_i[216] :
(N3)? data_i[352] :
(N5)? data_i[488] : 1'b0;
assign data_o[79] = (N2)? data_i[79] :
(N4)? data_i[215] :
(N3)? data_i[351] :
(N5)? data_i[487] : 1'b0;
assign data_o[78] = (N2)? data_i[78] :
(N4)? data_i[214] :
(N3)? data_i[350] :
(N5)? data_i[486] : 1'b0;
assign data_o[77] = (N2)? data_i[77] :
(N4)? data_i[213] :
(N3)? data_i[349] :
(N5)? data_i[485] : 1'b0;
assign data_o[76] = (N2)? data_i[76] :
(N4)? data_i[212] :
(N3)? data_i[348] :
(N5)? data_i[484] : 1'b0;
assign data_o[75] = (N2)? data_i[75] :
(N4)? data_i[211] :
(N3)? data_i[347] :
(N5)? data_i[483] : 1'b0;
assign data_o[74] = (N2)? data_i[74] :
(N4)? data_i[210] :
(N3)? data_i[346] :
(N5)? data_i[482] : 1'b0;
assign data_o[73] = (N2)? data_i[73] :
(N4)? data_i[209] :
(N3)? data_i[345] :
(N5)? data_i[481] : 1'b0;
assign data_o[72] = (N2)? data_i[72] :
(N4)? data_i[208] :
(N3)? data_i[344] :
(N5)? data_i[480] : 1'b0;
assign data_o[71] = (N2)? data_i[71] :
(N4)? data_i[207] :
(N3)? data_i[343] :
(N5)? data_i[479] : 1'b0;
assign data_o[70] = (N2)? data_i[70] :
(N4)? data_i[206] :
(N3)? data_i[342] :
(N5)? data_i[478] : 1'b0;
assign data_o[69] = (N2)? data_i[69] :
(N4)? data_i[205] :
(N3)? data_i[341] :
(N5)? data_i[477] : 1'b0;
assign data_o[68] = (N2)? data_i[68] :
(N4)? data_i[204] :
(N3)? data_i[340] :
(N5)? data_i[476] : 1'b0;
assign data_o[67] = (N2)? data_i[67] :
(N4)? data_i[203] :
(N3)? data_i[339] :
(N5)? data_i[475] : 1'b0;
assign data_o[66] = (N2)? data_i[66] :
(N4)? data_i[202] :
(N3)? data_i[338] :
(N5)? data_i[474] : 1'b0;
assign data_o[65] = (N2)? data_i[65] :
(N4)? data_i[201] :
(N3)? data_i[337] :
(N5)? data_i[473] : 1'b0;
assign data_o[64] = (N2)? data_i[64] :
(N4)? data_i[200] :
(N3)? data_i[336] :
(N5)? data_i[472] : 1'b0;
assign data_o[63] = (N2)? data_i[63] :
(N4)? data_i[199] :
(N3)? data_i[335] :
(N5)? data_i[471] : 1'b0;
assign data_o[62] = (N2)? data_i[62] :
(N4)? data_i[198] :
(N3)? data_i[334] :
(N5)? data_i[470] : 1'b0;
assign data_o[61] = (N2)? data_i[61] :
(N4)? data_i[197] :
(N3)? data_i[333] :
(N5)? data_i[469] : 1'b0;
assign data_o[60] = (N2)? data_i[60] :
(N4)? data_i[196] :
(N3)? data_i[332] :
(N5)? data_i[468] : 1'b0;
assign data_o[59] = (N2)? data_i[59] :
(N4)? data_i[195] :
(N3)? data_i[331] :
(N5)? data_i[467] : 1'b0;
assign data_o[58] = (N2)? data_i[58] :
(N4)? data_i[194] :
(N3)? data_i[330] :
(N5)? data_i[466] : 1'b0;
assign data_o[57] = (N2)? data_i[57] :
(N4)? data_i[193] :
(N3)? data_i[329] :
(N5)? data_i[465] : 1'b0;
assign data_o[56] = (N2)? data_i[56] :
(N4)? data_i[192] :
(N3)? data_i[328] :
(N5)? data_i[464] : 1'b0;
assign data_o[55] = (N2)? data_i[55] :
(N4)? data_i[191] :
(N3)? data_i[327] :
(N5)? data_i[463] : 1'b0;
assign data_o[54] = (N2)? data_i[54] :
(N4)? data_i[190] :
(N3)? data_i[326] :
(N5)? data_i[462] : 1'b0;
assign data_o[53] = (N2)? data_i[53] :
(N4)? data_i[189] :
(N3)? data_i[325] :
(N5)? data_i[461] : 1'b0;
assign data_o[52] = (N2)? data_i[52] :
(N4)? data_i[188] :
(N3)? data_i[324] :
(N5)? data_i[460] : 1'b0;
assign data_o[51] = (N2)? data_i[51] :
(N4)? data_i[187] :
(N3)? data_i[323] :
(N5)? data_i[459] : 1'b0;
assign data_o[50] = (N2)? data_i[50] :
(N4)? data_i[186] :
(N3)? data_i[322] :
(N5)? data_i[458] : 1'b0;
assign data_o[49] = (N2)? data_i[49] :
(N4)? data_i[185] :
(N3)? data_i[321] :
(N5)? data_i[457] : 1'b0;
assign data_o[48] = (N2)? data_i[48] :
(N4)? data_i[184] :
(N3)? data_i[320] :
(N5)? data_i[456] : 1'b0;
assign data_o[47] = (N2)? data_i[47] :
(N4)? data_i[183] :
(N3)? data_i[319] :
(N5)? data_i[455] : 1'b0;
assign data_o[46] = (N2)? data_i[46] :
(N4)? data_i[182] :
(N3)? data_i[318] :
(N5)? data_i[454] : 1'b0;
assign data_o[45] = (N2)? data_i[45] :
(N4)? data_i[181] :
(N3)? data_i[317] :
(N5)? data_i[453] : 1'b0;
assign data_o[44] = (N2)? data_i[44] :
(N4)? data_i[180] :
(N3)? data_i[316] :
(N5)? data_i[452] : 1'b0;
assign data_o[43] = (N2)? data_i[43] :
(N4)? data_i[179] :
(N3)? data_i[315] :
(N5)? data_i[451] : 1'b0;
assign data_o[42] = (N2)? data_i[42] :
(N4)? data_i[178] :
(N3)? data_i[314] :
(N5)? data_i[450] : 1'b0;
assign data_o[41] = (N2)? data_i[41] :
(N4)? data_i[177] :
(N3)? data_i[313] :
(N5)? data_i[449] : 1'b0;
assign data_o[40] = (N2)? data_i[40] :
(N4)? data_i[176] :
(N3)? data_i[312] :
(N5)? data_i[448] : 1'b0;
assign data_o[39] = (N2)? data_i[39] :
(N4)? data_i[175] :
(N3)? data_i[311] :
(N5)? data_i[447] : 1'b0;
assign data_o[38] = (N2)? data_i[38] :
(N4)? data_i[174] :
(N3)? data_i[310] :
(N5)? data_i[446] : 1'b0;
assign data_o[37] = (N2)? data_i[37] :
(N4)? data_i[173] :
(N3)? data_i[309] :
(N5)? data_i[445] : 1'b0;
assign data_o[36] = (N2)? data_i[36] :
(N4)? data_i[172] :
(N3)? data_i[308] :
(N5)? data_i[444] : 1'b0;
assign data_o[35] = (N2)? data_i[35] :
(N4)? data_i[171] :
(N3)? data_i[307] :
(N5)? data_i[443] : 1'b0;
assign data_o[34] = (N2)? data_i[34] :
(N4)? data_i[170] :
(N3)? data_i[306] :
(N5)? data_i[442] : 1'b0;
assign data_o[33] = (N2)? data_i[33] :
(N4)? data_i[169] :
(N3)? data_i[305] :
(N5)? data_i[441] : 1'b0;
assign data_o[32] = (N2)? data_i[32] :
(N4)? data_i[168] :
(N3)? data_i[304] :
(N5)? data_i[440] : 1'b0;
assign data_o[31] = (N2)? data_i[31] :
(N4)? data_i[167] :
(N3)? data_i[303] :
(N5)? data_i[439] : 1'b0;
assign data_o[30] = (N2)? data_i[30] :
(N4)? data_i[166] :
(N3)? data_i[302] :
(N5)? data_i[438] : 1'b0;
assign data_o[29] = (N2)? data_i[29] :
(N4)? data_i[165] :
(N3)? data_i[301] :
(N5)? data_i[437] : 1'b0;
assign data_o[28] = (N2)? data_i[28] :
(N4)? data_i[164] :
(N3)? data_i[300] :
(N5)? data_i[436] : 1'b0;
assign data_o[27] = (N2)? data_i[27] :
(N4)? data_i[163] :
(N3)? data_i[299] :
(N5)? data_i[435] : 1'b0;
assign data_o[26] = (N2)? data_i[26] :
(N4)? data_i[162] :
(N3)? data_i[298] :
(N5)? data_i[434] : 1'b0;
assign data_o[25] = (N2)? data_i[25] :
(N4)? data_i[161] :
(N3)? data_i[297] :
(N5)? data_i[433] : 1'b0;
assign data_o[24] = (N2)? data_i[24] :
(N4)? data_i[160] :
(N3)? data_i[296] :
(N5)? data_i[432] : 1'b0;
assign data_o[23] = (N2)? data_i[23] :
(N4)? data_i[159] :
(N3)? data_i[295] :
(N5)? data_i[431] : 1'b0;
assign data_o[22] = (N2)? data_i[22] :
(N4)? data_i[158] :
(N3)? data_i[294] :
(N5)? data_i[430] : 1'b0;
assign data_o[21] = (N2)? data_i[21] :
(N4)? data_i[157] :
(N3)? data_i[293] :
(N5)? data_i[429] : 1'b0;
assign data_o[20] = (N2)? data_i[20] :
(N4)? data_i[156] :
(N3)? data_i[292] :
(N5)? data_i[428] : 1'b0;
assign data_o[19] = (N2)? data_i[19] :
(N4)? data_i[155] :
(N3)? data_i[291] :
(N5)? data_i[427] : 1'b0;
assign data_o[18] = (N2)? data_i[18] :
(N4)? data_i[154] :
(N3)? data_i[290] :
(N5)? data_i[426] : 1'b0;
assign data_o[17] = (N2)? data_i[17] :
(N4)? data_i[153] :
(N3)? data_i[289] :
(N5)? data_i[425] : 1'b0;
assign data_o[16] = (N2)? data_i[16] :
(N4)? data_i[152] :
(N3)? data_i[288] :
(N5)? data_i[424] : 1'b0;
assign data_o[15] = (N2)? data_i[15] :
(N4)? data_i[151] :
(N3)? data_i[287] :
(N5)? data_i[423] : 1'b0;
assign data_o[14] = (N2)? data_i[14] :
(N4)? data_i[150] :
(N3)? data_i[286] :
(N5)? data_i[422] : 1'b0;
assign data_o[13] = (N2)? data_i[13] :
(N4)? data_i[149] :
(N3)? data_i[285] :
(N5)? data_i[421] : 1'b0;
assign data_o[12] = (N2)? data_i[12] :
(N4)? data_i[148] :
(N3)? data_i[284] :
(N5)? data_i[420] : 1'b0;
assign data_o[11] = (N2)? data_i[11] :
(N4)? data_i[147] :
(N3)? data_i[283] :
(N5)? data_i[419] : 1'b0;
assign data_o[10] = (N2)? data_i[10] :
(N4)? data_i[146] :
(N3)? data_i[282] :
(N5)? data_i[418] : 1'b0;
assign data_o[9] = (N2)? data_i[9] :
(N4)? data_i[145] :
(N3)? data_i[281] :
(N5)? data_i[417] : 1'b0;
assign data_o[8] = (N2)? data_i[8] :
(N4)? data_i[144] :
(N3)? data_i[280] :
(N5)? data_i[416] : 1'b0;
assign data_o[7] = (N2)? data_i[7] :
(N4)? data_i[143] :
(N3)? data_i[279] :
(N5)? data_i[415] : 1'b0;
assign data_o[6] = (N2)? data_i[6] :
(N4)? data_i[142] :
(N3)? data_i[278] :
(N5)? data_i[414] : 1'b0;
assign data_o[5] = (N2)? data_i[5] :
(N4)? data_i[141] :
(N3)? data_i[277] :
(N5)? data_i[413] : 1'b0;
assign data_o[4] = (N2)? data_i[4] :
(N4)? data_i[140] :
(N3)? data_i[276] :
(N5)? data_i[412] : 1'b0;
assign data_o[3] = (N2)? data_i[3] :
(N4)? data_i[139] :
(N3)? data_i[275] :
(N5)? data_i[411] : 1'b0;
assign data_o[2] = (N2)? data_i[2] :
(N4)? data_i[138] :
(N3)? data_i[274] :
(N5)? data_i[410] : 1'b0;
assign data_o[1] = (N2)? data_i[1] :
(N4)? data_i[137] :
(N3)? data_i[273] :
(N5)? data_i[409] : 1'b0;
assign data_o[0] = (N2)? data_i[0] :
(N4)? data_i[136] :
(N3)? data_i[272] :
(N5)? data_i[408] : 1'b0;
assign N0 = ~sel_i[0];
assign N1 = ~sel_i[1];
assign N2 = N0 & N1;
assign N3 = N0 & sel_i[1];
assign N4 = sel_i[0] & N1;
assign N5 = sel_i[0] & sel_i[1];
endmodule
|
module bsg_mem_1r1w_synth_width_p58_els_p2_read_write_same_addr_p0_harden_p0
(
w_clk_i,
w_reset_i,
w_v_i,
w_addr_i,
w_data_i,
r_v_i,
r_addr_i,
r_data_o
);
input [0:0] w_addr_i;
input [57:0] w_data_i;
input [0:0] r_addr_i;
output [57:0] r_data_o;
input w_clk_i;
input w_reset_i;
input w_v_i;
input r_v_i;
wire [57:0] r_data_o;
wire N0,N1,N2,N3,N4,N5,N7,N8;
reg [115:0] mem;
assign r_data_o[57] = (N3)? mem[57] :
(N0)? mem[115] : 1'b0;
assign N0 = r_addr_i[0];
assign r_data_o[56] = (N3)? mem[56] :
(N0)? mem[114] : 1'b0;
assign r_data_o[55] = (N3)? mem[55] :
(N0)? mem[113] : 1'b0;
assign r_data_o[54] = (N3)? mem[54] :
(N0)? mem[112] : 1'b0;
assign r_data_o[53] = (N3)? mem[53] :
(N0)? mem[111] : 1'b0;
assign r_data_o[52] = (N3)? mem[52] :
(N0)? mem[110] : 1'b0;
assign r_data_o[51] = (N3)? mem[51] :
(N0)? mem[109] : 1'b0;
assign r_data_o[50] = (N3)? mem[50] :
(N0)? mem[108] : 1'b0;
assign r_data_o[49] = (N3)? mem[49] :
(N0)? mem[107] : 1'b0;
assign r_data_o[48] = (N3)? mem[48] :
(N0)? mem[106] : 1'b0;
assign r_data_o[47] = (N3)? mem[47] :
(N0)? mem[105] : 1'b0;
assign r_data_o[46] = (N3)? mem[46] :
(N0)? mem[104] : 1'b0;
assign r_data_o[45] = (N3)? mem[45] :
(N0)? mem[103] : 1'b0;
assign r_data_o[44] = (N3)? mem[44] :
(N0)? mem[102] : 1'b0;
assign r_data_o[43] = (N3)? mem[43] :
(N0)? mem[101] : 1'b0;
assign r_data_o[42] = (N3)? mem[42] :
(N0)? mem[100] : 1'b0;
assign r_data_o[41] = (N3)? mem[41] :
(N0)? mem[99] : 1'b0;
assign r_data_o[40] = (N3)? mem[40] :
(N0)? mem[98] : 1'b0;
assign r_data_o[39] = (N3)? mem[39] :
(N0)? mem[97] : 1'b0;
assign r_data_o[38] = (N3)? mem[38] :
(N0)? mem[96] : 1'b0;
assign r_data_o[37] = (N3)? mem[37] :
(N0)? mem[95] : 1'b0;
assign r_data_o[36] = (N3)? mem[36] :
(N0)? mem[94] : 1'b0;
assign r_data_o[35] = (N3)? mem[35] :
(N0)? mem[93] : 1'b0;
assign r_data_o[34] = (N3)? mem[34] :
(N0)? mem[92] : 1'b0;
assign r_data_o[33] = (N3)? mem[33] :
(N0)? mem[91] : 1'b0;
assign r_data_o[32] = (N3)? mem[32] :
(N0)? mem[90] : 1'b0;
assign r_data_o[31] = (N3)? mem[31] :
(N0)? mem[89] : 1'b0;
assign r_data_o[30] = (N3)? mem[30] :
(N0)? mem[88] : 1'b0;
assign r_data_o[29] = (N3)? mem[29] :
(N0)? mem[87] : 1'b0;
assign r_data_o[28] = (N3)? mem[28] :
(N0)? mem[86] : 1'b0;
assign r_data_o[27] = (N3)? mem[27] :
(N0)? mem[85] : 1'b0;
assign r_data_o[26] = (N3)? mem[26] :
(N0)? mem[84] : 1'b0;
assign r_data_o[25] = (N3)? mem[25] :
(N0)? mem[83] : 1'b0;
assign r_data_o[24] = (N3)? mem[24] :
(N0)? mem[82] : 1'b0;
assign r_data_o[23] = (N3)? mem[23] :
(N0)? mem[81] : 1'b0;
assign r_data_o[22] = (N3)? mem[22] :
(N0)? mem[80] : 1'b0;
assign r_data_o[21] = (N3)? mem[21] :
(N0)? mem[79] : 1'b0;
assign r_data_o[20] = (N3)? mem[20] :
(N0)? mem[78] : 1'b0;
assign r_data_o[19] = (N3)? mem[19] :
(N0)? mem[77] : 1'b0;
assign r_data_o[18] = (N3)? mem[18] :
(N0)? mem[76] : 1'b0;
assign r_data_o[17] = (N3)? mem[17] :
(N0)? mem[75] : 1'b0;
assign r_data_o[16] = (N3)? mem[16] :
(N0)? mem[74] : 1'b0;
assign r_data_o[15] = (N3)? mem[15] :
(N0)? mem[73] : 1'b0;
assign r_data_o[14] = (N3)? mem[14] :
(N0)? mem[72] : 1'b0;
assign r_data_o[13] = (N3)? mem[13] :
(N0)? mem[71] : 1'b0;
assign r_data_o[12] = (N3)? mem[12] :
(N0)? mem[70] : 1'b0;
assign r_data_o[11] = (N3)? mem[11] :
(N0)? mem[69] : 1'b0;
assign r_data_o[10] = (N3)? mem[10] :
(N0)? mem[68] : 1'b0;
assign r_data_o[9] = (N3)? mem[9] :
(N0)? mem[67] : 1'b0;
assign r_data_o[8] = (N3)? mem[8] :
(N0)? mem[66] : 1'b0;
assign r_data_o[7] = (N3)? mem[7] :
(N0)? mem[65] : 1'b0;
assign r_data_o[6] = (N3)? mem[6] :
(N0)? mem[64] : 1'b0;
assign r_data_o[5] = (N3)? mem[5] :
(N0)? mem[63] : 1'b0;
assign r_data_o[4] = (N3)? mem[4] :
(N0)? mem[62] : 1'b0;
assign r_data_o[3] = (N3)? mem[3] :
(N0)? mem[61] : 1'b0;
assign r_data_o[2] = (N3)? mem[2] :
(N0)? mem[60] : 1'b0;
assign r_data_o[1] = (N3)? mem[1] :
(N0)? mem[59] : 1'b0;
assign r_data_o[0] = (N3)? mem[0] :
(N0)? mem[58] : 1'b0;
assign N5 = ~w_addr_i[0];
assign { N8, N7 } = (N1)? { w_addr_i[0:0], N5 } :
(N2)? { 1'b0, 1'b0 } : 1'b0;
assign N1 = w_v_i;
assign N2 = N4;
assign N3 = ~r_addr_i[0];
assign N4 = ~w_v_i;
always @(posedge w_clk_i) begin
if(N8) begin
{ mem[115:58] } <= { w_data_i[57:0] };
end
if(N7) begin
{ mem[57:0] } <= { w_data_i[57:0] };
end
end
endmodule
|
module bsg_mem_1r1w_synth_width_p136_els_p2_read_write_same_addr_p0_harden_p0
(
w_clk_i,
w_reset_i,
w_v_i,
w_addr_i,
w_data_i,
r_v_i,
r_addr_i,
r_data_o
);
input [0:0] w_addr_i;
input [135:0] w_data_i;
input [0:0] r_addr_i;
output [135:0] r_data_o;
input w_clk_i;
input w_reset_i;
input w_v_i;
input r_v_i;
wire [135:0] r_data_o;
wire N0,N1,N2,N3,N4,N5,N7,N8,N9,N10;
reg [271:0] mem;
assign r_data_o[135] = (N3)? mem[135] :
(N0)? mem[271] : 1'b0;
assign N0 = r_addr_i[0];
assign r_data_o[134] = (N3)? mem[134] :
(N0)? mem[270] : 1'b0;
assign r_data_o[133] = (N3)? mem[133] :
(N0)? mem[269] : 1'b0;
assign r_data_o[132] = (N3)? mem[132] :
(N0)? mem[268] : 1'b0;
assign r_data_o[131] = (N3)? mem[131] :
(N0)? mem[267] : 1'b0;
assign r_data_o[130] = (N3)? mem[130] :
(N0)? mem[266] : 1'b0;
assign r_data_o[129] = (N3)? mem[129] :
(N0)? mem[265] : 1'b0;
assign r_data_o[128] = (N3)? mem[128] :
(N0)? mem[264] : 1'b0;
assign r_data_o[127] = (N3)? mem[127] :
(N0)? mem[263] : 1'b0;
assign r_data_o[126] = (N3)? mem[126] :
(N0)? mem[262] : 1'b0;
assign r_data_o[125] = (N3)? mem[125] :
(N0)? mem[261] : 1'b0;
assign r_data_o[124] = (N3)? mem[124] :
(N0)? mem[260] : 1'b0;
assign r_data_o[123] = (N3)? mem[123] :
(N0)? mem[259] : 1'b0;
assign r_data_o[122] = (N3)? mem[122] :
(N0)? mem[258] : 1'b0;
assign r_data_o[121] = (N3)? mem[121] :
(N0)? mem[257] : 1'b0;
assign r_data_o[120] = (N3)? mem[120] :
(N0)? mem[256] : 1'b0;
assign r_data_o[119] = (N3)? mem[119] :
(N0)? mem[255] : 1'b0;
assign r_data_o[118] = (N3)? mem[118] :
(N0)? mem[254] : 1'b0;
assign r_data_o[117] = (N3)? mem[117] :
(N0)? mem[253] : 1'b0;
assign r_data_o[116] = (N3)? mem[116] :
(N0)? mem[252] : 1'b0;
assign r_data_o[115] = (N3)? mem[115] :
(N0)? mem[251] : 1'b0;
assign r_data_o[114] = (N3)? mem[114] :
(N0)? mem[250] : 1'b0;
assign r_data_o[113] = (N3)? mem[113] :
(N0)? mem[249] : 1'b0;
assign r_data_o[112] = (N3)? mem[112] :
(N0)? mem[248] : 1'b0;
assign r_data_o[111] = (N3)? mem[111] :
(N0)? mem[247] : 1'b0;
assign r_data_o[110] = (N3)? mem[110] :
(N0)? mem[246] : 1'b0;
assign r_data_o[109] = (N3)? mem[109] :
(N0)? mem[245] : 1'b0;
assign r_data_o[108] = (N3)? mem[108] :
(N0)? mem[244] : 1'b0;
assign r_data_o[107] = (N3)? mem[107] :
(N0)? mem[243] : 1'b0;
assign r_data_o[106] = (N3)? mem[106] :
(N0)? mem[242] : 1'b0;
assign r_data_o[105] = (N3)? mem[105] :
(N0)? mem[241] : 1'b0;
assign r_data_o[104] = (N3)? mem[104] :
(N0)? mem[240] : 1'b0;
assign r_data_o[103] = (N3)? mem[103] :
(N0)? mem[239] : 1'b0;
assign r_data_o[102] = (N3)? mem[102] :
(N0)? mem[238] : 1'b0;
assign r_data_o[101] = (N3)? mem[101] :
(N0)? mem[237] : 1'b0;
assign r_data_o[100] = (N3)? mem[100] :
(N0)? mem[236] : 1'b0;
assign r_data_o[99] = (N3)? mem[99] :
(N0)? mem[235] : 1'b0;
assign r_data_o[98] = (N3)? mem[98] :
(N0)? mem[234] : 1'b0;
assign r_data_o[97] = (N3)? mem[97] :
(N0)? mem[233] : 1'b0;
assign r_data_o[96] = (N3)? mem[96] :
(N0)? mem[232] : 1'b0;
assign r_data_o[95] = (N3)? mem[95] :
(N0)? mem[231] : 1'b0;
assign r_data_o[94] = (N3)? mem[94] :
(N0)? mem[230] : 1'b0;
assign r_data_o[93] = (N3)? mem[93] :
(N0)? mem[229] : 1'b0;
assign r_data_o[92] = (N3)? mem[92] :
(N0)? mem[228] : 1'b0;
assign r_data_o[91] = (N3)? mem[91] :
(N0)? mem[227] : 1'b0;
assign r_data_o[90] = (N3)? mem[90] :
(N0)? mem[226] : 1'b0;
assign r_data_o[89] = (N3)? mem[89] :
(N0)? mem[225] : 1'b0;
assign r_data_o[88] = (N3)? mem[88] :
(N0)? mem[224] : 1'b0;
assign r_data_o[87] = (N3)? mem[87] :
(N0)? mem[223] : 1'b0;
assign r_data_o[86] = (N3)? mem[86] :
(N0)? mem[222] : 1'b0;
assign r_data_o[85] = (N3)? mem[85] :
(N0)? mem[221] : 1'b0;
assign r_data_o[84] = (N3)? mem[84] :
(N0)? mem[220] : 1'b0;
assign r_data_o[83] = (N3)? mem[83] :
(N0)? mem[219] : 1'b0;
assign r_data_o[82] = (N3)? mem[82] :
(N0)? mem[218] : 1'b0;
assign r_data_o[81] = (N3)? mem[81] :
(N0)? mem[217] : 1'b0;
assign r_data_o[80] = (N3)? mem[80] :
(N0)? mem[216] : 1'b0;
assign r_data_o[79] = (N3)? mem[79] :
(N0)? mem[215] : 1'b0;
assign r_data_o[78] = (N3)? mem[78] :
(N0)? mem[214] : 1'b0;
assign r_data_o[77] = (N3)? mem[77] :
(N0)? mem[213] : 1'b0;
assign r_data_o[76] = (N3)? mem[76] :
(N0)? mem[212] : 1'b0;
assign r_data_o[75] = (N3)? mem[75] :
(N0)? mem[211] : 1'b0;
assign r_data_o[74] = (N3)? mem[74] :
(N0)? mem[210] : 1'b0;
assign r_data_o[73] = (N3)? mem[73] :
(N0)? mem[209] : 1'b0;
assign r_data_o[72] = (N3)? mem[72] :
(N0)? mem[208] : 1'b0;
assign r_data_o[71] = (N3)? mem[71] :
(N0)? mem[207] : 1'b0;
assign r_data_o[70] = (N3)? mem[70] :
(N0)? mem[206] : 1'b0;
assign r_data_o[69] = (N3)? mem[69] :
(N0)? mem[205] : 1'b0;
assign r_data_o[68] = (N3)? mem[68] :
(N0)? mem[204] : 1'b0;
assign r_data_o[67] = (N3)? mem[67] :
(N0)? mem[203] : 1'b0;
assign r_data_o[66] = (N3)? mem[66] :
(N0)? mem[202] : 1'b0;
assign r_data_o[65] = (N3)? mem[65] :
(N0)? mem[201] : 1'b0;
assign r_data_o[64] = (N3)? mem[64] :
(N0)? mem[200] : 1'b0;
assign r_data_o[63] = (N3)? mem[63] :
(N0)? mem[199] : 1'b0;
assign r_data_o[62] = (N3)? mem[62] :
(N0)? mem[198] : 1'b0;
assign r_data_o[61] = (N3)? mem[61] :
(N0)? mem[197] : 1'b0;
assign r_data_o[60] = (N3)? mem[60] :
(N0)? mem[196] : 1'b0;
assign r_data_o[59] = (N3)? mem[59] :
(N0)? mem[195] : 1'b0;
assign r_data_o[58] = (N3)? mem[58] :
(N0)? mem[194] : 1'b0;
assign r_data_o[57] = (N3)? mem[57] :
(N0)? mem[193] : 1'b0;
assign r_data_o[56] = (N3)? mem[56] :
(N0)? mem[192] : 1'b0;
assign r_data_o[55] = (N3)? mem[55] :
(N0)? mem[191] : 1'b0;
assign r_data_o[54] = (N3)? mem[54] :
(N0)? mem[190] : 1'b0;
assign r_data_o[53] = (N3)? mem[53] :
(N0)? mem[189] : 1'b0;
assign r_data_o[52] = (N3)? mem[52] :
(N0)? mem[188] : 1'b0;
assign r_data_o[51] = (N3)? mem[51] :
(N0)? mem[187] : 1'b0;
assign r_data_o[50] = (N3)? mem[50] :
(N0)? mem[186] : 1'b0;
assign r_data_o[49] = (N3)? mem[49] :
(N0)? mem[185] : 1'b0;
assign r_data_o[48] = (N3)? mem[48] :
(N0)? mem[184] : 1'b0;
assign r_data_o[47] = (N3)? mem[47] :
(N0)? mem[183] : 1'b0;
assign r_data_o[46] = (N3)? mem[46] :
(N0)? mem[182] : 1'b0;
assign r_data_o[45] = (N3)? mem[45] :
(N0)? mem[181] : 1'b0;
assign r_data_o[44] = (N3)? mem[44] :
(N0)? mem[180] : 1'b0;
assign r_data_o[43] = (N3)? mem[43] :
(N0)? mem[179] : 1'b0;
assign r_data_o[42] = (N3)? mem[42] :
(N0)? mem[178] : 1'b0;
assign r_data_o[41] = (N3)? mem[41] :
(N0)? mem[177] : 1'b0;
assign r_data_o[40] = (N3)? mem[40] :
(N0)? mem[176] : 1'b0;
assign r_data_o[39] = (N3)? mem[39] :
(N0)? mem[175] : 1'b0;
assign r_data_o[38] = (N3)? mem[38] :
(N0)? mem[174] : 1'b0;
assign r_data_o[37] = (N3)? mem[37] :
(N0)? mem[173] : 1'b0;
assign r_data_o[36] = (N3)? mem[36] :
(N0)? mem[172] : 1'b0;
assign r_data_o[35] = (N3)? mem[35] :
(N0)? mem[171] : 1'b0;
assign r_data_o[34] = (N3)? mem[34] :
(N0)? mem[170] : 1'b0;
assign r_data_o[33] = (N3)? mem[33] :
(N0)? mem[169] : 1'b0;
assign r_data_o[32] = (N3)? mem[32] :
(N0)? mem[168] : 1'b0;
assign r_data_o[31] = (N3)? mem[31] :
(N0)? mem[167] : 1'b0;
assign r_data_o[30] = (N3)? mem[30] :
(N0)? mem[166] : 1'b0;
assign r_data_o[29] = (N3)? mem[29] :
(N0)? mem[165] : 1'b0;
assign r_data_o[28] = (N3)? mem[28] :
(N0)? mem[164] : 1'b0;
assign r_data_o[27] = (N3)? mem[27] :
(N0)? mem[163] : 1'b0;
assign r_data_o[26] = (N3)? mem[26] :
(N0)? mem[162] : 1'b0;
assign r_data_o[25] = (N3)? mem[25] :
(N0)? mem[161] : 1'b0;
assign r_data_o[24] = (N3)? mem[24] :
(N0)? mem[160] : 1'b0;
assign r_data_o[23] = (N3)? mem[23] :
(N0)? mem[159] : 1'b0;
assign r_data_o[22] = (N3)? mem[22] :
(N0)? mem[158] : 1'b0;
assign r_data_o[21] = (N3)? mem[21] :
(N0)? mem[157] : 1'b0;
assign r_data_o[20] = (N3)? mem[20] :
(N0)? mem[156] : 1'b0;
assign r_data_o[19] = (N3)? mem[19] :
(N0)? mem[155] : 1'b0;
assign r_data_o[18] = (N3)? mem[18] :
(N0)? mem[154] : 1'b0;
assign r_data_o[17] = (N3)? mem[17] :
(N0)? mem[153] : 1'b0;
assign r_data_o[16] = (N3)? mem[16] :
(N0)? mem[152] : 1'b0;
assign r_data_o[15] = (N3)? mem[15] :
(N0)? mem[151] : 1'b0;
assign r_data_o[14] = (N3)? mem[14] :
(N0)? mem[150] : 1'b0;
assign r_data_o[13] = (N3)? mem[13] :
(N0)? mem[149] : 1'b0;
assign r_data_o[12] = (N3)? mem[12] :
(N0)? mem[148] : 1'b0;
assign r_data_o[11] = (N3)? mem[11] :
(N0)? mem[147] : 1'b0;
assign r_data_o[10] = (N3)? mem[10] :
(N0)? mem[146] : 1'b0;
assign r_data_o[9] = (N3)? mem[9] :
(N0)? mem[145] : 1'b0;
assign r_data_o[8] = (N3)? mem[8] :
(N0)? mem[144] : 1'b0;
assign r_data_o[7] = (N3)? mem[7] :
(N0)? mem[143] : 1'b0;
assign r_data_o[6] = (N3)? mem[6] :
(N0)? mem[142] : 1'b0;
assign r_data_o[5] = (N3)? mem[5] :
(N0)? mem[141] : 1'b0;
assign r_data_o[4] = (N3)? mem[4] :
(N0)? mem[140] : 1'b0;
assign r_data_o[3] = (N3)? mem[3] :
(N0)? mem[139] : 1'b0;
assign r_data_o[2] = (N3)? mem[2] :
(N0)? mem[138] : 1'b0;
assign r_data_o[1] = (N3)? mem[1] :
(N0)? mem[137] : 1'b0;
assign r_data_o[0] = (N3)? mem[0] :
(N0)? mem[136] : 1'b0;
assign N5 = ~w_addr_i[0];
assign { N10, N9, N8, N7 } = (N1)? { w_addr_i[0:0], w_addr_i[0:0], N5, N5 } :
(N2)? { 1'b0, 1'b0, 1'b0, 1'b0 } : 1'b0;
assign N1 = w_v_i;
assign N2 = N4;
assign N3 = ~r_addr_i[0];
assign N4 = ~w_v_i;
always @(posedge w_clk_i) begin
if(N9) begin
{ mem[271:173], mem[136:136] } <= { w_data_i[135:37], w_data_i[0:0] };
end
if(N10) begin
{ mem[172:137] } <= { w_data_i[36:1] };
end
if(N7) begin
{ mem[135:37], mem[0:0] } <= { w_data_i[135:37], w_data_i[0:0] };
end
if(N8) begin
{ mem[36:1] } <= { w_data_i[36:1] };
end
end
endmodule
|
module bp_be_instr_decoder
(
instr_i,
decode_o,
illegal_instr_o,
ret_instr_o,
csr_instr_o
);
input [31:0] instr_i;
output [50:0] decode_o;
output illegal_instr_o;
output ret_instr_o;
output csr_instr_o;
wire [50:0] decode_o;
wire illegal_instr_o,ret_instr_o,csr_instr_o,N0,N1,N2,N3,N4,N5,N6,N7,N8,N9,N10,N11,
N12,N13,N14,N15,N16,N17,N18,N19,N20,N21,N22,N23,N24,N25,N26,N27,N28,N29,N30,N31,
N32,N33,N34,N35,N36,N37,N38,N39,N40,N41,N42,N43,N44,N45,N46,N47,N48,N49,N50,N51,
N52,N53,N54,N55,N56,N57,N58,N59,N60,N61,N62,N63,N64,N65,N66,N67,N68,N69,N70,N71,
N72,N73,N74,N75,N76,N77,N78,N79,N80,N81,N82,N83,N84,N85,N86,N87,N88,N89,N90,N91,
N92,N93,N94,N95,N96,N97,N98,N99,N100,N101,N102,N103,N104,N105,N106,N107,N108,N109,
N110,N111,N112,N113,N114,N115,N116,N117,N118,N119,N120,N121,N122,N123,N124,N125,
N126,N127,N128,N129,N130,N131,N132,N133,N134,N135,N136,N137,N138,N139,N140,N141,
N142,N143,N144,N145,N146,N147,N148,N149,N150,N151,N152,N153,N154,N155,N156,N157,
N158,N159,N160,N161,N162,N163,N164,N165,N166,N167,N168,N169,N170,N171,N172,N173,
N174,N175,N176,N177,N178,N179,N180,N181,N182,N183,N184,N185,N186,N187,N188,N189,
N190,N191,N192,N193,N194,N195,N196,N197,N198,N199,N200,N201,N202,N203,N204,N205,
N206,N207,N208,N209,N210,N211,N212,N213,N214,N215,N216,N217,N218,N219,N220,N221,
N222,N223,N224,N225,N226,N227,N228,N229,N230,N231,N232,N233,N234,N235,N236,N237,
N238,N239,N240,N241,N242,N243,N244,N245,N246,N247,N248,N249,N250,N251,N252,N253,
N254,N255,N256,N257,N258,N259,N260,N261,N262,N263,N264,N265,N266,N267,N268,N269,
N270,N271,N272,N273,N274,N275,N276,N277,N278,N279,N280,N281,N282,N283,N284,N285,
N286,N287,N288,N289,N290,N291,N292,N293,N294,N295,N296,N297,N298,N299,N300,N301,
N302,N303,N304,N305,N306,N307,N308,N309,N310,N311,N312,N313,N314,N315,N316,N317,
N318,N319,N320,N321,N322,N323,N324,N325,N326,N327,N328,N329,N330,N331,N332,N333,
N334,N335,N336,N337,N338,N339,N340,N341,N342,N343,N344,N345,N346,N347,N348,N349,
N350,N351,N352,N353,N354,N355,N356,N357,N358,N359,N360,N361,N362,N363,N364,N365,
N366,N367,N368,N369,N370,N371,N372,N373,N374,N375,N376,N377,N378,N379,N380,N381,
N382,N383,N384,N385,N386,N387,N388,N389,N390,N391,N392,N393,N394,N395,N396,N397,
N398,N399,N400,N401,N402,N403,N404,N405,N406,N407,N408,N409,N410,N411,N412,N413,
N414,N415,N416,N417,N418,N419,N420,N421,N422,N423,N424,N425,N426,N427,N428,N429,
N430,N431,N432,N433,N434,N435,N436,N437,N438,N439,N440,N441,N442,N443,N444,N445,
N446,N447,N448,N449,N450,N451,N452,N453,N454,N455,N456,N457,N458;
assign decode_o[50] = 1'b1;
assign decode_o[26] = 1'b0;
assign decode_o[28] = 1'b0;
assign decode_o[40] = 1'b0;
assign decode_o[42] = 1'b0;
assign decode_o[44] = 1'b0;
assign decode_o[47] = 1'b0;
assign decode_o[48] = 1'b0;
assign decode_o[49] = 1'b0;
assign csr_instr_o = decode_o[39];
assign ret_instr_o = decode_o[27];
assign N65 = instr_i[1] & instr_i[0];
assign N67 = instr_i[6] | N427;
assign N68 = N428 | instr_i[3];
assign N69 = N67 | N68;
assign N70 = N69 | instr_i[2];
assign N71 = N428 | N429;
assign N72 = N67 | N71;
assign N73 = N72 | instr_i[2];
assign N75 = instr_i[6] | instr_i[5];
assign N76 = N75 | N68;
assign N77 = N76 | instr_i[2];
assign N78 = N75 | N71;
assign N79 = N78 | instr_i[2];
assign N81 = N69 | N97;
assign N83 = N76 | N97;
assign N85 = N96 | N427;
assign N86 = instr_i[4] | N429;
assign N87 = N85 | N86;
assign N88 = N87 | N97;
assign N90 = instr_i[4] | instr_i[3];
assign N91 = N85 | N90;
assign N92 = N91 | N97;
assign N94 = N91 | instr_i[2];
assign N98 = N96 & N427;
assign N99 = N428 & N429;
assign N100 = N98 & N99;
assign N101 = N100 & N97;
assign N102 = N67 | N90;
assign N103 = N102 | instr_i[2];
assign N105 = N75 | N86;
assign N106 = N105 | N97;
assign N108 = N85 | N68;
assign N109 = N108 | instr_i[2];
assign N111 = instr_i[6] & instr_i[4];
assign N112 = N111 & instr_i[2];
assign N113 = N111 & instr_i[3];
assign N114 = instr_i[4] & instr_i[3];
assign N115 = N114 & instr_i[2];
assign N116 = N96 & instr_i[5];
assign N117 = N428 & instr_i[2];
assign N118 = N116 & N117;
assign N119 = N96 & N428;
assign N120 = N429 & instr_i[2];
assign N121 = N119 & N120;
assign N122 = N427 & N428;
assign N123 = N122 & N120;
assign N124 = N428 & instr_i[3];
assign N125 = N124 & N97;
assign N126 = instr_i[6] & N427;
assign N132 = N128 & N129;
assign N133 = N130 & N303;
assign N134 = N131 & N304;
assign N135 = instr_i[4] & N97;
assign N136 = N132 & N133;
assign N137 = N134 & N116;
assign N138 = N135 & N65;
assign N139 = N136 & N137;
assign N140 = N139 & N138;
assign N142 = N163 & N294;
assign N143 = N142 & N429;
assign N144 = N142 & instr_i[3];
assign N146 = N175 & N294;
assign N147 = N146 & N429;
assign N148 = N146 & instr_i[3];
assign N150 = N163 & N295;
assign N151 = N150 & N429;
assign N152 = N150 & instr_i[3];
assign N154 = N168 & N295;
assign N155 = N154 & N429;
assign N156 = N154 & instr_i[3];
assign N158 = N181 & N295;
assign N159 = N158 & N429;
assign N160 = N158 & instr_i[3];
assign N163 = N162 & N260;
assign N164 = N163 & N296;
assign N165 = N164 & N429;
assign N166 = N163 & N297;
assign N167 = N166 & N429;
assign N168 = N162 & instr_i[14];
assign N169 = N168 & N294;
assign N170 = N169 & N429;
assign N171 = N168 & N296;
assign N172 = N171 & N429;
assign N173 = N168 & N297;
assign N174 = N173 & N429;
assign N175 = instr_i[30] & N260;
assign N176 = N175 & instr_i[12];
assign N177 = instr_i[14] & N293;
assign N178 = N177 & instr_i[3];
assign N179 = instr_i[13] & instr_i[3];
assign N180 = instr_i[30] & instr_i[13];
assign N181 = instr_i[30] & instr_i[14];
assign N182 = N181 & N293;
assign N194 = N98 & N135;
assign N195 = N194 & N65;
assign N197 = N251 & N225;
assign N198 = N293 & instr_i[3];
assign N199 = N251 & N198;
assign N201 = N214 & N251;
assign N202 = N207 & N201;
assign N203 = N202 & N227;
assign N204 = N202 & N219;
assign N206 = N128 & N162;
assign N207 = N206 & N213;
assign N208 = N207 & N216;
assign N209 = N208 & N227;
assign N210 = N208 & N219;
assign N212 = N128 & instr_i[30];
assign N213 = N129 & N130;
assign N214 = N303 & N131;
assign N215 = N212 & N213;
assign N216 = N214 & N254;
assign N217 = N215 & N216;
assign N218 = N217 & N227;
assign N219 = instr_i[12] & instr_i[3];
assign N220 = N217 & N219;
assign N222 = N261 & N225;
assign N223 = N261 & N227;
assign N224 = N254 & N225;
assign N225 = N293 & N429;
assign N226 = N257 & N225;
assign N227 = instr_i[12] & N429;
assign N228 = N257 & N227;
assign N247 = instr_i[2] | N430;
assign N248 = N247 | N431;
assign N249 = N91 | N248;
assign N251 = N260 & N292;
assign N252 = N251 & N293;
assign N253 = N251 & instr_i[12];
assign N254 = instr_i[14] & N292;
assign N255 = N254 & N293;
assign N256 = N254 & instr_i[12];
assign N257 = instr_i[14] & instr_i[13];
assign N258 = N257 & N293;
assign N259 = N257 & instr_i[12];
assign N261 = N260 & instr_i[13];
assign N272 = N75 | N90;
assign N273 = N272 | N248;
assign N275 = N261 & N293;
assign N276 = N261 & instr_i[12];
assign N285 = N260 & N96;
assign N286 = instr_i[5] & N428;
assign N287 = N429 & N97;
assign N288 = N285 & N286;
assign N289 = N287 & N65;
assign N290 = N288 & N289;
assign N294 = N292 & N293;
assign N295 = N292 & instr_i[12];
assign N296 = instr_i[13] & N293;
assign N297 = instr_i[13] & instr_i[12];
assign N306 = N303 & N304;
assign N307 = N306 & N305;
assign N310 = instr_i[26] | N309;
assign N311 = N322 | N349;
assign N312 = N310 | N329;
assign N313 = N311 | N312;
assign N314 = N313 | instr_i[20];
assign N316 = N319 | instr_i[20];
assign N318 = N350 | N342;
assign N319 = N324 | N318;
assign N320 = N319 | N338;
assign N322 = N128 | N162;
assign N323 = instr_i[29] | instr_i[28];
assign N324 = N322 | N323;
assign N325 = N324 | N353;
assign N326 = N325 | instr_i[20];
assign N329 = N328 | instr_i[21];
assign N330 = N350 | N329;
assign N331 = N352 | N330;
assign N332 = N331 | N338;
assign N334 = N341 | N351;
assign N335 = N352 | N334;
assign N336 = N335 | N338;
assign N339 = N344 | N338;
assign N341 = N131 | instr_i[24];
assign N342 = instr_i[22] | instr_i[21];
assign N343 = N341 | N342;
assign N344 = N352 | N343;
assign N345 = N344 | instr_i[20];
assign N348 = instr_i[31] | instr_i[30];
assign N349 = N129 | N130;
assign N350 = instr_i[26] | instr_i[24];
assign N351 = instr_i[22] | N347;
assign N352 = N348 | N349;
assign N353 = N350 | N351;
assign N354 = N352 | N353;
assign N355 = N354 | instr_i[20];
assign N427 = ~instr_i[5];
assign N428 = ~instr_i[4];
assign N429 = ~instr_i[3];
assign N430 = ~instr_i[1];
assign N431 = ~instr_i[0];
assign N432 = N427 | instr_i[6];
assign N433 = N428 | N432;
assign N434 = N429 | N433;
assign N435 = instr_i[2] | N434;
assign N436 = N430 | N435;
assign N437 = N431 | N436;
assign N438 = ~N437;
assign N439 = instr_i[5] | instr_i[6];
assign N440 = N428 | N439;
assign N441 = N429 | N440;
assign N442 = instr_i[2] | N441;
assign N443 = N430 | N442;
assign N444 = N431 | N443;
assign N445 = ~N444;
assign { N187, N186, N185, N184 } = (N0)? { 1'b0, 1'b0, 1'b0, 1'b0 } :
(N1)? { 1'b1, 1'b0, 1'b0, 1'b0 } :
(N2)? { 1'b0, 1'b0, 1'b0, 1'b1 } :
(N3)? { 1'b0, 1'b1, 1'b0, 1'b1 } :
(N4)? { 1'b1, 1'b1, 1'b0, 1'b1 } :
(N5)? { 1'b0, 1'b0, 1'b1, 1'b0 } :
(N6)? { 1'b0, 1'b0, 1'b1, 1'b1 } :
(N7)? { 1'b0, 1'b1, 1'b0, 1'b0 } :
(N8)? { 1'b0, 1'b1, 1'b1, 1'b0 } :
(N9)? { 1'b0, 1'b1, 1'b1, 1'b1 } :
(N10)? { 1'b0, 1'b0, 1'b0, 1'b0 } : 1'b0;
assign N0 = N145;
assign N1 = N149;
assign N2 = N153;
assign N3 = N157;
assign N4 = N161;
assign N5 = N165;
assign N6 = N167;
assign N7 = N170;
assign N8 = N172;
assign N9 = N174;
assign N10 = N183;
assign N188 = (N0)? 1'b0 :
(N1)? 1'b0 :
(N2)? 1'b0 :
(N3)? 1'b0 :
(N4)? 1'b0 :
(N5)? 1'b0 :
(N6)? 1'b0 :
(N7)? 1'b0 :
(N8)? 1'b0 :
(N9)? 1'b0 :
(N10)? 1'b1 : 1'b0;
assign { N192, N191, N190, N189 } = (N11)? { N187, N186, N185, N184 } :
(N141)? { 1'b0, 1'b0, 1'b0, 1'b0 } : 1'b0;
assign N11 = N140;
assign N193 = (N11)? N188 :
(N141)? 1'b1 : 1'b0;
assign { N240, N239, N238 } = (N12)? { 1'b0, 1'b0, 1'b0 } :
(N13)? { 1'b0, 1'b0, 1'b1 } :
(N14)? { 1'b1, 1'b0, 1'b1 } :
(N15)? { 1'b1, 1'b0, 1'b1 } :
(N16)? { 1'b0, 1'b1, 1'b0 } :
(N17)? { 1'b0, 1'b1, 1'b1 } :
(N18)? { 1'b1, 1'b0, 1'b0 } :
(N19)? { 1'b1, 1'b1, 1'b0 } :
(N20)? { 1'b1, 1'b1, 1'b1 } :
(N237)? { 1'b0, 1'b0, 1'b0 } : 1'b0;
assign N12 = N200;
assign N13 = N205;
assign N14 = N211;
assign N15 = N221;
assign N16 = N222;
assign N17 = N223;
assign N18 = N224;
assign N19 = N226;
assign N20 = N228;
assign N241 = (N12)? 1'b0 :
(N13)? 1'b0 :
(N14)? 1'b0 :
(N15)? 1'b0 :
(N16)? 1'b0 :
(N17)? 1'b0 :
(N18)? 1'b0 :
(N19)? 1'b0 :
(N20)? 1'b0 :
(N237)? 1'b1 : 1'b0;
assign { N245, N244, N243, N242 } = (N21)? { N221, N240, N239, N238 } :
(N196)? { 1'b0, 1'b0, 1'b0, 1'b0 } : 1'b0;
assign N21 = N195;
assign N246 = (N21)? N241 :
(N196)? 1'b1 : 1'b0;
assign { N265, N264, N263, N262 } = (N22)? { 1'b1, 1'b1, 1'b0, 1'b0 } :
(N23)? { 1'b1, 1'b1, 1'b1, 1'b0 } :
(N24)? { 1'b0, 1'b0, 1'b1, 1'b0 } :
(N25)? { 1'b1, 1'b0, 1'b1, 1'b0 } :
(N26)? { 1'b0, 1'b0, 1'b1, 1'b1 } :
(N27)? { 1'b1, 1'b0, 1'b1, 1'b1 } :
(N28)? { 1'b0, 1'b0, 1'b0, 1'b0 } : 1'b0;
assign N22 = N252;
assign N23 = N253;
assign N24 = N255;
assign N25 = N256;
assign N26 = N258;
assign N27 = N259;
assign N28 = N261;
assign N266 = (N22)? 1'b0 :
(N23)? 1'b0 :
(N24)? 1'b0 :
(N25)? 1'b0 :
(N26)? 1'b0 :
(N27)? 1'b0 :
(N28)? 1'b1 : 1'b0;
assign { N270, N269, N268, N267 } = (N29)? { N265, N264, N263, N262 } :
(N30)? { 1'b0, 1'b0, 1'b0, 1'b0 } : 1'b0;
assign N29 = N250;
assign N30 = N249;
assign N271 = (N29)? N266 :
(N30)? 1'b1 : 1'b0;
assign { N279, N278, N277 } = (N22)? { 1'b0, 1'b0, 1'b0 } :
(N23)? { 1'b0, 1'b0, 1'b1 } :
(N31)? { 1'b0, 1'b1, 1'b0 } :
(N24)? { 1'b1, 1'b0, 1'b0 } :
(N25)? { 1'b1, 1'b0, 1'b1 } :
(N26)? { 1'b1, 1'b1, 1'b0 } :
(N32)? { 1'b0, 1'b1, 1'b1 } :
(N27)? { 1'b0, 1'b0, 1'b0 } : 1'b0;
assign N31 = N275;
assign N32 = N276;
assign N280 = (N22)? 1'b0 :
(N23)? 1'b0 :
(N31)? 1'b0 :
(N24)? 1'b0 :
(N25)? 1'b0 :
(N26)? 1'b0 :
(N32)? 1'b0 :
(N27)? 1'b1 : 1'b0;
assign { N283, N282, N281 } = (N33)? { N279, N278, N277 } :
(N34)? { 1'b0, 1'b0, 1'b0 } : 1'b0;
assign N33 = N274;
assign N34 = N273;
assign N284 = (N33)? N280 :
(N34)? 1'b1 : 1'b0;
assign { N299, N298 } = (N35)? { 1'b0, 1'b0 } :
(N36)? { 1'b0, 1'b1 } :
(N37)? { 1'b1, 1'b0 } :
(N38)? { 1'b1, 1'b1 } : 1'b0;
assign N35 = N294;
assign N36 = N295;
assign N37 = N296;
assign N38 = N297;
assign { N301, N300 } = (N39)? { N299, N298 } :
(N291)? { 1'b0, 1'b0 } : 1'b0;
assign N39 = N290;
assign N302 = ~N290;
assign N366 = (N40)? 1'b1 :
(N41)? 1'b1 :
(N42)? 1'b1 :
(N43)? 1'b1 :
(N44)? 1'b1 :
(N45)? 1'b1 :
(N46)? 1'b1 :
(N47)? 1'b1 :
(N48)? 1'b0 :
(N365)? 1'b0 : 1'b0;
assign N40 = N315;
assign N41 = N317;
assign N42 = N321;
assign N43 = N327;
assign N44 = N333;
assign N45 = N337;
assign N46 = N340;
assign N47 = N346;
assign N48 = N356;
assign N367 = (N40)? 1'b0 :
(N41)? 1'b0 :
(N42)? 1'b0 :
(N43)? 1'b0 :
(N44)? 1'b0 :
(N45)? 1'b0 :
(N46)? 1'b0 :
(N47)? 1'b0 :
(N48)? 1'b0 :
(N365)? 1'b1 : 1'b0;
assign { N377, N376, N375, N374, N373, N372, N371, N370, N369, N368 } = (N49)? { N366, N315, N317, N321, N327, N333, N337, N340, N346, N356 } :
(N308)? { 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0 } : 1'b0;
assign N49 = N307;
assign N378 = (N49)? N367 :
(N308)? 1'b1 : 1'b0;
assign { N399, N398, N397, N385, N384, N383, N382, N381, N380, N379 } = (N50)? { 1'b1, 1'b0, 1'b1, N438, N192, N191, N190, N189, 1'b0, 1'b0 } :
(N51)? { 1'b1, 1'b0, 1'b1, N445, N245, N244, N243, N242, 1'b1, 1'b0 } :
(N52)? { 1'b1, 1'b0, 1'b1, 1'b0, 1'b1, 1'b1, 1'b1, 1'b1, 1'b1, 1'b0 } :
(N53)? { 1'b1, 1'b0, 1'b1, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b1, 1'b0 } :
(N54)? { 1'b1, 1'b0, 1'b1, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b1 } :
(N55)? { 1'b1, 1'b0, 1'b1, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b1 } :
(N56)? { 1'b1, 1'b0, 1'b0, 1'b0, N270, N269, N268, N267, 1'b0, 1'b0 } :
(N57)? { 1'b0, 1'b1, 1'b1, 1'b0, 1'b0, N283, N282, N281, 1'b0, 1'b0 } :
(N58)? { 1'b0, 1'b1, 1'b0, 1'b0, N290, 1'b0, N301, N300, 1'b0, 1'b0 } :
(N59)? { 1'b1, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0 } :
(N60)? { 1'b0, 1'b1, N377, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0 } :
(N61)? { 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0 } : 1'b0;
assign N50 = N74;
assign N51 = N80;
assign N52 = N82;
assign N53 = N84;
assign N54 = N89;
assign N55 = N93;
assign N56 = N95;
assign N57 = N101;
assign N58 = N104;
assign N59 = N107;
assign N60 = N110;
assign N61 = N127;
assign { N396, N395, N394, N393, N392, N391, N390, N389, N388, N387 } = (N60)? { N377, N376, N375, N374, N373, N372, N371, N370, N369, N368 } :
(N386)? { 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0 } : 1'b0;
assign N400 = (N50)? N193 :
(N51)? N246 :
(N52)? 1'b0 :
(N53)? 1'b0 :
(N54)? 1'b0 :
(N55)? 1'b0 :
(N56)? N271 :
(N57)? N284 :
(N58)? N302 :
(N59)? 1'b0 :
(N60)? N378 :
(N61)? 1'b1 : 1'b0;
assign { N425, N424, N423, N422, N421, N420, N419, N418, N417, N416, N415, N414, N413, N412, N411, N410, N409, N408, N407, N406, N405, N404, N403, N402, N401 } = (N62)? { N399, N398, N397, N396, N395, N394, N393, N392, N391, N390, N389, N388, N104, N101, N387, N95, N385, N384, N383, N382, N381, N84, N380, N93, N379 } :
(N66)? { 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0 } : 1'b0;
assign N62 = N65;
assign illegal_instr_o = (N62)? N400 :
(N66)? 1'b1 : 1'b0;
assign { decode_o[45:45], decode_o[43:43], decode_o[41:41], decode_o[39:29], decode_o[27:27], decode_o[25:0] } = (N63)? { 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0 } :
(N64)? { N425, N424, N423, N422, N421, N420, N419, N418, N417, N416, N415, N414, N413, N412, N411, N401, N410, N409, N408, N407, N406, N405, instr_i[19:15], instr_i[24:20], instr_i[11:7], N404, N403, N402, N401 } : 1'b0;
assign N63 = decode_o[46];
assign N64 = N426;
assign N66 = ~N65;
assign N74 = N446 | N447;
assign N446 = ~N70;
assign N447 = ~N73;
assign N80 = N448 | N449;
assign N448 = ~N77;
assign N449 = ~N79;
assign N82 = ~N81;
assign N84 = ~N83;
assign N89 = ~N88;
assign N93 = ~N92;
assign N95 = ~N94;
assign N96 = ~instr_i[6];
assign N97 = ~instr_i[2];
assign N104 = ~N103;
assign N107 = ~N106;
assign N110 = ~N109;
assign N127 = N112 | N455;
assign N455 = N113 | N454;
assign N454 = N115 | N453;
assign N453 = N118 | N452;
assign N452 = N121 | N451;
assign N451 = N123 | N450;
assign N450 = N125 | N126;
assign N128 = ~instr_i[31];
assign N129 = ~instr_i[29];
assign N130 = ~instr_i[28];
assign N131 = ~instr_i[26];
assign N141 = ~N140;
assign N145 = N143 | N144;
assign N149 = N147 | N148;
assign N153 = N151 | N152;
assign N157 = N155 | N156;
assign N161 = N159 | N160;
assign N162 = ~instr_i[30];
assign N183 = N176 | N458;
assign N458 = N178 | N457;
assign N457 = N179 | N456;
assign N456 = N180 | N182;
assign N196 = ~N195;
assign N200 = N197 | N199;
assign N205 = N203 | N204;
assign N211 = N209 | N210;
assign N221 = N218 | N220;
assign N229 = N205 | N200;
assign N230 = N211 | N229;
assign N231 = N221 | N230;
assign N232 = N222 | N231;
assign N233 = N223 | N232;
assign N234 = N224 | N233;
assign N235 = N226 | N234;
assign N236 = N228 | N235;
assign N237 = ~N236;
assign N250 = ~N249;
assign N260 = ~instr_i[14];
assign N274 = ~N273;
assign N291 = ~N290;
assign N292 = ~instr_i[13];
assign N293 = ~instr_i[12];
assign N303 = ~instr_i[27];
assign N304 = ~instr_i[25];
assign N305 = ~instr_i[23];
assign N308 = ~N307;
assign N309 = ~instr_i[24];
assign N315 = ~N314;
assign N317 = ~N316;
assign N321 = ~N320;
assign N327 = ~N326;
assign N328 = ~instr_i[22];
assign N333 = ~N332;
assign N337 = ~N336;
assign N338 = ~instr_i[20];
assign N340 = ~N339;
assign N346 = ~N345;
assign N347 = ~instr_i[21];
assign N356 = ~N355;
assign N357 = N317 | N315;
assign N358 = N321 | N357;
assign N359 = N327 | N358;
assign N360 = N333 | N359;
assign N361 = N337 | N360;
assign N362 = N340 | N361;
assign N363 = N346 | N362;
assign N364 = N356 | N363;
assign N365 = ~N364;
assign N386 = N109;
assign N426 = ~illegal_instr_o;
assign decode_o[46] = illegal_instr_o;
endmodule
|
module bsg_dff_width_p320
(
clk_i,
data_i,
data_o
);
input [319:0] data_i;
output [319:0] data_o;
input clk_i;
reg [319:0] data_o;
always @(posedge clk_i) begin
if(1'b1) begin
{ data_o[319:0] } <= { data_i[319:0] };
end
end
endmodule
|
module bp_be_pipe_mul
(
clk_i,
reset_i,
kill_ex1_i,
kill_ex2_i,
decode_i,
rs1_i,
rs2_i,
data_o
);
input [50:0] decode_i;
input [63:0] rs1_i;
input [63:0] rs2_i;
output [63:0] data_o;
input clk_i;
input reset_i;
input kill_ex1_i;
input kill_ex2_i;
wire [63:0] data_o;
assign data_o[0] = 1'b0;
assign data_o[1] = 1'b0;
assign data_o[2] = 1'b0;
assign data_o[3] = 1'b0;
assign data_o[4] = 1'b0;
assign data_o[5] = 1'b0;
assign data_o[6] = 1'b0;
assign data_o[7] = 1'b0;
assign data_o[8] = 1'b0;
assign data_o[9] = 1'b0;
assign data_o[10] = 1'b0;
assign data_o[11] = 1'b0;
assign data_o[12] = 1'b0;
assign data_o[13] = 1'b0;
assign data_o[14] = 1'b0;
assign data_o[15] = 1'b0;
assign data_o[16] = 1'b0;
assign data_o[17] = 1'b0;
assign data_o[18] = 1'b0;
assign data_o[19] = 1'b0;
assign data_o[20] = 1'b0;
assign data_o[21] = 1'b0;
assign data_o[22] = 1'b0;
assign data_o[23] = 1'b0;
assign data_o[24] = 1'b0;
assign data_o[25] = 1'b0;
assign data_o[26] = 1'b0;
assign data_o[27] = 1'b0;
assign data_o[28] = 1'b0;
assign data_o[29] = 1'b0;
assign data_o[30] = 1'b0;
assign data_o[31] = 1'b0;
assign data_o[32] = 1'b0;
assign data_o[33] = 1'b0;
assign data_o[34] = 1'b0;
assign data_o[35] = 1'b0;
assign data_o[36] = 1'b0;
assign data_o[37] = 1'b0;
assign data_o[38] = 1'b0;
assign data_o[39] = 1'b0;
assign data_o[40] = 1'b0;
assign data_o[41] = 1'b0;
assign data_o[42] = 1'b0;
assign data_o[43] = 1'b0;
assign data_o[44] = 1'b0;
assign data_o[45] = 1'b0;
assign data_o[46] = 1'b0;
assign data_o[47] = 1'b0;
assign data_o[48] = 1'b0;
assign data_o[49] = 1'b0;
assign data_o[50] = 1'b0;
assign data_o[51] = 1'b0;
assign data_o[52] = 1'b0;
assign data_o[53] = 1'b0;
assign data_o[54] = 1'b0;
assign data_o[55] = 1'b0;
assign data_o[56] = 1'b0;
assign data_o[57] = 1'b0;
assign data_o[58] = 1'b0;
assign data_o[59] = 1'b0;
assign data_o[60] = 1'b0;
assign data_o[61] = 1'b0;
assign data_o[62] = 1'b0;
assign data_o[63] = 1'b0;
endmodule
|
module bsg_counter_clear_up_init_val_p0_ptr_width_lp64
(
clk_i,
reset_i,
clear_i,
up_i,
count_o
);
output [63:0] count_o;
input clk_i;
input reset_i;
input clear_i;
input up_i;
wire N0,N1,N2,N3,N4,N5,N6,N7,N8,N9,N10,N11,N12,N13,N14,N15,N16,N17,N18,N19,N20,N21,
N22,N23,N24,N25,N26,N27,N28,N29,N30,N31,N32,N33,N34,N35,N36,N37,N38,N39,N40,N41,
N42,N43,N44,N45,N46,N47,N48,N49,N50,N51,N52,N53,N54,N55,N56,N57,N58,N59,N60,N61,
N62,N63,N64,N65,N66,N67,N68,N69,N70,N71,N72,N73,N74,N75,N76,N77,N78,N79,N80,N81,
N82,N83,N84,N85,N86,N87,N88,N89,N90,N91,N92,N93,N94,N95,N96,N97,N98,N99,N100,N101,
N102,N103,N104,N105,N106,N107,N108,N109,N110,N111,N112,N113,N114,N115,N116,N117,
N118,N119,N120,N121,N122,N123,N124,N125,N126,N127,N128,N129,N130,N131,N132,N133,
N134,N135,N136,N137,N138,N139,N140,N141,N142,N143,N144,N145,N146,N147,N148,N149,
N150,N151,N152,N153,N154,N155,N156,N157,N158,N159,N160,N161,N162,N163,N164,N165,
N166,N167,N168,N169,N170,N171,N172,N173,N174,N175,N176,N177,N178,N179,N180,N181,
N182,N183,N184,N185,N186,N187,N188,N189,N190,N191,N192,N193,N194,N195,N196,N197;
reg [63:0] count_o;
assign { N69, N68, N67, N66, N65, N64, N63, N62, N61, N60, N59, N58, N57, N56, N55, N54, N53, N52, N51, N50, N49, N48, N47, N46, N45, N44, N43, N42, N41, N40, N39, N38, N37, N36, N35, N34, N33, N32, N31, N30, N29, N28, N27, N26, N25, N24, N23, N22, N21, N20, N19, N18, N17, N16, N15, N14, N13, N12, N11, N10, N9, N8, N7, N6 } = { N197, N196, N195, N194, N193, N192, N191, N190, N189, N188, N187, N186, N185, N184, N183, N182, N181, N180, N179, N178, N177, N176, N175, N174, N173, N172, N171, N170, N169, N168, N167, N166, N165, N164, N163, N162, N161, N160, N159, N158, N157, N156, N155, N154, N153, N152, N151, N150, N149, N148, N147, N146, N145, N144, N143, N142, N141, N140, N139, N138, N137, N136, N135, N134 } + up_i;
assign { N133, N132, N131, N130, N129, N128, N127, N126, N125, N124, N123, N122, N121, N120, N119, N118, N117, N116, N115, N114, N113, N112, N111, N110, N109, N108, N107, N106, N105, N104, N103, N102, N101, N100, N99, N98, N97, N96, N95, N94, N93, N92, N91, N90, N89, N88, N87, N86, N85, N84, N83, N82, N81, N80, N79, N78, N77, N76, N75, N74, N73, N72, N71, N70 } = (N0)? { 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0 } :
(N1)? { N69, N68, N67, N66, N65, N64, N63, N62, N61, N60, N59, N58, N57, N56, N55, N54, N53, N52, N51, N50, N49, N48, N47, N46, N45, N44, N43, N42, N41, N40, N39, N38, N37, N36, N35, N34, N33, N32, N31, N30, N29, N28, N27, N26, N25, N24, N23, N22, N21, N20, N19, N18, N17, N16, N15, N14, N13, N12, N11, N10, N9, N8, N7, N6 } : 1'b0;
assign N0 = reset_i;
assign N1 = N2;
assign { N197, N196, N195, N194, N193, N192, N191, N190, N189, N188, N187, N186, N185, N184, N183, N182, N181, N180, N179, N178, N177, N176, N175, N174, N173, N172, N171, N170, N169, N168, N167, N166, N165, N164, N163, N162, N161, N160, N159, N158, N157, N156, N155, N154, N153, N152, N151, N150, N149, N148, N147, N146, N145, N144, N143, N142, N141, N140, N139, N138, N137, N136, N135, N134 } = count_o * N4;
assign N2 = ~reset_i;
assign N3 = N2;
assign N4 = ~clear_i;
assign N5 = N3 & N4;
always @(posedge clk_i) begin
if(1'b1) begin
{ count_o[63:0] } <= { N133, N132, N131, N130, N129, N128, N127, N126, N125, N124, N123, N122, N121, N120, N119, N118, N117, N116, N115, N114, N113, N112, N111, N110, N109, N108, N107, N106, N105, N104, N103, N102, N101, N100, N99, N98, N97, N96, N95, N94, N93, N92, N91, N90, N89, N88, N87, N86, N85, N84, N83, N82, N81, N80, N79, N78, N77, N76, N75, N74, N73, N72, N71, N70 };
end
end
endmodule
|
module bsg_lru_pseudo_tree_decode_ways_p8
(
way_id_i,
data_o,
mask_o
);
input [2:0] way_id_i;
output [6:0] data_o;
output [6:0] mask_o;
wire [6:0] data_o,mask_o;
wire N0,N1,N2;
assign mask_o[0] = 1'b1;
assign data_o[0] = 1'b1 & N0;
assign N0 = ~way_id_i[2];
assign mask_o[1] = 1'b1 & N0;
assign data_o[1] = mask_o[1] & N1;
assign N1 = ~way_id_i[1];
assign mask_o[2] = 1'b1 & way_id_i[2];
assign data_o[2] = mask_o[2] & N1;
assign mask_o[3] = mask_o[1] & N1;
assign data_o[3] = mask_o[3] & N2;
assign N2 = ~way_id_i[0];
assign mask_o[4] = mask_o[1] & way_id_i[1];
assign data_o[4] = mask_o[4] & N2;
assign mask_o[5] = mask_o[2] & N1;
assign data_o[5] = mask_o[5] & N2;
assign mask_o[6] = mask_o[2] & way_id_i[1];
assign data_o[6] = mask_o[6] & N2;
endmodule
|
module bsg_scan_7_1_1
(
i,
o
);
input [6:0] i;
output [6:0] o;
wire [6:0] o;
wire t_2__6_,t_2__5_,t_2__4_,t_2__3_,t_2__2_,t_2__1_,t_2__0_,t_1__6_,t_1__5_,t_1__4_,
t_1__3_,t_1__2_,t_1__1_,t_1__0_;
assign t_1__6_ = i[0] | 1'b0;
assign t_1__5_ = i[1] | i[0];
assign t_1__4_ = i[2] | i[1];
assign t_1__3_ = i[3] | i[2];
assign t_1__2_ = i[4] | i[3];
assign t_1__1_ = i[5] | i[4];
assign t_1__0_ = i[6] | i[5];
assign t_2__6_ = t_1__6_ | 1'b0;
assign t_2__5_ = t_1__5_ | 1'b0;
assign t_2__4_ = t_1__4_ | t_1__6_;
assign t_2__3_ = t_1__3_ | t_1__5_;
assign t_2__2_ = t_1__2_ | t_1__4_;
assign t_2__1_ = t_1__1_ | t_1__3_;
assign t_2__0_ = t_1__0_ | t_1__2_;
assign o[0] = t_2__6_ | 1'b0;
assign o[1] = t_2__5_ | 1'b0;
assign o[2] = t_2__4_ | 1'b0;
assign o[3] = t_2__3_ | 1'b0;
assign o[4] = t_2__2_ | t_2__6_;
assign o[5] = t_2__1_ | t_2__5_;
assign o[6] = t_2__0_ | t_2__4_;
endmodule
|
module bsg_mux_one_hot_width_p99_els_p5
(
data_i,
sel_one_hot_i,
data_o
);
input [494:0] data_i;
input [4:0] sel_one_hot_i;
output [98:0] data_o;
wire [98:0] data_o;
wire N0,N1,N2,N3,N4,N5,N6,N7,N8,N9,N10,N11,N12,N13,N14,N15,N16,N17,N18,N19,N20,N21,
N22,N23,N24,N25,N26,N27,N28,N29,N30,N31,N32,N33,N34,N35,N36,N37,N38,N39,N40,N41,
N42,N43,N44,N45,N46,N47,N48,N49,N50,N51,N52,N53,N54,N55,N56,N57,N58,N59,N60,N61,
N62,N63,N64,N65,N66,N67,N68,N69,N70,N71,N72,N73,N74,N75,N76,N77,N78,N79,N80,N81,
N82,N83,N84,N85,N86,N87,N88,N89,N90,N91,N92,N93,N94,N95,N96,N97,N98,N99,N100,N101,
N102,N103,N104,N105,N106,N107,N108,N109,N110,N111,N112,N113,N114,N115,N116,N117,
N118,N119,N120,N121,N122,N123,N124,N125,N126,N127,N128,N129,N130,N131,N132,N133,
N134,N135,N136,N137,N138,N139,N140,N141,N142,N143,N144,N145,N146,N147,N148,N149,
N150,N151,N152,N153,N154,N155,N156,N157,N158,N159,N160,N161,N162,N163,N164,N165,
N166,N167,N168,N169,N170,N171,N172,N173,N174,N175,N176,N177,N178,N179,N180,N181,
N182,N183,N184,N185,N186,N187,N188,N189,N190,N191,N192,N193,N194,N195,N196,N197,
N198,N199,N200,N201,N202,N203,N204,N205,N206,N207,N208,N209,N210,N211,N212,N213,
N214,N215,N216,N217,N218,N219,N220,N221,N222,N223,N224,N225,N226,N227,N228,N229,
N230,N231,N232,N233,N234,N235,N236,N237,N238,N239,N240,N241,N242,N243,N244,N245,
N246,N247,N248,N249,N250,N251,N252,N253,N254,N255,N256,N257,N258,N259,N260,N261,
N262,N263,N264,N265,N266,N267,N268,N269,N270,N271,N272,N273,N274,N275,N276,N277,
N278,N279,N280,N281,N282,N283,N284,N285,N286,N287,N288,N289,N290,N291,N292,N293,
N294,N295,N296;
wire [494:0] data_masked;
assign data_masked[98] = data_i[98] & sel_one_hot_i[0];
assign data_masked[97] = data_i[97] & sel_one_hot_i[0];
assign data_masked[96] = data_i[96] & sel_one_hot_i[0];
assign data_masked[95] = data_i[95] & sel_one_hot_i[0];
assign data_masked[94] = data_i[94] & sel_one_hot_i[0];
assign data_masked[93] = data_i[93] & sel_one_hot_i[0];
assign data_masked[92] = data_i[92] & sel_one_hot_i[0];
assign data_masked[91] = data_i[91] & sel_one_hot_i[0];
assign data_masked[90] = data_i[90] & sel_one_hot_i[0];
assign data_masked[89] = data_i[89] & sel_one_hot_i[0];
assign data_masked[88] = data_i[88] & sel_one_hot_i[0];
assign data_masked[87] = data_i[87] & sel_one_hot_i[0];
assign data_masked[86] = data_i[86] & sel_one_hot_i[0];
assign data_masked[85] = data_i[85] & sel_one_hot_i[0];
assign data_masked[84] = data_i[84] & sel_one_hot_i[0];
assign data_masked[83] = data_i[83] & sel_one_hot_i[0];
assign data_masked[82] = data_i[82] & sel_one_hot_i[0];
assign data_masked[81] = data_i[81] & sel_one_hot_i[0];
assign data_masked[80] = data_i[80] & sel_one_hot_i[0];
assign data_masked[79] = data_i[79] & sel_one_hot_i[0];
assign data_masked[78] = data_i[78] & sel_one_hot_i[0];
assign data_masked[77] = data_i[77] & sel_one_hot_i[0];
assign data_masked[76] = data_i[76] & sel_one_hot_i[0];
assign data_masked[75] = data_i[75] & sel_one_hot_i[0];
assign data_masked[74] = data_i[74] & sel_one_hot_i[0];
assign data_masked[73] = data_i[73] & sel_one_hot_i[0];
assign data_masked[72] = data_i[72] & sel_one_hot_i[0];
assign data_masked[71] = data_i[71] & sel_one_hot_i[0];
assign data_masked[70] = data_i[70] & sel_one_hot_i[0];
assign data_masked[69] = data_i[69] & sel_one_hot_i[0];
assign data_masked[68] = data_i[68] & sel_one_hot_i[0];
assign data_masked[67] = data_i[67] & sel_one_hot_i[0];
assign data_masked[66] = data_i[66] & sel_one_hot_i[0];
assign data_masked[65] = data_i[65] & sel_one_hot_i[0];
assign data_masked[64] = data_i[64] & sel_one_hot_i[0];
assign data_masked[63] = data_i[63] & sel_one_hot_i[0];
assign data_masked[62] = data_i[62] & sel_one_hot_i[0];
assign data_masked[61] = data_i[61] & sel_one_hot_i[0];
assign data_masked[60] = data_i[60] & sel_one_hot_i[0];
assign data_masked[59] = data_i[59] & sel_one_hot_i[0];
assign data_masked[58] = data_i[58] & sel_one_hot_i[0];
assign data_masked[57] = data_i[57] & sel_one_hot_i[0];
assign data_masked[56] = data_i[56] & sel_one_hot_i[0];
assign data_masked[55] = data_i[55] & sel_one_hot_i[0];
assign data_masked[54] = data_i[54] & sel_one_hot_i[0];
assign data_masked[53] = data_i[53] & sel_one_hot_i[0];
assign data_masked[52] = data_i[52] & sel_one_hot_i[0];
assign data_masked[51] = data_i[51] & sel_one_hot_i[0];
assign data_masked[50] = data_i[50] & sel_one_hot_i[0];
assign data_masked[49] = data_i[49] & sel_one_hot_i[0];
assign data_masked[48] = data_i[48] & sel_one_hot_i[0];
assign data_masked[47] = data_i[47] & sel_one_hot_i[0];
assign data_masked[46] = data_i[46] & sel_one_hot_i[0];
assign data_masked[45] = data_i[45] & sel_one_hot_i[0];
assign data_masked[44] = data_i[44] & sel_one_hot_i[0];
assign data_masked[43] = data_i[43] & sel_one_hot_i[0];
assign data_masked[42] = data_i[42] & sel_one_hot_i[0];
assign data_masked[41] = data_i[41] & sel_one_hot_i[0];
assign data_masked[40] = data_i[40] & sel_one_hot_i[0];
assign data_masked[39] = data_i[39] & sel_one_hot_i[0];
assign data_masked[38] = data_i[38] & sel_one_hot_i[0];
assign data_masked[37] = data_i[37] & sel_one_hot_i[0];
assign data_masked[36] = data_i[36] & sel_one_hot_i[0];
assign data_masked[35] = data_i[35] & sel_one_hot_i[0];
assign data_masked[34] = data_i[34] & sel_one_hot_i[0];
assign data_masked[33] = data_i[33] & sel_one_hot_i[0];
assign data_masked[32] = data_i[32] & sel_one_hot_i[0];
assign data_masked[31] = data_i[31] & sel_one_hot_i[0];
assign data_masked[30] = data_i[30] & sel_one_hot_i[0];
assign data_masked[29] = data_i[29] & sel_one_hot_i[0];
assign data_masked[28] = data_i[28] & sel_one_hot_i[0];
assign data_masked[27] = data_i[27] & sel_one_hot_i[0];
assign data_masked[26] = data_i[26] & sel_one_hot_i[0];
assign data_masked[25] = data_i[25] & sel_one_hot_i[0];
assign data_masked[24] = data_i[24] & sel_one_hot_i[0];
assign data_masked[23] = data_i[23] & sel_one_hot_i[0];
assign data_masked[22] = data_i[22] & sel_one_hot_i[0];
assign data_masked[21] = data_i[21] & sel_one_hot_i[0];
assign data_masked[20] = data_i[20] & sel_one_hot_i[0];
assign data_masked[19] = data_i[19] & sel_one_hot_i[0];
assign data_masked[18] = data_i[18] & sel_one_hot_i[0];
assign data_masked[17] = data_i[17] & sel_one_hot_i[0];
assign data_masked[16] = data_i[16] & sel_one_hot_i[0];
assign data_masked[15] = data_i[15] & sel_one_hot_i[0];
assign data_masked[14] = data_i[14] & sel_one_hot_i[0];
assign data_masked[13] = data_i[13] & sel_one_hot_i[0];
assign data_masked[12] = data_i[12] & sel_one_hot_i[0];
assign data_masked[11] = data_i[11] & sel_one_hot_i[0];
assign data_masked[10] = data_i[10] & sel_one_hot_i[0];
assign data_masked[9] = data_i[9] & sel_one_hot_i[0];
assign data_masked[8] = data_i[8] & sel_one_hot_i[0];
assign data_masked[7] = data_i[7] & sel_one_hot_i[0];
assign data_masked[6] = data_i[6] & sel_one_hot_i[0];
assign data_masked[5] = data_i[5] & sel_one_hot_i[0];
assign data_masked[4] = data_i[4] & sel_one_hot_i[0];
assign data_masked[3] = data_i[3] & sel_one_hot_i[0];
assign data_masked[2] = data_i[2] & sel_one_hot_i[0];
assign data_masked[1] = data_i[1] & sel_one_hot_i[0];
assign data_masked[0] = data_i[0] & sel_one_hot_i[0];
assign data_masked[197] = data_i[197] & sel_one_hot_i[1];
assign data_masked[196] = data_i[196] & sel_one_hot_i[1];
assign data_masked[195] = data_i[195] & sel_one_hot_i[1];
assign data_masked[194] = data_i[194] & sel_one_hot_i[1];
assign data_masked[193] = data_i[193] & sel_one_hot_i[1];
assign data_masked[192] = data_i[192] & sel_one_hot_i[1];
assign data_masked[191] = data_i[191] & sel_one_hot_i[1];
assign data_masked[190] = data_i[190] & sel_one_hot_i[1];
assign data_masked[189] = data_i[189] & sel_one_hot_i[1];
assign data_masked[188] = data_i[188] & sel_one_hot_i[1];
assign data_masked[187] = data_i[187] & sel_one_hot_i[1];
assign data_masked[186] = data_i[186] & sel_one_hot_i[1];
assign data_masked[185] = data_i[185] & sel_one_hot_i[1];
assign data_masked[184] = data_i[184] & sel_one_hot_i[1];
assign data_masked[183] = data_i[183] & sel_one_hot_i[1];
assign data_masked[182] = data_i[182] & sel_one_hot_i[1];
assign data_masked[181] = data_i[181] & sel_one_hot_i[1];
assign data_masked[180] = data_i[180] & sel_one_hot_i[1];
assign data_masked[179] = data_i[179] & sel_one_hot_i[1];
assign data_masked[178] = data_i[178] & sel_one_hot_i[1];
assign data_masked[177] = data_i[177] & sel_one_hot_i[1];
assign data_masked[176] = data_i[176] & sel_one_hot_i[1];
assign data_masked[175] = data_i[175] & sel_one_hot_i[1];
assign data_masked[174] = data_i[174] & sel_one_hot_i[1];
assign data_masked[173] = data_i[173] & sel_one_hot_i[1];
assign data_masked[172] = data_i[172] & sel_one_hot_i[1];
assign data_masked[171] = data_i[171] & sel_one_hot_i[1];
assign data_masked[170] = data_i[170] & sel_one_hot_i[1];
assign data_masked[169] = data_i[169] & sel_one_hot_i[1];
assign data_masked[168] = data_i[168] & sel_one_hot_i[1];
assign data_masked[167] = data_i[167] & sel_one_hot_i[1];
assign data_masked[166] = data_i[166] & sel_one_hot_i[1];
assign data_masked[165] = data_i[165] & sel_one_hot_i[1];
assign data_masked[164] = data_i[164] & sel_one_hot_i[1];
assign data_masked[163] = data_i[163] & sel_one_hot_i[1];
assign data_masked[162] = data_i[162] & sel_one_hot_i[1];
assign data_masked[161] = data_i[161] & sel_one_hot_i[1];
assign data_masked[160] = data_i[160] & sel_one_hot_i[1];
assign data_masked[159] = data_i[159] & sel_one_hot_i[1];
assign data_masked[158] = data_i[158] & sel_one_hot_i[1];
assign data_masked[157] = data_i[157] & sel_one_hot_i[1];
assign data_masked[156] = data_i[156] & sel_one_hot_i[1];
assign data_masked[155] = data_i[155] & sel_one_hot_i[1];
assign data_masked[154] = data_i[154] & sel_one_hot_i[1];
assign data_masked[153] = data_i[153] & sel_one_hot_i[1];
assign data_masked[152] = data_i[152] & sel_one_hot_i[1];
assign data_masked[151] = data_i[151] & sel_one_hot_i[1];
assign data_masked[150] = data_i[150] & sel_one_hot_i[1];
assign data_masked[149] = data_i[149] & sel_one_hot_i[1];
assign data_masked[148] = data_i[148] & sel_one_hot_i[1];
assign data_masked[147] = data_i[147] & sel_one_hot_i[1];
assign data_masked[146] = data_i[146] & sel_one_hot_i[1];
assign data_masked[145] = data_i[145] & sel_one_hot_i[1];
assign data_masked[144] = data_i[144] & sel_one_hot_i[1];
assign data_masked[143] = data_i[143] & sel_one_hot_i[1];
assign data_masked[142] = data_i[142] & sel_one_hot_i[1];
assign data_masked[141] = data_i[141] & sel_one_hot_i[1];
assign data_masked[140] = data_i[140] & sel_one_hot_i[1];
assign data_masked[139] = data_i[139] & sel_one_hot_i[1];
assign data_masked[138] = data_i[138] & sel_one_hot_i[1];
assign data_masked[137] = data_i[137] & sel_one_hot_i[1];
assign data_masked[136] = data_i[136] & sel_one_hot_i[1];
assign data_masked[135] = data_i[135] & sel_one_hot_i[1];
assign data_masked[134] = data_i[134] & sel_one_hot_i[1];
assign data_masked[133] = data_i[133] & sel_one_hot_i[1];
assign data_masked[132] = data_i[132] & sel_one_hot_i[1];
assign data_masked[131] = data_i[131] & sel_one_hot_i[1];
assign data_masked[130] = data_i[130] & sel_one_hot_i[1];
assign data_masked[129] = data_i[129] & sel_one_hot_i[1];
assign data_masked[128] = data_i[128] & sel_one_hot_i[1];
assign data_masked[127] = data_i[127] & sel_one_hot_i[1];
assign data_masked[126] = data_i[126] & sel_one_hot_i[1];
assign data_masked[125] = data_i[125] & sel_one_hot_i[1];
assign data_masked[124] = data_i[124] & sel_one_hot_i[1];
assign data_masked[123] = data_i[123] & sel_one_hot_i[1];
assign data_masked[122] = data_i[122] & sel_one_hot_i[1];
assign data_masked[121] = data_i[121] & sel_one_hot_i[1];
assign data_masked[120] = data_i[120] & sel_one_hot_i[1];
assign data_masked[119] = data_i[119] & sel_one_hot_i[1];
assign data_masked[118] = data_i[118] & sel_one_hot_i[1];
assign data_masked[117] = data_i[117] & sel_one_hot_i[1];
assign data_masked[116] = data_i[116] & sel_one_hot_i[1];
assign data_masked[115] = data_i[115] & sel_one_hot_i[1];
assign data_masked[114] = data_i[114] & sel_one_hot_i[1];
assign data_masked[113] = data_i[113] & sel_one_hot_i[1];
assign data_masked[112] = data_i[112] & sel_one_hot_i[1];
assign data_masked[111] = data_i[111] & sel_one_hot_i[1];
assign data_masked[110] = data_i[110] & sel_one_hot_i[1];
assign data_masked[109] = data_i[109] & sel_one_hot_i[1];
assign data_masked[108] = data_i[108] & sel_one_hot_i[1];
assign data_masked[107] = data_i[107] & sel_one_hot_i[1];
assign data_masked[106] = data_i[106] & sel_one_hot_i[1];
assign data_masked[105] = data_i[105] & sel_one_hot_i[1];
assign data_masked[104] = data_i[104] & sel_one_hot_i[1];
assign data_masked[103] = data_i[103] & sel_one_hot_i[1];
assign data_masked[102] = data_i[102] & sel_one_hot_i[1];
assign data_masked[101] = data_i[101] & sel_one_hot_i[1];
assign data_masked[100] = data_i[100] & sel_one_hot_i[1];
assign data_masked[99] = data_i[99] & sel_one_hot_i[1];
assign data_masked[296] = data_i[296] & sel_one_hot_i[2];
assign data_masked[295] = data_i[295] & sel_one_hot_i[2];
assign data_masked[294] = data_i[294] & sel_one_hot_i[2];
assign data_masked[293] = data_i[293] & sel_one_hot_i[2];
assign data_masked[292] = data_i[292] & sel_one_hot_i[2];
assign data_masked[291] = data_i[291] & sel_one_hot_i[2];
assign data_masked[290] = data_i[290] & sel_one_hot_i[2];
assign data_masked[289] = data_i[289] & sel_one_hot_i[2];
assign data_masked[288] = data_i[288] & sel_one_hot_i[2];
assign data_masked[287] = data_i[287] & sel_one_hot_i[2];
assign data_masked[286] = data_i[286] & sel_one_hot_i[2];
assign data_masked[285] = data_i[285] & sel_one_hot_i[2];
assign data_masked[284] = data_i[284] & sel_one_hot_i[2];
assign data_masked[283] = data_i[283] & sel_one_hot_i[2];
assign data_masked[282] = data_i[282] & sel_one_hot_i[2];
assign data_masked[281] = data_i[281] & sel_one_hot_i[2];
assign data_masked[280] = data_i[280] & sel_one_hot_i[2];
assign data_masked[279] = data_i[279] & sel_one_hot_i[2];
assign data_masked[278] = data_i[278] & sel_one_hot_i[2];
assign data_masked[277] = data_i[277] & sel_one_hot_i[2];
assign data_masked[276] = data_i[276] & sel_one_hot_i[2];
assign data_masked[275] = data_i[275] & sel_one_hot_i[2];
assign data_masked[274] = data_i[274] & sel_one_hot_i[2];
assign data_masked[273] = data_i[273] & sel_one_hot_i[2];
assign data_masked[272] = data_i[272] & sel_one_hot_i[2];
assign data_masked[271] = data_i[271] & sel_one_hot_i[2];
assign data_masked[270] = data_i[270] & sel_one_hot_i[2];
assign data_masked[269] = data_i[269] & sel_one_hot_i[2];
assign data_masked[268] = data_i[268] & sel_one_hot_i[2];
assign data_masked[267] = data_i[267] & sel_one_hot_i[2];
assign data_masked[266] = data_i[266] & sel_one_hot_i[2];
assign data_masked[265] = data_i[265] & sel_one_hot_i[2];
assign data_masked[264] = data_i[264] & sel_one_hot_i[2];
assign data_masked[263] = data_i[263] & sel_one_hot_i[2];
assign data_masked[262] = data_i[262] & sel_one_hot_i[2];
assign data_masked[261] = data_i[261] & sel_one_hot_i[2];
assign data_masked[260] = data_i[260] & sel_one_hot_i[2];
assign data_masked[259] = data_i[259] & sel_one_hot_i[2];
assign data_masked[258] = data_i[258] & sel_one_hot_i[2];
assign data_masked[257] = data_i[257] & sel_one_hot_i[2];
assign data_masked[256] = data_i[256] & sel_one_hot_i[2];
assign data_masked[255] = data_i[255] & sel_one_hot_i[2];
assign data_masked[254] = data_i[254] & sel_one_hot_i[2];
assign data_masked[253] = data_i[253] & sel_one_hot_i[2];
assign data_masked[252] = data_i[252] & sel_one_hot_i[2];
assign data_masked[251] = data_i[251] & sel_one_hot_i[2];
assign data_masked[250] = data_i[250] & sel_one_hot_i[2];
assign data_masked[249] = data_i[249] & sel_one_hot_i[2];
assign data_masked[248] = data_i[248] & sel_one_hot_i[2];
assign data_masked[247] = data_i[247] & sel_one_hot_i[2];
assign data_masked[246] = data_i[246] & sel_one_hot_i[2];
assign data_masked[245] = data_i[245] & sel_one_hot_i[2];
assign data_masked[244] = data_i[244] & sel_one_hot_i[2];
assign data_masked[243] = data_i[243] & sel_one_hot_i[2];
assign data_masked[242] = data_i[242] & sel_one_hot_i[2];
assign data_masked[241] = data_i[241] & sel_one_hot_i[2];
assign data_masked[240] = data_i[240] & sel_one_hot_i[2];
assign data_masked[239] = data_i[239] & sel_one_hot_i[2];
assign data_masked[238] = data_i[238] & sel_one_hot_i[2];
assign data_masked[237] = data_i[237] & sel_one_hot_i[2];
assign data_masked[236] = data_i[236] & sel_one_hot_i[2];
assign data_masked[235] = data_i[235] & sel_one_hot_i[2];
assign data_masked[234] = data_i[234] & sel_one_hot_i[2];
assign data_masked[233] = data_i[233] & sel_one_hot_i[2];
assign data_masked[232] = data_i[232] & sel_one_hot_i[2];
assign data_masked[231] = data_i[231] & sel_one_hot_i[2];
assign data_masked[230] = data_i[230] & sel_one_hot_i[2];
assign data_masked[229] = data_i[229] & sel_one_hot_i[2];
assign data_masked[228] = data_i[228] & sel_one_hot_i[2];
assign data_masked[227] = data_i[227] & sel_one_hot_i[2];
assign data_masked[226] = data_i[226] & sel_one_hot_i[2];
assign data_masked[225] = data_i[225] & sel_one_hot_i[2];
assign data_masked[224] = data_i[224] & sel_one_hot_i[2];
assign data_masked[223] = data_i[223] & sel_one_hot_i[2];
assign data_masked[222] = data_i[222] & sel_one_hot_i[2];
assign data_masked[221] = data_i[221] & sel_one_hot_i[2];
assign data_masked[220] = data_i[220] & sel_one_hot_i[2];
assign data_masked[219] = data_i[219] & sel_one_hot_i[2];
assign data_masked[218] = data_i[218] & sel_one_hot_i[2];
assign data_masked[217] = data_i[217] & sel_one_hot_i[2];
assign data_masked[216] = data_i[216] & sel_one_hot_i[2];
assign data_masked[215] = data_i[215] & sel_one_hot_i[2];
assign data_masked[214] = data_i[214] & sel_one_hot_i[2];
assign data_masked[213] = data_i[213] & sel_one_hot_i[2];
assign data_masked[212] = data_i[212] & sel_one_hot_i[2];
assign data_masked[211] = data_i[211] & sel_one_hot_i[2];
assign data_masked[210] = data_i[210] & sel_one_hot_i[2];
assign data_masked[209] = data_i[209] & sel_one_hot_i[2];
assign data_masked[208] = data_i[208] & sel_one_hot_i[2];
assign data_masked[207] = data_i[207] & sel_one_hot_i[2];
assign data_masked[206] = data_i[206] & sel_one_hot_i[2];
assign data_masked[205] = data_i[205] & sel_one_hot_i[2];
assign data_masked[204] = data_i[204] & sel_one_hot_i[2];
assign data_masked[203] = data_i[203] & sel_one_hot_i[2];
assign data_masked[202] = data_i[202] & sel_one_hot_i[2];
assign data_masked[201] = data_i[201] & sel_one_hot_i[2];
assign data_masked[200] = data_i[200] & sel_one_hot_i[2];
assign data_masked[199] = data_i[199] & sel_one_hot_i[2];
assign data_masked[198] = data_i[198] & sel_one_hot_i[2];
assign data_masked[395] = data_i[395] & sel_one_hot_i[3];
assign data_masked[394] = data_i[394] & sel_one_hot_i[3];
assign data_masked[393] = data_i[393] & sel_one_hot_i[3];
assign data_masked[392] = data_i[392] & sel_one_hot_i[3];
assign data_masked[391] = data_i[391] & sel_one_hot_i[3];
assign data_masked[390] = data_i[390] & sel_one_hot_i[3];
assign data_masked[389] = data_i[389] & sel_one_hot_i[3];
assign data_masked[388] = data_i[388] & sel_one_hot_i[3];
assign data_masked[387] = data_i[387] & sel_one_hot_i[3];
assign data_masked[386] = data_i[386] & sel_one_hot_i[3];
assign data_masked[385] = data_i[385] & sel_one_hot_i[3];
assign data_masked[384] = data_i[384] & sel_one_hot_i[3];
assign data_masked[383] = data_i[383] & sel_one_hot_i[3];
assign data_masked[382] = data_i[382] & sel_one_hot_i[3];
assign data_masked[381] = data_i[381] & sel_one_hot_i[3];
assign data_masked[380] = data_i[380] & sel_one_hot_i[3];
assign data_masked[379] = data_i[379] & sel_one_hot_i[3];
assign data_masked[378] = data_i[378] & sel_one_hot_i[3];
assign data_masked[377] = data_i[377] & sel_one_hot_i[3];
assign data_masked[376] = data_i[376] & sel_one_hot_i[3];
assign data_masked[375] = data_i[375] & sel_one_hot_i[3];
assign data_masked[374] = data_i[374] & sel_one_hot_i[3];
assign data_masked[373] = data_i[373] & sel_one_hot_i[3];
assign data_masked[372] = data_i[372] & sel_one_hot_i[3];
assign data_masked[371] = data_i[371] & sel_one_hot_i[3];
assign data_masked[370] = data_i[370] & sel_one_hot_i[3];
assign data_masked[369] = data_i[369] & sel_one_hot_i[3];
assign data_masked[368] = data_i[368] & sel_one_hot_i[3];
assign data_masked[367] = data_i[367] & sel_one_hot_i[3];
assign data_masked[366] = data_i[366] & sel_one_hot_i[3];
assign data_masked[365] = data_i[365] & sel_one_hot_i[3];
assign data_masked[364] = data_i[364] & sel_one_hot_i[3];
assign data_masked[363] = data_i[363] & sel_one_hot_i[3];
assign data_masked[362] = data_i[362] & sel_one_hot_i[3];
assign data_masked[361] = data_i[361] & sel_one_hot_i[3];
assign data_masked[360] = data_i[360] & sel_one_hot_i[3];
assign data_masked[359] = data_i[359] & sel_one_hot_i[3];
assign data_masked[358] = data_i[358] & sel_one_hot_i[3];
assign data_masked[357] = data_i[357] & sel_one_hot_i[3];
assign data_masked[356] = data_i[356] & sel_one_hot_i[3];
assign data_masked[355] = data_i[355] & sel_one_hot_i[3];
assign data_masked[354] = data_i[354] & sel_one_hot_i[3];
assign data_masked[353] = data_i[353] & sel_one_hot_i[3];
assign data_masked[352] = data_i[352] & sel_one_hot_i[3];
assign data_masked[351] = data_i[351] & sel_one_hot_i[3];
assign data_masked[350] = data_i[350] & sel_one_hot_i[3];
assign data_masked[349] = data_i[349] & sel_one_hot_i[3];
assign data_masked[348] = data_i[348] & sel_one_hot_i[3];
assign data_masked[347] = data_i[347] & sel_one_hot_i[3];
assign data_masked[346] = data_i[346] & sel_one_hot_i[3];
assign data_masked[345] = data_i[345] & sel_one_hot_i[3];
assign data_masked[344] = data_i[344] & sel_one_hot_i[3];
assign data_masked[343] = data_i[343] & sel_one_hot_i[3];
assign data_masked[342] = data_i[342] & sel_one_hot_i[3];
assign data_masked[341] = data_i[341] & sel_one_hot_i[3];
assign data_masked[340] = data_i[340] & sel_one_hot_i[3];
assign data_masked[339] = data_i[339] & sel_one_hot_i[3];
assign data_masked[338] = data_i[338] & sel_one_hot_i[3];
assign data_masked[337] = data_i[337] & sel_one_hot_i[3];
assign data_masked[336] = data_i[336] & sel_one_hot_i[3];
assign data_masked[335] = data_i[335] & sel_one_hot_i[3];
assign data_masked[334] = data_i[334] & sel_one_hot_i[3];
assign data_masked[333] = data_i[333] & sel_one_hot_i[3];
assign data_masked[332] = data_i[332] & sel_one_hot_i[3];
assign data_masked[331] = data_i[331] & sel_one_hot_i[3];
assign data_masked[330] = data_i[330] & sel_one_hot_i[3];
assign data_masked[329] = data_i[329] & sel_one_hot_i[3];
assign data_masked[328] = data_i[328] & sel_one_hot_i[3];
assign data_masked[327] = data_i[327] & sel_one_hot_i[3];
assign data_masked[326] = data_i[326] & sel_one_hot_i[3];
assign data_masked[325] = data_i[325] & sel_one_hot_i[3];
assign data_masked[324] = data_i[324] & sel_one_hot_i[3];
assign data_masked[323] = data_i[323] & sel_one_hot_i[3];
assign data_masked[322] = data_i[322] & sel_one_hot_i[3];
assign data_masked[321] = data_i[321] & sel_one_hot_i[3];
assign data_masked[320] = data_i[320] & sel_one_hot_i[3];
assign data_masked[319] = data_i[319] & sel_one_hot_i[3];
assign data_masked[318] = data_i[318] & sel_one_hot_i[3];
assign data_masked[317] = data_i[317] & sel_one_hot_i[3];
assign data_masked[316] = data_i[316] & sel_one_hot_i[3];
assign data_masked[315] = data_i[315] & sel_one_hot_i[3];
assign data_masked[314] = data_i[314] & sel_one_hot_i[3];
assign data_masked[313] = data_i[313] & sel_one_hot_i[3];
assign data_masked[312] = data_i[312] & sel_one_hot_i[3];
assign data_masked[311] = data_i[311] & sel_one_hot_i[3];
assign data_masked[310] = data_i[310] & sel_one_hot_i[3];
assign data_masked[309] = data_i[309] & sel_one_hot_i[3];
assign data_masked[308] = data_i[308] & sel_one_hot_i[3];
assign data_masked[307] = data_i[307] & sel_one_hot_i[3];
assign data_masked[306] = data_i[306] & sel_one_hot_i[3];
assign data_masked[305] = data_i[305] & sel_one_hot_i[3];
assign data_masked[304] = data_i[304] & sel_one_hot_i[3];
assign data_masked[303] = data_i[303] & sel_one_hot_i[3];
assign data_masked[302] = data_i[302] & sel_one_hot_i[3];
assign data_masked[301] = data_i[301] & sel_one_hot_i[3];
assign data_masked[300] = data_i[300] & sel_one_hot_i[3];
assign data_masked[299] = data_i[299] & sel_one_hot_i[3];
assign data_masked[298] = data_i[298] & sel_one_hot_i[3];
assign data_masked[297] = data_i[297] & sel_one_hot_i[3];
assign data_masked[494] = data_i[494] & sel_one_hot_i[4];
assign data_masked[493] = data_i[493] & sel_one_hot_i[4];
assign data_masked[492] = data_i[492] & sel_one_hot_i[4];
assign data_masked[491] = data_i[491] & sel_one_hot_i[4];
assign data_masked[490] = data_i[490] & sel_one_hot_i[4];
assign data_masked[489] = data_i[489] & sel_one_hot_i[4];
assign data_masked[488] = data_i[488] & sel_one_hot_i[4];
assign data_masked[487] = data_i[487] & sel_one_hot_i[4];
assign data_masked[486] = data_i[486] & sel_one_hot_i[4];
assign data_masked[485] = data_i[485] & sel_one_hot_i[4];
assign data_masked[484] = data_i[484] & sel_one_hot_i[4];
assign data_masked[483] = data_i[483] & sel_one_hot_i[4];
assign data_masked[482] = data_i[482] & sel_one_hot_i[4];
assign data_masked[481] = data_i[481] & sel_one_hot_i[4];
assign data_masked[480] = data_i[480] & sel_one_hot_i[4];
assign data_masked[479] = data_i[479] & sel_one_hot_i[4];
assign data_masked[478] = data_i[478] & sel_one_hot_i[4];
assign data_masked[477] = data_i[477] & sel_one_hot_i[4];
assign data_masked[476] = data_i[476] & sel_one_hot_i[4];
assign data_masked[475] = data_i[475] & sel_one_hot_i[4];
assign data_masked[474] = data_i[474] & sel_one_hot_i[4];
assign data_masked[473] = data_i[473] & sel_one_hot_i[4];
assign data_masked[472] = data_i[472] & sel_one_hot_i[4];
assign data_masked[471] = data_i[471] & sel_one_hot_i[4];
assign data_masked[470] = data_i[470] & sel_one_hot_i[4];
assign data_masked[469] = data_i[469] & sel_one_hot_i[4];
assign data_masked[468] = data_i[468] & sel_one_hot_i[4];
assign data_masked[467] = data_i[467] & sel_one_hot_i[4];
assign data_masked[466] = data_i[466] & sel_one_hot_i[4];
assign data_masked[465] = data_i[465] & sel_one_hot_i[4];
assign data_masked[464] = data_i[464] & sel_one_hot_i[4];
assign data_masked[463] = data_i[463] & sel_one_hot_i[4];
assign data_masked[462] = data_i[462] & sel_one_hot_i[4];
assign data_masked[461] = data_i[461] & sel_one_hot_i[4];
assign data_masked[460] = data_i[460] & sel_one_hot_i[4];
assign data_masked[459] = data_i[459] & sel_one_hot_i[4];
assign data_masked[458] = data_i[458] & sel_one_hot_i[4];
assign data_masked[457] = data_i[457] & sel_one_hot_i[4];
assign data_masked[456] = data_i[456] & sel_one_hot_i[4];
assign data_masked[455] = data_i[455] & sel_one_hot_i[4];
assign data_masked[454] = data_i[454] & sel_one_hot_i[4];
assign data_masked[453] = data_i[453] & sel_one_hot_i[4];
assign data_masked[452] = data_i[452] & sel_one_hot_i[4];
assign data_masked[451] = data_i[451] & sel_one_hot_i[4];
assign data_masked[450] = data_i[450] & sel_one_hot_i[4];
assign data_masked[449] = data_i[449] & sel_one_hot_i[4];
assign data_masked[448] = data_i[448] & sel_one_hot_i[4];
assign data_masked[447] = data_i[447] & sel_one_hot_i[4];
assign data_masked[446] = data_i[446] & sel_one_hot_i[4];
assign data_masked[445] = data_i[445] & sel_one_hot_i[4];
assign data_masked[444] = data_i[444] & sel_one_hot_i[4];
assign data_masked[443] = data_i[443] & sel_one_hot_i[4];
assign data_masked[442] = data_i[442] & sel_one_hot_i[4];
assign data_masked[441] = data_i[441] & sel_one_hot_i[4];
assign data_masked[440] = data_i[440] & sel_one_hot_i[4];
assign data_masked[439] = data_i[439] & sel_one_hot_i[4];
assign data_masked[438] = data_i[438] & sel_one_hot_i[4];
assign data_masked[437] = data_i[437] & sel_one_hot_i[4];
assign data_masked[436] = data_i[436] & sel_one_hot_i[4];
assign data_masked[435] = data_i[435] & sel_one_hot_i[4];
assign data_masked[434] = data_i[434] & sel_one_hot_i[4];
assign data_masked[433] = data_i[433] & sel_one_hot_i[4];
assign data_masked[432] = data_i[432] & sel_one_hot_i[4];
assign data_masked[431] = data_i[431] & sel_one_hot_i[4];
assign data_masked[430] = data_i[430] & sel_one_hot_i[4];
assign data_masked[429] = data_i[429] & sel_one_hot_i[4];
assign data_masked[428] = data_i[428] & sel_one_hot_i[4];
assign data_masked[427] = data_i[427] & sel_one_hot_i[4];
assign data_masked[426] = data_i[426] & sel_one_hot_i[4];
assign data_masked[425] = data_i[425] & sel_one_hot_i[4];
assign data_masked[424] = data_i[424] & sel_one_hot_i[4];
assign data_masked[423] = data_i[423] & sel_one_hot_i[4];
assign data_masked[422] = data_i[422] & sel_one_hot_i[4];
assign data_masked[421] = data_i[421] & sel_one_hot_i[4];
assign data_masked[420] = data_i[420] & sel_one_hot_i[4];
assign data_masked[419] = data_i[419] & sel_one_hot_i[4];
assign data_masked[418] = data_i[418] & sel_one_hot_i[4];
assign data_masked[417] = data_i[417] & sel_one_hot_i[4];
assign data_masked[416] = data_i[416] & sel_one_hot_i[4];
assign data_masked[415] = data_i[415] & sel_one_hot_i[4];
assign data_masked[414] = data_i[414] & sel_one_hot_i[4];
assign data_masked[413] = data_i[413] & sel_one_hot_i[4];
assign data_masked[412] = data_i[412] & sel_one_hot_i[4];
assign data_masked[411] = data_i[411] & sel_one_hot_i[4];
assign data_masked[410] = data_i[410] & sel_one_hot_i[4];
assign data_masked[409] = data_i[409] & sel_one_hot_i[4];
assign data_masked[408] = data_i[408] & sel_one_hot_i[4];
assign data_masked[407] = data_i[407] & sel_one_hot_i[4];
assign data_masked[406] = data_i[406] & sel_one_hot_i[4];
assign data_masked[405] = data_i[405] & sel_one_hot_i[4];
assign data_masked[404] = data_i[404] & sel_one_hot_i[4];
assign data_masked[403] = data_i[403] & sel_one_hot_i[4];
assign data_masked[402] = data_i[402] & sel_one_hot_i[4];
assign data_masked[401] = data_i[401] & sel_one_hot_i[4];
assign data_masked[400] = data_i[400] & sel_one_hot_i[4];
assign data_masked[399] = data_i[399] & sel_one_hot_i[4];
assign data_masked[398] = data_i[398] & sel_one_hot_i[4];
assign data_masked[397] = data_i[397] & sel_one_hot_i[4];
assign data_masked[396] = data_i[396] & sel_one_hot_i[4];
assign data_o[0] = N2 | data_masked[0];
assign N2 = N1 | data_masked[99];
assign N1 = N0 | data_masked[198];
assign N0 = data_masked[396] | data_masked[297];
assign data_o[1] = N5 | data_masked[1];
assign N5 = N4 | data_masked[100];
assign N4 = N3 | data_masked[199];
assign N3 = data_masked[397] | data_masked[298];
assign data_o[2] = N8 | data_masked[2];
assign N8 = N7 | data_masked[101];
assign N7 = N6 | data_masked[200];
assign N6 = data_masked[398] | data_masked[299];
assign data_o[3] = N11 | data_masked[3];
assign N11 = N10 | data_masked[102];
assign N10 = N9 | data_masked[201];
assign N9 = data_masked[399] | data_masked[300];
assign data_o[4] = N14 | data_masked[4];
assign N14 = N13 | data_masked[103];
assign N13 = N12 | data_masked[202];
assign N12 = data_masked[400] | data_masked[301];
assign data_o[5] = N17 | data_masked[5];
assign N17 = N16 | data_masked[104];
assign N16 = N15 | data_masked[203];
assign N15 = data_masked[401] | data_masked[302];
assign data_o[6] = N20 | data_masked[6];
assign N20 = N19 | data_masked[105];
assign N19 = N18 | data_masked[204];
assign N18 = data_masked[402] | data_masked[303];
assign data_o[7] = N23 | data_masked[7];
assign N23 = N22 | data_masked[106];
assign N22 = N21 | data_masked[205];
assign N21 = data_masked[403] | data_masked[304];
assign data_o[8] = N26 | data_masked[8];
assign N26 = N25 | data_masked[107];
assign N25 = N24 | data_masked[206];
assign N24 = data_masked[404] | data_masked[305];
assign data_o[9] = N29 | data_masked[9];
assign N29 = N28 | data_masked[108];
assign N28 = N27 | data_masked[207];
assign N27 = data_masked[405] | data_masked[306];
assign data_o[10] = N32 | data_masked[10];
assign N32 = N31 | data_masked[109];
assign N31 = N30 | data_masked[208];
assign N30 = data_masked[406] | data_masked[307];
assign data_o[11] = N35 | data_masked[11];
assign N35 = N34 | data_masked[110];
assign N34 = N33 | data_masked[209];
assign N33 = data_masked[407] | data_masked[308];
assign data_o[12] = N38 | data_masked[12];
assign N38 = N37 | data_masked[111];
assign N37 = N36 | data_masked[210];
assign N36 = data_masked[408] | data_masked[309];
assign data_o[13] = N41 | data_masked[13];
assign N41 = N40 | data_masked[112];
assign N40 = N39 | data_masked[211];
assign N39 = data_masked[409] | data_masked[310];
assign data_o[14] = N44 | data_masked[14];
assign N44 = N43 | data_masked[113];
assign N43 = N42 | data_masked[212];
assign N42 = data_masked[410] | data_masked[311];
assign data_o[15] = N47 | data_masked[15];
assign N47 = N46 | data_masked[114];
assign N46 = N45 | data_masked[213];
assign N45 = data_masked[411] | data_masked[312];
assign data_o[16] = N50 | data_masked[16];
assign N50 = N49 | data_masked[115];
assign N49 = N48 | data_masked[214];
assign N48 = data_masked[412] | data_masked[313];
assign data_o[17] = N53 | data_masked[17];
assign N53 = N52 | data_masked[116];
assign N52 = N51 | data_masked[215];
assign N51 = data_masked[413] | data_masked[314];
assign data_o[18] = N56 | data_masked[18];
assign N56 = N55 | data_masked[117];
assign N55 = N54 | data_masked[216];
assign N54 = data_masked[414] | data_masked[315];
assign data_o[19] = N59 | data_masked[19];
assign N59 = N58 | data_masked[118];
assign N58 = N57 | data_masked[217];
assign N57 = data_masked[415] | data_masked[316];
assign data_o[20] = N62 | data_masked[20];
assign N62 = N61 | data_masked[119];
assign N61 = N60 | data_masked[218];
assign N60 = data_masked[416] | data_masked[317];
assign data_o[21] = N65 | data_masked[21];
assign N65 = N64 | data_masked[120];
assign N64 = N63 | data_masked[219];
assign N63 = data_masked[417] | data_masked[318];
assign data_o[22] = N68 | data_masked[22];
assign N68 = N67 | data_masked[121];
assign N67 = N66 | data_masked[220];
assign N66 = data_masked[418] | data_masked[319];
assign data_o[23] = N71 | data_masked[23];
assign N71 = N70 | data_masked[122];
assign N70 = N69 | data_masked[221];
assign N69 = data_masked[419] | data_masked[320];
assign data_o[24] = N74 | data_masked[24];
assign N74 = N73 | data_masked[123];
assign N73 = N72 | data_masked[222];
assign N72 = data_masked[420] | data_masked[321];
assign data_o[25] = N77 | data_masked[25];
assign N77 = N76 | data_masked[124];
assign N76 = N75 | data_masked[223];
assign N75 = data_masked[421] | data_masked[322];
assign data_o[26] = N80 | data_masked[26];
assign N80 = N79 | data_masked[125];
assign N79 = N78 | data_masked[224];
assign N78 = data_masked[422] | data_masked[323];
assign data_o[27] = N83 | data_masked[27];
assign N83 = N82 | data_masked[126];
assign N82 = N81 | data_masked[225];
assign N81 = data_masked[423] | data_masked[324];
assign data_o[28] = N86 | data_masked[28];
assign N86 = N85 | data_masked[127];
assign N85 = N84 | data_masked[226];
assign N84 = data_masked[424] | data_masked[325];
assign data_o[29] = N89 | data_masked[29];
assign N89 = N88 | data_masked[128];
assign N88 = N87 | data_masked[227];
assign N87 = data_masked[425] | data_masked[326];
assign data_o[30] = N92 | data_masked[30];
assign N92 = N91 | data_masked[129];
assign N91 = N90 | data_masked[228];
assign N90 = data_masked[426] | data_masked[327];
assign data_o[31] = N95 | data_masked[31];
assign N95 = N94 | data_masked[130];
assign N94 = N93 | data_masked[229];
assign N93 = data_masked[427] | data_masked[328];
assign data_o[32] = N98 | data_masked[32];
assign N98 = N97 | data_masked[131];
assign N97 = N96 | data_masked[230];
assign N96 = data_masked[428] | data_masked[329];
assign data_o[33] = N101 | data_masked[33];
assign N101 = N100 | data_masked[132];
assign N100 = N99 | data_masked[231];
assign N99 = data_masked[429] | data_masked[330];
assign data_o[34] = N104 | data_masked[34];
assign N104 = N103 | data_masked[133];
assign N103 = N102 | data_masked[232];
assign N102 = data_masked[430] | data_masked[331];
assign data_o[35] = N107 | data_masked[35];
assign N107 = N106 | data_masked[134];
assign N106 = N105 | data_masked[233];
assign N105 = data_masked[431] | data_masked[332];
assign data_o[36] = N110 | data_masked[36];
assign N110 = N109 | data_masked[135];
assign N109 = N108 | data_masked[234];
assign N108 = data_masked[432] | data_masked[333];
assign data_o[37] = N113 | data_masked[37];
assign N113 = N112 | data_masked[136];
assign N112 = N111 | data_masked[235];
assign N111 = data_masked[433] | data_masked[334];
assign data_o[38] = N116 | data_masked[38];
assign N116 = N115 | data_masked[137];
assign N115 = N114 | data_masked[236];
assign N114 = data_masked[434] | data_masked[335];
assign data_o[39] = N119 | data_masked[39];
assign N119 = N118 | data_masked[138];
assign N118 = N117 | data_masked[237];
assign N117 = data_masked[435] | data_masked[336];
assign data_o[40] = N122 | data_masked[40];
assign N122 = N121 | data_masked[139];
assign N121 = N120 | data_masked[238];
assign N120 = data_masked[436] | data_masked[337];
assign data_o[41] = N125 | data_masked[41];
assign N125 = N124 | data_masked[140];
assign N124 = N123 | data_masked[239];
assign N123 = data_masked[437] | data_masked[338];
assign data_o[42] = N128 | data_masked[42];
assign N128 = N127 | data_masked[141];
assign N127 = N126 | data_masked[240];
assign N126 = data_masked[438] | data_masked[339];
assign data_o[43] = N131 | data_masked[43];
assign N131 = N130 | data_masked[142];
assign N130 = N129 | data_masked[241];
assign N129 = data_masked[439] | data_masked[340];
assign data_o[44] = N134 | data_masked[44];
assign N134 = N133 | data_masked[143];
assign N133 = N132 | data_masked[242];
assign N132 = data_masked[440] | data_masked[341];
assign data_o[45] = N137 | data_masked[45];
assign N137 = N136 | data_masked[144];
assign N136 = N135 | data_masked[243];
assign N135 = data_masked[441] | data_masked[342];
assign data_o[46] = N140 | data_masked[46];
assign N140 = N139 | data_masked[145];
assign N139 = N138 | data_masked[244];
assign N138 = data_masked[442] | data_masked[343];
assign data_o[47] = N143 | data_masked[47];
assign N143 = N142 | data_masked[146];
assign N142 = N141 | data_masked[245];
assign N141 = data_masked[443] | data_masked[344];
assign data_o[48] = N146 | data_masked[48];
assign N146 = N145 | data_masked[147];
assign N145 = N144 | data_masked[246];
assign N144 = data_masked[444] | data_masked[345];
assign data_o[49] = N149 | data_masked[49];
assign N149 = N148 | data_masked[148];
assign N148 = N147 | data_masked[247];
assign N147 = data_masked[445] | data_masked[346];
assign data_o[50] = N152 | data_masked[50];
assign N152 = N151 | data_masked[149];
assign N151 = N150 | data_masked[248];
assign N150 = data_masked[446] | data_masked[347];
assign data_o[51] = N155 | data_masked[51];
assign N155 = N154 | data_masked[150];
assign N154 = N153 | data_masked[249];
assign N153 = data_masked[447] | data_masked[348];
assign data_o[52] = N158 | data_masked[52];
assign N158 = N157 | data_masked[151];
assign N157 = N156 | data_masked[250];
assign N156 = data_masked[448] | data_masked[349];
assign data_o[53] = N161 | data_masked[53];
assign N161 = N160 | data_masked[152];
assign N160 = N159 | data_masked[251];
assign N159 = data_masked[449] | data_masked[350];
assign data_o[54] = N164 | data_masked[54];
assign N164 = N163 | data_masked[153];
assign N163 = N162 | data_masked[252];
assign N162 = data_masked[450] | data_masked[351];
assign data_o[55] = N167 | data_masked[55];
assign N167 = N166 | data_masked[154];
assign N166 = N165 | data_masked[253];
assign N165 = data_masked[451] | data_masked[352];
assign data_o[56] = N170 | data_masked[56];
assign N170 = N169 | data_masked[155];
assign N169 = N168 | data_masked[254];
assign N168 = data_masked[452] | data_masked[353];
assign data_o[57] = N173 | data_masked[57];
assign N173 = N172 | data_masked[156];
assign N172 = N171 | data_masked[255];
assign N171 = data_masked[453] | data_masked[354];
assign data_o[58] = N176 | data_masked[58];
assign N176 = N175 | data_masked[157];
assign N175 = N174 | data_masked[256];
assign N174 = data_masked[454] | data_masked[355];
assign data_o[59] = N179 | data_masked[59];
assign N179 = N178 | data_masked[158];
assign N178 = N177 | data_masked[257];
assign N177 = data_masked[455] | data_masked[356];
assign data_o[60] = N182 | data_masked[60];
assign N182 = N181 | data_masked[159];
assign N181 = N180 | data_masked[258];
assign N180 = data_masked[456] | data_masked[357];
assign data_o[61] = N185 | data_masked[61];
assign N185 = N184 | data_masked[160];
assign N184 = N183 | data_masked[259];
assign N183 = data_masked[457] | data_masked[358];
assign data_o[62] = N188 | data_masked[62];
assign N188 = N187 | data_masked[161];
assign N187 = N186 | data_masked[260];
assign N186 = data_masked[458] | data_masked[359];
assign data_o[63] = N191 | data_masked[63];
assign N191 = N190 | data_masked[162];
assign N190 = N189 | data_masked[261];
assign N189 = data_masked[459] | data_masked[360];
assign data_o[64] = N194 | data_masked[64];
assign N194 = N193 | data_masked[163];
assign N193 = N192 | data_masked[262];
assign N192 = data_masked[460] | data_masked[361];
assign data_o[65] = N197 | data_masked[65];
assign N197 = N196 | data_masked[164];
assign N196 = N195 | data_masked[263];
assign N195 = data_masked[461] | data_masked[362];
assign data_o[66] = N200 | data_masked[66];
assign N200 = N199 | data_masked[165];
assign N199 = N198 | data_masked[264];
assign N198 = data_masked[462] | data_masked[363];
assign data_o[67] = N203 | data_masked[67];
assign N203 = N202 | data_masked[166];
assign N202 = N201 | data_masked[265];
assign N201 = data_masked[463] | data_masked[364];
assign data_o[68] = N206 | data_masked[68];
assign N206 = N205 | data_masked[167];
assign N205 = N204 | data_masked[266];
assign N204 = data_masked[464] | data_masked[365];
assign data_o[69] = N209 | data_masked[69];
assign N209 = N208 | data_masked[168];
assign N208 = N207 | data_masked[267];
assign N207 = data_masked[465] | data_masked[366];
assign data_o[70] = N212 | data_masked[70];
assign N212 = N211 | data_masked[169];
assign N211 = N210 | data_masked[268];
assign N210 = data_masked[466] | data_masked[367];
assign data_o[71] = N215 | data_masked[71];
assign N215 = N214 | data_masked[170];
assign N214 = N213 | data_masked[269];
assign N213 = data_masked[467] | data_masked[368];
assign data_o[72] = N218 | data_masked[72];
assign N218 = N217 | data_masked[171];
assign N217 = N216 | data_masked[270];
assign N216 = data_masked[468] | data_masked[369];
assign data_o[73] = N221 | data_masked[73];
assign N221 = N220 | data_masked[172];
assign N220 = N219 | data_masked[271];
assign N219 = data_masked[469] | data_masked[370];
assign data_o[74] = N224 | data_masked[74];
assign N224 = N223 | data_masked[173];
assign N223 = N222 | data_masked[272];
assign N222 = data_masked[470] | data_masked[371];
assign data_o[75] = N227 | data_masked[75];
assign N227 = N226 | data_masked[174];
assign N226 = N225 | data_masked[273];
assign N225 = data_masked[471] | data_masked[372];
assign data_o[76] = N230 | data_masked[76];
assign N230 = N229 | data_masked[175];
assign N229 = N228 | data_masked[274];
assign N228 = data_masked[472] | data_masked[373];
assign data_o[77] = N233 | data_masked[77];
assign N233 = N232 | data_masked[176];
assign N232 = N231 | data_masked[275];
assign N231 = data_masked[473] | data_masked[374];
assign data_o[78] = N236 | data_masked[78];
assign N236 = N235 | data_masked[177];
assign N235 = N234 | data_masked[276];
assign N234 = data_masked[474] | data_masked[375];
assign data_o[79] = N239 | data_masked[79];
assign N239 = N238 | data_masked[178];
assign N238 = N237 | data_masked[277];
assign N237 = data_masked[475] | data_masked[376];
assign data_o[80] = N242 | data_masked[80];
assign N242 = N241 | data_masked[179];
assign N241 = N240 | data_masked[278];
assign N240 = data_masked[476] | data_masked[377];
assign data_o[81] = N245 | data_masked[81];
assign N245 = N244 | data_masked[180];
assign N244 = N243 | data_masked[279];
assign N243 = data_masked[477] | data_masked[378];
assign data_o[82] = N248 | data_masked[82];
assign N248 = N247 | data_masked[181];
assign N247 = N246 | data_masked[280];
assign N246 = data_masked[478] | data_masked[379];
assign data_o[83] = N251 | data_masked[83];
assign N251 = N250 | data_masked[182];
assign N250 = N249 | data_masked[281];
assign N249 = data_masked[479] | data_masked[380];
assign data_o[84] = N254 | data_masked[84];
assign N254 = N253 | data_masked[183];
assign N253 = N252 | data_masked[282];
assign N252 = data_masked[480] | data_masked[381];
assign data_o[85] = N257 | data_masked[85];
assign N257 = N256 | data_masked[184];
assign N256 = N255 | data_masked[283];
assign N255 = data_masked[481] | data_masked[382];
assign data_o[86] = N260 | data_masked[86];
assign N260 = N259 | data_masked[185];
assign N259 = N258 | data_masked[284];
assign N258 = data_masked[482] | data_masked[383];
assign data_o[87] = N263 | data_masked[87];
assign N263 = N262 | data_masked[186];
assign N262 = N261 | data_masked[285];
assign N261 = data_masked[483] | data_masked[384];
assign data_o[88] = N266 | data_masked[88];
assign N266 = N265 | data_masked[187];
assign N265 = N264 | data_masked[286];
assign N264 = data_masked[484] | data_masked[385];
assign data_o[89] = N269 | data_masked[89];
assign N269 = N268 | data_masked[188];
assign N268 = N267 | data_masked[287];
assign N267 = data_masked[485] | data_masked[386];
assign data_o[90] = N272 | data_masked[90];
assign N272 = N271 | data_masked[189];
assign N271 = N270 | data_masked[288];
assign N270 = data_masked[486] | data_masked[387];
assign data_o[91] = N275 | data_masked[91];
assign N275 = N274 | data_masked[190];
assign N274 = N273 | data_masked[289];
assign N273 = data_masked[487] | data_masked[388];
assign data_o[92] = N278 | data_masked[92];
assign N278 = N277 | data_masked[191];
assign N277 = N276 | data_masked[290];
assign N276 = data_masked[488] | data_masked[389];
assign data_o[93] = N281 | data_masked[93];
assign N281 = N280 | data_masked[192];
assign N280 = N279 | data_masked[291];
assign N279 = data_masked[489] | data_masked[390];
assign data_o[94] = N284 | data_masked[94];
assign N284 = N283 | data_masked[193];
assign N283 = N282 | data_masked[292];
assign N282 = data_masked[490] | data_masked[391];
assign data_o[95] = N287 | data_masked[95];
assign N287 = N286 | data_masked[194];
assign N286 = N285 | data_masked[293];
assign N285 = data_masked[491] | data_masked[392];
assign data_o[96] = N290 | data_masked[96];
assign N290 = N289 | data_masked[195];
assign N289 = N288 | data_masked[294];
assign N288 = data_masked[492] | data_masked[393];
assign data_o[97] = N293 | data_masked[97];
assign N293 = N292 | data_masked[196];
assign N292 = N291 | data_masked[295];
assign N291 = data_masked[493] | data_masked[394];
assign data_o[98] = N296 | data_masked[98];
assign N296 = N295 | data_masked[197];
assign N295 = N294 | data_masked[296];
assign N294 = data_masked[494] | data_masked[395];
endmodule
|
module bsg_link_iddr_phy_width_p9
(
clk_i,
data_i,
data_r_o
);
input [8:0] data_i;
output [17:0] data_r_o;
input clk_i;
wire [17:0] data_r_o;
wire N0;
wire [8:0] data_p_r,data_n_r;
reg data_p_r_8_sv2v_reg,data_p_r_7_sv2v_reg,data_p_r_6_sv2v_reg,data_p_r_5_sv2v_reg,
data_p_r_4_sv2v_reg,data_p_r_3_sv2v_reg,data_p_r_2_sv2v_reg,data_p_r_1_sv2v_reg,
data_p_r_0_sv2v_reg,data_n_r_8_sv2v_reg,data_n_r_7_sv2v_reg,data_n_r_6_sv2v_reg,
data_n_r_5_sv2v_reg,data_n_r_4_sv2v_reg,data_n_r_3_sv2v_reg,data_n_r_2_sv2v_reg,
data_n_r_1_sv2v_reg,data_n_r_0_sv2v_reg,data_r_o_17_sv2v_reg,
data_r_o_16_sv2v_reg,data_r_o_15_sv2v_reg,data_r_o_14_sv2v_reg,data_r_o_13_sv2v_reg,
data_r_o_12_sv2v_reg,data_r_o_11_sv2v_reg,data_r_o_10_sv2v_reg,data_r_o_9_sv2v_reg,
data_r_o_8_sv2v_reg,data_r_o_7_sv2v_reg,data_r_o_6_sv2v_reg,data_r_o_5_sv2v_reg,
data_r_o_4_sv2v_reg,data_r_o_3_sv2v_reg,data_r_o_2_sv2v_reg,data_r_o_1_sv2v_reg,
data_r_o_0_sv2v_reg;
assign data_p_r[8] = data_p_r_8_sv2v_reg;
assign data_p_r[7] = data_p_r_7_sv2v_reg;
assign data_p_r[6] = data_p_r_6_sv2v_reg;
assign data_p_r[5] = data_p_r_5_sv2v_reg;
assign data_p_r[4] = data_p_r_4_sv2v_reg;
assign data_p_r[3] = data_p_r_3_sv2v_reg;
assign data_p_r[2] = data_p_r_2_sv2v_reg;
assign data_p_r[1] = data_p_r_1_sv2v_reg;
assign data_p_r[0] = data_p_r_0_sv2v_reg;
assign data_n_r[8] = data_n_r_8_sv2v_reg;
assign data_n_r[7] = data_n_r_7_sv2v_reg;
assign data_n_r[6] = data_n_r_6_sv2v_reg;
assign data_n_r[5] = data_n_r_5_sv2v_reg;
assign data_n_r[4] = data_n_r_4_sv2v_reg;
assign data_n_r[3] = data_n_r_3_sv2v_reg;
assign data_n_r[2] = data_n_r_2_sv2v_reg;
assign data_n_r[1] = data_n_r_1_sv2v_reg;
assign data_n_r[0] = data_n_r_0_sv2v_reg;
assign data_r_o[17] = data_r_o_17_sv2v_reg;
assign data_r_o[16] = data_r_o_16_sv2v_reg;
assign data_r_o[15] = data_r_o_15_sv2v_reg;
assign data_r_o[14] = data_r_o_14_sv2v_reg;
assign data_r_o[13] = data_r_o_13_sv2v_reg;
assign data_r_o[12] = data_r_o_12_sv2v_reg;
assign data_r_o[11] = data_r_o_11_sv2v_reg;
assign data_r_o[10] = data_r_o_10_sv2v_reg;
assign data_r_o[9] = data_r_o_9_sv2v_reg;
assign data_r_o[8] = data_r_o_8_sv2v_reg;
assign data_r_o[7] = data_r_o_7_sv2v_reg;
assign data_r_o[6] = data_r_o_6_sv2v_reg;
assign data_r_o[5] = data_r_o_5_sv2v_reg;
assign data_r_o[4] = data_r_o_4_sv2v_reg;
assign data_r_o[3] = data_r_o_3_sv2v_reg;
assign data_r_o[2] = data_r_o_2_sv2v_reg;
assign data_r_o[1] = data_r_o_1_sv2v_reg;
assign data_r_o[0] = data_r_o_0_sv2v_reg;
always @(posedge clk_i) begin
if(1'b1) begin
data_p_r_8_sv2v_reg <= data_i[8];
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_p_r_7_sv2v_reg <= data_i[7];
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_p_r_6_sv2v_reg <= data_i[6];
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_p_r_5_sv2v_reg <= data_i[5];
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_p_r_4_sv2v_reg <= data_i[4];
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_p_r_3_sv2v_reg <= data_i[3];
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_p_r_2_sv2v_reg <= data_i[2];
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_p_r_1_sv2v_reg <= data_i[1];
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_p_r_0_sv2v_reg <= data_i[0];
end
end
always @(posedge N0) begin
if(1'b1) begin
data_n_r_8_sv2v_reg <= data_i[8];
end
end
always @(posedge N0) begin
if(1'b1) begin
data_n_r_7_sv2v_reg <= data_i[7];
end
end
always @(posedge N0) begin
if(1'b1) begin
data_n_r_6_sv2v_reg <= data_i[6];
end
end
always @(posedge N0) begin
if(1'b1) begin
data_n_r_5_sv2v_reg <= data_i[5];
end
end
always @(posedge N0) begin
if(1'b1) begin
data_n_r_4_sv2v_reg <= data_i[4];
end
end
always @(posedge N0) begin
if(1'b1) begin
data_n_r_3_sv2v_reg <= data_i[3];
end
end
always @(posedge N0) begin
if(1'b1) begin
data_n_r_2_sv2v_reg <= data_i[2];
end
end
always @(posedge N0) begin
if(1'b1) begin
data_n_r_1_sv2v_reg <= data_i[1];
end
end
always @(posedge N0) begin
if(1'b1) begin
data_n_r_0_sv2v_reg <= data_i[0];
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_r_o_17_sv2v_reg <= data_n_r[8];
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_r_o_16_sv2v_reg <= data_n_r[7];
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_r_o_15_sv2v_reg <= data_n_r[6];
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_r_o_14_sv2v_reg <= data_n_r[5];
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_r_o_13_sv2v_reg <= data_n_r[4];
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_r_o_12_sv2v_reg <= data_n_r[3];
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_r_o_11_sv2v_reg <= data_n_r[2];
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_r_o_10_sv2v_reg <= data_n_r[1];
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_r_o_9_sv2v_reg <= data_n_r[0];
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_r_o_8_sv2v_reg <= data_p_r[8];
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_r_o_7_sv2v_reg <= data_p_r[7];
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_r_o_6_sv2v_reg <= data_p_r[6];
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_r_o_5_sv2v_reg <= data_p_r[5];
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_r_o_4_sv2v_reg <= data_p_r[4];
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_r_o_3_sv2v_reg <= data_p_r[3];
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_r_o_2_sv2v_reg <= data_p_r[2];
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_r_o_1_sv2v_reg <= data_p_r[1];
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_r_o_0_sv2v_reg <= data_p_r[0];
end
end
assign N0 = ~clk_i;
endmodule
|
module bsg_dff_reset_width_p32
(
clk_i,
reset_i,
data_i,
data_o
);
input [31:0] data_i;
output [31:0] data_o;
input clk_i;
input reset_i;
wire [31:0] data_o;
wire N0,N1,N2,N3,N4,N5,N6,N7,N8,N9,N10,N11,N12,N13,N14,N15,N16,N17,N18,N19,N20,N21,
N22,N23,N24,N25,N26,N27,N28,N29,N30,N31,N32,N33,N34;
reg data_o_31_sv2v_reg,data_o_30_sv2v_reg,data_o_29_sv2v_reg,data_o_28_sv2v_reg,
data_o_27_sv2v_reg,data_o_26_sv2v_reg,data_o_25_sv2v_reg,data_o_24_sv2v_reg,
data_o_23_sv2v_reg,data_o_22_sv2v_reg,data_o_21_sv2v_reg,data_o_20_sv2v_reg,
data_o_19_sv2v_reg,data_o_18_sv2v_reg,data_o_17_sv2v_reg,data_o_16_sv2v_reg,
data_o_15_sv2v_reg,data_o_14_sv2v_reg,data_o_13_sv2v_reg,data_o_12_sv2v_reg,data_o_11_sv2v_reg,
data_o_10_sv2v_reg,data_o_9_sv2v_reg,data_o_8_sv2v_reg,data_o_7_sv2v_reg,
data_o_6_sv2v_reg,data_o_5_sv2v_reg,data_o_4_sv2v_reg,data_o_3_sv2v_reg,
data_o_2_sv2v_reg,data_o_1_sv2v_reg,data_o_0_sv2v_reg;
assign data_o[31] = data_o_31_sv2v_reg;
assign data_o[30] = data_o_30_sv2v_reg;
assign data_o[29] = data_o_29_sv2v_reg;
assign data_o[28] = data_o_28_sv2v_reg;
assign data_o[27] = data_o_27_sv2v_reg;
assign data_o[26] = data_o_26_sv2v_reg;
assign data_o[25] = data_o_25_sv2v_reg;
assign data_o[24] = data_o_24_sv2v_reg;
assign data_o[23] = data_o_23_sv2v_reg;
assign data_o[22] = data_o_22_sv2v_reg;
assign data_o[21] = data_o_21_sv2v_reg;
assign data_o[20] = data_o_20_sv2v_reg;
assign data_o[19] = data_o_19_sv2v_reg;
assign data_o[18] = data_o_18_sv2v_reg;
assign data_o[17] = data_o_17_sv2v_reg;
assign data_o[16] = data_o_16_sv2v_reg;
assign data_o[15] = data_o_15_sv2v_reg;
assign data_o[14] = data_o_14_sv2v_reg;
assign data_o[13] = data_o_13_sv2v_reg;
assign data_o[12] = data_o_12_sv2v_reg;
assign data_o[11] = data_o_11_sv2v_reg;
assign data_o[10] = data_o_10_sv2v_reg;
assign data_o[9] = data_o_9_sv2v_reg;
assign data_o[8] = data_o_8_sv2v_reg;
assign data_o[7] = data_o_7_sv2v_reg;
assign data_o[6] = data_o_6_sv2v_reg;
assign data_o[5] = data_o_5_sv2v_reg;
assign data_o[4] = data_o_4_sv2v_reg;
assign data_o[3] = data_o_3_sv2v_reg;
assign data_o[2] = data_o_2_sv2v_reg;
assign data_o[1] = data_o_1_sv2v_reg;
assign data_o[0] = data_o_0_sv2v_reg;
always @(posedge clk_i) begin
if(1'b1) begin
data_o_31_sv2v_reg <= N34;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_30_sv2v_reg <= N33;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_29_sv2v_reg <= N32;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_28_sv2v_reg <= N31;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_27_sv2v_reg <= N30;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_26_sv2v_reg <= N29;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_25_sv2v_reg <= N28;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_24_sv2v_reg <= N27;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_23_sv2v_reg <= N26;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_22_sv2v_reg <= N25;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_21_sv2v_reg <= N24;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_20_sv2v_reg <= N23;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_19_sv2v_reg <= N22;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_18_sv2v_reg <= N21;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_17_sv2v_reg <= N20;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_16_sv2v_reg <= N19;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_15_sv2v_reg <= N18;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_14_sv2v_reg <= N17;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_13_sv2v_reg <= N16;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_12_sv2v_reg <= N15;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_11_sv2v_reg <= N14;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_10_sv2v_reg <= N13;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_9_sv2v_reg <= N12;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_8_sv2v_reg <= N11;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_7_sv2v_reg <= N10;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_6_sv2v_reg <= N9;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_5_sv2v_reg <= N8;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_4_sv2v_reg <= N7;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_3_sv2v_reg <= N6;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_2_sv2v_reg <= N5;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_1_sv2v_reg <= N4;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_0_sv2v_reg <= N3;
end
end
assign { N34, N33, N32, N31, N30, N29, N28, N27, N26, N25, N24, N23, N22, N21, N20, N19, N18, N17, N16, N15, N14, N13, N12, N11, N10, N9, N8, N7, N6, N5, N4, N3 } = (N0)? { 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0 } :
(N1)? data_i : 1'b0;
assign N0 = reset_i;
assign N1 = N2;
assign N2 = ~reset_i;
endmodule
|
module bp_me_lce_id_to_cord_05
(
lce_id_i,
lce_cord_o,
lce_cid_o
);
input [5:0] lce_id_i;
output [4:0] lce_cord_o;
output [1:0] lce_cid_o;
wire [4:0] lce_cord_o;
wire [1:0] lce_cid_o;
wire N0,N1,N2,N3,N4,N5,N6,N7;
assign lce_cord_o[1] = 1'b0;
assign lce_cid_o[1] = 1'b0;
assign { N5, N4, N3 } = 1'b1 + lce_id_i[4:2];
assign { lce_cord_o[4:2], lce_cord_o[0:0] } = (N0)? { N5, N4, N3, lce_id_i[1:1] } :
(N1)? { 1'b0, 1'b0, 1'b0, lce_id_i[0:0] } : 1'b0;
assign N0 = N2;
assign N1 = N7;
assign lce_cid_o[0] = (N0)? lce_id_i[0] :
(N1)? 1'b0 : 1'b0;
assign N2 = ~N7;
assign N7 = N6 | lce_id_i[3];
assign N6 = lce_id_i[5] | lce_id_i[4];
endmodule
|
module bsg_dff_reset_3
(
clk_i,
reset_i,
data_i,
data_o
);
input [2:0] data_i;
output [2:0] data_o;
input clk_i;
input reset_i;
wire [2:0] data_o;
wire N0,N1,N2,N3,N4,N5;
reg data_o_2_sv2v_reg,data_o_1_sv2v_reg,data_o_0_sv2v_reg;
assign data_o[2] = data_o_2_sv2v_reg;
assign data_o[1] = data_o_1_sv2v_reg;
assign data_o[0] = data_o_0_sv2v_reg;
always @(posedge clk_i) begin
if(1'b1) begin
data_o_2_sv2v_reg <= N5;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_1_sv2v_reg <= N4;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_0_sv2v_reg <= N3;
end
end
assign { N5, N4, N3 } = (N0)? { 1'b0, 1'b0, 1'b0 } :
(N1)? data_i : 1'b0;
assign N0 = reset_i;
assign N1 = N2;
assign N2 = ~reset_i;
endmodule
|
module bsg_round_robin_arb_inputs_p4
(
clk_i,
reset_i,
grants_en_i,
reqs_i,
grants_o,
sel_one_hot_o,
v_o,
tag_o,
yumi_i
);
input [3:0] reqs_i;
output [3:0] grants_o;
output [3:0] sel_one_hot_o;
output [1:0] tag_o;
input clk_i;
input reset_i;
input grants_en_i;
input yumi_i;
output v_o;
wire [3:0] grants_o,sel_one_hot_o;
wire [1:0] tag_o,last_r;
wire v_o,N0,N1,N2,N3,N4,N5,N6,N7,N8,N9,N10,N11,N12,N13,N14,N15,N16,N17,N18,N19,N20,
N21,N22,N23,N24,N25,N26,N27,N28,N29,N30,N31,N32,N33,N34,N35,N36,N37,N38,N39,N40,
N41,N42,N43,N44,N45,N46,N47,N48,N49,N50,N51,N52,N53,N54,N55,N56,N57,N58,N59,N60,
N61,N62,N63,N64,N65,N66,N67,N68,N69,N70,N71,N72,N73,N74,N75,N76,N77,N78,N79,N80,
N81,N82,N83,N84,N85,N86,N87,N88,N89,N90,N91,N92,N93,N94,N95,N96,N97,N98,N99,N100,
N101,N102,N103;
reg last_r_1_sv2v_reg,last_r_0_sv2v_reg;
assign last_r[1] = last_r_1_sv2v_reg;
assign last_r[0] = last_r_0_sv2v_reg;
always @(posedge clk_i) begin
if(N101) begin
last_r_1_sv2v_reg <= N99;
end
end
always @(posedge clk_i) begin
if(N101) begin
last_r_0_sv2v_reg <= N98;
end
end
assign N79 = N0 & N1 & (N2 & N3);
assign N0 = ~reqs_i[1];
assign N1 = ~reqs_i[2];
assign N2 = ~reqs_i[0];
assign N3 = ~reqs_i[3];
assign N80 = reqs_i[1] & N4 & N5;
assign N4 = ~last_r[0];
assign N5 = ~last_r[1];
assign N81 = N6 & reqs_i[2] & (N7 & N8);
assign N6 = ~reqs_i[1];
assign N7 = ~last_r[0];
assign N8 = ~last_r[1];
assign N82 = N9 & N10 & (reqs_i[3] & N11) & N12;
assign N9 = ~reqs_i[1];
assign N10 = ~reqs_i[2];
assign N11 = ~last_r[0];
assign N12 = ~last_r[1];
assign N13 = N17 & N18;
assign N14 = N13 & reqs_i[0];
assign N15 = N14 & N19;
assign N16 = N15 & N20;
assign N83 = N16 & N21;
assign N17 = ~reqs_i[1];
assign N18 = ~reqs_i[2];
assign N19 = ~reqs_i[3];
assign N20 = ~last_r[0];
assign N21 = ~last_r[1];
assign N84 = reqs_i[2] & last_r[0] & N22;
assign N22 = ~last_r[1];
assign N85 = N23 & reqs_i[3] & (last_r[0] & N24);
assign N23 = ~reqs_i[2];
assign N24 = ~last_r[1];
assign N86 = N25 & reqs_i[0] & (N26 & last_r[0]) & N27;
assign N25 = ~reqs_i[2];
assign N26 = ~reqs_i[3];
assign N27 = ~last_r[1];
assign N28 = reqs_i[1] & N32;
assign N29 = N28 & N33;
assign N30 = N29 & N34;
assign N31 = N30 & last_r[0];
assign N87 = N31 & N35;
assign N32 = ~reqs_i[2];
assign N33 = ~reqs_i[0];
assign N34 = ~reqs_i[3];
assign N35 = ~last_r[1];
assign N88 = reqs_i[3] & N36 & last_r[1];
assign N36 = ~last_r[0];
assign N89 = reqs_i[0] & N37 & (N38 & last_r[1]);
assign N37 = ~reqs_i[3];
assign N38 = ~last_r[0];
assign N90 = reqs_i[1] & N39 & (N40 & N41) & last_r[1];
assign N39 = ~reqs_i[0];
assign N40 = ~reqs_i[3];
assign N41 = ~last_r[0];
assign N42 = N46 & reqs_i[2];
assign N43 = N42 & N47;
assign N44 = N43 & N48;
assign N45 = N44 & N49;
assign N91 = N45 & last_r[1];
assign N46 = ~reqs_i[1];
assign N47 = ~reqs_i[0];
assign N48 = ~reqs_i[3];
assign N49 = ~last_r[0];
assign N92 = reqs_i[0] & last_r[0] & last_r[1];
assign N93 = reqs_i[1] & N50 & (last_r[0] & last_r[1]);
assign N50 = ~reqs_i[0];
assign N94 = N51 & reqs_i[2] & (N52 & last_r[0]) & last_r[1];
assign N51 = ~reqs_i[1];
assign N52 = ~reqs_i[0];
assign N53 = N57 & N58;
assign N54 = N53 & N59;
assign N55 = N54 & reqs_i[3];
assign N56 = N55 & last_r[0];
assign N95 = N56 & last_r[1];
assign N57 = ~reqs_i[1];
assign N58 = ~reqs_i[2];
assign N59 = ~reqs_i[0];
assign sel_one_hot_o = (N60)? { 1'b0, 1'b0, 1'b0, 1'b0 } :
(N61)? { 1'b0, 1'b0, 1'b1, 1'b0 } :
(N62)? { 1'b0, 1'b1, 1'b0, 1'b0 } :
(N63)? { 1'b1, 1'b0, 1'b0, 1'b0 } :
(N64)? { 1'b0, 1'b0, 1'b0, 1'b1 } :
(N65)? { 1'b0, 1'b1, 1'b0, 1'b0 } :
(N66)? { 1'b1, 1'b0, 1'b0, 1'b0 } :
(N67)? { 1'b0, 1'b0, 1'b0, 1'b1 } :
(N68)? { 1'b0, 1'b0, 1'b1, 1'b0 } :
(N69)? { 1'b1, 1'b0, 1'b0, 1'b0 } :
(N70)? { 1'b0, 1'b0, 1'b0, 1'b1 } :
(N71)? { 1'b0, 1'b0, 1'b1, 1'b0 } :
(N72)? { 1'b0, 1'b1, 1'b0, 1'b0 } :
(N73)? { 1'b0, 1'b0, 1'b0, 1'b1 } :
(N74)? { 1'b0, 1'b0, 1'b1, 1'b0 } :
(N75)? { 1'b0, 1'b1, 1'b0, 1'b0 } :
(N76)? { 1'b1, 1'b0, 1'b0, 1'b0 } : 1'b0;
assign N60 = N79;
assign N61 = N80;
assign N62 = N81;
assign N63 = N82;
assign N64 = N83;
assign N65 = N84;
assign N66 = N85;
assign N67 = N86;
assign N68 = N87;
assign N69 = N88;
assign N70 = N89;
assign N71 = N90;
assign N72 = N91;
assign N73 = N92;
assign N74 = N93;
assign N75 = N94;
assign N76 = N95;
assign tag_o = (N60)? { 1'b0, 1'b0 } :
(N61)? { 1'b0, 1'b1 } :
(N62)? { 1'b1, 1'b0 } :
(N63)? { 1'b1, 1'b1 } :
(N64)? { 1'b0, 1'b0 } :
(N65)? { 1'b1, 1'b0 } :
(N66)? { 1'b1, 1'b1 } :
(N67)? { 1'b0, 1'b0 } :
(N68)? { 1'b0, 1'b1 } :
(N69)? { 1'b1, 1'b1 } :
(N70)? { 1'b0, 1'b0 } :
(N71)? { 1'b0, 1'b1 } :
(N72)? { 1'b1, 1'b0 } :
(N73)? { 1'b0, 1'b0 } :
(N74)? { 1'b0, 1'b1 } :
(N75)? { 1'b1, 1'b0 } :
(N76)? { 1'b1, 1'b1 } : 1'b0;
assign { N99, N98 } = (N77)? { 1'b0, 1'b0 } :
(N78)? tag_o : 1'b0;
assign N77 = reset_i;
assign N78 = N97;
assign grants_o[3] = sel_one_hot_o[3] & grants_en_i;
assign grants_o[2] = sel_one_hot_o[2] & grants_en_i;
assign grants_o[1] = sel_one_hot_o[1] & grants_en_i;
assign grants_o[0] = sel_one_hot_o[0] & grants_en_i;
assign v_o = N103 | reqs_i[0];
assign N103 = N102 | reqs_i[1];
assign N102 = reqs_i[3] | reqs_i[2];
assign N96 = ~yumi_i;
assign N97 = ~reset_i;
assign N100 = N96 & N97;
assign N101 = ~N100;
endmodule
|
module bsg_dff_reset_width_p1
(
clk_i,
reset_i,
data_i,
data_o
);
input [0:0] data_i;
output [0:0] data_o;
input clk_i;
input reset_i;
wire [0:0] data_o;
wire N0,N1,N2,N3;
reg data_o_0_sv2v_reg;
assign data_o[0] = data_o_0_sv2v_reg;
always @(posedge clk_i) begin
if(1'b1) begin
data_o_0_sv2v_reg <= N3;
end
end
assign N3 = (N0)? 1'b0 :
(N1)? data_i[0] : 1'b0;
assign N0 = reset_i;
assign N1 = N2;
assign N2 = ~reset_i;
endmodule
|
module bsg_dff_reset_width_p39
(
clk_i,
reset_i,
data_i,
data_o
);
input [38:0] data_i;
output [38:0] data_o;
input clk_i;
input reset_i;
wire [38:0] data_o;
wire N0,N1,N2,N3,N4,N5,N6,N7,N8,N9,N10,N11,N12,N13,N14,N15,N16,N17,N18,N19,N20,N21,
N22,N23,N24,N25,N26,N27,N28,N29,N30,N31,N32,N33,N34,N35,N36,N37,N38,N39,N40,N41;
reg data_o_38_sv2v_reg,data_o_37_sv2v_reg,data_o_36_sv2v_reg,data_o_35_sv2v_reg,
data_o_34_sv2v_reg,data_o_33_sv2v_reg,data_o_32_sv2v_reg,data_o_31_sv2v_reg,
data_o_30_sv2v_reg,data_o_29_sv2v_reg,data_o_28_sv2v_reg,data_o_27_sv2v_reg,
data_o_26_sv2v_reg,data_o_25_sv2v_reg,data_o_24_sv2v_reg,data_o_23_sv2v_reg,
data_o_22_sv2v_reg,data_o_21_sv2v_reg,data_o_20_sv2v_reg,data_o_19_sv2v_reg,data_o_18_sv2v_reg,
data_o_17_sv2v_reg,data_o_16_sv2v_reg,data_o_15_sv2v_reg,data_o_14_sv2v_reg,
data_o_13_sv2v_reg,data_o_12_sv2v_reg,data_o_11_sv2v_reg,data_o_10_sv2v_reg,
data_o_9_sv2v_reg,data_o_8_sv2v_reg,data_o_7_sv2v_reg,data_o_6_sv2v_reg,
data_o_5_sv2v_reg,data_o_4_sv2v_reg,data_o_3_sv2v_reg,data_o_2_sv2v_reg,data_o_1_sv2v_reg,
data_o_0_sv2v_reg;
assign data_o[38] = data_o_38_sv2v_reg;
assign data_o[37] = data_o_37_sv2v_reg;
assign data_o[36] = data_o_36_sv2v_reg;
assign data_o[35] = data_o_35_sv2v_reg;
assign data_o[34] = data_o_34_sv2v_reg;
assign data_o[33] = data_o_33_sv2v_reg;
assign data_o[32] = data_o_32_sv2v_reg;
assign data_o[31] = data_o_31_sv2v_reg;
assign data_o[30] = data_o_30_sv2v_reg;
assign data_o[29] = data_o_29_sv2v_reg;
assign data_o[28] = data_o_28_sv2v_reg;
assign data_o[27] = data_o_27_sv2v_reg;
assign data_o[26] = data_o_26_sv2v_reg;
assign data_o[25] = data_o_25_sv2v_reg;
assign data_o[24] = data_o_24_sv2v_reg;
assign data_o[23] = data_o_23_sv2v_reg;
assign data_o[22] = data_o_22_sv2v_reg;
assign data_o[21] = data_o_21_sv2v_reg;
assign data_o[20] = data_o_20_sv2v_reg;
assign data_o[19] = data_o_19_sv2v_reg;
assign data_o[18] = data_o_18_sv2v_reg;
assign data_o[17] = data_o_17_sv2v_reg;
assign data_o[16] = data_o_16_sv2v_reg;
assign data_o[15] = data_o_15_sv2v_reg;
assign data_o[14] = data_o_14_sv2v_reg;
assign data_o[13] = data_o_13_sv2v_reg;
assign data_o[12] = data_o_12_sv2v_reg;
assign data_o[11] = data_o_11_sv2v_reg;
assign data_o[10] = data_o_10_sv2v_reg;
assign data_o[9] = data_o_9_sv2v_reg;
assign data_o[8] = data_o_8_sv2v_reg;
assign data_o[7] = data_o_7_sv2v_reg;
assign data_o[6] = data_o_6_sv2v_reg;
assign data_o[5] = data_o_5_sv2v_reg;
assign data_o[4] = data_o_4_sv2v_reg;
assign data_o[3] = data_o_3_sv2v_reg;
assign data_o[2] = data_o_2_sv2v_reg;
assign data_o[1] = data_o_1_sv2v_reg;
assign data_o[0] = data_o_0_sv2v_reg;
always @(posedge clk_i) begin
if(1'b1) begin
data_o_38_sv2v_reg <= N41;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_37_sv2v_reg <= N40;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_36_sv2v_reg <= N39;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_35_sv2v_reg <= N38;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_34_sv2v_reg <= N37;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_33_sv2v_reg <= N36;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_32_sv2v_reg <= N35;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_31_sv2v_reg <= N34;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_30_sv2v_reg <= N33;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_29_sv2v_reg <= N32;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_28_sv2v_reg <= N31;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_27_sv2v_reg <= N30;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_26_sv2v_reg <= N29;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_25_sv2v_reg <= N28;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_24_sv2v_reg <= N27;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_23_sv2v_reg <= N26;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_22_sv2v_reg <= N25;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_21_sv2v_reg <= N24;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_20_sv2v_reg <= N23;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_19_sv2v_reg <= N22;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_18_sv2v_reg <= N21;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_17_sv2v_reg <= N20;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_16_sv2v_reg <= N19;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_15_sv2v_reg <= N18;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_14_sv2v_reg <= N17;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_13_sv2v_reg <= N16;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_12_sv2v_reg <= N15;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_11_sv2v_reg <= N14;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_10_sv2v_reg <= N13;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_9_sv2v_reg <= N12;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_8_sv2v_reg <= N11;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_7_sv2v_reg <= N10;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_6_sv2v_reg <= N9;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_5_sv2v_reg <= N8;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_4_sv2v_reg <= N7;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_3_sv2v_reg <= N6;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_2_sv2v_reg <= N5;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_1_sv2v_reg <= N4;
end
end
always @(posedge clk_i) begin
if(1'b1) begin
data_o_0_sv2v_reg <= N3;
end
end
assign { N41, N40, N39, N38, N37, N36, N35, N34, N33, N32, N31, N30, N29, N28, N27, N26, N25, N24, N23, N22, N21, N20, N19, N18, N17, N16, N15, N14, N13, N12, N11, N10, N9, N8, N7, N6, N5, N4, N3 } = (N0)? { 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0 } :
(N1)? data_i : 1'b0;
assign N0 = reset_i;
assign N1 = N2;
assign N2 = ~reset_i;
endmodule
|
module bsg_nand_width_p5_harden_p1
(
a_i,
b_i,
o
);
input [4:0] a_i;
input [4:0] b_i;
output [4:0] o;
wire [4:0] o;
wire N0,N1,N2,N3,N4;
assign o[4] = ~N0;
assign N0 = a_i[4] & b_i[4];
assign o[3] = ~N1;
assign N1 = a_i[3] & b_i[3];
assign o[2] = ~N2;
assign N2 = a_i[2] & b_i[2];
assign o[1] = ~N3;
assign N3 = a_i[1] & b_i[1];
assign o[0] = ~N4;
assign N4 = a_i[0] & b_i[0];
endmodule
|
module bsg_sync_sync_1_unit
(
oclk_i,
iclk_data_i,
oclk_data_o
);
input [0:0] iclk_data_i;
output [0:0] oclk_data_o;
input oclk_i;
wire [0:0] oclk_data_o,bsg_SYNC_1_r;
reg bsg_SYNC_1_r_0_sv2v_reg,oclk_data_o_0_sv2v_reg;
assign bsg_SYNC_1_r[0] = bsg_SYNC_1_r_0_sv2v_reg;
assign oclk_data_o[0] = oclk_data_o_0_sv2v_reg;
always @(posedge oclk_i) begin
if(1'b1) begin
bsg_SYNC_1_r_0_sv2v_reg <= iclk_data_i[0];
end
end
always @(posedge oclk_i) begin
if(1'b1) begin
oclk_data_o_0_sv2v_reg <= bsg_SYNC_1_r[0];
end
end
endmodule
|
module bsg_array_concentrate_static_1d_128
(
i,
o
);
input [639:0] i;
output [511:0] o;
wire [511:0] o;
assign o[511] = i[639];
assign o[510] = i[638];
assign o[509] = i[637];
assign o[508] = i[636];
assign o[507] = i[635];
assign o[506] = i[634];
assign o[505] = i[633];
assign o[504] = i[632];
assign o[503] = i[631];
assign o[502] = i[630];
assign o[501] = i[629];
assign o[500] = i[628];
assign o[499] = i[627];
assign o[498] = i[626];
assign o[497] = i[625];
assign o[496] = i[624];
assign o[495] = i[623];
assign o[494] = i[622];
assign o[493] = i[621];
assign o[492] = i[620];
assign o[491] = i[619];
assign o[490] = i[618];
assign o[489] = i[617];
assign o[488] = i[616];
assign o[487] = i[615];
assign o[486] = i[614];
assign o[485] = i[613];
assign o[484] = i[612];
assign o[483] = i[611];
assign o[482] = i[610];
assign o[481] = i[609];
assign o[480] = i[608];
assign o[479] = i[607];
assign o[478] = i[606];
assign o[477] = i[605];
assign o[476] = i[604];
assign o[475] = i[603];
assign o[474] = i[602];
assign o[473] = i[601];
assign o[472] = i[600];
assign o[471] = i[599];
assign o[470] = i[598];
assign o[469] = i[597];
assign o[468] = i[596];
assign o[467] = i[595];
assign o[466] = i[594];
assign o[465] = i[593];
assign o[464] = i[592];
assign o[463] = i[591];
assign o[462] = i[590];
assign o[461] = i[589];
assign o[460] = i[588];
assign o[459] = i[587];
assign o[458] = i[586];
assign o[457] = i[585];
assign o[456] = i[584];
assign o[455] = i[583];
assign o[454] = i[582];
assign o[453] = i[581];
assign o[452] = i[580];
assign o[451] = i[579];
assign o[450] = i[578];
assign o[449] = i[577];
assign o[448] = i[576];
assign o[447] = i[575];
assign o[446] = i[574];
assign o[445] = i[573];
assign o[444] = i[572];
assign o[443] = i[571];
assign o[442] = i[570];
assign o[441] = i[569];
assign o[440] = i[568];
assign o[439] = i[567];
assign o[438] = i[566];
assign o[437] = i[565];
assign o[436] = i[564];
assign o[435] = i[563];
assign o[434] = i[562];
assign o[433] = i[561];
assign o[432] = i[560];
assign o[431] = i[559];
assign o[430] = i[558];
assign o[429] = i[557];
assign o[428] = i[556];
assign o[427] = i[555];
assign o[426] = i[554];
assign o[425] = i[553];
assign o[424] = i[552];
assign o[423] = i[551];
assign o[422] = i[550];
assign o[421] = i[549];
assign o[420] = i[548];
assign o[419] = i[547];
assign o[418] = i[546];
assign o[417] = i[545];
assign o[416] = i[544];
assign o[415] = i[543];
assign o[414] = i[542];
assign o[413] = i[541];
assign o[412] = i[540];
assign o[411] = i[539];
assign o[410] = i[538];
assign o[409] = i[537];
assign o[408] = i[536];
assign o[407] = i[535];
assign o[406] = i[534];
assign o[405] = i[533];
assign o[404] = i[532];
assign o[403] = i[531];
assign o[402] = i[530];
assign o[401] = i[529];
assign o[400] = i[528];
assign o[399] = i[527];
assign o[398] = i[526];
assign o[397] = i[525];
assign o[396] = i[524];
assign o[395] = i[523];
assign o[394] = i[522];
assign o[393] = i[521];
assign o[392] = i[520];
assign o[391] = i[519];
assign o[390] = i[518];
assign o[389] = i[517];
assign o[388] = i[516];
assign o[387] = i[515];
assign o[386] = i[514];
assign o[385] = i[513];
assign o[384] = i[512];
assign o[383] = i[511];
assign o[382] = i[510];
assign o[381] = i[509];
assign o[380] = i[508];
assign o[379] = i[507];
assign o[378] = i[506];
assign o[377] = i[505];
assign o[376] = i[504];
assign o[375] = i[503];
assign o[374] = i[502];
assign o[373] = i[501];
assign o[372] = i[500];
assign o[371] = i[499];
assign o[370] = i[498];
assign o[369] = i[497];
assign o[368] = i[496];
assign o[367] = i[495];
assign o[366] = i[494];
assign o[365] = i[493];
assign o[364] = i[492];
assign o[363] = i[491];
assign o[362] = i[490];
assign o[361] = i[489];
assign o[360] = i[488];
assign o[359] = i[487];
assign o[358] = i[486];
assign o[357] = i[485];
assign o[356] = i[484];
assign o[355] = i[483];
assign o[354] = i[482];
assign o[353] = i[481];
assign o[352] = i[480];
assign o[351] = i[479];
assign o[350] = i[478];
assign o[349] = i[477];
assign o[348] = i[476];
assign o[347] = i[475];
assign o[346] = i[474];
assign o[345] = i[473];
assign o[344] = i[472];
assign o[343] = i[471];
assign o[342] = i[470];
assign o[341] = i[469];
assign o[340] = i[468];
assign o[339] = i[467];
assign o[338] = i[466];
assign o[337] = i[465];
assign o[336] = i[464];
assign o[335] = i[463];
assign o[334] = i[462];
assign o[333] = i[461];
assign o[332] = i[460];
assign o[331] = i[459];
assign o[330] = i[458];
assign o[329] = i[457];
assign o[328] = i[456];
assign o[327] = i[455];
assign o[326] = i[454];
assign o[325] = i[453];
assign o[324] = i[452];
assign o[323] = i[451];
assign o[322] = i[450];
assign o[321] = i[449];
assign o[320] = i[448];
assign o[319] = i[447];
assign o[318] = i[446];
assign o[317] = i[445];
assign o[316] = i[444];
assign o[315] = i[443];
assign o[314] = i[442];
assign o[313] = i[441];
assign o[312] = i[440];
assign o[311] = i[439];
assign o[310] = i[438];
assign o[309] = i[437];
assign o[308] = i[436];
assign o[307] = i[435];
assign o[306] = i[434];
assign o[305] = i[433];
assign o[304] = i[432];
assign o[303] = i[431];
assign o[302] = i[430];
assign o[301] = i[429];
assign o[300] = i[428];
assign o[299] = i[427];
assign o[298] = i[426];
assign o[297] = i[425];
assign o[296] = i[424];
assign o[295] = i[423];
assign o[294] = i[422];
assign o[293] = i[421];
assign o[292] = i[420];
assign o[291] = i[419];
assign o[290] = i[418];
assign o[289] = i[417];
assign o[288] = i[416];
assign o[287] = i[415];
assign o[286] = i[414];
assign o[285] = i[413];
assign o[284] = i[412];
assign o[283] = i[411];
assign o[282] = i[410];
assign o[281] = i[409];
assign o[280] = i[408];
assign o[279] = i[407];
assign o[278] = i[406];
assign o[277] = i[405];
assign o[276] = i[404];
assign o[275] = i[403];
assign o[274] = i[402];
assign o[273] = i[401];
assign o[272] = i[400];
assign o[271] = i[399];
assign o[270] = i[398];
assign o[269] = i[397];
assign o[268] = i[396];
assign o[267] = i[395];
assign o[266] = i[394];
assign o[265] = i[393];
assign o[264] = i[392];
assign o[263] = i[391];
assign o[262] = i[390];
assign o[261] = i[389];
assign o[260] = i[388];
assign o[259] = i[387];
assign o[258] = i[386];
assign o[257] = i[385];
assign o[256] = i[384];
assign o[255] = i[383];
assign o[254] = i[382];
assign o[253] = i[381];
assign o[252] = i[380];
assign o[251] = i[379];
assign o[250] = i[378];
assign o[249] = i[377];
assign o[248] = i[376];
assign o[247] = i[375];
assign o[246] = i[374];
assign o[245] = i[373];
assign o[244] = i[372];
assign o[243] = i[371];
assign o[242] = i[370];
assign o[241] = i[369];
assign o[240] = i[368];
assign o[239] = i[367];
assign o[238] = i[366];
assign o[237] = i[365];
assign o[236] = i[364];
assign o[235] = i[363];
assign o[234] = i[362];
assign o[233] = i[361];
assign o[232] = i[360];
assign o[231] = i[359];
assign o[230] = i[358];
assign o[229] = i[357];
assign o[228] = i[356];
assign o[227] = i[355];
assign o[226] = i[354];
assign o[225] = i[353];
assign o[224] = i[352];
assign o[223] = i[351];
assign o[222] = i[350];
assign o[221] = i[349];
assign o[220] = i[348];
assign o[219] = i[347];
assign o[218] = i[346];
assign o[217] = i[345];
assign o[216] = i[344];
assign o[215] = i[343];
assign o[214] = i[342];
assign o[213] = i[341];
assign o[212] = i[340];
assign o[211] = i[339];
assign o[210] = i[338];
assign o[209] = i[337];
assign o[208] = i[336];
assign o[207] = i[335];
assign o[206] = i[334];
assign o[205] = i[333];
assign o[204] = i[332];
assign o[203] = i[331];
assign o[202] = i[330];
assign o[201] = i[329];
assign o[200] = i[328];
assign o[199] = i[327];
assign o[198] = i[326];
assign o[197] = i[325];
assign o[196] = i[324];
assign o[195] = i[323];
assign o[194] = i[322];
assign o[193] = i[321];
assign o[192] = i[320];
assign o[191] = i[319];
assign o[190] = i[318];
assign o[189] = i[317];
assign o[188] = i[316];
assign o[187] = i[315];
assign o[186] = i[314];
assign o[185] = i[313];
assign o[184] = i[312];
assign o[183] = i[311];
assign o[182] = i[310];
assign o[181] = i[309];
assign o[180] = i[308];
assign o[179] = i[307];
assign o[178] = i[306];
assign o[177] = i[305];
assign o[176] = i[304];
assign o[175] = i[303];
assign o[174] = i[302];
assign o[173] = i[301];
assign o[172] = i[300];
assign o[171] = i[299];
assign o[170] = i[298];
assign o[169] = i[297];
assign o[168] = i[296];
assign o[167] = i[295];
assign o[166] = i[294];
assign o[165] = i[293];
assign o[164] = i[292];
assign o[163] = i[291];
assign o[162] = i[290];
assign o[161] = i[289];
assign o[160] = i[288];
assign o[159] = i[287];
assign o[158] = i[286];
assign o[157] = i[285];
assign o[156] = i[284];
assign o[155] = i[283];
assign o[154] = i[282];
assign o[153] = i[281];
assign o[152] = i[280];
assign o[151] = i[279];
assign o[150] = i[278];
assign o[149] = i[277];
assign o[148] = i[276];
assign o[147] = i[275];
assign o[146] = i[274];
assign o[145] = i[273];
assign o[144] = i[272];
assign o[143] = i[271];
assign o[142] = i[270];
assign o[141] = i[269];
assign o[140] = i[268];
assign o[139] = i[267];
assign o[138] = i[266];
assign o[137] = i[265];
assign o[136] = i[264];
assign o[135] = i[263];
assign o[134] = i[262];
assign o[133] = i[261];
assign o[132] = i[260];
assign o[131] = i[259];
assign o[130] = i[258];
assign o[129] = i[257];
assign o[128] = i[256];
assign o[127] = i[127];
assign o[126] = i[126];
assign o[125] = i[125];
assign o[124] = i[124];
assign o[123] = i[123];
assign o[122] = i[122];
assign o[121] = i[121];
assign o[120] = i[120];
assign o[119] = i[119];
assign o[118] = i[118];
assign o[117] = i[117];
assign o[116] = i[116];
assign o[115] = i[115];
assign o[114] = i[114];
assign o[113] = i[113];
assign o[112] = i[112];
assign o[111] = i[111];
assign o[110] = i[110];
assign o[109] = i[109];
assign o[108] = i[108];
assign o[107] = i[107];
assign o[106] = i[106];
assign o[105] = i[105];
assign o[104] = i[104];
assign o[103] = i[103];
assign o[102] = i[102];
assign o[101] = i[101];
assign o[100] = i[100];
assign o[99] = i[99];
assign o[98] = i[98];
assign o[97] = i[97];
assign o[96] = i[96];
assign o[95] = i[95];
assign o[94] = i[94];
assign o[93] = i[93];
assign o[92] = i[92];
assign o[91] = i[91];
assign o[90] = i[90];
assign o[89] = i[89];
assign o[88] = i[88];
assign o[87] = i[87];
assign o[86] = i[86];
assign o[85] = i[85];
assign o[84] = i[84];
assign o[83] = i[83];
assign o[82] = i[82];
assign o[81] = i[81];
assign o[80] = i[80];
assign o[79] = i[79];
assign o[78] = i[78];
assign o[77] = i[77];
assign o[76] = i[76];
assign o[75] = i[75];
assign o[74] = i[74];
assign o[73] = i[73];
assign o[72] = i[72];
assign o[71] = i[71];
assign o[70] = i[70];
assign o[69] = i[69];
assign o[68] = i[68];
assign o[67] = i[67];
assign o[66] = i[66];
assign o[65] = i[65];
assign o[64] = i[64];
assign o[63] = i[63];
assign o[62] = i[62];
assign o[61] = i[61];
assign o[60] = i[60];
assign o[59] = i[59];
assign o[58] = i[58];
assign o[57] = i[57];
assign o[56] = i[56];
assign o[55] = i[55];
assign o[54] = i[54];
assign o[53] = i[53];
assign o[52] = i[52];
assign o[51] = i[51];
assign o[50] = i[50];
assign o[49] = i[49];
assign o[48] = i[48];
assign o[47] = i[47];
assign o[46] = i[46];
assign o[45] = i[45];
assign o[44] = i[44];
assign o[43] = i[43];
assign o[42] = i[42];
assign o[41] = i[41];
assign o[40] = i[40];
assign o[39] = i[39];
assign o[38] = i[38];
assign o[37] = i[37];
assign o[36] = i[36];
assign o[35] = i[35];
assign o[34] = i[34];
assign o[33] = i[33];
assign o[32] = i[32];
assign o[31] = i[31];
assign o[30] = i[30];
assign o[29] = i[29];
assign o[28] = i[28];
assign o[27] = i[27];
assign o[26] = i[26];
assign o[25] = i[25];
assign o[24] = i[24];
assign o[23] = i[23];
assign o[22] = i[22];
assign o[21] = i[21];
assign o[20] = i[20];
assign o[19] = i[19];
assign o[18] = i[18];
assign o[17] = i[17];
assign o[16] = i[16];
assign o[15] = i[15];
assign o[14] = i[14];
assign o[13] = i[13];
assign o[12] = i[12];
assign o[11] = i[11];
assign o[10] = i[10];
assign o[9] = i[9];
assign o[8] = i[8];
assign o[7] = i[7];
assign o[6] = i[6];
assign o[5] = i[5];
assign o[4] = i[4];
assign o[3] = i[3];
assign o[2] = i[2];
assign o[1] = i[1];
assign o[0] = i[0];
endmodule
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