&gt; <i>Personally, I have more faith in a third alternative: a virtual instruction set. Like bytecode, though not managed like Java, and not meant to be interpreted or JIT compiled either. It could run on the bare metal, or be translated into something that is —like the Mill CPU. That way you can keep the illusion of having a single instruction set, while sacrificing virtually nothing. Moreover, future CPUs don&#x27;t even need backward compatibility, as long as you can translate (and optimise!) the virtual assembly for them.</i><p>I don&#x27;t think he really gets how CPUs work -- it&#x27;s already that way, and has been for quite a while. The published instruction sets are the &#x27;virtual&#x27; instructions, and translation of these instructions (be they ARM, x86, or PowerPC) is baked into each CPU&#x27;s microcode. We actually have no visibility into the &#x27;real&#x27; instructions that CPUs execute (&#x27;micro-ops&#x27;), because they&#x27;re proprietary.