Alpha 21264 (also from &#x27;96) had load store buffers that would notice the dependence violations and flush the pipeline during speculative execution. Sparc and power also had this to some extent with write buffers. I can&#x27;t think of any that used a predictor though to decide whether to execute speculatively or not back then, they all just either did or stalled on the first potential violation. The patent appears novel for the time to me, thank you for digging it up and explaining.