Expected to see you here. Hey, send me an email or something so I can send you interesting stuff without hunting your profile or random comments on HN. Address in my profile. Here&#x27;s the one I was saving for you to complement the ML and Haskell CPU&#x27;s I linked.<p><a href="https:&#x2F;&#x2F;www.info.ucl.ac.be&#x2F;~pvr&#x2F;bam_jlp.ps" rel="nofollow">https:&#x2F;&#x2F;www.info.ucl.ac.be&#x2F;~pvr&#x2F;bam_jlp.ps</a><p>Cool stuff, eh? That they keep it close to a regular, RISC processor means optimizations of that should carry over. Unlike stuff like Fifth Generation that tried to go way, way the hell to far with Prolog hardware. ;) Should fit nicely into my concept of general-purpose CPU&#x27;s with purpose-built coprocessors. Also speculate techniques might be helpful on ASIC&#x27;s meant for today&#x27;s big-data apps that use things like Datalog for queries. Ya think?