Been working on this for a few months, and just added the finishing touches. It&#x27;s a high performance ADS-B receiver that can detect and correct multiple bit errors and packet collisions. The FPGA offload allows a Raspberry Pi to process samples in realtime, where as a recent i7 would not be able to keep up without the hardware offload.<p>I&#x27;m planning on doing a mini series explaining the MATLAB, C, and VHDL design flow behind building a high performance hardware modem. The first article can be found here, <a href="https:&#x2F;&#x2F;www.nuand.com&#x2F;blog&#x2F;bladerf-vhdl-ads-b-decoder&#x2F;" rel="nofollow">https:&#x2F;&#x2F;www.nuand.com&#x2F;blog&#x2F;bladerf-vhdl-ads-b-decoder&#x2F;</a>
Questions or suggestions are welcome, I would like to use them to improve my writing style and this mini series!