Isn&#x27;t NUMA how multi-core CPUs work still?<p>At least the AMD Bulldozer architecture diagram on the Wikipedia NUMA page shows this, both within a socket and between sockets:<p><a href="https:&#x2F;&#x2F;en.wikipedia.org&#x2F;wiki&#x2F;Non-uniform_memory_access#&#x2F;media&#x2F;File:Hwloc.png" rel="nofollow">https:&#x2F;&#x2F;en.wikipedia.org&#x2F;wiki&#x2F;Non-uniform_memory_access#&#x2F;med...</a><p>Is the same true for Intel chips?  (The Wikipedia page mentions the Intel E8870 memory controller, but not whether newer chips use similar set-ups)