<i>For example Skylake technically has 4 FPU&#x27;s per physical core 1 SIMD, 3 x87 FPU-esque units, 1 branch processors, and 3-4ish IPU&#x27;s (branch processors have some IPU uOPs)?</i><p>Maybe I&#x27;m misunderstanding, but that&#x27;s a very odd description of the execution units in a Skylake core. It might be better to say: &quot;Skylake can sustain execution of 4 instructions per cycle, up to three of which can perform 256-bit vector operations.&quot;  Section 2.1 here gives an exact diagram: <a href="http:&#x2F;&#x2F;www.intel.com&#x2F;content&#x2F;dam&#x2F;www&#x2F;public&#x2F;us&#x2F;en&#x2F;documents&#x2F;manuals&#x2F;64-ia-32-architectures-optimization-manual.pdf" rel="nofollow">http:&#x2F;&#x2F;www.intel.com&#x2F;content&#x2F;dam&#x2F;www&#x2F;public&#x2F;us&#x2F;en&#x2F;documents&#x2F;...</a>