 +    }
 +
 +  private:
-+    bool PlaceMBB(MachineBasicBlock &MBB);
-+    bool PassStoreSandboxing(MachineBasicBlock &MBB);
-+    bool PassBranchSandboxing(MachineBasicBlock &MBB);
++    bool SandboxStoresInBlock(MachineBasicBlock &MBB);
 +    void SandboxStore(MachineBasicBlock &MBB,
 +                      MachineBasicBlock::iterator MBBI,
 +                      MachineInstr &MI,

+  return Modified;
+}
+
+bool ARMSFIPlacement::PassBranchSandboxing(MachineBasicBlock &MBB) {
+  bool Modified = false;
+
+  for (MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end();
+       MBBI != E;
+       ++MBBI) {
+    MachineInstr &MI = *MBBI;
+
+    if (IsReturn(MI)) {
+      ARMCC::CondCodes Pred = GetPredicate(MI);
+      BuildMI(MBB, MBBI, MI.getDebugLoc(),
+              TII->get(ARM::SFI_GUARD_RETURN))
+        .addImm((int64_t) Pred)  // predicate condition
+        .addReg(ARM::CPSR);      // predicate source register (CPSR)
+      Modified = true;
+    }
+
+    if (IsIndirectJump(MI)) {
+      MachineOperand &Addr = MI.getOperand(0);
+      ARMCC::CondCodes Pred = GetPredicate(MI);
+      BuildMI(MBB, MBBI, MI.getDebugLoc(),
+              TII->get(ARM::SFI_GUARD_INDIRECT_JMP))
+        .addOperand(Addr)        // rD
+        .addReg(0)               // apparently unused source register?
+        .addImm((int64_t) Pred)  // predicate condition
+        .addReg(ARM::CPSR);      // predicate source register (CPSR)
+      Modified = true;
+    }
+
+    if (IsDirectCall(MI)) {
+      ARMCC::CondCodes Pred = GetPredicate(MI);
+      BuildMI(MBB, MBBI, MI.getDebugLoc(),
+              TII->get(ARM::SFI_GUARD_CALL))
+        .addImm((int64_t) Pred)  // predicate condition
+        .addReg(ARM::CPSR);      // predicate source register (CPSR)
+      Modified = true;
+    }
+
+    if (IsIndirectCall(MI)) {
+      MachineOperand &Addr = MI.getOperand(0);
+      ARMCC::CondCodes Pred = GetPredicate(MI);
+      BuildMI(MBB, MBBI, MI.getDebugLoc(),
+              TII->get(ARM::SFI_GUARD_INDIRECT_CALL))
+        .addOperand(Addr)        // rD
+        .addReg(0)               // apparently unused source register?
+        .addImm((int64_t) Pred)  // predicate condition
+        .addReg(ARM::CPSR);      // predicate source register (CPSR)
+        Modified = true;
+    }
+  }
+
+  return Modified;
+}
+
+bool ARMSFIPlacement::PlaceMBB(MachineBasicBlock &MBB) {
+  bool Modified = false;
+  if (FlagSfiStore) {
+    Modified |= PassStoreSandboxing(MBB);
+  }
+
+  if (FlagSfiBranch) {
+    Modified |= PassBranchSandboxing(MBB);
+  }
+  return Modified;
+}
+
+
+bool ARMSFIPlacement::runOnMachineFunction(MachineFunction &MF) {
+  TII = MF.getTarget().getInstrInfo();
+

diff -r c06933b0e3e6 llvm-trunk/lib/Target/ARM/ARM.h
--- a/llvm-trunk/lib/Target/ARM/ARM.h
+++ b/llvm-trunk/lib/Target/ARM/ARM.h
@@ -105,6 +105,8 @@
 FunctionPass *createARMLoadStoreOptimizationPass(bool PreAlloc = false);
 FunctionPass *createARMExpandPseudoPass();
 FunctionPass *createARMConstantIslandPass();
+FunctionPass *createARMSFIPlacementPass();
+FunctionPass *createARMSFIBranchPass();
 FunctionPass *createNEONPreAllocPass();
 FunctionPass *createNEONMoveFixPass();
 FunctionPass *createThumb2ITBlockPass();
