 +}
 +
 +static int litex_clk_dts_clkout_def_read(struct device_node *child,
-+					 struct litex_clk_clkout *l_clkout)
-+{
-+	int ret;
-+
-+	ret = of_property_read_u32(child, "reg", &l_clkout->id);
++					 struct litex_clk_clkout *lcko)
++{
++	int ret;
++
++	ret = of_property_read_u32(child, "reg", &lcko->id);
 +	if (ret != 0)
 +		return -ret;
 +
-+	if (l_clkout->id > ldev->nclkout) {
++	if (lcko->id > ldev->nclkout) {
 +		pr_err("%s: Invalid CLKOUT index!", child->name);
 +		return -EINVAL;
 +	}
 +
 +	ret = of_property_read_u32(child, "litex,clock-margin",
-+						 &l_clkout->margin.m);
++						 &lcko->margin.m);
 +	if (ret != 0)
 +		return -ret;
 +	ret = of_property_read_u32(child, "litex,clock-margin-exp",
-+						 &l_clkout->margin.exp);
++						 &lcko->margin.exp);
 +	if (ret != 0)
 +		return -ret;
 +	ret = of_property_read_u32(child, "litex,clock-frequency",
-+						 &l_clkout->def.freq);
++						 &lcko->def.freq);
 +	if (ret != 0)
 +		return -ret;
 +	ret = of_property_read_u32(child, "litex,clock-phase",
-+						 &l_clkout->def.phase);
++						 &lcko->def.phase);
 +	if (ret != 0)
 +		return -ret;
 +	ret = of_property_read_u32(child, "litex,clock-duty-den",
-+						 &l_clkout->def.duty.den);
++						 &lcko->def.duty.den);
 +	if (ret != 0)
 +		return -ret;
 +	ret = of_property_read_u32(child, "litex,clock-duty-num",
-+						 &l_clkout->def.duty.num);
++						 &lcko->def.duty.num);
 +	if (ret != 0)
 +		return -ret;
-+	if (l_clkout->def.duty.den <= 0 ||
-+	    l_clkout->def.duty.num > l_clkout->def.duty.den) {
++	if (lcko->def.duty.den <= 0 ||
++	    lcko->def.duty.num > lcko->def.duty.den) {
 +		pr_err("%s: Invalid default duty! %d/%d",
-+			child->name, l_clkout->def.duty.num, l_clkout->def.duty.den);
++			child->name, lcko->def.duty.num, lcko->def.duty.den);
 +		return -EINVAL;
 +	}
 +

+	return container_of(clk_hw, struct litex_clk_clkout, clk_hw);
+}
+
+/* Clock control driver functions */
+static inline void litex_clk_set_reg(struct clk_hw *clk_hw, u32 reg, u32 val)
+{
+	struct litex_clk_clkout *l_clk = clk_hw_to_litex_clk_clkout(clk_hw);
+
+	litex_set_reg(l_clk->base + drp[reg].offset, drp[reg].size, val);
+}
+
+static inline u32 litex_clk_get_reg(struct clk_hw *clk_hw, u32 reg)
+{
+	struct litex_clk_clkout *l_clk = clk_hw_to_litex_clk_clkout(clk_hw);
+
+	return litex_get_reg(l_clk->base + drp[reg].offset, drp[reg].size);
+}
+
+static inline void litex_clk_assert_reg(struct clk_hw *clk_hw, u32 reg)

+	if (pm_rise_frac >= 8)
+		pm_rise_frac_filtered -= 8;
+
+	pm_fall = ((divider % 2) << 2) + ((frac >> 1) & TWO_LSBITS);
+	pm_fall_frac = pm_fall + pm_rise_frac;
+	pm_fall_frac_filtered = pm_fall + pm_rise_frac -
+					 (pm_fall_frac & F_FRAC_MASK);
