 +	u32 result = 0;
 +
 +	for (i = 0; i < reg_size; ++i) {
-+		shifted_data = litex_read_reg(reg + (LITEX_REG_SIZE * i));
++		shifted_data = read_pointer_with_barrier(reg + (LITEX_REG_SIZE * i));
 +		shift = ((reg_size - i - 1) * LITEX_SUBREG_SIZE_BIT);
 +		result |= (shifted_data << shift);
 +	}

+#include <linux/errno.h>
+#include <linux/io.h>
+
+#define SCRATCH_REG_OFF		0x04
+#define SCRATCH_REG_VALUE	0x12345678
+#define SCRATCH_LE		0x00000012
+#define SCRATCH_BE		0x12000000
+
+/*
+ * Pointers for accessor functions
+ *
+ * note: or1k and vexriscv kernels use different CONFIG_GENERIC_IOMAP
+ *	setting and it changes the definition of io{read,write}32
+ *	functions so we are checking here to use correct definition
+ */
+#ifndef CONFIG_GENERIC_IOMAP
+unsigned int (*litex_read_reg)(const volatile void __iomem *addr) = NULL;
+void (*litex_write_reg)(u32 val, volatile void __iomem *addr) = NULL;
+#else
+unsigned int (*litex_read_reg)(void __iomem *addr) = NULL;
+void (*litex_write_reg)(u32 val, void __iomem *addr) = NULL;
+#endif
+
+/*
+ * check if accessors are ready to use
+ * returns true if yes - false if not
+ */
+int litex_check_accessors(void)
+{
+	if (litex_read_reg == NULL || litex_write_reg == NULL)
+		return 0;
+	return 1;
+}
+
+struct litex_soc_ctrl_device {
+	void __iomem *base;
+};
+
+/* Check byte order and set correct accessors */
+static int litex_soc_ctrl_check_endianness(void __iomem *reg_addr)
+{
+	u32 reg;
+	u8 le_flag = -1;
+
+	/* Read first part of litex CSR with Little Endian function */
+	reg = ioread32(reg_addr + SCRATCH_REG_OFF);
+
+	if (reg == SCRATCH_LE) {
+		le_flag = 1;
+		litex_read_reg = ioread32;
+		litex_write_reg = iowrite32;
+	} else if (reg == SCRATCH_BE) {
+		le_flag = 0;
+		litex_read_reg = ioread32be;
+		litex_write_reg = iowrite32be;
+	} else {
+		panic("Endianness detection failure! scratch: 0x%x", reg);
+		return -EINVAL;
+	}
+	/* Double check - this time whole CSR */
+	reg = litex_get_reg(reg_addr + SCRATCH_REG_OFF, 4);
+	if (reg != SCRATCH_REG_VALUE) {
+		panic("Endianness detection failure! scratch: 0x%x should be: 0x%x",
+							reg, SCRATCH_REG_VALUE);
+		return -EINVAL;
+	}
+
+	if (le_flag)
+		pr_info("LiteX CSR access configured: Little Endian");
+	else
+		pr_info("LiteX CSR access configured: Big Endian");
+
+	return 0;
+}

+	if (IS_ERR_OR_NULL(soc_ctrl_dev->base))
+		return -EIO;
+
+	return litex_check_csr_access(soc_ctrl_dev->base);
+}
+
+static int litex_soc_ctrl_remove(struct platform_device *pdev)
