 +		*rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
 +		break;
 +	case 2: /* Hynix 256MB/512MB, 1/2 banks of 256MB */
++		/* Untested: TODO */
 +		*mcfg = HYNIX_V_MCFG_200(256 << 20);
 +		*ctrla = HYNIX_V_ACTIMA_200;
 +		*ctrlb = HYNIX_V_ACTIMB_200;
 +		*rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
 +		break;
 +	default:
-+		*mcfg = MICRON_V_MCFG_165(256 << 20);
++		*mcfg = MICRON_V_MCFG_165(128 << 20);
 +		*ctrla = MICRON_V_ACTIMA_165;
 +		*ctrlb = MICRON_V_ACTIMB_165;
 +		*rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;

+ * header. That is 0x800FFFC0--0x80100000 should not be used for any
+ * other needs.
+ */
+#define CONFIG_SYS_TEXT_BASE		0x80100000
+#define CONFIG_SYS_SPL_MALLOC_START	0x80208000
+#define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000
+
 #endif				/* __CONFIG_H */
-- 
1.7.6.4


 {
 	omap_mmc_init(0);
diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h
index afdefd9..ad4c2d1 100644
--- a/include/configs/omap3_overo.h
+++ b/include/configs/omap3_overo.h
@@ -254,7 +254,6 @@
