 +Ramulator *RamulatorParams::create(){
 +    return new Ramulator(this);
 +}
-diff -r 0e86fac7254c src/mem/ramulator.hh
---- /dev/null Thu Jan 01 00:00:00 1970 +0000
-+++ b/src/mem/ramulator.hh  Fri Jan 22 19:05:46 2016 -0500
+diff -r 0e86fac7254c -r d1234c44d57e src/mem/ramulator.hh
+--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
++++ b/src/mem/ramulator.hh	Thu Mar 10 03:46:14 2016 +0800
 @@ -0,0 +1,94 @@
 +#ifndef __RAMULATOR_HH__
 +#define __RAMULATOR_HH__

+
+void Ramulator::readComplete(ramulator::Request& req){
+    DPRINTF(Ramulator, "Read to %ld completed.\n", req.addr);
+    auto pkt_q = reads.find(req.addr)->second;
+    PacketPtr pkt = pkt_q.front();
+    pkt_q.pop_front();
+    if (!pkt_q.size())

+            req_stall = true;
+        }
+    } else if (pkt->isWrite()) {
+        // Detailed CPU model always comes along with cache model enabled and
+        // write requests are caused by cache eviction, so it shouldn't be
+        // tallied for any core/thread
+        ramulator::Request req(pkt->getAddr(), ramulator::Request::Type::WRITE, write_cb_func, 0);
+        accepted = wrapper->send(req);
+        if (accepted){
+            accessAndRespond(pkt);
