  }
  
 diff -r c06933b0e3e6 llvm-trunk/lib/Target/ARM/ARMInstrVFP.td
---- a/llvm-trunk/lib/Target/ARM/ARMInstrVFP.td	Wed Mar 24 16:37:54 2010 -0400
-+++ b/llvm-trunk/lib/Target/ARM/ARMInstrVFP.td	Wed Apr 14 12:14:23 2010 -0400
+--- a/llvm-trunk/lib/Target/ARM/ARMInstrVFP.td
++++ b/llvm-trunk/lib/Target/ARM/ARMInstrVFP.td
 @@ -65,11 +65,11 @@
  } // canFoldAsLoad
  

diff -r c06933b0e3e6 llvm-trunk/include/llvm/CodeGen/MachineConstantPool.h
--- a/llvm-trunk/include/llvm/CodeGen/MachineConstantPool.h	Wed Mar 24 16:37:54 2010 -0400
+++ b/llvm-trunk/include/llvm/CodeGen/MachineConstantPool.h	Wed Apr 14 12:14:23 2010 -0400
@@ -54,6 +54,17 @@
                                         unsigned Alignment) = 0;
 

 }
-
diff -r c06933b0e3e6 llvm-trunk/lib/Target/ARM/ARMInstrInfo.td
--- a/llvm-trunk/lib/Target/ARM/ARMInstrInfo.td
+++ b/llvm-trunk/lib/Target/ARM/ARMInstrInfo.td
@@ -321,6 +321,11 @@
   let MIOperandInfo = (ops GPR, i32imm);
 }
