           goto decode_failure;
           /*NOTREACHED*/
        }
-@@ -16478,7 +16496,7 @@ DisResult disInstr_THUMB_WRK (
+@@ -14922,48 +14940,51 @@
+          suboptimal. */
+       vassert(guaranteedUnconditional == False);
+ 
+-      UInt pc = guest_R15_curr_instr_notENC;
+-      vassert(0 == (pc & 1));
+-
+-      UInt pageoff = pc & 0xFFF;
+-      if (pageoff >= 18) {
+-         /* It's safe to poke about in the 9 halfwords preceding this
+-            insn.  So, have a look at them. */
+-         guaranteedUnconditional = True; /* assume no 'it' insn found,
+-                                            till we do */
+-         UShort* hwp = (UShort*)(HWord)pc;
+-         Int i;
+-         for (i = -1; i >= -9; i--) {
+-            /* We're in the same page.  (True, but commented out due
+-               to expense.) */
+-            /*
+-            vassert( ( ((UInt)(&hwp[i])) & 0xFFFFF000 )
+-                      == ( pc & 0xFFFFF000 ) );
+-            */
+-            /* All valid IT instructions must have the form 0xBFxy,
+-               where x can be anything, but y must be nonzero.  Find
+-               the number of insns covered by it (1 .. 4) and check to
+-               see if it can possibly reach up to the instruction in
+-               question.  Some (x,y) combinations mean UNPREDICTABLE,
+-               and the table is constructed to be conservative by
+-               returning 4 for those cases, so the analysis is safe
+-               even if the code uses unpredictable IT instructions (in
+-               which case its authors are nuts, but hey.)  */
+-            UShort hwp_i = hwp[i];
+-            if (UNLIKELY((hwp_i & 0xFF00) == 0xBF00 && (hwp_i & 0xF) != 0)) {
+-               /* might be an 'it' insn. */
+-               /* # guarded insns */
+-               Int n_guarded = (Int)it_length_table[hwp_i & 0xFF];
+-               vassert(n_guarded >= 1 && n_guarded <= 4);
+-               if (n_guarded * 2 /* # guarded HWs, worst case */
+-                   > (-(i+1)))   /* -(i+1): # remaining HWs after the IT */
+-                   /* -(i+0) also seems to work, even though I think
+-                      it's wrong.  I don't understand that. */
+-                  guaranteedUnconditional = False;
+-               break;
+-            }
+-         }
+-      }
++      // PYVEX: this is commented out for pyvex because it expects the guest
++      // 	instructions to be in their specific address in memory
++      //
++      //UInt pc = guest_R15_curr_instr_notENC;
++      //vassert(0 == (pc & 1));
++      //
++      //UInt pageoff = pc & 0xFFF;
++      //if (pageoff >= 18) {
++      //   /* It's safe to poke about in the 9 halfwords preceding this
++      //      insn.  So, have a look at them. */
++      //   guaranteedUnconditional = True; /* assume no 'it' insn found,
++      //                                      till we do */
++      //   UShort* hwp = (UShort*)(HWord)pc;
++      //   Int i;
++      //   for (i = -1; i >= -9; i--) {
++      //      /* We're in the same page.  (True, but commented out due
++      //         to expense.) */
++      //      /*
++      //      vassert( ( ((UInt)(&hwp[i])) & 0xFFFFF000 )
++      //                == ( pc & 0xFFFFF000 ) );
++      //      */
++      //      /* All valid IT instructions must have the form 0xBFxy,
++      //         where x can be anything, but y must be nonzero.  Find
++      //         the number of insns covered by it (1 .. 4) and check to
++      //         see if it can possibly reach up to the instruction in
++      //         question.  Some (x,y) combinations mean UNPREDICTABLE,
++      //         and the table is constructed to be conservative by
++      //         returning 4 for those cases, so the analysis is safe
++      //         even if the code uses unpredictable IT instructions (in
++      //         which case its authors are nuts, but hey.)  */
++      //      UShort hwp_i = hwp[i];
++      //      if (UNLIKELY((hwp_i & 0xFF00) == 0xBF00 && (hwp_i & 0xF) != 0)) {
++      //         /* might be an 'it' insn. */
++      //         /* # guarded insns */
++      //         Int n_guarded = (Int)it_length_table[hwp_i & 0xFF];
++      //         vassert(n_guarded >= 1 && n_guarded <= 4);
++      //         if (n_guarded * 2 /* # guarded HWs, worst case */
++      //             > (-(i+1)))   /* -(i+1): # remaining HWs after the IT */
++      //             /* -(i+0) also seems to work, even though I think
++      //                it's wrong.  I don't understand that. */
++      //            guaranteedUnconditional = False;
++      //         break;
++      //      }
++      //   }
++      //}
+    }
+    /* --- END ITxxx optimisation analysis --- */
+ 
+@@ -16478,7 +16499,7 @@
  
     /* second 16 bits of the instruction, if any */
     vassert(insn1 == 0);

                                                /* orr r12,r12,r12 */) {
             /*  branch-and-link-to-noredir R4 */
             DIP("branch-and-link-to-noredir r4\n");
@@ -12658,7 +12676,7 @@ DisResult disInstr_ARM_WRK (
          }
          /* We don't know what it is.  Set opc1/opc2 so decode_failure
             can print the insn following the Special-insn preamble. */

    insn1 = 0; /* We'll get it later, once we know we need it. */
 
    /* Similarly, will set this later. */
@@ -14828,13 +14846,13 @@
       UInt word2 = 0x3C7CEA4F;
       UInt word3 = 0x7C7CEA4F;
       UInt word4 = 0x4CFCEA4F;
