                                                 /* orr r12,r12,r12 */) {
              /*  branch-and-link-to-noredir R4 */
              DIP("branch-and-link-to-noredir r4\n");
-@@ -12658,7 +12676,7 @@ DisResult disInstr_ARM_WRK (
+@@ -12658,7 +12676,7 @@
           }
           /* We don't know what it is.  Set opc1/opc2 so decode_failure
              can print the insn following the Special-insn preamble. */

          goto decode_failure;
          /*NOTREACHED*/
       }
@@ -16478,7 +16496,7 @@ DisResult disInstr_THUMB_WRK (
 
    /* second 16 bits of the instruction, if any */
    vassert(insn1 == 0);

 
    if (0) vex_printf("insn: 0x%x\n", insn);
 
@@ -12622,12 +12640,12 @@
       UInt word2 = 0xE1A0C6EC;
       UInt word3 = 0xE1A0CEEC;
       UInt word4 = 0xE1A0C9EC;
