5nm vs. 3nm
I didn't realize Samsung was offering a 5nm process to customers; this means that TSMC is <i>not</i> the only 5nm foundry out there, as I thought it would be when GlobalFoundries canceled their 5nm R&D program.  And it sounds like competition might keep process shrink alive for at least one more node, down to 3nm, although there's a good chance that either Samsung or TSMC will have to bow out at that point.<p>Since Dennard scaling ended about 15 years ago, these new devices will probably run hotter, adding to the dark-silicon, eh, let's call it a situation.  It's a <i>problem</i> from the traditional point of view where you expect to be able to use all your hardware all the time, but maybe it's an <i>opportunity</i> if you see it as a chance to handle burstier computational loads or to pack a greater diversity of specialized cores onto a chip.  But of course that increases both design costs and the complexity of programming the device once it's been fabbed.<p>The impending collapse of Moore's Law has thus been delayed for two or three years, or softened anyway, but the appetite for computation due to deep learning continues unabated.  Since scaling Jack Kilby's planar process down is becoming increasingly uneconomic, this would be a good time for a non-planar process to emerge — a trillion squares occupies a one-million by one-million area, while a trillion voxels is only ten thousand by ten thousand by ten thousand, a scale a hundred times larger and therefore less demanding on your fabrication processes.  You'll probably need some plumbing in there for coolant.  I don't know of anybody working on this, surprisingly.