AMD EPYC Rome 2P Will Have 128-160 PCIe Gen4 Lanes and a Bonus
Can someone enlighten me with some information about application requiring the full 16x PCIe gen4 bandwidth per slot (or 32x gen3 for that matter)? I can imagine some HPC GPU solutions but other than that what requires the thoughput?<p>There is obviously a market for this as both giants are building platforms.