IBM doubles its 14nm EDRAM density, adds hundreds of megabytes of cache
I wonder if it will ever see a chance to go mainstream.<p>The memory bottleneck is pretty much the only thing in CPU design that didn't see a dramatic improvement over the years. Its elimination is the only obvious improvement pathway still left with expectation of double digit performance gains.<p>So we need either very big and very fast caches, or extremely wide and low latency memory. Both options are quite costly.<p>Adding on die DRAM that can work at least as fast as 500mhz will surely require some specialty process with a lot of compromises like the one in the article.<p>Gluing something like HBM2 to the die for a second option moves the cost from the specialty process to the specialty packaging. Not much better.