Sam Zeloof and Jim Keller start a new semiconductor fab
Judging from [1], Sam Zeloof's plan might include using electron beam lithography, which scans an electron beam over a wafer surface, instead of normal photolithography. This can get high resolution (10nm) comparable with EUV, and could theoretically be built out of a hacked scanning electron microscope. Photolithography is the step that limits fabrication size, so e-beam litho allows cheap transistors comparable with state-of-the-art.<p>The main problem is e-beam litho is extremely slow. It might take ~1 day to do a single photolithography step for a 1x1cm chip, whereas an EUV machine can pattern a 300mm diameter silicon wafer in < 1 minute. (The next problem is making everything reliable. Billions of transistors (a modern CPU) needs a failure rate per transistor of better than 1e-9.)<p>Maybe that's enough for extremely-low-volume production?<p>[1] <a href="https://mobile.twitter.com/szeloof/status/1549937044067172352" rel="nofollow">https://mobile.twitter.com/szeloof/status/154993704406717235...</a>