Errata prompt Intel to disable TSX in Haswell, early Broadwell CPUs
For those wondering, the TSX instruction set is <a href="http://en.wikipedia.org/wiki/Transactional_Synchronization_Extensions" rel="nofollow">http://en.wikipedia.org/wiki/Transactional_Synchronization_E...</a><p>I first heard about transactional memory when Sun had plans to implement it for its UltraSPARC Rock processor. There is a decent overview of the concept at <a href="http://en.wikipedia.org/wiki/Transactional_memory" rel="nofollow">http://en.wikipedia.org/wiki/Transactional_memory</a>