Modchips of the State
I think I found some flaws with this, now I think I am rather experienced but I haven&#x27;t seen everything.<p>1) He didn&#x27;t demonstrate it in real hardware without outside power and ground, while he says an arm core is very small, capacitors are large unless you change the laws of physics.  Also I never saw a reliable clock generator the size of a 0402 (or even 1208 now that I think about it) passive.  Like I said I haven&#x27;t seen everything, if there are answers to these I&#x27;d love to see them.<p>2) He faked in some addition to unprogrammed memory, he theorizes the change can only work one way (change a high to low) so an obvious countermeasure is to fill empty memory with random bit patterns.<p>3) IIRC he intercepts an spi flash in series on the data (MISO) wire.  Not only does this assume the spi clock is regular, I think it&#x27;s totally wrong because he says he turns high to low.  Usually the quiescent state of a net like this is high, due to pullup on one or both sides to Vdd (high state.)  The mark on the data wire is a short to ground against this pullup to get a low state.  Now I haven&#x27;t seen everything, nor have I looked at any datasheets of parts used in any real system, of course the pullup can be anywhere along the wire, or in one or many integrated circuits along the net, but it really strikes me as incomplete because he says he turns high to low and I didn&#x27;t notice him mentioning anything about any pullup and how to deal with it.<p>So until I see something better than this talk I am writing this off as feeding the FUD.