RISC-V Instructions
What seems to be missing are the hardware optimized and accelerated short and big memcpy&#x2F;memset.<p>On x86_64, on modern micro-archs, &quot;rep stos[bwdq]&quot; and &quot;rep movs[bwdq]&quot;. I bet that, in modern binaries, memcpy&#x2F;memset call sites are actually place holders for such instructions (before the memory segment goes back to Read&#x2F;Executable), registers are rdi,rsi,rdx (rcx would be pushed on the stack or the code generated to account for just rcx availability on the call site).<p>Also, expect x86_64 -&gt; risc-v port bugs because to:
 byte-&gt;byte
 word-&gt;halfword
 doubleword-&gt;word
 quadword-&gt;doubleword