Show HN: Retrocomputing with Clash: Haskell for FPGA Hardware Design
I am having trouble understanding the usefulness of all these new pseudo-HDL languages.<p>In all the projects that I&#x27;ve worked on, the choice of HDL (which was 95% of the time, Verilog, for the rest, VHDL), was never actually &#x27;important&#x27;; the language features were never critical to the completion of the project. Verilog is fully adequate for any kind of serious HDL development.<p>What mattered were, the tooling, IDEs, debuggers, timing analysis tools, verification infrastructure, the IP ecosystem, etc.<p>Perhaps I am getting old but I just can not see how these new languages can be a serious alternative to Verilog&#x2F;VHDL.