Intel updates mysterious ‘software-defined silicon’ code in the Linux kernel
I was just thinking this morning that Intel segments their market by the <i>class of person</i> that is their customer.<p>&quot;You&#x27;re a consumer, you don&#x27;t <i>need</i> error correcting memory! Only the upper class, I mean... your superiors... err.. sorry, <i>enterprise</i> customers need that feature. It&#x27;s reserved for <i>them</i>, it is not for the likes of you.&quot;<p>Meanwhile AMD basically sells silicon by unit area. It&#x27;s like buying gelato at the ice cream shop. You can ask for one scoop, two scoops, or three. You get to decide how hungry you are, that&#x27;s it. There isn&#x27;t a flavour with broken glass in it[1] served only to the working class stiffs, and with the glass-free gelato reserved only for the gentry.<p>[1] This is pretty much what a CPU without ECC is. It randomly crashes and corrupts your data. Look. Not <i>every</i> bite of ice cream has glass in it! There&#x27;s <i>very little glass</i> in the ice cream. It&#x27;s super rare, and Intel Pty Ltd tells you that this is an acceptable amount of risk for you to take, because you aren&#x27;t as important as other people.