FPGA/DNN Co-Design: An Efficient Methodology for IoT Intelligence
This is a terrible paper and the authors didn&#x27;t employ even the most basic scientific standards. They search over the shape of the network that works best on the FPGA to give them their target performance on the FPGA. But they don&#x27;t search over the network that gives the best target performance on the GPU! Of course the FPGA wins.<p>We have known for years now that deep networks are extremely compressible when they&#x27;re trained. You can drop the vast majority of the weights and still maintain almost all of the performance. Just like you can drop the accuracy from floats, to ints, to int8, and even to bool for the weights and you can still perform well.<p>This papers is a joke and it deserves to be rejected from anywhere it&#x27;s submitted. They optimize the shape of the FPGA network but not the GPU network. They don&#x27;t apply the standard methods to prune weights in networks and they don&#x27;t compare to those methods. They also pick one GPU network at random, lots of object detectors are faster than Yolo. People have explored the speed-performance tradeoff closely.<p>About FPGAs in general: there are great reasons why FPGAs have been just over the horizon for a long time. The toolchains suck and they&#x27;re mostly very closed down. Debugging is very hard. They cost 20x or so as much as GPUs. Your code becomes very specific to one particular FPGA so upgrading is a total pain. And more.. There are plenty of better solutions out there like TPUs.