Google Edge TPU Devices
In Nov 2018, Google engineers who designed the TPU gave a presentation about the use of open-source Chisel for designing the ASIC, <a href="https:&#x2F;&#x2F;youtube.com&#x2F;watch?v=x85342Cny8c" rel="nofollow">https:&#x2F;&#x2F;youtube.com&#x2F;watch?v=x85342Cny8c</a><p>From <a href="https:&#x2F;&#x2F;techcrunch.com&#x2F;2018&#x2F;07&#x2F;25&#x2F;google-is-making-a-fast-specialized-tpu-chip-for-edge-devices-and-a-suite-of-services-to-support-it&#x2F;" rel="nofollow">https:&#x2F;&#x2F;techcrunch.com&#x2F;2018&#x2F;07&#x2F;25&#x2F;google-is-making-a-fast-sp...</a><p><i>&gt; Google will have the cloud TPU ... to handle training models for various machine learning-driven tasks, and then run the inference from that model on a specialized chip that runs a lighter version of TensorFlow that doesn’t consume as much power ... dramatically reduce the footprint required in a device that’s actually capturing the data ... Google will be releasing the chip on a kind of modular board not so dissimilar to the Raspberry Pi ... it’ll help entice developers who are already working with TensorFlow as their primary machine learning framework with the idea of a chip that’ll run those models even faster and more efficiently.</i>