Back That ‘S’ Up: Moving to RISC-V’s Supervisor Mode
&quot;As soon as I write to the SATP register and set the mode, it is up and running since we’re in supervisor mode&quot;<p>While this is true on some CPUs it&#x27;s not true on all of them - you must do an sfence.vma instruction after you write SATP before you can guarantee that the new mapping will be used (the priv spec is very specific about this). Note: this means that every instruction after the write to SATP and up to and including the sfence.vma must be mapped in the old mapping and in the new one (even when you turn the MMU on for the first time)