RISC vs. CISC: The Post-RISC Era (1999)
The two extreme cases still existed in that era. One extreme was the DEC VAX. The instruction set is complex, convenient, high level, and slow. The other extreme was the original IBM 801, which led to the IBM POWER architecture. In its pure form, it was one instruction per clock, had lots of registers, and was quite simple. MIPS went down that road in a big way.<p>Then CISC microprocessors became superscalar, and started executing more than one instruction per clock. Now RISC machines were behind in speed. So they had to become superscalar. That killed the simplicity. There was no longer any real point to pure RISC instruction sets.<p>(The author mentions the Itanium. That existed mostly because Intel wanted a patentable technology others couldn&#x27;t clone. It was very original, and not in a useful way.)