Question: I was wondering if anyone could tell me a little more about this:

> 
> For the tests in Module 3 you need a clock generator that supplies single clock pulses with a well-defined positive (rising) and negative (falling) edge. This can be built using the 74HC14 hex Schmitt trigger (or a 74HC132 quad NAND Schmitt trigger with one pin connected high), by adding a capacitor and a resistor.
> 
> 
> 

According to the circuit that I have on Logisim, two DFFs should be connected to a clock, but I don't know if it is the output on the schematic in the lab instructions that should be connected to 1CLK and 2CLK respectively on the DFF.

Picture:

[![enter image description here](https://i.stack.imgur.com/CyZN3m.jpg)](https://i.stack.imgur.com/CyZN3m.jpg)

Picture of my circuit from logisim:

[![enter image description here](https://i.stack.imgur.com/C49KN.png)](https://i.stack.imgur.com/C49KN.png)

For reference, the circuits I have at my disposal are these:

[![enter image description here](https://i.stack.imgur.com/PyEQa.jpg)](https://i.stack.imgur.com/PyEQa.jpg)

If you need more information I could happily provide them. The breadboard we are using have 60 columns across the bus terminals. We are only allowed to use one breadboard.

Answer: 
> 
> For the tests in Module 3 you need a clock generator that supplies single clock pulses with a well-defined positive (rising) and negative (falling) edge.
> 
> 
> 

What this means, in this context, is that your clock should have edges that rise and fall sharply. In addition, the clock should not "chatter" (i.e. give you multiple rising and falling edges) each time the button is pressed or released.

The given circuit is a debounce circuit, that conditions the signal from the switch to do just that. The input to the Schmitt trigger will rise or fall slowly, and may not do so monotonically (search on "switch debounce" for an explanation of why). If the circuit is designed correctly for the given switch, the *output* of the Schmitt trigger will snap from low to high, and high to low, once for each switch press or release, and as fast as the Schmitt trigger can drive it.

For reference, if you look at the data sheets for your D flip flops, you'll see that they have a minimum rise and a minimum fall time specified -- many clocked circuit needs to have a sharp edge on the clock, or they get confused. This sets the requirement for that "well defined" clock edge.
The first circuit is designed to debounce the switch. As shown it should work provided the time constant of R2 and C are significantly longer than the expected bounce time of the switch (typically a few milliseconds). Virtually any Schmitt trigger IC will do the job, you only appear to have the 74HC14 available. And yes, the debounced clock should be connected to both clock inputs of the d-type flipflops.  

Your diagram is almost the same as circuit "C" in [this article](https://www.circuitbasics.com/switch-debouncing/).

By the way, what is the logic circuit supposed to do? I'm sure I've seen something very similar in another recent question here.