Question: I was reading the [SVE whitepaper](https://developer.arm.com/hpc/a-sneak-peek-into-sve-and-vla-programming) from ARM and came across something that struck me as odd (in a non-SVE example):

```
mov x8, xzr

```

I didn't know what this `xzr` register was, so I looked it up and found [some content from ARM](https://community.arm.com/processors/f/discussions/3185/wzr-xzr-register-s-purpose) stating that it was, in many contexts, synonymous with zero.

So it looks like `x8` is being initialised to zero, which makes sense because it's executed just before a loop where `x8` is used as the loop counter.

What I don't understand is, why wasn't the literal `0` used instead of `xzr`? For example:

```
mov x8, 0

```

To summarise, my question is: why might one use the `xzr` register instead of the literal `0` here?

Answer: 
```
mov x8,xzr
mov x8,#0
mov x8,0

```

produces

```
0000000000000000 <.text>:
   0:   aa1f03e8    mov x8, xzr
   4:   d2800008    mov x8, #0x0                    // #0
   8:   d2800008    mov x8, #0x0                    // #0

```

No real surprise there other than it allowed an immediate without the pound sign. It is not an instruction size issue (again no surprise, with x86 for example xor rax,rax is cheaper than mov rax,0), perhaps there is a pipeline performance gain (despite popular belief instructions take more than one clock start to finish).

Most likely it is a personal preference thing we have this cool mips like always zero register thing lets use it just for fun.
This answer is not "on all fours" to the OP. 

XZR could be used to discard results; e.g., "ldr xzr, [sp], 16". See GDB below

```
0x7fffffef40:   0x00000000      0x00000000      0x00400498      0x00000000
0x7fffffef50:   0x00000000      0x00000000      0x00000000      0x00000000
              ldr x0,=0xdead
(gdb)
              ldr x1,=0xc0de
(gdb)
              stp x0, x1, [sp, #-16]!
(gdb) x/8x $sp
0x7fffffef30:   0x0000dead      0x00000000      0x0000c0de      0x00000000
0x7fffffef40:   0x00000000      0x00000000      0x00400498      0x00000000

              ldr xzr, [sp], #16
(gdb) x/8x $sp
0x7fffffef40:   0x00000000      0x00000000      0x00400498      0x00000000
0x7fffffef50:   0x00000000      0x00000000      0x00000000      0x00000000

```

Also remember that in ARMv8 the stack should be quad-word aligned or SP mod 16 = 0. 
So you may use XZR one of the "pushed" or "popped" pair registers.

```
stp x1, xzr, [sp, #-16]!

ldp x10, xzr, [sp], #16

```