Question: I'm designing a solid state battery disconnect switch and I want to improve the mosfets' turn-on immunity (high dV/dt on Vds) without impacting the turn-off time. I don't really care about the turn-on time, it can be 100x slower than turn-off time, no problem.

I came up with this solution:

[![enter image description here](https://i.stack.imgur.com/pCPJI.png)](https://i.stack.imgur.com/pCPJI.png)

C1 obviously improves the immunity and D1 should leave the turn-off time the same. Did I miss something? is there a better way to do this?

NB: mosfet's datasheet is available [here](https://www.onsemi.com/pub/Collateral/FDBL86361_F085-D.PDF) and the driver's datasheet is [here](https://www.mouser.fr/datasheet/2/196/Infineon-1EDI60N12AF-DS-v02_00-EN-1226228.pdf). I'll use a +/- 12 V symmetric supply and the driver will drive 10 mosfets in parallel.

Answer: 
Besides your suggestion, there is something else you can do in order to reduce the unwanted gate voltage rise due to the parasitic leakage current.

Consider the following circuit:
The mosfet is permanently grounded through the resistor R1 and a square wave with a slew rate of 100n is applied to its drain.

How it works: the leakage current is mostly a function of the parasitic capacitance and the slew rate dV/dt of the drain voltage. Thus, once the drain voltage starts to increase, part of it is coupled through the capacitor C2 and used to turn on the BJts. Due to their high speed, a few bipolars are connected in a cascade fashion in order to increase even more their gain. For a short moment, the gate of the mosfet is shorted and the parasitic capacitance is discharged. 

In the waveform you see the effect of not using the circuit (C2 ~ 1p) and with a coupling capacitor (10n). Using this approach the gate voltage dropped by half. I must say that I never saw something like that in any application. The slew rate used in the simulation is extremely high (fast), and probably does not represent a real load.

P.S.: I did not consider any side effect of this proposal.

[![Circuit](https://i.stack.imgur.com/wYiJe.png)](https://i.stack.imgur.com/wYiJe.png) 

[![Waveform](https://i.stack.imgur.com/HTEcg.png)](https://i.stack.imgur.com/HTEcg.png)
Why not simply increase the switch-on resistance by adding R3?

![schematic](https://i.stack.imgur.com/5jJel.png)

[simulate this circuit](/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2f5jJel.png) – Schematic created using [CircuitLab](https://www.circuitlab.com/)