Question: ```
ldr r0, #0x28

```

What is the `ldr` instruction ? Does it load a string from some offset?
How can I find the string/value that is actually loaded ?

Answer: 
LDR loads a 32-bit constant (LDRH (halfword): 16 bit, LDRB (byte): 8 bit) from memory into the specified target register (r0 in your example).

Since 32-bit constants cannot be encoded in 32-bit opcodes (or 16-bit for Thumb instructions), the assembler stores the constant in the text segment close to the referencing instruction and then references the value using (usually) PC-relative addressing, i.e. some offset from r15.

Thus, ldr is in fact a pseudo instruction. The following code

```
    .code 32
main:
    ldr r0, =0x12345678
    bx lr

```

is translated by the assembler into

```
00000000 <main>:
       0:   e51f0000    ldr r0, [pc, #-0]   ; 8 <main+0x8>
       4:   e12fff1e    bx  lr
       8:   12345678    .word   0x12345678

```

As you can see, the constant referenced in the original ldr instruction is in fact stored at address 0x8 instead of in the instruction itself. The ldr instruction at address 0 then references this value using PC-relative addressing. The offset to the PC is 0 (instead of 8), since the actual PC value is always the address of the current instruction + 8 - this is an effect of the early ARM processor pipeline which has to be preserved for compatibility.
This can be simply translated into:

```
r0 = 0x28;

```

In ARM assembly, the `#` marks the immediate values and the `r0`, `r1`, ... are registers. The `ldr` instruction can take the following syntactic forms (yours is the first line):

```
LDR{type}{cond} Rt, [Rn {, #offset}] ; immediate offset
LDR{type}{cond} Rt, [Rn, #offset]! ; pre-indexed
LDR{type}{cond} Rt, [Rn], #offset ; post-indexed
LDRD{cond} Rt, Rt2, [Rn {, #offset}] ; immediate offset, doubleword
LDRD{cond} Rt, Rt2, [Rn, #offset]! ; pre-indexed, doubleword
LDRD{cond} Rt, Rt2, [Rn], #offset ; post-indexed, doubleword 

```