Question: Most of us who are from electronics background knows that SRAM is faster than DRAM. But when it comes to comparing RAM with ROM, i am unsure.

My question is related to micro-controller :
"If a code is executing directly from RAM/ROM, whose performance will be better ?? 
1) execution from RAM or 
2) execution from ROM or 
3) both will perform equal"

Also considering the fact that ROM are designed to have higher READ speeds. whereas for RAM, there is a trade off of read speed for having write capabilities.

Answer: 
It depends entirely on the memory and CPU architecture. As a rule of thumb, SRAM is faster than flash, particularly on higher-speed MCUs (>100 MHz). SRAM bit cells produce a (more or less) logic-level output, while flash memory has to go through a slower current sensing process.

How much faster (if any) again depends on the architecture -- the word size of the memories, the number of wait states on each, the presence of caching, the size of the CPU instructions, etc. If you're running at a low enough frequency, you could have zero wait states on flash and RAM, so they might run at the same speed.

The code also matters. If your code is strictly linear (no branching), the flash could prefetch instructions fast enough to keep the CPU saturated even at higher frequencies. As Olin said, a Harvard architecture CPU with separate program and data read paths could perform differently when code and data are in different memories.

Metal ROMs (and other nonvolatile memories such as FRAM) have their own characteristics, and may or may not be as fast as SRAM. The ability to write doesn't necessarily make a difference; it's more about the characteristics of the bit cell output and sensing circuits.

The datasheet will give you a rough idea of the speed difference, but the only way to know for sure is to profile your code.
"Running a program" requires a CPU with a synchronous clock. Slow memory can be accommodated by either running the entire system at a slow enough clock, or by inserting `wait states` (extra do-nothing clock cycles between the fetch and decode phases), active only for certain address ranges (see the ancient 8085 for example).The CPU instruction fetch doesn't know or care exactly when the data is settled to its final value, just as long as it does not change during the setup/hold interval.

A microcontroller usually has all of its memory on-chip, so unless stated otherwise I'd assume the memory system is all zero-wait-state. (but read datasheet to confirm). Typical microcontrollers are meant to be simpler, single-chip solutions compared to a desktop, so wait states are unlikely in a microcontroller. **So it's unlikely that a *microcontroller* would have mismatched on-chip memory speeds.**

Faster memory generally costs a premium (higher voltage, lower capacitance, more demand). An 80xx86 has fast SRAM in L2 cache and even faster SRAM in L1 cache, and lots of slower DRAM off-chip attached to a memory controller. This kind of system is a lot more complicated than a microcontroller, and is beyond the scope of the question. (But of great interest to a computer engineer!)