Question: I was reading the [SVE whitepaper](https://developer.arm.com/hpc/a-sneak-peek-into-sve-and-vla-programming) from ARM and came across something that struck me as odd (in a non-SVE example):

```
mov x8, xzr

```

I didn't know what this `xzr` register was, so I looked it up and found [some content from ARM](https://community.arm.com/processors/f/discussions/3185/wzr-xzr-register-s-purpose) stating that it was, in many contexts, synonymous with zero.

So it looks like `x8` is being initialised to zero, which makes sense because it's executed just before a loop where `x8` is used as the loop counter.

What I don't understand is, why wasn't the literal `0` used instead of `xzr`? For example:

```
mov x8, 0

```

To summarise, my question is: why might one use the `xzr` register instead of the literal `0` here?

Answer: 
These two instructions should be identical - both in terms of effect and expected performance.

They're actually both *aliases* of more general purpose instructions.

`mov x8, 0` is encoded as `orr x8, xzr, 0`

`mov x8, xzr` is encoded as `orr x8, xzr, xzr`

Aliases are useful because they make the ASM more readable.

The second encoding demonstrates why having a zero register `xzr` can be useful. Because we know xzr is always zero, we can reuse the `orr` instruction for `mov`. Without it, `mov` would require a different encoding, and so would waste encoding space.
This answer is not "on all fours" to the OP. 

XZR could be used to discard results; e.g., "ldr xzr, [sp], 16". See GDB below

```
0x7fffffef40:   0x00000000      0x00000000      0x00400498      0x00000000
0x7fffffef50:   0x00000000      0x00000000      0x00000000      0x00000000
              ldr x0,=0xdead
(gdb)
              ldr x1,=0xc0de
(gdb)
              stp x0, x1, [sp, #-16]!
(gdb) x/8x $sp
0x7fffffef30:   0x0000dead      0x00000000      0x0000c0de      0x00000000
0x7fffffef40:   0x00000000      0x00000000      0x00400498      0x00000000

              ldr xzr, [sp], #16
(gdb) x/8x $sp
0x7fffffef40:   0x00000000      0x00000000      0x00400498      0x00000000
0x7fffffef50:   0x00000000      0x00000000      0x00000000      0x00000000

```

Also remember that in ARMv8 the stack should be quad-word aligned or SP mod 16 = 0. 
So you may use XZR one of the "pushed" or "popped" pair registers.

```
stp x1, xzr, [sp, #-16]!

ldp x10, xzr, [sp], #16

```