Question: Why is it that the produced clock frequency is 6.144 MHz, but internally it (8085 processor) uses only 3.072 MHz. Also what leads to the specific value of 6.144 in a clock. 

I found an answer at yahoo.... <http://answers.yahoo.com/question/index?qid=20080810090119AAurr2i>

but I must admit I didn't still get it it well. Could any of you guys throw out a few lines on this, please?

Answer: 
Internally, the core of the 8085A requires a two-phase clock. The internal logic that derives the two clock phases also divides the input clock by two. As previously stated, the reason for using a 6.144MHz input clock is for baud-rate purposes, the chip will run just fine at 6MHz. The chip is actually rated at 3MHz requiring a 6MHz crystal, but runs happily with a 6.144MHz giving easier baud rate generation (An Uart could be clocked with either the 6.144MHz from an Oscillator driving the 8085 or at 3.072MHz from the 8085's CLK output providing many usable Baud rates). I still use these archaic chips to perform special functions in some of my robots. I clock the Uarts with their own oscillator and I clock the 8085A's with a 6.4MHz oscillator, which runs the chip at 3.2MHz. The 3.2MHz divides down nicely to provide the 40KHz clock for my ultrasonic transducers. It makes more sense to use more modern I.C. devices in my 'bots, but I have a ton of old 8085's, Z80's, 63C09 and 63C09E's, 68B09 and 68B09E's, etc. that I really enjoy playing with.
Clock is nothing but a moment when you want an event to occur. Now, we do not prefer level triggering in digital circuits because when more time is given, interaction may occur between different circuits within the microprocessor leading to short circuits. So we GO FOR EDGE TRIGGERING.
Now, the microprocessor doesn't know when edge triggering has occured. It only understands 1 or 0. So a flip flop is required to produce 1 and 0 whenever a clock edge is detected. Thus , it becomes necessary to use a flip flop. As a result the clock frequency is divided by two.