diff --git a/.gitattributes b/.gitattributes
index e998415ad99a91093ecb75b27730d936999d33b4..40479c9356ac4d5053d98b5d1442fcd26e36e89e 100644
--- a/.gitattributes
+++ b/.gitattributes
@@ -34,3 +34,16 @@ saved_model/**/* filter=lfs diff=lfs merge=lfs -text
*.zst filter=lfs diff=lfs merge=lfs -text
*tfevents* filter=lfs diff=lfs merge=lfs -text
facewrapper/libs/libttvfaceengine6.so filter=lfs diff=lfs merge=lfs -text
+openvino/libgna.so filter=lfs diff=lfs merge=lfs -text
+openvino/libgna.so.2 filter=lfs diff=lfs merge=lfs -text
+openvino/libgna.so.3.0.0.1455 filter=lfs diff=lfs merge=lfs -text
+openvino/libopenvino_gapi_preproc.so filter=lfs diff=lfs merge=lfs -text
+openvino/libopenvino_intel_cpu_plugin.so filter=lfs diff=lfs merge=lfs -text
+openvino/libopenvino_intel_gna_plugin.so filter=lfs diff=lfs merge=lfs -text
+openvino/libopenvino_intel_hddl_plugin.so filter=lfs diff=lfs merge=lfs -text
+openvino/libopenvino_intel_myriad_plugin.so filter=lfs diff=lfs merge=lfs -text
+openvino/libopenvino_onnx_frontend.so filter=lfs diff=lfs merge=lfs -text
+openvino/libopenvino_tensorflow_fe.so filter=lfs diff=lfs merge=lfs -text
+openvino/libopenvino.so filter=lfs diff=lfs merge=lfs -text
+openvino/pcie-ma2x8x.mvcmd filter=lfs diff=lfs merge=lfs -text
+openvino/usb-ma2x8x.mvcmd filter=lfs diff=lfs merge=lfs -text
diff --git a/openvino/cache.json b/openvino/cache.json
new file mode 100644
index 0000000000000000000000000000000000000000..59ad3e67c221a29fb809c61fb820cc42ac35fb71
--- /dev/null
+++ b/openvino/cache.json
@@ -0,0 +1,114134 @@
+{
+ "version_2": {
+ "24": {
+ "CONVOLUTION": {
+ "F16_BFYX_v416_p1_1_v416_p1_1_v3_p0_0_v1_p0_0;F16_BFYX_v416_p0_0_v416_p0_0_v16_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1" : ["convolution_gpu_bfyx_gemm_like", 2],
+ "F16_BFYX_v208_p1_1_v208_p1_1_v16_p0_0_v1_p0_0;F16_BFYX_v208_p0_0_v208_p0_0_v32_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1" : ["convolution_gpu_bfyx_gemm_like", 2],
+ "F16_BFYX_v104_p1_1_v104_p1_1_v32_p0_0_v1_p0_0;F16_BFYX_v104_p0_0_v104_p0_0_v64_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1" : ["convolution_gpu_bfyx_direct_10_12_16", 2],
+ "F16_BFYX_v52_p1_1_v52_p1_1_v64_p0_0_v1_p0_0;F16_BFYX_v52_p0_0_v52_p0_0_v128_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1" : ["convolution_gpu_bfyx_direct_10_12_16", 2],
+ "F16_BFYX_v26_p1_1_v26_p1_1_v128_p0_0_v1_p0_0;F16_BFYX_v26_p0_0_v26_p0_0_v256_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1" : ["convolution_gpu_bfyx_direct_10_12_16", 2],
+ "F16_BFYX_v13_p1_1_v13_p1_1_v256_p0_0_v1_p0_0;F16_BFYX_v13_p0_0_v13_p0_0_v512_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1" : ["convolution_gpu_bfyx_os_iyx_osv16", 708],
+ "F16_BFYX_v13_p1_1_v13_p1_1_v512_p0_0_v1_p0_0;F16_BFYX_v13_p1_1_v13_p1_1_v1024_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1" : ["convolution_gpu_bfyx_os_iyx_osv16", 1077],
+ "F16_BFYX_v13_p1_1_v13_p1_1_v1024_p0_0_v1_p0_0;F16_BFYX_v13_p0_0_v13_p0_0_v1024_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1" : ["convolution_gpu_bfyx_os_iyx_osv16", 1077],
+ "F16_BFYX_v416_p1_1_v416_p1_1_v3_p0_0_v1_p0_0;F16_BFYX_v416_p0_0_v416_p0_0_v32_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1" : ["convolution_gpu_bfyx_gemm_like", 2],
+ "F16_BFYX_v208_p1_1_v208_p1_1_v32_p0_0_v1_p0_0;F16_BFYX_v208_p0_0_v208_p0_0_v64_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1" : ["convolution_gpu_bfyx_direct_10_12_16", 2],
+ "F16_BYXF_v64_p0_0_v104_p0_0_v104_p0_0_v1_p0_0;F16_BYXF_v128_p0_0_v104_p0_0_v104_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1" : ["convolution_gpu_winograd_6x3_s1_fused", 2],
+ "F16_BYXF_v128_p0_0_v104_p0_0_v104_p0_0_v1_p0_0;F16_BYXF_v64_p0_0_v104_p0_0_v104_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1" : ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 2],
+ "F16_BYXF_v128_p0_0_v52_p0_0_v52_p0_0_v1_p0_0;F16_BYXF_v256_p0_0_v52_p0_0_v52_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1" : ["convolution_gpu_winograd_6x3_s1_fused", 2],
+ "F16_BYXF_v256_p0_0_v52_p0_0_v52_p0_0_v1_p0_0;F16_BYXF_v128_p0_0_v52_p0_0_v52_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1" : ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 2],
+ "F16_BYXF_v256_p0_0_v26_p0_0_v26_p0_0_v1_p0_0;F16_BYXF_v512_p0_0_v26_p0_0_v26_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1" : ["convolution_gpu_winograd_6x3_s1_fused", 2],
+ "F16_BYXF_v512_p0_0_v26_p0_0_v26_p0_0_v1_p0_0;F16_BYXF_v256_p0_0_v26_p0_0_v26_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1" : ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 2],
+ "F16_BYXF_v512_p0_0_v26_p0_0_v26_p0_0_v1_p0_0;F16_BYXF_v64_p0_0_v26_p0_0_v26_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1" : ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 2],
+ "F16_BYXF_v512_p0_0_v13_p0_0_v13_p0_0_v1_p0_0;F16_BYXF_v1024_p0_0_v13_p0_0_v13_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1" : ["convolution_gpu_winograd_6x3_s1_fused", 2],
+ "F16_BYXF_v1024_p0_0_v13_p0_0_v13_p0_0_v1_p0_0;F16_BYXF_v512_p0_0_v13_p0_0_v13_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1" : ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 2],
+ "F16_BYXF_v1024_p0_0_v13_p0_0_v13_p0_0_v1_p0_0;F16_BYXF_v1024_p0_0_v13_p0_0_v13_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1" : ["convolution_gpu_winograd_6x3_s1_fused", 2],
+ "F16_BFYX_v13_p1_1_v13_p1_1_v1280_p0_0_v1_p0_0;F16_BFYX_v13_p0_0_v13_p0_0_v1024_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1" : ["convolution_gpu_bfyx_os_iyx_osv16", 1075],
+ "F16_BFYX_v7_p1_1_v7_p1_1_v512_p0_0_v1_p0_0;F16_BFYX_v7_p1_1_v7_p1_1_v1024_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1" : ["convolution_gpu_bfyx_os_iyx_osv16", 604],
+ "F16_BFYX_v7_p1_1_v7_p1_1_v1024_p0_0_v1_p0_0;F16_BFYX_v7_p0_0_v7_p0_0_v256_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1" : ["convolution_gpu_bfyx_direct_10_12_16", 0],
+ "F16_BFYX_v448_p1_1_v448_p1_1_v3_p0_0_v1_p0_0;F16_BFYX_v448_p0_0_v448_p0_0_v16_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1" : ["convolution_gpu_bfyx_gemm_like", 2],
+ "F16_BFYX_v224_p1_1_v224_p1_1_v16_p0_0_v1_p0_0;F16_BFYX_v224_p0_0_v224_p0_0_v32_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1" : ["convolution_gpu_bfyx_gemm_like", 2],
+ "F16_BFYX_v112_p1_1_v112_p1_1_v32_p0_0_v1_p0_0;F16_BFYX_v112_p0_0_v112_p0_0_v64_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1" : ["convolution_gpu_bfyx_direct_10_12_16", 2],
+ "F16_BYXF_v64_p0_0_v56_p0_0_v56_p0_0_v1_p0_0;F16_BYXF_v128_p0_0_v56_p0_0_v56_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1" : ["convolution_gpu_winograd_6x3_s1_fused", 2],
+ "F16_BYXF_v128_p0_0_v28_p0_0_v28_p0_0_v1_p0_0;F16_BYXF_v256_p0_0_v28_p0_0_v28_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1" : ["convolution_gpu_winograd_6x3_s1_fused", 2],
+ "F16_BYXF_v256_p0_0_v14_p0_0_v14_p0_0_v1_p0_0;F16_BYXF_v512_p0_0_v14_p0_0_v14_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1" : ["convolution_gpu_winograd_6x3_s1_fused", 2],
+ "F32_BFYX_v1200_p0_0_v1200_p0_0_v3_p0_0_v1_p0_0;F32_BFYX_v599_p0_0_v599_p0_0_v96_p0_0_v1_p0_0;3_3_1;2_2_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F32_BFYX_v599_p0_1_v599_p0_1_v96_p0_0_v1_p0_0;F32_BFYX_v600_p0_0_v600_p0_0_v96_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;96": ["convolution_gpu_bfyx_os_iyx_osv16", 690],
+ "F32_BFYX_v599_p2_2_v599_p2_2_v96_p0_0_v1_p0_0;F32_BFYX_v300_p0_0_v300_p0_0_v96_p0_0_v1_p0_0;5_5_1;2_2_1;1_1_1;2_2_0;1;96": ["convolution_gpu_bfyx_os_iyx_osv16", 256],
+ "F32_BFYX_v599_p3_3_v599_p3_3_v96_p0_0_v1_p0_0;F32_BFYX_v300_p0_0_v300_p0_0_v96_p0_0_v1_p0_0;7_7_1;2_2_1;1_1_1;3_3_0;1;96": ["convolution_gpu_bfyx_os_iyx_osv16", 290],
+ "F32_BFYX_v599_p0_0_v599_p0_0_v96_p0_0_v1_p0_0;F32_BFYX_v599_p0_0_v599_p0_0_v42_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F32_BFYX_v300_p0_0_v300_p0_0_v96_p0_0_v1_p0_0;F32_BFYX_v300_p0_0_v300_p0_0_v42_p0_42_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 1],
+ "F32_BFYX_v300_p0_0_v300_p0_0_v96_p0_0_v1_p0_0;F32_BFYX_v300_p2_2_v300_p2_2_v42_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 0],
+ "F32_BFYX_v300_p0_0_v300_p0_0_v96_p0_0_v1_p0_0;F32_BFYX_v300_p3_3_v300_p3_3_v42_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 1],
+ "F32_BFYX_v599_p2_2_v599_p2_2_v42_p0_0_v1_p0_0;F32_BFYX_v300_p0_0_v300_p0_0_v42_p0_0_v1_p0_0;5_5_1;2_2_1;1_1_1;2_2_0;1;42": ["convolution_gpu_bfyx_os_iyx_osv16", 185],
+ "F32_BFYX_v300_p0_0_v300_p0_0_v96_p0_0_v1_p0_0;F32_BFYX_v300_p0_0_v300_p0_0_v42_p42_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F32_BFYX_v300_p2_2_v300_p2_2_v42_p0_0_v1_p0_0;F32_BFYX_v300_p0_0_v300_p0_0_v42_p0_0_v1_p0_0;5_5_1;1_1_1;1_1_1;2_2_0;1;42": ["convolution_gpu_bfyx_os_iyx_osv16", 1051],
+ "F32_BFYX_v300_p3_3_v300_p3_3_v42_p0_0_v1_p0_0;F32_BFYX_v300_p0_0_v300_p0_0_v42_p0_0_v1_p0_0;7_7_1;1_1_1;1_1_1;3_3_0;1;42": ["convolution_gpu_bfyx_os_iyx_osv16", 643],
+ "F32_BFYX_v300_p0_0_v300_p0_0_v42_p0_0_v1_p0_0;F32_BFYX_v300_p2_2_v300_p2_2_v42_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F32_BFYX_v300_p0_0_v300_p0_0_v42_p0_0_v1_p0_0;F32_BFYX_v300_p0_0_v300_p0_0_v42_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F32_BFYX_v300_p1_2_v300_p1_2_v84_p0_0_v1_p0_0;F32_BFYX_v150_p0_0_v150_p0_0_v84_p0_0_v1_p0_0;5_5_1;2_2_1;1_1_1;1_1_0;1;84": ["convolution_gpu_bfyx_os_iyx_osv16", 1010],
+ "F32_BFYX_v300_p2_3_v300_p2_3_v84_p0_0_v1_p0_0;F32_BFYX_v150_p0_0_v150_p0_0_v84_p0_0_v1_p0_0;7_7_1;2_2_1;1_1_1;2_2_0;1;84": ["convolution_gpu_bfyx_os_iyx_osv16", 906],
+ "F32_BFYX_v150_p0_0_v150_p0_0_v84_p0_0_v1_p0_0;F32_BFYX_v150_p2_2_v150_p2_2_v84_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 0],
+ "F32_BFYX_v150_p0_0_v150_p0_0_v84_p0_0_v1_p0_0;F32_BFYX_v150_p3_3_v150_p3_3_v84_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F32_BFYX_v300_p1_1_v300_p1_1_v42_p0_0_v1_p0_0;F32_BFYX_v300_p0_0_v300_p0_0_v42_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;42": ["convolution_gpu_bfyx_os_iyx_osv16", 946],
+ "F32_BFYX_v300_p0_0_v300_p0_0_v42_p0_0_v1_p0_0;F32_BFYX_v300_p1_1_v300_p1_1_v42_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F32_BFYX_v150_p2_2_v150_p2_2_v84_p0_0_v1_p0_0;F32_BFYX_v150_p0_0_v150_p0_0_v84_p0_0_v1_p0_0;5_5_1;1_1_1;1_1_1;2_2_0;1;84": ["convolution_gpu_bfyx_os_iyx_osv16", 1017],
+ "F32_BFYX_v150_p3_3_v150_p3_3_v84_p0_0_v1_p0_0;F32_BFYX_v150_p0_0_v150_p0_0_v84_p0_0_v1_p0_0;7_7_1;1_1_1;1_1_1;3_3_0;1;84": ["convolution_gpu_bfyx_os_iyx_osv16", 259],
+ "F32_BFYX_v150_p0_0_v150_p0_0_v84_p0_0_v1_p0_0;F32_BFYX_v150_p0_0_v150_p0_0_v84_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 0],
+ "F32_BFYX_v300_p0_0_v300_p0_0_v168_p0_0_v1_p0_0;F32_BFYX_v300_p0_0_v300_p0_0_v84_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F32_BFYX_v300_p0_1_v300_p0_1_v168_p0_0_v1_p0_0;F32_BFYX_v301_p0_0_v301_p0_0_v168_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;168": ["convolution_gpu_bfyx_depthwise_weights_lwg", 1],
+ "F32_BFYX_v150_p0_0_v150_p0_0_v168_p0_0_v1_p0_0;F32_BFYX_v150_p0_0_v150_p0_0_v84_p0_84_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F32_BFYX_v150_p0_0_v150_p0_0_v168_p0_0_v1_p0_0;F32_BFYX_v150_p0_0_v150_p0_0_v84_p84_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
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+ "F16_BFYX_v60_p0_0_v60_p0_0_v3_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v60_p1_0_v60_p1_0_v32_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_to_bfyx_f16", 8],
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+ "F16_B_FS_YX_FSV16_v1_p0_0_v1_p0_0_v512_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v1_p0_0_v1_p0_0_v1001_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_f16", 1],
+ "F32_BFYX_v160_p0_0_v160_p0_0_v3_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v80_p1_1_v80_p1_1_v16_p0_0_v1_p0_0;3_3_1;2_2_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_to_bfyx_f16", 6],
+ "F32_B_FS_YX_FSV16_v80_p1_1_v80_p1_1_v16_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v80_p0_0_v80_p0_0_v16_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;16": ["convolution_gpu_bfyx_f16_depthwise", 2],
+ "F32_B_FS_YX_FSV16_v80_p0_0_v80_p0_0_v16_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v80_p0_1_v80_p0_1_v32_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_f16", 7],
+ "F32_B_FS_YX_FSV16_v80_p0_1_v80_p0_1_v32_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v40_p0_0_v40_p0_0_v32_p0_0_v1_p0_0;3_3_1;2_2_1;1_1_1;0_0_0;1;32": ["convolution_gpu_bfyx_f16_depthwise", 1],
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+ "F16_B_FS_YX_FSV16_v32_p0_0_v32_p0_0_v64_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v32_p1_1_v32_p1_1_v128_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_f16", 7],
+ "F16_B_FS_YX_FSV16_v32_p1_1_v32_p1_1_v128_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v32_p0_0_v32_p0_0_v128_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;128": ["convolution_gpu_bfyx_f16_depthwise", 1],
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+ "F16_B_FS_YX_FSV16_v32_p1_0_v32_p1_0_v256_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v16_p0_0_v16_p0_0_v256_p0_0_v1_p0_0;3_3_1;2_2_1;1_1_1;1_1_0;1;256": ["convolution_gpu_bfyx_f16_depthwise", 1],
+ "F16_B_FS_YX_FSV16_v16_p0_0_v16_p0_0_v256_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v16_p0_0_v16_p0_0_v128_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_f16_1x1", 1],
+ "F16_B_FS_YX_FSV16_v16_p0_0_v16_p0_0_v128_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v16_p1_1_v16_p1_1_v256_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_f16", 7],
+ "F16_B_FS_YX_FSV16_v16_p1_1_v16_p1_1_v256_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v16_p0_0_v16_p0_0_v256_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;256": ["convolution_gpu_bfyx_f16_depthwise", 2],
+ "F16_B_FS_YX_FSV16_v16_p0_0_v16_p0_0_v128_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v16_p1_0_v16_p1_0_v512_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_f16", 2],
+ "F16_B_FS_YX_FSV16_v16_p1_0_v16_p1_0_v512_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v8_p0_0_v8_p0_0_v512_p0_0_v1_p0_0;3_3_1;2_2_1;1_1_1;1_1_0;1;512": ["convolution_gpu_bfyx_f16_depthwise", 2],
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+ "F32_B_FS_YX_FSV16_v32_p1_1_v32_p1_1_v128_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v32_p0_0_v32_p0_0_v128_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;128": ["convolution_gpu_bfyx_f16_depthwise", 2],
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+ "F32_B_FS_YX_FSV16_v16_p1_0_v16_p1_0_v512_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v8_p0_0_v8_p0_0_v512_p0_0_v1_p0_0;3_3_1;2_2_1;1_1_1;1_1_0;1;512": ["convolution_gpu_bfyx_f16_depthwise", 1],
+ "F32_B_FS_YX_FSV16_v8_p0_0_v8_p0_0_v512_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v8_p0_0_v8_p0_0_v128_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_f16_1x1", 1],
+ "F32_B_FS_YX_FSV16_v8_p0_0_v8_p0_0_v128_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v8_p1_1_v8_p1_1_v256_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_f16_1x1", 2],
+ "F32_B_FS_YX_FSV16_v8_p1_1_v8_p1_1_v256_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v8_p0_0_v8_p0_0_v256_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;256": ["convolution_gpu_bfyx_f16_depthwise", 2],
+ "F32_B_FS_YX_FSV16_v8_p0_0_v8_p0_0_v256_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v8_p0_0_v8_p0_0_v128_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_f16", 6],
+ "F32_B_FS_YX_FSV16_v8_p0_0_v8_p0_0_v128_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v8_p0_0_v8_p0_0_v512_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_f16_1x1", 2],
+ "F32_B_FS_YX_FSV16_v8_p0_0_v8_p0_0_v512_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v1_p0_0_v1_p0_0_v512_p0_0_v1_p0_0;8_8_1;1_1_1;1_1_1;0_0_0;1;512": ["convolution_gpu_bfyx_f16_depthwise", 2],
+ "F32_B_FS_YX_FSV16_v1_p0_0_v1_p0_0_v512_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v1_p0_0_v1_p0_0_v128_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_f16", 5],
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+ "F32_B_FS_YX_FSV16_v16_p0_0_v16_p0_0_v512_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v16_p0_0_v16_p0_0_v256_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_f16_1x1", 2],
+ "F32_B_FS_YX_FSV16_v32_p1_1_v32_p1_1_v512_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v32_p0_0_v32_p0_0_v256_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_f16", 8],
+ "F32_B_FS_YX_FSV16_v32_p0_0_v32_p0_0_v256_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v32_p0_0_v32_p0_0_v128_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_f16_1x1", 1],
+ "F32_B_FS_YX_FSV16_v128_p1_1_v128_p1_1_v128_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v128_p1_1_v128_p1_1_v64_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_f16", 4],
+ "F32_B_FS_YX_FSV16_v128_p1_1_v128_p1_1_v64_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v128_p0_0_v128_p0_0_v256_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_f16", 7],
+ "F32_BFYX_v128_p0_0_v128_p0_0_v256_p0_0_v1_p0_0;F32_BFYX_v128_p0_0_v128_p0_0_v2_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 1050],
+ "F32_B_FS_YX_FSV16_v128_p0_0_v128_p0_0_v256_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v128_p0_0_v128_p0_0_v80_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_f16", 6],
+ "F32_BFYX_v600_p3_2_v600_p3_2_v3_p0_0_v1_p0_0;F32_BFYX_v300_p0_0_v300_p0_0_v64_p0_0_v1_p0_0;7_7_1;2_2_1;1_1_1;3_3_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F32_BFYX_v150_p0_0_v150_p0_0_v64_p0_0_v1_p0_0;F32_BFYX_v150_p1_1_v150_p1_1_v64_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F32_BFYX_v150_p1_1_v150_p1_1_v64_p0_0_v1_p0_0;F32_BFYX_v150_p0_0_v150_p0_0_v64_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 263],
+ "F32_BFYX_v150_p0_0_v150_p0_0_v64_p0_0_v1_p0_0;F32_BFYX_v150_p0_0_v150_p0_0_v256_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 1],
+ "F32_BFYX_v150_p0_0_v150_p0_0_v256_p0_0_v1_p0_0;F32_BFYX_v150_p1_1_v150_p1_1_v64_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F32_BFYX_v150_p0_0_v150_p0_0_v256_p0_0_v1_p0_0;F32_BFYX_v150_p1_0_v150_p1_0_v64_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F32_BFYX_v150_p1_0_v150_p1_0_v64_p0_0_v1_p0_0;F32_BFYX_v75_p0_0_v75_p0_0_v64_p0_0_v1_p0_0;3_3_1;2_2_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 911],
+ "F32_BFYX_v75_p0_0_v75_p0_0_v256_p0_0_v1_p0_0;F32_BFYX_v75_p1_1_v75_p1_1_v128_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 0],
+ "F32_BFYX_v75_p1_1_v75_p1_1_v128_p0_0_v1_p0_0;F32_BFYX_v75_p0_0_v75_p0_0_v128_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 911],
+ "F32_BFYX_v75_p0_0_v75_p0_0_v128_p0_0_v1_p0_0;F32_BFYX_v75_p0_0_v75_p0_0_v512_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 1],
+ "F32_BFYX_v75_p0_0_v75_p0_0_v512_p0_0_v1_p0_0;F32_BFYX_v75_p1_1_v75_p1_1_v128_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 0],
+ "F32_BFYX_v75_p1_1_v75_p1_1_v128_p0_0_v1_p0_0;F32_BFYX_v38_p0_0_v38_p0_0_v128_p0_0_v1_p0_0;3_3_1;2_2_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 1087],
+ "F32_BFYX_v38_p0_0_v38_p0_0_v512_p0_0_v1_p0_0;F32_BFYX_v38_p1_1_v38_p1_1_v256_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 1075],
+ "F32_BFYX_v38_p1_1_v38_p1_1_v256_p0_0_v1_p0_0;F32_BFYX_v38_p0_0_v38_p0_0_v256_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 252],
+ "F32_BFYX_v38_p0_0_v38_p0_0_v256_p0_0_v1_p0_0;F32_BFYX_v38_p0_0_v38_p0_0_v1024_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 1085],
+ "F32_BFYX_v38_p0_0_v38_p0_0_v1024_p0_0_v1_p0_0;F32_BFYX_v38_p1_1_v38_p1_1_v256_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F32_BFYX_v38_p1_1_v38_p1_1_v1024_p0_0_v1_p0_0;F32_BFYX_v38_p0_0_v38_p0_0_v512_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 966],
+ "F32_BFYX_v38_p0_0_v38_p0_0_v512_p0_0_v1_p0_0;F32_BFYX_v38_p0_0_v38_p0_0_v24_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 323],
+ "F32_BFYX_v38_p0_0_v38_p0_0_v512_p0_0_v1_p0_0;F32_BFYX_v38_p0_0_v38_p0_0_v48_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 323],
+ "F32_BFYX_v7_p0_0_v7_p0_0_v1024_p0_0_v100_p0_0;F32_BFYX_v7_p1_1_v7_p1_1_v512_p0_0_v100_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_opt", 0],
+ "F32_BFYX_v7_p1_1_v7_p1_1_v512_p0_0_v100_p0_0;F32_BFYX_v7_p0_0_v7_p0_0_v512_p0_0_v100_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 607],
+ "F32_BFYX_v7_p0_0_v7_p0_0_v512_p0_0_v100_p0_0;F32_BFYX_v7_p0_0_v7_p0_0_v2048_p0_0_v100_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_opt", 0],
+ "F32_BFYX_v7_p0_0_v7_p0_0_v2048_p0_0_v100_p0_0;F32_BFYX_v7_p1_1_v7_p1_1_v512_p0_0_v100_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_opt", 1],
+ "F32_BFYX_v7_p0_0_v7_p0_0_v1024_p0_0_v20_p0_0;F32_BFYX_v7_p1_1_v7_p1_1_v512_p0_0_v20_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_opt", 2],
+ "F32_BFYX_v7_p1_1_v7_p1_1_v512_p0_0_v20_p0_0;F32_BFYX_v7_p0_0_v7_p0_0_v512_p0_0_v20_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 982],
+ "F32_BFYX_v7_p0_0_v7_p0_0_v512_p0_0_v20_p0_0;F32_BFYX_v7_p0_0_v7_p0_0_v2048_p0_0_v20_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_opt", 1],
+ "F32_BFYX_v7_p0_0_v7_p0_0_v2048_p0_0_v20_p0_0;F32_BFYX_v7_p1_1_v7_p1_1_v512_p0_0_v20_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_opt", 0],
+ "F32_BFYX_v2048_p1_0_v1024_p1_0_v3_p0_0_v1_p0_0;F32_BFYX_v1024_p1_0_v512_p1_0_v32_p0_0_v1_p0_0;3_3_1;2_2_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F32_BFYX_v1024_p1_0_v512_p1_0_v3_p0_0_v1_p0_0;F32_BFYX_v512_p1_1_v256_p1_1_v32_p0_0_v1_p0_0;3_3_1;2_2_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F32_BFYX_v1024_p1_0_v512_p1_0_v32_p0_0_v1_p0_0;F32_BFYX_v512_p1_0_v256_p1_0_v32_p0_0_v1_p0_0;3_3_1;2_2_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 188],
+ "F32_BFYX_v512_p1_1_v256_p1_1_v32_p0_0_v1_p0_0;F32_BFYX_v512_p1_1_v256_p1_1_v32_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 231],
+ "F32_BFYX_v512_p1_0_v256_p1_0_v32_p0_0_v1_p0_0;F32_BFYX_v256_p0_0_v128_p0_0_v64_p0_0_v1_p0_0;3_3_1;2_2_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_gemm_like", 1],
+ "F32_BFYX_v512_p1_1_v256_p1_1_v32_p0_0_v1_p0_0;F32_BFYX_v512_p0_0_v256_p0_0_v64_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 982],
+ "F32_BFYX_v256_p0_0_v128_p0_0_v64_p0_0_v1_p0_0;F32_BFYX_v256_p0_0_v128_p0_0_v128_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F32_BFYX_v256_p0_0_v128_p0_0_v64_p0_0_v1_p0_0;F32_BFYX_v256_p1_1_v128_p1_1_v32_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 0],
+ "F32_BFYX_v256_p1_1_v128_p1_1_v32_p0_0_v1_p0_0;F32_BFYX_v256_p0_0_v128_p0_0_v32_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 607],
+ "F32_BFYX_v256_p0_0_v128_p0_0_v128_p0_0_v1_p0_0;F32_BFYX_v256_p1_1_v128_p1_1_v32_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 1],
+ "F32_BFYX_v256_p0_0_v128_p0_0_v128_p0_0_v1_p0_0;F32_BFYX_v256_p1_0_v128_p1_0_v32_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 0],
+ "F32_BFYX_v256_p1_0_v128_p1_0_v32_p0_0_v1_p0_0;F32_BFYX_v128_p0_0_v64_p0_0_v32_p0_0_v1_p0_0;3_3_1;2_2_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_gemm_like", 1],
+ "F32_BFYX_v128_p0_0_v64_p0_0_v128_p0_0_v1_p0_0;F32_BFYX_v128_p0_0_v64_p0_0_v256_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F32_BFYX_v128_p0_0_v64_p0_0_v128_p0_0_v1_p0_0;F32_BFYX_v128_p1_1_v64_p1_1_v64_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F32_BFYX_v128_p1_1_v64_p1_1_v64_p0_0_v1_p0_0;F32_BFYX_v128_p0_0_v64_p0_0_v64_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 983],
+ "F32_BFYX_v128_p0_0_v64_p0_0_v256_p0_0_v1_p0_0;F32_BFYX_v128_p0_0_v64_p0_0_v128_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F32_BFYX_v64_p0_0_v32_p0_0_v256_p0_0_v1_p0_0;F32_BFYX_v64_p1_1_v32_p1_1_v64_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 1],
+ "F32_BFYX_v64_p1_1_v32_p1_1_v64_p0_0_v1_p0_0;F32_BFYX_v64_p0_0_v32_p0_0_v64_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 607],
+ "F32_BFYX_v64_p0_0_v32_p0_0_v256_p0_0_v1_p0_0;F32_BFYX_v64_p1_1_v32_p1_1_v128_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F32_BFYX_v64_p0_0_v32_p0_0_v256_p0_0_v1_p0_0;F32_BFYX_v64_p0_0_v32_p0_0_v512_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 353],
+ "F32_BFYX_v64_p1_1_v32_p1_1_v128_p0_0_v1_p0_0;F32_BFYX_v64_p0_0_v32_p0_0_v128_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 983],
+ "F32_BFYX_v64_p0_0_v32_p0_0_v512_p0_0_v1_p0_0;F32_BFYX_v64_p2_2_v32_p2_2_v128_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 0],
+ "F32_BFYX_v64_p2_2_v32_p2_2_v128_p0_0_v1_p0_0;F32_BFYX_v64_p0_0_v32_p0_0_v128_p0_0_v1_p0_0;3_3_1;1_1_1;2_2_1;2_2_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 607],
+ "F32_BFYX_v64_p0_0_v32_p0_0_v512_p0_0_v1_p0_0;F32_BFYX_v64_p0_0_v32_p0_0_v1024_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 729],
+ "F32_BFYX_v64_p0_0_v32_p0_0_v512_p0_0_v1_p0_0;F32_BFYX_v64_p1_1_v32_p1_1_v256_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 0],
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+ "F16_BFYX_v672_p0_0_v384_p0_0_v3_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v336_p1_1_v192_p1_1_v32_p0_0_v1_p0_0;3_3_1;2_2_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_to_bfyx_f16", 7],
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+ "F16_B_FS_YX_FSV16_v336_p0_0_v192_p0_0_v32_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v336_p1_0_v192_p1_0_v56_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_f16", 1],
+ "F16_B_FS_YX_FSV16_v336_p1_0_v192_p1_0_v56_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v168_p0_0_v96_p0_0_v56_p0_0_v1_p0_0;3_3_1;2_2_1;1_1_1;1_1_0;1;56": ["convolution_gpu_bfyx_f16_depthwise", 2],
+ "F16_B_FS_YX_FSV16_v168_p0_0_v96_p0_0_v56_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v168_p1_1_v96_p1_1_v112_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_f16", 1],
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+ "F16_B_FS_YX_FSV16_v38_p0_0_v38_p0_0_v32_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v38_p1_1_v38_p1_1_v192_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_f16", 8],
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+ "F16_B_FS_YX_FSV16_v2_p0_1_v2_p0_1_v64_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v1_p0_0_v1_p0_0_v64_p0_0_v1_p0_0;3_3_1;2_2_1;1_1_1;0_0_0;1;64": ["convolution_gpu_bfyx_f16_depthwise", 2],
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+ "F16_B_FS_YX_FSV16_v336_p0_0_v192_p0_0_v32_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v336_p1_0_v192_p1_0_v64_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_f16", 3],
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+ "F16_B_FS_YX_FSV16_v84_p0_0_v48_p0_0_v120_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v84_p1_1_v48_p1_1_v240_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_f16", 5],
+ "F16_B_FS_YX_FSV16_v84_p1_1_v48_p1_1_v240_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v84_p0_0_v48_p0_0_v240_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;240": ["convolution_gpu_bfyx_f16_depthwise", 2],
+ "F16_B_FS_YX_FSV16_v84_p0_0_v48_p0_0_v240_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v84_p1_0_v48_p1_0_v232_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_f16", 2],
+ "F16_B_FS_YX_FSV16_v84_p1_0_v48_p1_0_v232_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v42_p0_0_v24_p0_0_v232_p0_0_v1_p0_0;3_3_1;2_2_1;1_1_1;1_1_0;1;232": ["convolution_gpu_bfyx_f16_depthwise", 2],
+ "F16_B_FS_YX_FSV16_v42_p0_0_v24_p0_0_v232_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v42_p1_1_v24_p1_1_v448_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_f16_1x1", 2],
+ "F16_B_FS_YX_FSV16_v42_p1_1_v24_p1_1_v448_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v42_p0_0_v24_p0_0_v448_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;448": ["convolution_gpu_bfyx_f16_depthwise", 2],
+ "F16_B_FS_YX_FSV16_v42_p0_0_v24_p0_0_v448_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v42_p1_1_v24_p1_1_v400_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_f16_1x1", 2],
+ "F16_B_FS_YX_FSV16_v42_p1_1_v24_p1_1_v400_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v42_p0_0_v24_p0_0_v400_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;400": ["convolution_gpu_bfyx_f16_depthwise", 2],
+ "F16_B_FS_YX_FSV16_v42_p0_0_v24_p0_0_v400_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v42_p1_1_v24_p1_1_v392_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_f16", 1],
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+ "F32_BFYX_v112_p8_8_v64_p8_8_v24_p0_0_v1_p0_0;F32_BFYX_v112_p0_0_v64_p0_0_v24_p0_0_v1_p0_0;3_3_1;1_1_1;8_8_1;8_8_0;1;24": ["convolution_gpu_bfyx_depthwise_weights_lwg", 2],
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+ "F32_BFYX_v112_p1_1_v64_p1_1_v24_p0_0_v1_p0_0;F32_BFYX_v112_p0_0_v64_p0_0_v24_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;24": ["convolution_gpu_bfyx_os_iyx_osv16", 604],
+ "F32_BFYX_v28_p0_0_v16_p0_0_v48_p0_0_v1_p0_0;F32_BFYX_v28_p0_0_v16_p0_0_v16_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 700],
+ "F32_BFYX_v56_p0_0_v32_p0_0_v48_p0_0_v1_p0_0;F32_BFYX_v56_p0_0_v32_p0_0_v16_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 702],
+ "F32_BFYX_v112_p0_0_v64_p0_0_v48_p0_0_v1_p0_0;F32_BFYX_v112_p0_0_v64_p0_0_v24_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 1],
+ "F32_BFYX_v224_p0_0_v128_p0_0_v24_p0_0_v1_p0_0;F32_BFYX_v224_p0_0_v128_p0_0_v16_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 360],
+ "F32_BFYX_v448_p0_0_v256_p0_0_v16_p0_0_v1_p0_0;F32_BFYX_v448_p1_1_v256_p1_1_v16_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 360],
+ "F32_BFYX_v448_p1_1_v256_p1_1_v16_p0_0_v1_p0_0;F32_BFYX_v448_p0_0_v256_p0_0_v16_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;16": ["convolution_gpu_bfyx_os_iyx_osv16", 600],
+ "F32_BFYX_v448_p0_0_v256_p0_0_v16_p0_0_v1_p0_0;F32_BFYX_v448_p0_0_v256_p0_0_v4_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 1119],
+ "F32_BFYX_v544_p1_0_v320_p1_0_v3_p0_0_v1_p0_0;F32_BFYX_v272_p0_0_v160_p0_0_v32_p0_0_v1_p0_0;3_3_1;2_2_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F32_BFYX_v272_p0_0_v160_p0_0_v32_p0_0_v1_p0_0;F32_BFYX_v272_p1_1_v160_p1_1_v8_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 360],
+ "F32_BFYX_v272_p1_1_v160_p1_1_v8_p0_0_v1_p0_0;F32_BFYX_v272_p0_0_v160_p0_0_v8_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;8": ["convolution_gpu_bfyx_os_iyx_osv16", 227],
+ "F32_BFYX_v272_p0_0_v160_p0_0_v8_p0_0_v1_p0_0;F32_BFYX_v272_p0_0_v160_p0_0_v32_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 0],
+ "F32_BFYX_v272_p0_0_v160_p0_0_v32_p0_0_v1_p0_0;F32_BFYX_v272_p1_0_v160_p1_0_v16_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 366],
+ "F32_BFYX_v272_p1_0_v160_p1_0_v16_p0_0_v1_p0_0;F32_BFYX_v136_p0_0_v80_p0_0_v16_p0_0_v1_p0_0;3_3_1;2_2_1;1_1_1;1_1_0;1;16": ["convolution_gpu_bfyx_depthwise_weights_lwg", 0],
+ "F32_BFYX_v136_p0_0_v80_p0_0_v16_p0_0_v1_p0_0;F32_BFYX_v136_p0_0_v80_p0_0_v64_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 0],
+ "F32_BFYX_v136_p0_0_v80_p0_0_v64_p0_0_v1_p0_0;F32_BFYX_v136_p1_1_v80_p1_1_v16_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 974],
+ "F32_BFYX_v136_p1_1_v80_p1_1_v16_p0_0_v1_p0_0;F32_BFYX_v136_p0_0_v80_p0_0_v16_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;16": ["convolution_gpu_bfyx_os_iyx_osv16", 601],
+ "F32_BFYX_v136_p0_0_v80_p0_0_v64_p0_0_v1_p0_0;F32_BFYX_v136_p1_0_v80_p1_0_v32_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 0],
+ "F32_BFYX_v136_p1_0_v80_p1_0_v32_p0_0_v1_p0_0;F32_BFYX_v68_p0_0_v40_p0_0_v32_p0_0_v1_p0_0;3_3_1;2_2_1;1_1_1;1_1_0;1;32": ["convolution_gpu_bfyx_depthwise_weights_lwg", 1],
+ "F32_BFYX_v68_p0_0_v40_p0_0_v32_p0_0_v1_p0_0;F32_BFYX_v68_p0_0_v40_p0_0_v128_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 0],
+ "F32_BFYX_v68_p0_0_v40_p0_0_v128_p0_0_v1_p0_0;F32_BFYX_v68_p1_1_v40_p1_1_v32_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 1],
+ "F32_BFYX_v68_p1_1_v40_p1_1_v32_p0_0_v1_p0_0;F32_BFYX_v68_p0_0_v40_p0_0_v32_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;32": ["convolution_gpu_bfyx_os_iyx_osv16", 856],
+ "F32_BFYX_v68_p0_0_v40_p0_0_v128_p0_0_v1_p0_0;F32_BFYX_v68_p1_0_v40_p1_0_v64_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 1],
+ "F32_BFYX_v68_p1_0_v40_p1_0_v64_p0_0_v1_p0_0;F32_BFYX_v34_p0_0_v20_p0_0_v64_p0_0_v1_p0_0;3_3_1;2_2_1;1_1_1;1_1_0;1;64": ["convolution_gpu_bfyx_depthwise_weights_lwg", 2],
+ "F32_BFYX_v34_p0_0_v20_p0_0_v64_p0_0_v1_p0_0;F32_BFYX_v34_p0_0_v20_p0_0_v256_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 0],
+ "F32_BFYX_v34_p0_0_v20_p0_0_v256_p0_0_v1_p0_0;F32_BFYX_v34_p1_1_v20_p1_1_v64_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 286],
+ "F32_BFYX_v34_p1_1_v20_p1_1_v64_p0_0_v1_p0_0;F32_BFYX_v34_p0_0_v20_p0_0_v64_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;64": ["convolution_gpu_bfyx_depthwise_weights_lwg", 2],
+ "F32_BFYX_v34_p1_1_v20_p1_1_v256_p0_0_v1_p0_0;F32_BFYX_v34_p0_0_v20_p0_0_v48_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 884],
+ "F32_BFYX_v34_p1_1_v20_p1_1_v256_p0_0_v1_p0_0;F32_BFYX_v34_p0_0_v20_p0_0_v24_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 575],
+ "F32_BFYX_v68_p0_0_v40_p0_0_v128_p0_0_v1_p0_0;F32_BFYX_v68_p1_1_v40_p1_1_v128_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F32_BFYX_v68_p1_1_v40_p1_1_v128_p0_0_v1_p0_0;F32_BFYX_v68_p0_0_v40_p0_0_v36_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 866],
+ "F32_BFYX_v68_p1_1_v40_p1_1_v128_p0_0_v1_p0_0;F32_BFYX_v68_p0_0_v40_p0_0_v27_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 703],
+ "F32_BFYX_v34_p1_1_v20_p1_1_v256_p0_0_v1_p0_0;F32_BFYX_v34_p0_0_v20_p0_0_v36_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 132],
+ "F32_BFYX_v34_p1_1_v20_p1_1_v256_p0_0_v1_p0_0;F32_BFYX_v34_p0_0_v20_p0_0_v27_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 510]
+ },
+ "FULLY_CONNECTED": {
+ "F16_BFYX_v1_p0_0_v1_p0_0_v512_p0_0_v1_p0_0;F16_BF_v1000_p0_0_v1_p0_0": ["fully_connected_gpu_bs_f_bsv16_b1", 1],
+ "F16_BFYX_v1_p0_0_v1_p0_0_v2048_p0_0_v1_p0_0;F16_BF_v1000_p0_0_v1_p0_0": ["fully_connected_gpu_bf_io_input_spatial", 0],
+ "F32_BFYX_v4032_p0_0_v1_p0_0_v1_p0_0_v20_p0_0;F32_FB_v20_p0_0_v91_p0_0": ["fully_connected_gpu_fb_io_ref", 0],
+ "F32_BFYX_v4032_p0_0_v1_p0_0_v1_p0_0_v20_p0_0;F32_FB_v20_p0_0_v360_p0_0": ["fully_connected_gpu_fb_oi_ref", 0],
+ "F32_BFYX_v1536_p0_0_v1_p0_0_v1_p0_0_v100_p0_0;F32_FB_v100_p0_0_v91_p0_0": ["fully_connected_gpu_yxfb_ref", 2],
+ "F32_BFYX_v1536_p0_0_v1_p0_0_v1_p0_0_v100_p0_0;F32_FB_v100_p0_0_v360_p0_0": ["fully_connected_gpu_yxfb_ref", 2],
+ "F16_BFYX_v1536_p0_0_v1_p0_0_v1_p0_0_v100_p0_0;F16_FB_v100_p0_0_v91_p0_0": ["fully_connected_gpu_fb_oi_ref", 0],
+ "F16_BFYX_v1536_p0_0_v1_p0_0_v1_p0_0_v100_p0_0;F16_FB_v100_p0_0_v360_p0_0": ["fully_connected_gpu_fb_oi_ref", 1],
+ "F32_BFYX_v1536_p0_0_v1_p0_0_v1_p0_0_v300_p0_0;F32_FB_v300_p0_0_v91_p0_0": ["fully_connected_gpu_yxfb_ref", 0],
+ "F32_BFYX_v1536_p0_0_v1_p0_0_v1_p0_0_v300_p0_0;F32_FB_v300_p0_0_v360_p0_0": ["fully_connected_gpu_yxfb_ref", 0],
+ "F16_BFYX_v6_p0_0_v6_p0_0_v256_p0_0_v300_p0_0;F16_FB_v300_p0_0_v4096_p0_0": ["fully_connected_gpu_fb_oi_ref", 1],
+ "F16_YXFB_v300_p0_0_v4096_p0_0_v1_p0_0_v1_p0_0;F16_FB_v300_p0_0_v4096_p0_0": ["fully_connected_gpu_yxfb_ref", 0],
+ "F16_YXFB_v300_p0_0_v4096_p0_0_v1_p0_0_v1_p0_0;F16_FB_v300_p0_0_v21_p0_0": ["fully_connected_gpu_yxfb_ref", 1],
+ "F16_YXFB_v300_p0_0_v4096_p0_0_v1_p0_0_v1_p0_0;F16_FB_v300_p0_0_v84_p0_0": ["fully_connected_gpu_yxfb_ref", 1],
+ "F32_BFYX_v6_p0_0_v6_p0_0_v256_p0_0_v300_p0_0;F32_FB_v300_p0_0_v4096_p0_0": ["fully_connected_gpu_fb_oi_ref", 0],
+ "F32_YXFB_v300_p0_0_v4096_p0_0_v1_p0_0_v1_p0_0;F32_FB_v300_p0_0_v4096_p0_0": ["fully_connected_gpu_fb_oi_ref", 2],
+ "F32_YXFB_v300_p0_0_v4096_p0_0_v1_p0_0_v1_p0_0;F32_FB_v300_p0_0_v21_p0_0": ["fully_connected_gpu_fb_oi_ref", 0],
+ "F32_YXFB_v300_p0_0_v4096_p0_0_v1_p0_0_v1_p0_0;F32_FB_v300_p0_0_v84_p0_0": ["fully_connected_gpu_fb_oi_ref", 0],
+ "F16_BFYX_v88_p0_0_v1_p0_0_v71_p0_0_v1_p0_0;F16_BF_v128_p0_0_v1_p0_0": ["fully_connected_gpu_bf_io_gemm", 0],
+ "F32_BFYX_v88_p0_0_v1_p0_0_v71_p0_0_v1_p0_0;F32_BF_v128_p0_0_v1_p0_0": ["fully_connected_gpu_bf_io_gemm", 1],
+ "F16_BFYX_v7_p0_0_v7_p0_0_v512_p0_0_v300_p0_0;F16_FB_v300_p0_0_v4096_p0_0": ["fully_connected_gpu_fb_oi_ref", 0],
+ "F32_BFYX_v7_p0_0_v7_p0_0_v512_p0_0_v300_p0_0;F32_FB_v300_p0_0_v4096_p0_0": ["fully_connected_gpu_fb_oi_ref", 2],
+ "F32_BFYX_v2048_p0_0_v1_p0_0_v1_p0_0_v100_p0_0;F32_FB_v100_p0_0_v91_p0_0": ["fully_connected_gpu_fb_oi_ref", 1],
+ "F32_BFYX_v2048_p0_0_v1_p0_0_v1_p0_0_v100_p0_0;F32_FB_v100_p0_0_v360_p0_0": ["fully_connected_gpu_fb_oi_ref", 1],
+ "F32_BFYX_v2048_p0_0_v1_p0_0_v1_p0_0_v20_p0_0;F32_FB_v20_p0_0_v91_p0_0": ["fully_connected_gpu_fb_io_ref", 0],
+ "F32_BFYX_v2048_p0_0_v1_p0_0_v1_p0_0_v20_p0_0;F32_FB_v20_p0_0_v360_p0_0": ["fully_connected_gpu_fb_oi_ref", 2],
+ "F32_BFYX_v1_p0_0_v1_p0_0_v2048_p0_0_v300_p0_0;F32_FB_v300_p0_0_v21_p0_0": ["fully_connected_gpu_fb_oi_ref", 0],
+ "F32_BFYX_v1_p0_0_v1_p0_0_v2048_p0_0_v300_p0_0;F32_FB_v300_p0_0_v84_p0_0": ["fully_connected_gpu_fb_oi_ref", 0],
+ "F32_BFYX_v1792_p0_0_v1_p0_0_v1_p0_0_v1_p0_0;F32_BF_v512_p0_0_v1_p0_0": ["fully_connected_gpu_bf_io_input_spatial", 2]
+ }
+ },
+ "64": {
+ "CONVOLUTION": {
+ "F32_BFYX_v600_p3_2_v600_p3_2_v3_p0_0_v1_p0_0;F32_BFYX_v300_p0_0_v300_p0_0_v64_p0_0_v1_p0_0;7_7_1;2_2_1;1_1_1;3_3_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 155],
+ "F32_BFYX_v150_p0_0_v150_p0_0_v64_p0_0_v1_p0_0;F32_BFYX_v150_p1_1_v150_p1_1_v64_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F32_BFYX_v150_p1_1_v150_p1_1_v64_p0_0_v1_p0_0;F32_BFYX_v150_p0_0_v150_p0_0_v64_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 950],
+ "F32_BFYX_v150_p0_0_v150_p0_0_v64_p0_0_v1_p0_0;F32_BFYX_v150_p0_0_v150_p0_0_v256_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 0],
+ "F32_BFYX_v150_p0_0_v150_p0_0_v256_p0_0_v1_p0_0;F32_BFYX_v150_p1_1_v150_p1_1_v64_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 0],
+ "F32_BFYX_v150_p0_0_v150_p0_0_v256_p0_0_v1_p0_0;F32_BFYX_v150_p1_0_v150_p1_0_v64_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 1],
+ "F32_BFYX_v150_p1_0_v150_p1_0_v64_p0_0_v1_p0_0;F32_BFYX_v75_p0_0_v75_p0_0_v64_p0_0_v1_p0_0;3_3_1;2_2_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 532],
+ "F32_BFYX_v75_p0_0_v75_p0_0_v256_p0_0_v1_p0_0;F32_BFYX_v75_p1_1_v75_p1_1_v128_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 1119],
+ "F32_BFYX_v75_p1_1_v75_p1_1_v128_p0_0_v1_p0_0;F32_BFYX_v75_p0_0_v75_p0_0_v128_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 156],
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+ "F32_BFYX_v128_p2_2_v64_p2_2_v256_p0_0_v1_p0_0;F32_BFYX_v128_p0_0_v64_p0_0_v128_p0_0_v1_p0_0;3_3_1;1_1_1;2_2_1;2_2_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 602],
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+ "F16_B_FS_YX_FSV16_v12_p1_1_v12_p1_1_v384_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v12_p1_1_v12_p1_1_v384_p1536_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_f16", 1],
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+ "F16_B_FS_YX_FSV16_v48_p1_1_v48_p1_1_v240_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v48_p0_0_v48_p0_0_v240_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_f16", 4],
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+ "F16_B_FS_YX_FSV16_v96_p1_1_v96_p1_1_v136_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v96_p1_1_v96_p1_1_v136_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_f16", 7],
+ "F16_B_FS_YX_FSV16_v96_p1_1_v96_p1_1_v136_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v96_p0_0_v96_p0_0_v136_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_f16", 7],
+ "F16_B_FS_YX_FSV16_v192_p1_1_v192_p1_1_v376_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v192_p1_1_v192_p1_1_v80_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_f16", 7],
+ "F16_B_FS_YX_FSV16_v192_p1_1_v192_p1_1_v80_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v192_p1_1_v192_p1_1_v80_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_f16", 3],
+ "F16_B_FS_YX_FSV16_v192_p1_1_v192_p1_1_v80_p0_0_v1_p0_0;F16_B_FS_YX_FSV16_v192_p0_0_v192_p0_0_v40_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_f16", 6],
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+ "F16_BFYX_v384_p1_1_v384_p1_1_v40_p0_0_v1_p0_0;F16_BFYX_v384_p0_0_v384_p0_0_v3_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 680],
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+ "F32_B_FS_YX_FSV16_v320_p1_2_v180_p1_2_v32_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v160_p2_2_v90_p2_2_v64_p0_0_v1_p0_0;5_5_1;2_2_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_f16", 6],
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+ "F32_B_FS_YX_FSV16_v160_p2_2_v90_p2_2_v64_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v160_p1_2_v90_p1_2_v64_p0_0_v1_p0_0;5_5_1;1_1_1;1_1_1;2_2_0;1;1": ["convolution_gpu_bfyx_f16", 7],
+ "F32_B_FS_YX_FSV16_v160_p1_2_v90_p1_2_v64_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v80_p2_2_v45_p2_2_v128_p0_0_v1_p0_0;5_5_1;2_2_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_f16", 3],
+ "F32_B_FS_YX_FSV16_v80_p2_2_v45_p2_2_v128_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v80_p2_2_v45_p2_2_v128_p0_0_v1_p0_0;5_5_1;1_1_1;1_1_1;2_2_0;1;1": ["convolution_gpu_bfyx_f16", 3],
+ "F32_B_FS_YX_FSV16_v80_p2_2_v45_p2_2_v128_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v80_p0_0_v45_p0_0_v128_p0_0_v1_p0_0;5_5_1;1_1_1;1_1_1;2_2_0;1;1": ["convolution_gpu_bfyx_f16", 7],
+ "F32_B_FS_YX_FSV16_v160_p0_0_v90_p0_0_v128_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v160_p2_2_v90_p2_2_v64_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_f16", 3],
+ "F32_B_FS_YX_FSV16_v160_p2_2_v90_p2_2_v64_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v160_p0_0_v90_p0_0_v64_p0_0_v1_p0_0;5_5_1;1_1_1;1_1_1;2_2_0;1;1": ["convolution_gpu_bfyx_f16", 6],
+ "F32_B_FS_YX_FSV16_v320_p0_0_v180_p0_0_v64_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v320_p2_2_v180_p2_2_v32_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_f16", 3],
+ "F32_B_FS_YX_FSV16_v320_p2_2_v180_p2_2_v32_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v320_p0_0_v180_p0_0_v32_p0_0_v1_p0_0;5_5_1;1_1_1;1_1_1;2_2_0;1;1": ["convolution_gpu_bfyx_f16", 4],
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+ "F32_B_FS_YX_FSV16_v48_p1_1_v48_p1_1_v240_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v48_p0_0_v48_p0_0_v240_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_f16", 7],
+ "F32_B_FS_YX_FSV16_v96_p1_1_v96_p1_1_v640_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v96_p1_1_v96_p1_1_v136_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_f16", 8],
+ "F32_B_FS_YX_FSV16_v96_p1_1_v96_p1_1_v136_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v96_p1_1_v96_p1_1_v136_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_f16", 6],
+ "F32_B_FS_YX_FSV16_v96_p1_1_v96_p1_1_v136_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v96_p0_0_v96_p0_0_v136_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_f16", 6],
+ "F32_B_FS_YX_FSV16_v192_p1_1_v192_p1_1_v376_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v192_p1_1_v192_p1_1_v80_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_f16", 1],
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+ "F32_B_FS_YX_FSV16_v192_p1_1_v192_p1_1_v80_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v192_p0_0_v192_p0_0_v40_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_f16", 1],
+ "F32_B_FS_YX_FSV16_v384_p1_1_v384_p1_1_v80_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v384_p1_1_v384_p1_1_v80_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_f16", 2],
+ "F32_BFYX_v192_p1_1_v192_p1_1_v40_p0_0_v1_p0_0;F32_BFYX_v192_p0_0_v192_p0_0_v3_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 303],
+ "F32_B_FS_YX_FSV16_v384_p1_1_v384_p1_1_v80_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v384_p0_0_v384_p0_0_v40_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_f16", 2],
+ "F32_BFYX_v384_p1_1_v384_p1_1_v40_p0_0_v1_p0_0;F32_BFYX_v384_p0_0_v384_p0_0_v3_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 1055],
+ "F32_B_FS_YX_FSV16_v768_p1_1_v768_p1_1_v40_p0_0_v1_p0_0;F32_B_FS_YX_FSV16_v768_p0_0_v768_p0_0_v40_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_f16", 1],
+ "F32_BFYX_v768_p1_1_v768_p1_1_v40_p0_0_v1_p0_0;F32_BFYX_v768_p0_0_v768_p0_0_v3_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 679],
+ "F32_BFYX_v256_p3_2_v320_p3_2_v3_p0_0_v1_p0_0;F32_BFYX_v128_p0_0_v160_p0_0_v64_p0_0_v1_p0_0;7_7_1;2_2_1;1_1_1;3_3_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 488],
+ "F32_BFYX_v64_p0_0_v80_p0_0_v64_p0_0_v1_p0_0;F32_BFYX_v64_p1_1_v80_p1_1_v64_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 365],
+ "F32_BFYX_v64_p1_1_v80_p1_1_v64_p0_0_v1_p0_0;F32_BFYX_v64_p0_0_v80_p0_0_v64_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 606],
+ "F32_BFYX_v64_p0_0_v80_p0_0_v64_p0_0_v1_p0_0;F32_BFYX_v64_p0_0_v80_p0_0_v256_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 367],
+ "F32_BFYX_v64_p0_0_v80_p0_0_v256_p0_0_v1_p0_0;F32_BFYX_v64_p1_1_v80_p1_1_v64_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F32_BFYX_v64_p0_0_v80_p0_0_v256_p0_0_v1_p0_0;F32_BFYX_v32_p0_0_v40_p0_0_v512_p0_0_v1_p0_0;1_1_1;2_2_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 1],
+ "F32_BFYX_v64_p0_0_v80_p0_0_v256_p0_0_v1_p0_0;F32_BFYX_v64_p1_0_v80_p1_0_v128_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F32_BFYX_v64_p1_0_v80_p1_0_v128_p0_0_v1_p0_0;F32_BFYX_v32_p0_0_v40_p0_0_v128_p0_0_v1_p0_0;3_3_1;2_2_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 1114],
+ "F32_BFYX_v32_p0_0_v40_p0_0_v128_p0_0_v1_p0_0;F32_BFYX_v32_p0_0_v40_p0_0_v512_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 363],
+ "F32_BFYX_v32_p0_0_v40_p0_0_v512_p0_0_v1_p0_0;F32_BFYX_v32_p1_1_v40_p1_1_v128_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 1108],
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+ "F32_BFYX_v32_p0_0_v40_p0_0_v512_p0_0_v1_p0_0;F32_BFYX_v16_p0_0_v20_p0_0_v1024_p0_0_v1_p0_0;1_1_1;2_2_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 979],
+ "F32_BFYX_v32_p0_0_v40_p0_0_v512_p0_0_v1_p0_0;F32_BFYX_v32_p1_0_v40_p1_0_v256_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 353],
+ "F32_BFYX_v32_p1_0_v40_p1_0_v256_p0_0_v1_p0_0;F32_BFYX_v16_p0_0_v20_p0_0_v256_p0_0_v1_p0_0;3_3_1;2_2_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 494],
+ "F32_BFYX_v16_p0_0_v20_p0_0_v256_p0_0_v1_p0_0;F32_BFYX_v16_p0_0_v20_p0_0_v1024_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 1107],
+ "F32_BFYX_v16_p0_0_v20_p0_0_v1024_p0_0_v1_p0_0;F32_BFYX_v16_p1_1_v20_p1_1_v256_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 354],
+ "F32_BFYX_v16_p1_1_v20_p1_1_v256_p0_0_v1_p0_0;F32_BFYX_v16_p0_0_v20_p0_0_v256_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 967],
+ "F32_BFYX_v16_p0_0_v20_p0_0_v1024_p0_0_v1_p0_0;F32_BFYX_v8_p0_0_v10_p0_0_v2048_p0_0_v1_p0_0;1_1_1;2_2_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 586],
+ "F32_BFYX_v16_p0_0_v20_p0_0_v1024_p0_0_v1_p0_0;F32_BFYX_v16_p1_0_v20_p1_0_v512_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 729],
+ "F32_BFYX_v16_p1_0_v20_p1_0_v512_p0_0_v1_p0_0;F32_BFYX_v8_p0_0_v10_p0_0_v512_p0_0_v1_p0_0;3_3_1;2_2_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 114],
+ "F32_BFYX_v8_p0_0_v10_p0_0_v512_p0_0_v1_p0_0;F32_BFYX_v8_p0_0_v10_p0_0_v2048_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F32_BFYX_v8_p0_0_v10_p0_0_v2048_p0_0_v1_p0_0;F32_BFYX_v8_p1_1_v10_p1_1_v512_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 215],
+ "F32_BFYX_v8_p1_1_v10_p1_1_v512_p0_0_v1_p0_0;F32_BFYX_v8_p0_0_v10_p0_0_v512_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 494],
+ "F32_BFYX_v16_p1_1_v20_p1_1_v512_p0_0_v1_p0_0;F32_BFYX_v16_p0_0_v20_p0_0_v1024_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 983],
+ "F32_BFYX_v32_p1_1_v40_p1_1_v256_p0_0_v1_p0_0;F32_BFYX_v32_p0_0_v40_p0_0_v512_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 983],
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+ "F16_BFYX_v23_p0_0_v23_p0_0_v384_p0_0_v1_p0_0;F16_BFYX_v23_p1_1_v23_p1_1_v48_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 326],
+ "F16_BFYX_v23_p0_0_v23_p0_0_v384_p0_0_v1_p0_0;F16_BFYX_v23_p1_1_v23_p1_1_v64_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 670],
+ "F16_BFYX_v23_p1_1_v23_p1_1_v64_p0_0_v1_p0_0;F16_BFYX_v23_p0_0_v23_p0_0_v256_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 305],
+ "F16_BYXF_v64_p0_0_v23_p0_0_v23_p0_0_v1_p0_0;F16_BYXF_v256_p0_0_v23_p0_0_v23_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 0],
+ "F16_BFYX_v11_p0_0_v11_p0_0_v512_p0_0_v1_p0_0;F16_BFYX_v11_p1_1_v11_p1_1_v64_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 1104],
+ "F16_BFYX_v11_p1_1_v11_p1_1_v64_p0_0_v1_p0_0;F16_BFYX_v11_p0_0_v11_p0_0_v256_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 1109],
+ "F16_BYXF_v64_p0_0_v11_p0_0_v11_p0_0_v1_p0_0;F16_BYXF_v256_p0_0_v11_p0_0_v11_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 2],
+ "F16_BFYX_v11_p0_0_v11_p0_0_v512_p0_0_v1_p0_0;F16_BFYX_v11_p0_0_v11_p0_0_v128_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 728],
+ "F16_BFYX_v23_p0_0_v23_p0_0_v512_p0_0_v1_p0_0;F16_BFYX_v23_p0_0_v23_p0_0_v128_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 1055],
+ "F16_BFYX_v11_p0_0_v11_p0_0_v128_p0_0_v1_p0_0;F16_BFYX_v5_p0_0_v5_p0_0_v256_p0_0_v1_p0_0;3_3_1;2_2_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 582],
+ "F16_BFYX_v5_p0_0_v5_p0_0_v256_p0_0_v1_p0_0;F16_BFYX_v5_p0_0_v5_p0_0_v128_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 502],
+ "F16_BFYX_v5_p0_0_v5_p0_0_v128_p0_0_v1_p0_0;F16_BFYX_v3_p0_0_v3_p0_0_v256_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 959],
+ "F16_BFYX_v3_p0_0_v3_p0_0_v256_p0_0_v1_p0_0;F16_BFYX_v3_p0_0_v3_p0_0_v128_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 82],
+ "F16_BFYX_v3_p0_0_v3_p0_0_v128_p0_0_v1_p0_0;F16_BFYX_v1_p2_2_v1_p2_2_v256_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 2],
+ "F16_BFYX_v1_p2_2_v1_p2_2_v256_p0_0_v1_p0_0;F16_BFYX_v3_p0_0_v3_p0_0_v128_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;2_2_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 207],
+ "F16_BFYX_v3_p2_2_v3_p2_2_v256_p0_0_v1_p0_0;F16_BFYX_v5_p0_0_v5_p0_0_v128_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;2_2_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 503],
+ "F16_BFYX_v23_p1_1_v23_p1_1_v256_p0_0_v1_p0_0;F16_BFYX_v23_p0_0_v23_p0_0_v640_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 672],
+ "F16_BFYX_v23_p1_1_v23_p1_1_v128_p0_0_v1_p0_0;F16_BFYX_v23_p0_0_v23_p0_0_v24_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 284],
+ "F16_BFYX_v23_p1_1_v23_p1_1_v128_p0_0_v1_p0_0;F16_BFYX_v23_p0_0_v23_p0_0_v54_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 178],
+ "F16_BFYX_v11_p1_1_v11_p1_1_v128_p0_0_v1_p0_0;F16_BFYX_v11_p0_0_v11_p0_0_v24_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 167],
+ "F16_BFYX_v11_p1_1_v11_p1_1_v128_p0_0_v1_p0_0;F16_BFYX_v11_p0_0_v11_p0_0_v54_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 843],
+ "F16_BFYX_v5_p1_1_v5_p1_1_v128_p0_0_v1_p0_0;F16_BFYX_v5_p0_0_v5_p0_0_v24_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 418],
+ "F16_BFYX_v5_p1_1_v5_p1_1_v128_p0_0_v1_p0_0;F16_BFYX_v5_p0_0_v5_p0_0_v54_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 127],
+ "F16_BFYX_v3_p1_1_v3_p1_1_v128_p0_0_v1_p0_0;F16_BFYX_v3_p0_0_v3_p0_0_v24_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 378],
+ "F16_BFYX_v3_p1_1_v3_p1_1_v128_p0_0_v1_p0_0;F16_BFYX_v3_p0_0_v3_p0_0_v54_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 378],
+ "F16_BFYX_v1_p1_1_v1_p1_1_v128_p0_0_v1_p0_0;F16_BFYX_v1_p0_0_v1_p0_0_v24_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 2],
+ "F16_BFYX_v1_p1_1_v1_p1_1_v128_p0_0_v1_p0_0;F16_BFYX_v1_p0_0_v1_p0_0_v54_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 378],
+ "F16_BFYX_v688_p3_2_v688_p3_2_v3_p0_0_v1_p0_0;F16_BFYX_v344_p0_0_v344_p0_0_v64_p0_0_v1_p0_0;7_7_1;2_2_1;1_1_1;3_3_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F16_BYXF_v64_p0_0_v172_p0_0_v172_p0_0_v1_p0_0;F16_BYXF_v64_p0_0_v172_p0_0_v172_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 0],
+ "F16_BYXF_v64_p0_0_v172_p0_0_v172_p0_0_v1_p0_0;F16_BYXF_v256_p0_0_v172_p0_0_v172_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 1],
+ "F16_BYXF_v64_p0_0_v172_p0_0_v172_p0_0_v1_p0_0;F16_BYXF_v64_p0_0_v172_p0_0_v172_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_winograd_6x3_s1_fused", 2],
+ "F16_BYXF_v256_p0_0_v172_p0_0_v172_p0_0_v1_p0_0;F16_BYXF_v64_p0_0_v172_p0_0_v172_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 0],
+ "F16_BFYX_v172_p1_0_v172_p1_0_v64_p0_0_v1_p0_0;F16_BFYX_v86_p0_0_v86_p0_0_v64_p0_0_v1_p0_0;3_3_1;2_2_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F16_BYXF_v64_p0_0_v86_p0_0_v86_p0_0_v1_p0_0;F16_BYXF_v256_p0_0_v86_p0_0_v86_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 1],
+ "F16_BYXF_v256_p0_0_v86_p0_0_v86_p0_0_v1_p0_0;F16_BYXF_v128_p0_0_v86_p0_0_v86_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 1],
+ "F16_BYXF_v256_p0_0_v86_p0_0_v86_p0_0_v1_p0_0;F16_BYXF_v512_p0_0_v86_p0_0_v86_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 0],
+ "F16_BYXF_v128_p0_0_v86_p0_0_v86_p0_0_v1_p0_0;F16_BYXF_v128_p0_0_v86_p0_0_v86_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_winograd_6x3_s1_fused", 0],
+ "F16_BYXF_v128_p0_0_v86_p0_0_v86_p0_0_v1_p0_0;F16_BYXF_v512_p0_0_v86_p0_0_v86_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 2],
+ "F16_BYXF_v512_p0_0_v86_p0_0_v86_p0_0_v1_p0_0;F16_BYXF_v128_p0_0_v86_p0_0_v86_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 1],
+ "F16_BFYX_v86_p0_0_v86_p0_0_v512_p0_0_v1_p0_0;F16_BFYX_v86_p0_0_v86_p0_0_v14_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 1120],
+ "F16_BFYX_v86_p0_0_v86_p0_0_v512_p0_0_v1_p0_0;F16_BFYX_v86_p0_0_v86_p0_0_v364_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F16_BFYX_v86_p0_0_v86_p0_0_v512_p0_0_v1_p0_0;F16_BFYX_v86_p0_0_v86_p0_0_v28_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 744],
+ "F16_BFYX_v86_p0_0_v86_p0_0_v512_p0_0_v1_p0_0;F16_BFYX_v43_p0_0_v43_p0_0_v256_p0_0_v1_p0_0;1_1_1;2_2_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 0],
+ "F16_BFYX_v86_p0_0_v86_p0_0_v512_p0_0_v1_p0_0;F16_BFYX_v43_p0_0_v43_p0_0_v1024_p0_0_v1_p0_0;1_1_1;2_2_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 1],
+ "F16_BYXF_v256_p0_0_v43_p0_0_v43_p0_0_v1_p0_0;F16_BYXF_v256_p0_0_v43_p0_0_v43_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_winograd_6x3_s1_fused", 0],
+ "F16_BYXF_v256_p0_0_v43_p0_0_v43_p0_0_v1_p0_0;F16_BYXF_v1024_p0_0_v43_p0_0_v43_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 2],
+ "F16_BYXF_v1024_p0_0_v43_p0_0_v43_p0_0_v1_p0_0;F16_BYXF_v256_p0_0_v43_p0_0_v43_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 2],
+ "F16_BYXF_v1024_p0_0_v43_p0_0_v43_p0_0_v1_p0_0;F16_BYXF_v512_p0_0_v43_p0_0_v43_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 1],
+ "F16_BYXF_v1024_p0_0_v43_p0_0_v43_p0_0_v1_p0_0;F16_BYXF_v2048_p0_0_v43_p0_0_v43_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 1],
+ "F16_BFYX_v43_p2_2_v43_p2_2_v512_p0_0_v1_p0_0;F16_BFYX_v43_p0_0_v43_p0_0_v512_p0_0_v1_p0_0;3_3_1;1_1_1;2_2_1;2_2_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 682],
+ "F16_BYXF_v512_p0_0_v43_p0_0_v43_p0_0_v1_p0_0;F16_BYXF_v2048_p0_0_v43_p0_0_v43_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 1],
+ "F16_BYXF_v2048_p0_0_v43_p0_0_v43_p0_0_v1_p0_0;F16_BYXF_v512_p0_0_v43_p0_0_v43_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 0],
+ "F16_BFYX_v43_p0_0_v43_p0_0_v512_p0_0_v1_p0_0;F16_BFYX_v43_p0_0_v43_p0_0_v2048_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 748],
+ "F32_BFYX_v688_p3_2_v688_p3_2_v3_p0_0_v1_p0_0;F32_BFYX_v344_p0_0_v344_p0_0_v64_p0_0_v1_p0_0;7_7_1;2_2_1;1_1_1;3_3_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 218],
+ "F32_BFYX_v172_p0_0_v172_p0_0_v64_p0_0_v1_p0_0;F32_BFYX_v172_p1_1_v172_p1_1_v64_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 1],
+ "F32_BFYX_v172_p1_1_v172_p1_1_v64_p0_0_v1_p0_0;F32_BFYX_v172_p0_0_v172_p0_0_v64_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 982],
+ "F32_BFYX_v172_p0_0_v172_p0_0_v64_p0_0_v1_p0_0;F32_BFYX_v172_p0_0_v172_p0_0_v256_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 0],
+ "F32_BFYX_v172_p0_0_v172_p0_0_v256_p0_0_v1_p0_0;F32_BFYX_v172_p1_1_v172_p1_1_v64_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 1],
+ "F32_BFYX_v172_p0_0_v172_p0_0_v256_p0_0_v1_p0_0;F32_BFYX_v172_p1_0_v172_p1_0_v64_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 0],
+ "F32_BFYX_v172_p1_0_v172_p1_0_v64_p0_0_v1_p0_0;F32_BFYX_v86_p0_0_v86_p0_0_v64_p0_0_v1_p0_0;3_3_1;2_2_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 946],
+ "F32_BFYX_v86_p0_0_v86_p0_0_v256_p0_0_v1_p0_0;F32_BFYX_v86_p1_1_v86_p1_1_v128_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 1052],
+ "F32_BFYX_v86_p1_1_v86_p1_1_v128_p0_0_v1_p0_0;F32_BFYX_v86_p0_0_v86_p0_0_v128_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 597],
+ "F32_BFYX_v86_p0_0_v86_p0_0_v128_p0_0_v1_p0_0;F32_BFYX_v86_p0_0_v86_p0_0_v512_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 736],
+ "F32_BFYX_v86_p0_0_v86_p0_0_v512_p0_0_v1_p0_0;F32_BFYX_v86_p1_1_v86_p1_1_v128_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 0],
+ "F32_BFYX_v86_p0_0_v86_p0_0_v512_p0_0_v1_p0_0;F32_BFYX_v43_p1_1_v43_p1_1_v256_p0_0_v1_p0_0;1_1_1;2_2_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 0],
+ "F32_BFYX_v86_p0_0_v86_p0_0_v512_p0_0_v1_p0_0;F32_BFYX_v43_p0_0_v43_p0_0_v1024_p0_0_v1_p0_0;1_1_1;2_2_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 0],
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+ "F16_BFYX_v96_p0_0_v96_p0_0_v64_p0_0_v1_p0_0;F16_BFYX_v96_p1_1_v96_p1_1_v32_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 0],
+ "F16_BFYX_v96_p1_1_v96_p1_1_v32_p0_0_v1_p0_0;F16_BFYX_v96_p0_0_v96_p0_0_v32_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_gemm_like", 0],
+ "F16_BFYX_v96_p0_0_v96_p0_0_v128_p0_0_v1_p0_0;F16_BFYX_v96_p1_1_v96_p1_1_v32_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 1],
+ "F16_BFYX_v96_p0_0_v96_p0_0_v128_p0_0_v1_p0_0;F16_BFYX_v96_p1_0_v96_p1_0_v32_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 1],
+ "F16_BFYX_v96_p1_0_v96_p1_0_v32_p0_0_v1_p0_0;F16_BFYX_v48_p0_0_v48_p0_0_v32_p0_0_v1_p0_0;3_3_1;2_2_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_gemm_like", 1],
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+ "F16_BYXF_v128_p0_0_v48_p0_0_v48_p0_0_v1_p0_0;F16_BYXF_v256_p0_0_v48_p0_0_v48_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 2],
+ "F16_BYXF_v128_p0_0_v48_p0_0_v48_p0_0_v1_p0_0;F16_BYXF_v64_p0_0_v48_p0_0_v48_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 0],
+ "F16_BFYX_v48_p1_1_v48_p1_1_v64_p0_0_v1_p0_0;F16_BFYX_v48_p0_0_v48_p0_0_v64_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_gemm_like", 1],
+ "F16_BFYX_v48_p0_0_v48_p0_0_v64_p0_0_v1_p0_0;F16_BFYX_v48_p0_0_v48_p0_0_v256_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 0],
+ "F16_BYXF_v256_p0_0_v48_p0_0_v48_p0_0_v1_p0_0;F16_BYXF_v128_p0_0_v48_p0_0_v48_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 0],
+ "F16_BFYX_v24_p0_0_v24_p0_0_v256_p0_0_v1_p0_0;F16_BFYX_v24_p1_1_v24_p1_1_v64_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
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+ "F16_BYXF_v256_p0_0_v24_p0_0_v24_p0_0_v1_p0_0;F16_BYXF_v64_p0_0_v24_p0_0_v24_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 2],
+ "F16_BYXF_v256_p0_0_v24_p0_0_v24_p0_0_v1_p0_0;F16_BYXF_v512_p0_0_v24_p0_0_v24_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 2],
+ "F16_BYXF_v256_p0_0_v24_p0_0_v24_p0_0_v1_p0_0;F16_BYXF_v128_p0_0_v24_p0_0_v24_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 2],
+ "F16_BFYX_v24_p2_2_v24_p2_2_v128_p0_0_v1_p0_0;F16_BFYX_v24_p0_0_v24_p0_0_v128_p0_0_v1_p0_0;3_3_1;1_1_1;2_2_1;2_2_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 185],
+ "F16_BYXF_v128_p0_0_v24_p0_0_v24_p0_0_v1_p0_0;F16_BYXF_v512_p0_0_v24_p0_0_v24_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 2],
+ "F16_BYXF_v512_p0_0_v24_p0_0_v24_p0_0_v1_p0_0;F16_BYXF_v128_p0_0_v24_p0_0_v24_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 1],
+ "F16_BYXF_v512_p0_0_v24_p0_0_v24_p0_0_v1_p0_0;F16_BYXF_v1024_p0_0_v24_p0_0_v24_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 1],
+ "F16_BYXF_v512_p0_0_v24_p0_0_v24_p0_0_v1_p0_0;F16_BYXF_v256_p0_0_v24_p0_0_v24_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 0],
+ "F16_BFYX_v24_p4_4_v24_p4_4_v256_p0_0_v1_p0_0;F16_BFYX_v24_p0_0_v24_p0_0_v256_p0_0_v1_p0_0;3_3_1;1_1_1;4_4_1;4_4_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 973],
+ "F16_BYXF_v256_p0_0_v24_p0_0_v24_p0_0_v1_p0_0;F16_BYXF_v1024_p0_0_v24_p0_0_v24_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 1],
+ "F16_BYXF_v1024_p0_0_v24_p0_0_v24_p0_0_v1_p0_0;F16_BYXF_v256_p0_0_v24_p0_0_v24_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_1x1_hgemm_buf_16x1", 0],
+ "F16_BFYX_v24_p0_0_v24_p0_0_v256_p0_0_v1_p0_0;F16_BFYX_v24_p0_0_v24_p0_0_v1024_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F16_BFYX_v24_p0_0_v24_p0_0_v1024_p0_0_v1_p0_0;F16_BFYX_v24_p0_0_v24_p0_0_v256_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 0],
+ "F16_BFYX_v48_p2_2_v48_p2_2_v256_p0_0_v1_p0_0;F16_BFYX_v48_p0_0_v48_p0_0_v128_p0_0_v1_p0_0;3_3_1;1_1_1;2_2_1;2_2_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 305],
+ "F16_BFYX_v96_p2_2_v96_p2_2_v128_p0_0_v1_p0_0;F16_BFYX_v96_p0_0_v96_p0_0_v128_p0_0_v1_p0_0;3_3_1;1_1_1;2_2_1;2_2_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 1062],
+ "F16_BFYX_v192_p0_0_v192_p0_0_v128_p0_0_v1_p0_0;F16_BFYX_v192_p0_0_v192_p0_0_v12_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F32_BFYX_v768_p1_0_v768_p1_0_v3_p0_0_v1_p0_0;F32_BFYX_v384_p1_0_v384_p1_0_v32_p0_0_v1_p0_0;3_3_1;2_2_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_gemm_like", 0],
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+ "F32_BFYX_v192_p1_1_v192_p1_1_v32_p0_0_v1_p0_0;F32_BFYX_v192_p1_1_v192_p1_1_v32_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 1055],
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+ "F32_BFYX_v96_p0_0_v96_p0_0_v32_p0_0_v1_p0_0;F32_BFYX_v96_p0_0_v96_p0_0_v128_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 367],
+ "F32_BFYX_v96_p0_0_v96_p0_0_v64_p0_0_v1_p0_0;F32_BFYX_v96_p0_0_v96_p0_0_v128_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 0],
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+ "F32_BFYX_v96_p0_0_v96_p0_0_v128_p0_0_v1_p0_0;F32_BFYX_v96_p1_0_v96_p1_0_v32_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
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+ "F32_BFYX_v48_p0_0_v48_p0_0_v128_p0_0_v1_p0_0;F32_BFYX_v48_p0_0_v48_p0_0_v256_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 1119],
+ "F32_BFYX_v48_p0_0_v48_p0_0_v128_p0_0_v1_p0_0;F32_BFYX_v48_p1_1_v48_p1_1_v64_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 1108],
+ "F32_BFYX_v48_p1_1_v48_p1_1_v64_p0_0_v1_p0_0;F32_BFYX_v48_p0_0_v48_p0_0_v64_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 668],
+ "F32_BFYX_v48_p0_0_v48_p0_0_v256_p0_0_v1_p0_0;F32_BFYX_v48_p0_0_v48_p0_0_v128_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 354],
+ "F32_BFYX_v24_p0_0_v24_p0_0_v256_p0_0_v1_p0_0;F32_BFYX_v24_p1_1_v24_p1_1_v64_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 1039],
+ "F32_BFYX_v24_p1_1_v24_p1_1_v64_p0_0_v1_p0_0;F32_BFYX_v24_p0_0_v24_p0_0_v64_p0_0_v1_p0_0;3_3_1;1_1_1;1_1_1;1_1_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 178],
+ "F32_BFYX_v24_p0_0_v24_p0_0_v256_p0_0_v1_p0_0;F32_BFYX_v24_p0_0_v24_p0_0_v512_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 0],
+ "F32_BFYX_v24_p0_0_v24_p0_0_v256_p0_0_v1_p0_0;F32_BFYX_v24_p2_2_v24_p2_2_v128_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 289],
+ "F32_BFYX_v24_p2_2_v24_p2_2_v128_p0_0_v1_p0_0;F32_BFYX_v24_p0_0_v24_p0_0_v128_p0_0_v1_p0_0;3_3_1;1_1_1;2_2_1;2_2_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 281],
+ "F32_BFYX_v24_p0_0_v24_p0_0_v512_p0_0_v1_p0_0;F32_BFYX_v24_p2_2_v24_p2_2_v128_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 1041],
+ "F32_BFYX_v24_p0_0_v24_p0_0_v512_p0_0_v1_p0_0;F32_BFYX_v24_p0_0_v24_p0_0_v1024_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 2],
+ "F32_BFYX_v24_p0_0_v24_p0_0_v512_p0_0_v1_p0_0;F32_BFYX_v24_p4_4_v24_p4_4_v256_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 1],
+ "F32_BFYX_v24_p4_4_v24_p4_4_v256_p0_0_v1_p0_0;F32_BFYX_v24_p0_0_v24_p0_0_v256_p0_0_v1_p0_0;3_3_1;1_1_1;4_4_1;4_4_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 964],
+ "F32_BFYX_v24_p0_0_v24_p0_0_v1024_p0_0_v1_p0_0;F32_BFYX_v24_p4_4_v24_p4_4_v256_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 0],
+ "F32_BFYX_v24_p0_0_v24_p0_0_v1024_p0_0_v1_p0_0;F32_BFYX_v24_p0_0_v24_p0_0_v256_p0_0_v1_p0_0;1_1_1;1_1_1;1_1_1;0_0_0;1;1": ["convolution_gpu_bfyx_gemm_like", 1],
+ "F32_BFYX_v48_p2_2_v48_p2_2_v256_p0_0_v1_p0_0;F32_BFYX_v48_p0_0_v48_p0_0_v128_p0_0_v1_p0_0;3_3_1;1_1_1;2_2_1;2_2_0;1;1": ["convolution_gpu_bfyx_os_iyx_osv16", 669],
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+ "17860267802816622975": ["convolution_gpu_bfyx_os_iyx_osv16", 13],
+ "8519379094225608238": ["fully_connected_gpu_fb_io_ref", 0]
+ }
+ }
+}
\ No newline at end of file
diff --git a/openvino/libgna.so b/openvino/libgna.so
new file mode 100644
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--- /dev/null
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diff --git a/openvino/libopenvino_hetero_plugin.so b/openvino/libopenvino_hetero_plugin.so
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diff --git a/openvino/libopenvino_intel_cpu_plugin.so b/openvino/libopenvino_intel_cpu_plugin.so
new file mode 100644
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--- /dev/null
+++ b/openvino/libopenvino_intel_cpu_plugin.so
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
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new file mode 100644
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new file mode 100644
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--- /dev/null
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+version https://git-lfs.github.com/spec/v1
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new file mode 100644
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new file mode 100644
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--- /dev/null
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@@ -0,0 +1,3 @@
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diff --git a/openvino/pcie-ma2x8x.mvcmd b/openvino/pcie-ma2x8x.mvcmd
new file mode 100644
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--- /dev/null
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diff --git a/openvino/plugins.xml b/openvino/plugins.xml
new file mode 100644
index 0000000000000000000000000000000000000000..ca0a2df03704b2963ad5db339905e70a0d408c40
--- /dev/null
+++ b/openvino/plugins.xml
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+
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\ No newline at end of file
diff --git a/openvino/usb-ma2x8x.mvcmd b/openvino/usb-ma2x8x.mvcmd
new file mode 100644
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--- /dev/null
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@@ -0,0 +1,3 @@
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diff --git a/openvino/vpu_custom_kernels/binarization.bin b/openvino/vpu_custom_kernels/binarization.bin
new file mode 100644
index 0000000000000000000000000000000000000000..b1d1502d3cea712e4c1ad95cc104a2542cecb9a1
--- /dev/null
+++ b/openvino/vpu_custom_kernels/binarization.bin
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:3e0de6082c7bacca2ff5ad131f0afc44304fc792a6d99e7829399eb61491a0ac
+size 19632
diff --git a/openvino/vpu_custom_kernels/binarization.cl b/openvino/vpu_custom_kernels/binarization.cl
new file mode 100644
index 0000000000000000000000000000000000000000..f9f420ca373ad685d351e5ed872c6157dcdd2ad2
--- /dev/null
+++ b/openvino/vpu_custom_kernels/binarization.cl
@@ -0,0 +1,67 @@
+// Copyright (C) 2018-2022 Intel Corporation
+// SPDX-License-Identifier: Apache-2.0
+//
+
+#pragma OPENCL EXTENSION cl_khr_fp16 : enable
+#pragma OPENCL EXTENSION cl_khr_extended_async_copies : enable
+
+__kernel void binarization(
+ const __global half *__restrict src_data,
+ const __global half *__restrict input_low_high,
+ const __global half *__restrict dst_data,
+ int switch_out,
+ int input_low_high_size,
+ int W,
+ int H)
+{
+ __local half local_src[15 * 1024];
+ __local half local_dst[15 * 1024];
+
+ event_t e1 = async_work_group_copy(local_src, src_data + get_group_id(2) * W * H, W * H, 0);
+ wait_group_events(1, &e1);
+
+ int c = get_global_id(2);
+ int C = get_global_size(2);
+
+ half dst_low = switch_out ? 1.h : -1.h;
+ half dst_high = switch_out ? -1.h : 1.h;
+
+ half s_ilow_ihigh = input_low_high_size == 1 ? input_low_high[0] : input_low_high[c];
+
+ for (int h = 0; h < H; h++) {
+
+ __local const half *__restrict addr_src = local_src + h * W;
+ __local half *__restrict addr_dst = local_dst + h * W;
+
+#if 1
+ for (int w = 0; w < W / 8; w++) {
+
+ half8 h_src_val8 = (*((__local half8 *)addr_src + w));
+
+ short8 cond1;
+ cond1.s0 = (h_src_val8.s0 <= s_ilow_ihigh);
+ cond1.s1 = (h_src_val8.s1 <= s_ilow_ihigh);
+ cond1.s2 = (h_src_val8.s2 <= s_ilow_ihigh);
+ cond1.s3 = (h_src_val8.s3 <= s_ilow_ihigh);
+ cond1.s4 = (h_src_val8.s4 <= s_ilow_ihigh);
+ cond1.s5 = (h_src_val8.s5 <= s_ilow_ihigh);
+ cond1.s6 = (h_src_val8.s6 <= s_ilow_ihigh);
+ cond1.s7 = (h_src_val8.s7 <= s_ilow_ihigh);
+
+ cond1 = ~(cond1 - (short8)1);
+
+ short8 res = cond1 & as_short8((half8)dst_low) | ~cond1 & as_short8((half8)dst_high);
+
+ *((__local half8 *)addr_dst + w) = as_half8(res);
+ }
+#endif
+ for (int w = W & (~0x7); w < W; w++) {
+ addr_dst[w] = (addr_src[w] <= s_ilow_ihigh) ? dst_low : dst_high;
+ }
+ }
+
+ barrier(CLK_LOCAL_MEM_FENCE);
+
+ event_t e2 = async_work_group_copy(dst_data + get_group_id(2) * W * H, local_dst, W * H, 0);
+ wait_group_events(1, &e2);
+}
diff --git a/openvino/vpu_custom_kernels/binary_convolution.bin b/openvino/vpu_custom_kernels/binary_convolution.bin
new file mode 100644
index 0000000000000000000000000000000000000000..ef3211ea26ee3813b990cefc26439e876f24845d
--- /dev/null
+++ b/openvino/vpu_custom_kernels/binary_convolution.bin
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:12c349d6f73c233b158e1d67af31715c7b8bda79f191b1e759476e01e65bb64a
+size 10764
diff --git a/openvino/vpu_custom_kernels/binary_convolution.cl b/openvino/vpu_custom_kernels/binary_convolution.cl
new file mode 100644
index 0000000000000000000000000000000000000000..7b28d7b4c36029b36117644832aa4a14e0a8b4c7
--- /dev/null
+++ b/openvino/vpu_custom_kernels/binary_convolution.cl
@@ -0,0 +1,95 @@
+// Copyright (C) 2018-2022 Intel Corporation
+// SPDX-License-Identifier: Apache-2.0
+//
+
+#pragma OPENCL EXTENSION cl_khr_fp16 : enable
+
+int extract_weights(uchar val, int bit) { return ((val >> bit) & 1); }
+
+__kernel void binary_convolution(
+ const __global half *restrict src_data,
+ const __global uchar *restrict weights_data,
+ __global half *restrict dst_data,
+ float pad_value,
+
+ int IW,
+ int IH,
+ int IC,
+
+ int DW,
+ int DH,
+
+ int GC,
+
+ int KW,
+ int KH,
+
+ int PW,
+ int PH,
+
+ int SW,
+ int SH)
+{
+ int ipad_value = ((pad_value > 0.f) ? 1 : 0);
+ int c = get_global_id(2);
+ int y = get_global_id(1);
+ int x = get_global_id(0);
+
+ int OC = get_global_size(2);
+ int OH = get_global_size(1);
+ int OW = get_global_size(0);
+
+ int KD = 1;
+ int SD = 0;
+ int DD = 0;
+ int PD = 0;
+ int ID = 1;
+ int OD = 1;
+
+ int nbits = 8;
+
+ int g = c % GC;
+ int oc = c / GC;
+ int oh = y;
+ int ow = x;
+
+ for (int od = 0; od < OD; od++) {
+ int oidx = g * OC / GC * OD * OH * OW + oc * OD * OH * OW + od * OH * OW + oh * OW + ow;
+
+ int res = 0;
+
+ for (int ic = 0; ic < IC / GC; ic++) {
+ for (int kd = 0; kd < KD; kd++) {
+ for (int kh = 0; kh < KH; kh++) {
+ for (int kw = 0; kw < KW; kw++) {
+ int widx = g * OC / GC * IC / GC * KD * KH * KW
+ + oc * IC / GC * KD * KH * KW + ic * KD * KH * KW + kd * KH * KW
+ + kh * KW + kw;
+
+ int w = extract_weights(weights_data[widx / nbits], (widx % nbits));
+
+ int s;
+
+ int iw = ow * SW - PW + kw * DW;
+ int ih = oh * SH - PH + kh * DH;
+ int id = od * SD - PD + kd * DD;
+
+ if (iw < 0 || iw >= (int)IW || ih < 0 || ih >= (int)IH || id < 0
+ || id >= (int)ID) {
+ s = ipad_value;
+ } else {
+ int iidx = g * IC / GC * ID * IH * IW + ic * ID * IH * IW + id * IH * IW
+ + ih * IW + iw;
+
+ s = ((src_data[iidx] > 0.f) ? 1 : 0);
+ }
+
+ res += s ^ w;
+ }
+ }
+ }
+ }
+
+ dst_data[oidx] = (half)(IC / GC * KD * KH * KW - 2 * res);
+ }
+}
diff --git a/openvino/vpu_custom_kernels/binary_convolution1x1.bin b/openvino/vpu_custom_kernels/binary_convolution1x1.bin
new file mode 100644
index 0000000000000000000000000000000000000000..6bfe284f3e76f7084f1e7c1e2dfbba01bac8d1cb
--- /dev/null
+++ b/openvino/vpu_custom_kernels/binary_convolution1x1.bin
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:6deff31d62aa84c643fbeba77e7dcd4ae5d9b488c1c98e07fffeb58ff8e9b945
+size 76316
diff --git a/openvino/vpu_custom_kernels/binary_convolution1x1.cl b/openvino/vpu_custom_kernels/binary_convolution1x1.cl
new file mode 100644
index 0000000000000000000000000000000000000000..dc5d7a7cfbd6948ec2d55daaae83bfed42b562ac
--- /dev/null
+++ b/openvino/vpu_custom_kernels/binary_convolution1x1.cl
@@ -0,0 +1,117 @@
+// Copyright (C) 2018-2022 Intel Corporation
+// SPDX-License-Identifier: Apache-2.0
+//
+
+#pragma OPENCL EXTENSION cl_khr_fp16 : enable
+#pragma OPENCL EXTENSION cl_khr_extended_async_copies : enable
+
+ushort extract_weights(uchar val, int bit) { return ((val >> bit) & 1); }
+
+__kernel void binary_convolution(
+ const __global half *restrict src_data,
+ const __global uchar *restrict weights_data,
+ __global half *restrict dst_data,
+ float pad_value,
+
+ int IW,
+ int IH,
+ int IC,
+
+ int DW,
+ int DH,
+
+ int GC,
+
+ int KW,
+ int KH,
+
+ int PW,
+ int PH,
+
+ int SW,
+ int SH,
+
+ int OW)
+{
+ __local half src_local[32 * 1024];
+ __local half dst_local[2 * 1024];
+
+ const int oh = get_group_id(0);
+ const int oc = get_group_id(1);
+ const int OH = get_global_size(0);
+ const int OC = get_global_size(1);
+
+ const int gc = oc / (OC / GC);
+
+ if (oh * SH >= 0 && oh * SH <= IH - 1) {
+ const __global half *src = src_data + (gc * IC / GC) * IW * IH + (SH * oh) * IW;
+
+ event_t e1 = async_work_group_copy_2D2D(
+ src_local, // dst
+ src, // src
+ IW, // num_elements_per_line,
+ IC / GC, // num_lines,
+ IH * IW - IW, // src_line_stride,
+ 0, // dst_line_stride,
+ 0);
+ wait_group_events(1, &e1);
+ }
+
+ half pad_value_half = convert_half(pad_value);
+
+ //padding row
+ if (oh * SH > IH - 1) {
+ __local half *dst = src_local;
+ for (int c = 0; c < IC / GC; c++) {
+ #pragma unroll 8
+ for (int j = 0; j < IW; j++) {
+ dst[j] = pad_value_half;
+ }
+ dst += IW;
+ }
+ }
+
+ int OWS = SW * OW;
+ ushort8 in;
+
+ for (int ows8 = 0; ows8 < (OWS + 7) / 8; ows8++) {
+ ushort8 val = {0, 0, 0, 0, 0, 0, 0, 0};
+ for (int ic = 0; ic < IC / GC; ++ic) {
+ __local half *src = (__local half *)((__local half8 *)(src_local + ic * IW) + ows8);
+ int weight_pos = oc * IC / GC + ic;
+ ushort w =
+ extract_weights(weights_data[((weight_pos + 0)) / 8], ((weight_pos + 0) % 8));
+
+ if ((ows8 * 8) <= IW - 1) {
+ in = *((__local ushort8 *)(src));
+ }
+
+ //padding column
+ if (ows8 * 8 + 7 > IW - 1) {
+ int boundary = (IW - 1) - ows8 * 8 + 1;
+ boundary = boundary < 0 ? 0 : boundary;
+ for (int offset = boundary; offset < 8; offset++) {
+ *((half *)(&in) + offset) = pad_value_half;
+ }
+ }
+
+ ushort8 w8 = (ushort8)(w);
+
+ ushort8 cond =
+ (((in) < (ushort8)0x8000) && (in > (ushort8)0x0000)) ? (ushort8)(1) : (ushort8)(0);
+
+ val += (cond ^ w8);
+ }
+
+ ushort8 val_shift = val << 1;
+ int boundary = (ows8 * 8 + 7) / SW < OW - 1 ? (ows8 * 8 + 7) / SW : OW - 1;
+ for (int ow = (ows8 * 8 + SW - 1) / SW; ow <= boundary; ow++) {
+ *(dst_local + ow) = (half)(IC / GC - *((ushort *)(&val_shift) + ow * SW - ows8 * 8));
+ }
+ }
+
+ barrier(CLK_LOCAL_MEM_FENCE);
+
+ event_t e2 = async_work_group_copy(dst_data + oc * OW * OH + oh * OW, dst_local, OW, 0);
+ wait_group_events(1, &e2);
+}
diff --git a/openvino/vpu_custom_kernels/binary_convolution3x3.bin b/openvino/vpu_custom_kernels/binary_convolution3x3.bin
new file mode 100644
index 0000000000000000000000000000000000000000..39b46d9e6b2320afd01ae1d33e32f2f6a55d9a95
--- /dev/null
+++ b/openvino/vpu_custom_kernels/binary_convolution3x3.bin
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:55e3c3f8863ff7a3583bcc7340d1e226775f5f14cfb11dd32bd671764570f7cb
+size 104136
diff --git a/openvino/vpu_custom_kernels/binary_convolution3x3.cl b/openvino/vpu_custom_kernels/binary_convolution3x3.cl
new file mode 100644
index 0000000000000000000000000000000000000000..60a7498ca2d33c98222c8f95f5c83fc78d96c838
--- /dev/null
+++ b/openvino/vpu_custom_kernels/binary_convolution3x3.cl
@@ -0,0 +1,278 @@
+// Copyright (C) 2018-2022 Intel Corporation
+// SPDX-License-Identifier: Apache-2.0
+//
+
+#pragma OPENCL EXTENSION cl_khr_fp16 : enable
+#pragma OPENCL EXTENSION cl_khr_extended_async_copies : enable
+
+ushort extract_weights(uchar val, int bit) { return ((val >> bit) & 1); }
+
+__kernel void binary_convolution(
+ const __global half *restrict src_data,
+ const __global uchar *restrict weights_data,
+ const __global half *restrict dst_data,
+ float pad_value,
+
+ int IW,
+ int IH,
+ int IC,
+
+ int DW,
+ int DH,
+
+ int GC,
+
+ int KW,
+ int KH,
+
+ int PW,
+ int PH,
+
+ int SW,
+ int SH,
+
+ int OW)
+{
+ __local half src_local[32 * 1024];
+ __local half dst_local[2 * 1024];
+
+ const int oh = get_group_id(0);
+ const int oc = get_group_id(1);
+ const int OH = get_global_size(0);
+ const int OC = get_global_size(1);
+
+ const int gc = oc / (OC / GC);
+
+ if (oh * SH - 1 >= 0 && oh * SH + DH + DH - 1 <= IH - 1) //dma for 3 rows
+ {
+ event_t e = async_work_group_copy_3D3D(
+ src_local, // dst
+ src_data + (gc * IC / GC) * IW * IH + (SH * oh - 1) * IW, // src
+ IW, // num_elements_per_line
+ 3, // num_lines
+ DH * IW - IW, // src_line_stride
+ 0, // dst_line_stride
+ IC / GC, // num planes
+ IH * IW - 3 * DH * IW, // src plane stride
+ 0, // dst plane stride
+ 0);
+ wait_group_events(1, &e);
+ } else {
+ int ih = oh * SH - 1;
+ if (ih >= 0 && ih <= IH - 1) //dma for first row
+ {
+ event_t e = async_work_group_copy_2D2D(
+ src_local, // dst
+ src_data + (gc * IC / GC) * IW * IH + ih * IW, // src
+ IW, // num_elements_per_line,
+ IC / GC, // num_lines,
+ IH * IW - IW, // src_line_stride,
+ 2 * IW, // dst_line_stride,
+ 0);
+
+ wait_group_events(1, &e);
+ }
+ ih = oh * SH - 1 + DH;
+ if (ih >= 0 && ih <= IH - 1) //dma for second row
+ {
+ event_t e = async_work_group_copy_2D2D(
+ src_local + IW, // dst
+ src_data + (gc * IC / GC) * IW * IH + ih * IW, // src
+ IW, // num_elements_per_line,
+ IC / GC, // num_lines,
+ IH * IW - IW, // src_line_stride,
+ 2 * IW, // dst_line_stride,
+ 0);
+ wait_group_events(1, &e);
+ }
+ ih = oh * SH - 1 + 2 * DH;
+ if (ih >= 0 && ih <= IH - 1) //dma for third row
+ {
+ event_t e = async_work_group_copy_2D2D(
+ src_local + 2 * IW, // dst
+ src_data + (gc * IC / GC) * IW * IH + ih * IW, // src
+ IW, // num_elements_per_line,
+ IC / GC, // num_lines,
+ IH * IW - IW, // src_line_stride,
+ 2 * IW, // dst_line_stride,
+ 0);
+ wait_group_events(1, &e);
+ }
+ }
+
+ half pad_value_half = convert_half(pad_value);
+
+ //padding row
+ if (oh * SH - 1 < 0 || oh * SH - 1 > IH - 1) {
+ __local half *dst = src_local;
+ for (int c = 0; c < IC / GC; c++) {
+ #pragma unroll 8
+ for (int j = 0; j < IW; j++) {
+ dst[j] = pad_value_half;
+ }
+ dst += 3 * IW;
+ }
+ }
+ if (oh * SH + DH - 1 > IH - 1) {
+ __local half *dst = src_local + IW;
+ for (int c = 0; c < IC / GC; c++) {
+ #pragma unroll 8
+ for (int j = 0; j < IW; j++) {
+ dst[j] = pad_value_half;
+ }
+ dst += 3 * IW;
+ }
+ }
+ if (oh * SH + DH + DH - 1 > IH - 1) {
+ __local half *dst = src_local + 2 * IW;
+ for (int c = 0; c < IC / GC; c++) {
+ #pragma unroll 8
+ for (int j = 0; j < IW; j++) {
+ dst[j] = pad_value_half;
+ }
+ dst += 3 * IW;
+ }
+ }
+
+ int OWS = SW * OW;
+
+ ushort8 in00;
+ ushort8 in01;
+ ushort8 in02;
+ ushort8 in10;
+ ushort8 in11;
+ ushort8 in12;
+ ushort8 in20;
+ ushort8 in21;
+ ushort8 in22;
+
+ for (int ows8 = 0; ows8 < (OWS + 7) / 8; ows8++) {
+ ushort8 val = {0, 0, 0, 0, 0, 0, 0, 0};
+ for (int ic = 0; ic < IC / GC; ++ic) {
+ __local half *src =
+ (__local half *)((__local half8 *)(src_local + ic * IW * 3 + IW + DW - 1) + ows8);
+ int weight_pos = oc * IC / GC * 3 * 3 + ic * 3 * 3;
+ ushort w0 = extract_weights(weights_data[((weight_pos + 0)) / 8], ((weight_pos + 0) % 8));
+ ushort w1 = extract_weights(weights_data[((weight_pos + 1)) / 8], ((weight_pos + 1) % 8));
+ ushort w2 = extract_weights(weights_data[((weight_pos + 2)) / 8], ((weight_pos + 2) % 8));
+ ushort w3 = extract_weights(weights_data[((weight_pos + 3)) / 8], ((weight_pos + 3) % 8));
+ ushort w4 = extract_weights(weights_data[((weight_pos + 4)) / 8], ((weight_pos + 4) % 8));
+ ushort w5 = extract_weights(weights_data[((weight_pos + 5)) / 8], ((weight_pos + 5) % 8));
+ ushort w6 = extract_weights(weights_data[((weight_pos + 6)) / 8], ((weight_pos + 6) % 8));
+ ushort w7 = extract_weights(weights_data[((weight_pos + 7)) / 8], ((weight_pos + 7) % 8));
+ ushort w8 = extract_weights(weights_data[((weight_pos + 8)) / 8], ((weight_pos + 8) % 8));
+
+ if ((ows8 * 8) - 1 <= IW - 1) {
+ in00 = *((__local ushort8 *)(src - IW - DW));
+ in01 = *((__local ushort8 *)(src - IW));
+ in02 = *((__local ushort8 *)(src - IW + DW));
+
+ in10 = *((__local ushort8 *)(src - DW));
+ in11 = *((__local ushort8 *)(src));
+ in12 = *((__local ushort8 *)(src + DW));
+
+ in20 = *((__local ushort8 *)(src + IW - DW));
+ in21 = *((__local ushort8 *)(src + IW));
+ in22 = *((__local ushort8 *)(src + IW + DW));
+ }
+
+ //padding column
+ if (ows8 * 8 - 1 < 0) {
+ int boundary = 1 - ows8 * 8;
+ boundary = boundary > 8 ? 8 : boundary;
+ for (int offset = 0; offset < boundary; offset++) {
+ *((half *)(&in00) + offset) = pad_value_half;
+ *((half *)(&in10) + offset) = pad_value_half;
+ *((half *)(&in20) + offset) = pad_value_half;
+ }
+ }
+ if ((ows8 * 8 + 7) + DW + DW - 1 > IW - 1) {
+ int boundary = (IW - DW - 1 - DW + 1) - ows8 * 8 + 1;
+ boundary = boundary < 0 ? 0 : boundary;
+ for (int offset = boundary; offset < 8; offset++) {
+ *((half *)(&in02) + offset) = pad_value_half;
+ *((half *)(&in12) + offset) = pad_value_half;
+ *((half *)(&in22) + offset) = pad_value_half;
+ }
+ }
+ if ((ows8 * 8 + 7) + DW - 1 > IW - 1) {
+ int boundary = (IW - 1 - DW + 1) - ows8 * 8 + 1;
+ boundary = boundary < 0 ? 0 : boundary;
+ for (int offset = boundary; offset < 8; offset++) {
+ *((half *)(&in01) + offset) = pad_value_half;
+ *((half *)(&in11) + offset) = pad_value_half;
+ *((half *)(&in21) + offset) = pad_value_half;
+ }
+ }
+ if ((ows8 * 8 + 7) - 1 > IW - 1) {
+ int boundary = (IW - 1 + 1) - ows8 * 8 + 1;
+ boundary = boundary < 0 ? 0 : boundary;
+ for (int offset = boundary; offset < 8; offset++) {
+ *((half *)(&in00) + offset) = pad_value_half;
+ *((half *)(&in10) + offset) = pad_value_half;
+ *((half *)(&in20) + offset) = pad_value_half;
+ }
+ }
+
+ ushort8 w00 = (ushort8)(w0);
+ ushort8 w01 = (ushort8)(w1);
+ ushort8 w02 = (ushort8)(w2);
+ ushort8 w10 = (ushort8)(w3);
+ ushort8 w11 = (ushort8)(w4);
+ ushort8 w12 = (ushort8)(w5);
+ ushort8 w20 = (ushort8)(w6);
+ ushort8 w21 = (ushort8)(w7);
+ ushort8 w22 = (ushort8)(w8);
+
+ ushort8 cond0 = (((in00) < (ushort8)0x8000) && (in00 > (ushort8)0x0000)) ?
+ (ushort8)(1) :
+ (ushort8)(0);
+ ushort8 cond1 = (((in01) < (ushort8)0x8000) && (in01 > (ushort8)0x0000)) ?
+ (ushort8)(1) :
+ (ushort8)(0);
+ ushort8 cond2 = (((in02) < (ushort8)0x8000) && (in02 > (ushort8)0x0000)) ?
+ (ushort8)(1) :
+ (ushort8)(0);
+ ushort8 cond3 = (((in10) < (ushort8)0x8000) && (in10 > (ushort8)0x0000)) ?
+ (ushort8)(1) :
+ (ushort8)(0);
+ ushort8 cond4 = (((in11) < (ushort8)0x8000) && (in11 > (ushort8)0x0000)) ?
+ (ushort8)(1) :
+ (ushort8)(0);
+ ushort8 cond5 = (((in12) < (ushort8)0x8000) && (in12 > (ushort8)0x0000)) ?
+ (ushort8)(1) :
+ (ushort8)(0);
+ ushort8 cond6 = (((in20) < (ushort8)0x8000) && (in20 > (ushort8)0x0000)) ?
+ (ushort8)(1) :
+ (ushort8)(0);
+ ushort8 cond7 = (((in21) < (ushort8)0x8000) && (in21 > (ushort8)0x0000)) ?
+ (ushort8)(1) :
+ (ushort8)(0);
+ ushort8 cond8 = (((in22) < (ushort8)0x8000) && (in22 > (ushort8)0x0000)) ?
+ (ushort8)(1) :
+ (ushort8)(0);
+
+ val += (cond0 ^ w00);
+ val += (cond1 ^ w01);
+ val += (cond2 ^ w02);
+ val += (cond3 ^ w10);
+ val += (cond4 ^ w11);
+ val += (cond5 ^ w12);
+ val += (cond6 ^ w20);
+ val += (cond7 ^ w21);
+ val += (cond8 ^ w22);
+ }
+
+ ushort8 val_shift = val << 1;
+ int boundary = (ows8 * 8 + 7) / SW <= OW - 1 ? (ows8 * 8 + 7) / SW : OW - 1;
+ for (int ow = (ows8 * 8 + SW - 1) / SW; ow <= boundary; ow++) {
+ *(dst_local + ow) =
+ (half)(IC / GC * KH * KW - *((ushort *)(&val_shift) + ow * SW - ows8 * 8));
+ }
+ }
+
+ barrier(CLK_LOCAL_MEM_FENCE);
+
+ event_t e2 = async_work_group_copy(dst_data + oc * OW * OH + oh * OW, dst_local, OW, 0);
+ wait_group_events(1, &e2);
+}
diff --git a/openvino/vpu_custom_kernels/convolution1x1_chw.bin b/openvino/vpu_custom_kernels/convolution1x1_chw.bin
new file mode 100644
index 0000000000000000000000000000000000000000..343d6402230d3db3a9bf4e3695ffa6534fd64915
--- /dev/null
+++ b/openvino/vpu_custom_kernels/convolution1x1_chw.bin
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:8717c8429d41a69337007871137f06a9e6b38c685b5b3fecc634fade0eaa7e7f
+size 9220
diff --git a/openvino/vpu_custom_kernels/convolution1x1_chw.cl b/openvino/vpu_custom_kernels/convolution1x1_chw.cl
new file mode 100644
index 0000000000000000000000000000000000000000..86e9417b0a521551e1062ac76952c08694554000
--- /dev/null
+++ b/openvino/vpu_custom_kernels/convolution1x1_chw.cl
@@ -0,0 +1,114 @@
+// Copyright (C) 2018-2022 Intel Corporation
+// SPDX-License-Identifier: Apache-2.0
+//
+
+#pragma OPENCL EXTENSION cl_khr_fp16 : enable
+#pragma OPENCL EXTENSION cl_khr_extended_async_copies : enable
+
+__kernel void Convolution1x1_NCHW(
+ const __global half *in,
+ const __global half *out,
+ const __global half *w,
+ int IW,
+ int IH,
+ int IC,
+ int OW,
+ int OH,
+ int OC)
+{
+ __local half in_local[8 * 1024];
+ __local half out_local[8 * 1024];
+
+ event_t e1 = async_work_group_copy_2D2D(
+ in_local, // dst
+ in + get_group_id(0) * IW, // src
+ IW, // num_elements_per_line,
+ IC, // num_lines,
+ IW * IH - IW, // src_line_stride,
+ 0, // dst_line_stride,
+ 0);
+ wait_group_events(1, &e1);
+
+ int oh = get_global_id(0);
+ int oc = get_global_id(1);
+
+ int stride;
+ int write_output = 0;
+ __global half *src;
+
+ __global half8 *w8 = (__global half8 *)(&w[oc * IC]);
+ __global half *w1 = (__global half *)(&w[oc * IC]);
+
+ for (uint ow = 0; ow < (OW & (~0x7)); ow += 8) {
+ uint iw = ow;
+ uint ih = oh;
+
+ half8 val8_0 = 0.0f;
+
+ __local half8 *in8_0 = (__local half8 *)(&in_local[iw + 0 * IW]);
+ __local half8 *in8_1 = (__local half8 *)(&in_local[iw + 1 * IW]);
+ __local half8 *in8_2 = (__local half8 *)(&in_local[iw + 2 * IW]);
+ __local half8 *in8_3 = (__local half8 *)(&in_local[iw + 3 * IW]);
+ __local half8 *in8_4 = (__local half8 *)(&in_local[iw + 4 * IW]);
+ __local half8 *in8_5 = (__local half8 *)(&in_local[iw + 5 * IW]);
+ __local half8 *in8_6 = (__local half8 *)(&in_local[iw + 6 * IW]);
+ __local half8 *in8_7 = (__local half8 *)(&in_local[iw + 7 * IW]);
+
+ for (uint ic = 0; ic < IC / 8; ic++) {
+ val8_0 += (in8_0[ic * IW]) * ((half8)w8[ic].s0);
+ val8_0 += (in8_1[ic * IW]) * ((half8)w8[ic].s1);
+ val8_0 += (in8_2[ic * IW]) * ((half8)w8[ic].s2);
+ val8_0 += (in8_3[ic * IW]) * ((half8)w8[ic].s3);
+ val8_0 += (in8_4[ic * IW]) * ((half8)w8[ic].s4);
+ val8_0 += (in8_5[ic * IW]) * ((half8)w8[ic].s5);
+ val8_0 += (in8_6[ic * IW]) * ((half8)w8[ic].s6);
+ val8_0 += (in8_7[ic * IW]) * ((half8)w8[ic].s7);
+ }
+
+ for (uint ic = (IC & (~0x7)); ic < IC; ++ic) {
+ val8_0 += *((__local half8 *)(&in_local[iw + ic * IW])) * ((half8)w1[ic]);
+ }
+ *((__local half8 *)&out_local[ow + 0]) = (val8_0);
+ }
+
+ uint iw = (OW & (~0x7));
+ uint ih = oh;
+
+ half8 val8_0 = 0.0f;
+
+ __local half8 *in8_0 = (__local half8 *)(&in_local[iw + 0 * IW]);
+ __local half8 *in8_1 = (__local half8 *)(&in_local[iw + 1 * IW]);
+ __local half8 *in8_2 = (__local half8 *)(&in_local[iw + 2 * IW]);
+ __local half8 *in8_3 = (__local half8 *)(&in_local[iw + 3 * IW]);
+ __local half8 *in8_4 = (__local half8 *)(&in_local[iw + 4 * IW]);
+ __local half8 *in8_5 = (__local half8 *)(&in_local[iw + 5 * IW]);
+ __local half8 *in8_6 = (__local half8 *)(&in_local[iw + 6 * IW]);
+ __local half8 *in8_7 = (__local half8 *)(&in_local[iw + 7 * IW]);
+
+ for (uint ic = 0; ic < IC / 8; ic++) {
+ val8_0 += (in8_0[ic * IW]) * ((half8)w8[ic].s0);
+ val8_0 += (in8_1[ic * IW]) * ((half8)w8[ic].s1);
+ val8_0 += (in8_2[ic * IW]) * ((half8)w8[ic].s2);
+ val8_0 += (in8_3[ic * IW]) * ((half8)w8[ic].s3);
+ val8_0 += (in8_4[ic * IW]) * ((half8)w8[ic].s4);
+ val8_0 += (in8_5[ic * IW]) * ((half8)w8[ic].s5);
+ val8_0 += (in8_6[ic * IW]) * ((half8)w8[ic].s6);
+ val8_0 += (in8_7[ic * IW]) * ((half8)w8[ic].s7);
+ }
+
+ for (uint ic = (IC & (~0x7)); ic < IC; ++ic) {
+ val8_0 += *((__local half8 *)(&in_local[iw + ic * IW])) * ((half8)w1[ic]);
+ }
+ for (uint ow = (OW & (~0x7)); ow < OW; ow++) {
+ out_local[ow + 0] = (val8_0[ow % 8]);
+ }
+
+ barrier(CLK_LOCAL_MEM_FENCE);
+
+ event_t e2 = async_work_group_copy(
+ out + get_group_id(1) * OW * OH + get_group_id(0) * OW,
+ out_local,
+ OW,
+ 0);
+ wait_group_events(1, &e2);
+}
diff --git a/openvino/vpu_custom_kernels/convolution1x1_hwc.bin b/openvino/vpu_custom_kernels/convolution1x1_hwc.bin
new file mode 100644
index 0000000000000000000000000000000000000000..0410ef592dcb2ddaadaf608194345d8c6eb279fb
--- /dev/null
+++ b/openvino/vpu_custom_kernels/convolution1x1_hwc.bin
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:5b6122a6bf6f50d2c7fc612d4e286559f9c96746e166892d192e1264e1ce5a2c
+size 4304
diff --git a/openvino/vpu_custom_kernels/convolution1x1_hwc.cl b/openvino/vpu_custom_kernels/convolution1x1_hwc.cl
new file mode 100644
index 0000000000000000000000000000000000000000..0c919d244736b050bcefb4acf9017486f218a2fa
--- /dev/null
+++ b/openvino/vpu_custom_kernels/convolution1x1_hwc.cl
@@ -0,0 +1,126 @@
+// Copyright (C) 2018-2022 Intel Corporation
+// SPDX-License-Identifier: Apache-2.0
+//
+
+#pragma OPENCL EXTENSION cl_khr_fp16 : enable
+#pragma OPENCL EXTENSION cl_khr_extended_async_copies : enable
+
+__kernel void Convolution1x1_NHWC(
+ const __global half *in,
+ const __global half *out,
+ const __global half *w,
+ int IW,
+ int IH,
+ int IC,
+ int OW,
+ int OH,
+ int OC)
+{
+
+ __local half in_local[8 * 1024];
+ __local half out_local[8 * 1024];
+
+ const int sizeAct = IW * IC;
+
+ event_t e1 = async_work_group_copy(in_local, in + get_group_id(0) * sizeAct, sizeAct, 0);
+ wait_group_events(1, &e1);
+
+ int oh = get_global_id(0);
+ int oc = get_global_id(1);
+
+ int stride;
+ int write_output = 0;
+ __global half *src;
+
+ __global half8 *w8 = (__global half8 *)(&w[oc * IC]);
+ __global half *w1 = (__global half *)(&w[oc * IC]);
+
+ for (uint ow = 0; ow < (OW & (~0x7)); ow += 8) {
+ uint iw = ow;
+ uint ih = oh;
+
+ half8 val8_0 = 0.0f;
+ half8 val8_1 = 0.0f;
+ half8 val8_2 = 0.0f;
+ half8 val8_3 = 0.0f;
+ half8 val8_4 = 0.0f;
+ half8 val8_5 = 0.0f;
+ half8 val8_6 = 0.0f;
+ half8 val8_7 = 0.0f;
+
+ __local half8 *in8_0 = (__local half8 *)(&in_local[(iw + 0) * IC]);
+ __local half8 *in8_1 = (__local half8 *)(&in_local[(iw + 1) * IC]);
+ __local half8 *in8_2 = (__local half8 *)(&in_local[(iw + 2) * IC]);
+ __local half8 *in8_3 = (__local half8 *)(&in_local[(iw + 3) * IC]);
+ __local half8 *in8_4 = (__local half8 *)(&in_local[(iw + 4) * IC]);
+ __local half8 *in8_5 = (__local half8 *)(&in_local[(iw + 5) * IC]);
+ __local half8 *in8_6 = (__local half8 *)(&in_local[(iw + 6) * IC]);
+ __local half8 *in8_7 = (__local half8 *)(&in_local[(iw + 7) * IC]);
+
+ for (uint ic = 0; ic < IC / 8; ++ic) {
+ val8_0 += (in8_0[ic]) * (w8[ic]);
+ val8_1 += (in8_1[ic]) * (w8[ic]);
+ val8_2 += (in8_2[ic]) * (w8[ic]);
+ val8_3 += (in8_3[ic]) * (w8[ic]);
+ val8_4 += (in8_4[ic]) * (w8[ic]);
+ val8_5 += (in8_5[ic]) * (w8[ic]);
+ val8_6 += (in8_6[ic]) * (w8[ic]);
+ val8_7 += (in8_7[ic]) * (w8[ic]);
+ }
+
+ half val_0 = 0.0f;
+ half val_1 = 0.0f;
+ half val_2 = 0.0f;
+ half val_3 = 0.0f;
+ half val_4 = 0.0f;
+ half val_5 = 0.0f;
+ half val_6 = 0.0f;
+ half val_7 = 0.0f;
+ for (uint ic = IC & (~0x7); ic < IC; ++ic) {
+ val_0 += *((__local half *)in8_0 + ic) * (*((__global half *)w8 + ic));
+ val_1 += *((__local half *)in8_1 + ic) * (*((__global half *)w8 + ic));
+ val_2 += *((__local half *)in8_2 + ic) * (*((__global half *)w8 + ic));
+ val_3 += *((__local half *)in8_3 + ic) * (*((__global half *)w8 + ic));
+ val_4 += *((__local half *)in8_4 + ic) * (*((__global half *)w8 + ic));
+ val_5 += *((__local half *)in8_5 + ic) * (*((__global half *)w8 + ic));
+ val_6 += *((__local half *)in8_6 + ic) * (*((__global half *)w8 + ic));
+ val_7 += *((__local half *)in8_7 + ic) * (*((__global half *)w8 + ic));
+ }
+ out_local[ow + 0] = __builtin_shave_sau_sumx_f16_r(val8_0) + val_0;
+ out_local[ow + 1] = __builtin_shave_sau_sumx_f16_r(val8_1) + val_1;
+ out_local[ow + 2] = __builtin_shave_sau_sumx_f16_r(val8_2) + val_2;
+ out_local[ow + 3] = __builtin_shave_sau_sumx_f16_r(val8_3) + val_3;
+ out_local[ow + 4] = __builtin_shave_sau_sumx_f16_r(val8_4) + val_4;
+ out_local[ow + 5] = __builtin_shave_sau_sumx_f16_r(val8_5) + val_5;
+ out_local[ow + 6] = __builtin_shave_sau_sumx_f16_r(val8_6) + val_6;
+ out_local[ow + 7] = __builtin_shave_sau_sumx_f16_r(val8_7) + val_7;
+ }
+ for (uint ow = (OW & (~0x7)); ow < OW; ow++) {
+
+ uint iw = ow;
+ uint ih = oh;
+
+ half8 val8 = 0.0f;
+
+ __local half8 *in8 = (__local half8 *)(&in_local[iw * IC]);
+
+ for (uint ic = 0; ic < IC / 8; ++ic) {
+ val8 += (in8[ic]) * (w8[ic]);
+ }
+
+ half val = 0.0f;
+ for (uint ic = (IC & (~0x7)); ic < IC; ++ic) {
+ val += (*((__local half *)in8 + ic)) * (*((__global half *)w8 + ic));
+ }
+ out_local[ow] = __builtin_shave_sau_sumx_f16_r(val8) + val;
+ }
+
+ barrier(CLK_LOCAL_MEM_FENCE);
+
+ event_t e2 = async_work_group_copy(
+ out + get_group_id(1) * OW * OH + get_group_id(0) * OW,
+ out_local,
+ OW,
+ 0);
+ wait_group_events(1, &e2);
+}
diff --git a/openvino/vpu_custom_kernels/convolution3x3.bin b/openvino/vpu_custom_kernels/convolution3x3.bin
new file mode 100644
index 0000000000000000000000000000000000000000..eb7ae3555e65927f613d6f2f4331c2826f2c4446
--- /dev/null
+++ b/openvino/vpu_custom_kernels/convolution3x3.bin
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:021bb40840ff35506972e6f6a7dea1b5f40a8db0927aaa9a6c116b152e386851
+size 5748
diff --git a/openvino/vpu_custom_kernels/convolution3x3.cl b/openvino/vpu_custom_kernels/convolution3x3.cl
new file mode 100644
index 0000000000000000000000000000000000000000..447350b5d33467515262dcdc8c53845adb138c28
--- /dev/null
+++ b/openvino/vpu_custom_kernels/convolution3x3.cl
@@ -0,0 +1,158 @@
+// Copyright (C) 2018-2022 Intel Corporation
+// SPDX-License-Identifier: Apache-2.0
+//
+
+#pragma OPENCL EXTENSION cl_khr_fp16 : enable
+#pragma OPENCL EXTENSION cl_khr_extended_async_copies : enable
+
+__kernel void Convolution3x3(
+ const __global half *in_param,
+ const __global half *out,
+ const __global half *w,
+ int IW,
+ int IH,
+ int IC,
+ int OW,
+ int OH,
+ int OC,
+ int KX,
+ int KY,
+ int stride_x,
+ int stride_y,
+ int pad_x,
+ int pad_y,
+ int dilation_x,
+ int dilation_y)
+{
+ __local half in_local[8 * 1024];
+ __local half out_local[8 * 1024];
+ __local half w_local[8 * 1024];
+
+ const int sizePlane = IW * IH;
+ event_t e1 = async_work_group_copy_2D2D(
+ in_local, // dst
+ in_param + get_group_id(0) * stride_y * IW, // src
+ 3 * IW, // num_elements_per_line,
+ IC, // num_lines,
+ IW * IH - 3 * IW, // src_line_stride,
+ 0, // dst_line_stride,
+ 0);
+ wait_group_events(1, &e1);
+
+ const int sizeWeight = IC * 3 * 3;
+ e1 = async_work_group_copy(w_local, w + get_group_id(1) * sizeWeight, sizeWeight, 0);
+ wait_group_events(1, &e1);
+
+ int oh = get_global_id(0);
+ int oc = get_global_id(1);
+
+ __local half *in = (__local half *)in_local + 1;
+
+ int stride;
+ int write_output = 0;
+ __local half *src;
+
+ if ((stride_x == 1) && (stride_y == 1)) {
+ stride = OW / 8;
+ write_output = 1;
+ }
+ if ((stride_x == 2) && (stride_y == 2)) {
+ stride = OW / 4;
+ write_output = 2;
+ }
+
+ for (int ow = 0; ow < stride; ow++) {
+ float8 val = {0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f};
+ for (int ic = 0; ic < IC; ++ic) {
+ src = (__local half *)((__local half8 *)(in + ic * IW * 3) + ow);
+ __local half *k = (__local half *)(w_local + ic * 3 * 3);
+
+ half8 aux_in00 = *((__local half8 *)src - 1);
+ half8 aux_in01 = *((__local half8 *)src + 0);
+ half8 aux_in02 = *((__local half8 *)src + 1);
+ half8 aux_in10 = *((__local half8 *)(src + IW) - 1);
+ half8 aux_in11 = *((__local half8 *)(src + IW) + 0);
+ half8 aux_in12 = *((__local half8 *)(src + IW) + 1);
+ half8 aux_in20 = *((__local half8 *)(src + IW * 2) - 1);
+ half8 aux_in21 = *((__local half8 *)(src + IW * 2) + 0);
+ half8 aux_in22 = *((__local half8 *)(src + IW * 2) + 1);
+
+ short8 in00 = *((short8 *)&aux_in00);
+ short8 in01 = *((short8 *)&aux_in01);
+ short8 in02 = *((short8 *)&aux_in02);
+ short8 in10 = *((short8 *)&aux_in10);
+ short8 in11 = *((short8 *)&aux_in11);
+ short8 in12 = *((short8 *)&aux_in12);
+ short8 in20 = *((short8 *)&aux_in20);
+ short8 in21 = *((short8 *)&aux_in21);
+ short8 in22 = *((short8 *)&aux_in22);
+
+ short8 aux_aux00 = __builtin_shave_cmu_alignvec_rri_short8(in00, in01, 14);
+ short8 aux_aux01 = in01;
+ short8 aux_aux02 = __builtin_shave_cmu_alignvec_rri_short8(in01, in02, 2);
+ short8 aux_aux10 = __builtin_shave_cmu_alignvec_rri_short8(in10, in11, 14);
+ short8 aux_aux11 = in11;
+ short8 aux_aux12 = __builtin_shave_cmu_alignvec_rri_short8(in11, in12, 2);
+ short8 aux_aux20 = __builtin_shave_cmu_alignvec_rri_short8(in20, in21, 14);
+ short8 aux_aux21 = in21;
+ short8 aux_aux22 = __builtin_shave_cmu_alignvec_rri_short8(in21, in22, 2);
+
+ half8 aux00 = *((half8 *)&aux_aux00);
+ half8 aux01 = *((half8 *)&aux_aux01);
+ half8 aux02 = *((half8 *)&aux_aux02);
+ half8 aux10 = *((half8 *)&aux_aux10);
+ half8 aux11 = *((half8 *)&aux_aux11);
+ half8 aux12 = *((half8 *)&aux_aux12);
+ half8 aux20 = *((half8 *)&aux_aux20);
+ half8 aux21 = *((half8 *)&aux_aux21);
+ half8 aux22 = *((half8 *)&aux_aux22);
+
+ half8 w00 = (half8)(*(k + 0));
+ half8 w01 = (half8)(*(k + 1));
+ half8 w02 = (half8)(*(k + 2));
+ half8 w10 = (half8)(*(k + 3));
+ half8 w11 = (half8)(*(k + 4));
+ half8 w12 = (half8)(*(k + 5));
+ half8 w20 = (half8)(*(k + 6));
+ half8 w21 = (half8)(*(k + 7));
+ half8 w22 = (half8)(*(k + 8));
+
+ val += convert_float8(aux00) * convert_float8(w00);
+ val += convert_float8(aux01) * convert_float8(w01);
+ val += convert_float8(aux02) * convert_float8(w02);
+ val += convert_float8(aux10) * convert_float8(w10);
+ val += convert_float8(aux11) * convert_float8(w11);
+ val += convert_float8(aux12) * convert_float8(w12);
+ val += convert_float8(aux20) * convert_float8(w20);
+ val += convert_float8(aux21) * convert_float8(w21);
+ val += convert_float8(aux22) * convert_float8(w22);
+ }
+ if (write_output == 2) *((__local half4 *)(out_local) + ow) = convert_half4(val.s0246);
+ if (write_output == 1) *((__local half8 *)(out_local) + ow) = convert_half8(val);
+ }
+
+ for (int ow = OW & ~(0x7); ow < OW; ow++) {
+ float val = 0.0f;
+ for (int ic = 0; ic < IC; ++ic) {
+ for (int ky = 0; ky < 3; ++ky) {
+ for (int kx = 0; kx < 3; ++kx) {
+ int iw = ow * stride_x - pad_x + kx * dilation_x;
+ int ih = oh * stride_y - pad_y + ky * dilation_y;
+
+ val += convert_float(in[ic * IW * 3 + (ky * dilation_y) * IW + iw])
+ * convert_float(w_local[ic * 3 * 3 + ky * 3 + kx]);
+ }
+ }
+ }
+ out_local[ow] = convert_half(val);
+ }
+
+ barrier(CLK_LOCAL_MEM_FENCE);
+
+ event_t e2 = async_work_group_copy(
+ out + get_group_id(1) * OW * OH + get_group_id(0) * OW,
+ out_local,
+ OW,
+ 0);
+ wait_group_events(1, &e2);
+}
diff --git a/openvino/vpu_custom_kernels/correlate.bin b/openvino/vpu_custom_kernels/correlate.bin
new file mode 100644
index 0000000000000000000000000000000000000000..01c5fdf2dd8776c0c3e29c1e7abe934c19f4e0c5
--- /dev/null
+++ b/openvino/vpu_custom_kernels/correlate.bin
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:e2b24b1b5bfd1786128682ee814230653b4b63aad5b472feec9c6f4a4c833e2f
+size 14336
diff --git a/openvino/vpu_custom_kernels/correlate.cl b/openvino/vpu_custom_kernels/correlate.cl
new file mode 100644
index 0000000000000000000000000000000000000000..5b63e714040ab2307f99dfb56078c46482b3fb6b
--- /dev/null
+++ b/openvino/vpu_custom_kernels/correlate.cl
@@ -0,0 +1,453 @@
+// Copyright (C) 2018-2022 Intel Corporation
+// SPDX-License-Identifier: Apache-2.0
+//
+
+#pragma OPENCL EXTENSION cl_khr_fp16 : enable
+
+#define MAX_OPENCL_BUFF_SIZE 64 * 1024
+
+#define USE_DMA 1
+
+#if defined(USE_DMA)
+void dmacpyLineSrcStrideStart(global half *from, private half *to, int size, int src_width, int src_stride)
+{
+ item_dma_event_t copyEvent =
+ WorkItemDmaCreateStrideTransaction(from, to, src_width, src_width, src_stride, src_width, size, 0);
+ WaitWorkItemDmaEvents(1, ©Event);
+}
+
+void dmacpyLineDstStrideStart(private half *from, global half *to, int size, int src_width, int src_stride)
+{
+ item_dma_event_t copyEvent =
+ WorkItemDmaCreateStrideTransaction(from, to, src_width, src_width, src_width, src_stride, size, 0);
+ WaitWorkItemDmaEvents(1, ©Event);
+}
+#endif
+
+void memzero(void *ptr, size_t num)
+{
+ float4 *line0_ = (float4 *)ptr;
+ #pragma unroll 16
+ for (int i = 0; i < num / 16; i++) {
+ line0_[i] = (float4){0.f, 0.f, 0.f, 0.f};
+ }
+ uchar *ptr_ = (uchar *)ptr;
+ for (int i = num / 16 * 16; i < num; i++) {
+ ptr_[i] = 0;
+ }
+}
+
+void __attribute__((noinline)) crosscorrh(
+ __private const half *restrict line0,
+ __private const half *restrict line1,
+ __private half *restrict dline,
+ int topwidth,
+ int max_displacement,
+ int neighborhood_grid_radius,
+ int kernel_size,
+ int padding,
+ int bottomwidth,
+ int stride1,
+ int stride2,
+ int max_channels,
+ int cur_subchannels)
+{
+ if (max_channels == 64) {
+ for (int i = 0; i < kernel_size; i++) {
+ int x1 = max_displacement - padding + i;
+ int offset1 = x1 >= 0 ? 0 : (-x1 + stride1 - 1) / stride1;
+ x1 += offset1 * stride1;
+
+ for (int blockIdx_x = offset1; blockIdx_x < topwidth && x1 < bottomwidth; blockIdx_x++, x1 += stride1) {
+ int x2 = x1 - neighborhood_grid_radius * stride2;
+ int offset2 = x2 >= 0 ? 0 : (-x2 + stride2 - 1) / stride2;
+ x2 += offset2 * stride2;
+
+ for (int top_channel_x = offset2 - neighborhood_grid_radius;
+ top_channel_x <= neighborhood_grid_radius && x2 < bottomwidth;
+ top_channel_x++, x2 += stride2) {
+ half8 sum4 = (half8){0.f, 0.f, 0.f, 0.f, 0.f, 0.f, 0.f, 0.f};
+
+ half8 *src0 = (half8 *)(line0 + x1 * max_channels);
+ half8 *src1 = (half8 *)(line1 + x2 * max_channels);
+
+ #pragma unroll 8
+ for (int ch = 0; ch < max_channels / 8; ch++) sum4 += (src0[ch]) * (src1[ch]);
+
+ half sum = __builtin_shave_sau_sumx_f16_r(sum4);
+ dline[(top_channel_x + neighborhood_grid_radius) * topwidth + blockIdx_x] += (sum);
+ }
+ }
+ }
+ } else {
+ int neighborhood_grid_width = 2 * neighborhood_grid_radius + 1;
+
+ for (int blockIdx_x = 0; blockIdx_x < topwidth; blockIdx_x++) {
+ for (int i = 0; i < kernel_size; i++) {
+ int x1 = blockIdx_x * stride1 + max_displacement + i - padding;
+
+ if ((x1 >= 0) && (x1 < bottomwidth)) {
+ int o_min = -neighborhood_grid_radius * stride2;
+ int o_max = neighborhood_grid_width * stride2 - neighborhood_grid_radius * stride2;
+ if ((o_min) < (-x1)) {
+ o_min -= ((x1 + o_min - (stride2 - 1)) / stride2) * stride2;
+ }
+ if ((o_max) >= (bottomwidth + stride2 - x1)) {
+ o_max -= ((x1 + o_max - bottomwidth) / stride2) * stride2;
+ }
+
+ int o = o_min;
+ for (; o <= o_max - 4 * stride2; o += 4 * stride2) {
+ half8 *bottom0 = (half8 *)(line0 + x1 * max_channels);
+ half8 *bottom1_0 = (half8 *)(line1 + (x1 + o + 0 * stride2) * max_channels);
+ half8 *bottom1_1 = (half8 *)(line1 + (x1 + o + 1 * stride2) * max_channels);
+ half8 *bottom1_2 = (half8 *)(line1 + (x1 + o + 2 * stride2) * max_channels);
+ half8 *bottom1_3 = (half8 *)(line1 + (x1 + o + 3 * stride2) * max_channels);
+
+ int c = 0;
+
+ half8 sum40 = 0;
+ half8 sum41 = 0;
+ half8 sum42 = 0;
+ half8 sum43 = 0;
+
+ for (; c <= cur_subchannels / 8 - 4; c += 4) {
+ sum40 += bottom0[c + 0] * bottom1_0[c + 0];
+ sum40 += bottom0[c + 1] * bottom1_0[c + 1];
+ sum40 += bottom0[c + 2] * bottom1_0[c + 2];
+ sum40 += bottom0[c + 3] * bottom1_0[c + 3];
+
+ sum41 += bottom0[c + 0] * bottom1_1[c + 0];
+ sum41 += bottom0[c + 1] * bottom1_1[c + 1];
+ sum41 += bottom0[c + 2] * bottom1_1[c + 2];
+ sum41 += bottom0[c + 3] * bottom1_1[c + 3];
+
+ sum42 += bottom0[c + 0] * bottom1_2[c + 0];
+ sum42 += bottom0[c + 1] * bottom1_2[c + 1];
+ sum42 += bottom0[c + 2] * bottom1_2[c + 2];
+ sum42 += bottom0[c + 3] * bottom1_2[c + 3];
+
+ sum43 += bottom0[c + 0] * bottom1_3[c + 0];
+ sum43 += bottom0[c + 1] * bottom1_3[c + 1];
+ sum43 += bottom0[c + 2] * bottom1_3[c + 2];
+ sum43 += bottom0[c + 3] * bottom1_3[c + 3];
+ }
+
+ for (; c < cur_subchannels / 8; c++) {
+ sum40 += bottom0[c] * bottom1_0[c];
+ sum41 += bottom0[c] * bottom1_1[c];
+ sum42 += bottom0[c] * bottom1_2[c];
+ sum43 += bottom0[c] * bottom1_3[c];
+ }
+
+ half sum0 = __builtin_shave_sau_sumx_f16_r(sum40);
+ half sum1 = __builtin_shave_sau_sumx_f16_r(sum41);
+ half sum2 = __builtin_shave_sau_sumx_f16_r(sum42);
+ half sum3 = __builtin_shave_sau_sumx_f16_r(sum43);
+
+ for (c = c * 8; c < cur_subchannels; c++) {
+ sum0 += line0[x1 * max_channels + c] * line1[(x1 + o + 0 * stride2) * max_channels + c];
+ sum1 += line0[x1 * max_channels + c] * line1[(x1 + o + 1 * stride2) * max_channels + c];
+ sum2 += line0[x1 * max_channels + c] * line1[(x1 + o + 2 * stride2) * max_channels + c];
+ sum3 += line0[x1 * max_channels + c] * line1[(x1 + o + 3 * stride2) * max_channels + c];
+ }
+
+ dline[blockIdx_x + (((o / stride2) + 0) * topwidth + neighborhood_grid_radius * topwidth)] +=
+ sum0;
+ dline[blockIdx_x + (((o / stride2) + 1) * topwidth + neighborhood_grid_radius * topwidth)] +=
+ sum1;
+ dline[blockIdx_x + (((o / stride2) + 2) * topwidth + neighborhood_grid_radius * topwidth)] +=
+ sum2;
+ dline[blockIdx_x + (((o / stride2) + 3) * topwidth + neighborhood_grid_radius * topwidth)] +=
+ sum3;
+ }
+
+ for (; o < o_max; o += 1 * stride2) {
+ half8 *bottom0 = (half8 *)(line0 + x1 * max_channels);
+ half8 *bottom1 = (half8 *)(line1 + (x1 + o) * max_channels);
+
+ int c = 0;
+
+ half8 sum4 = 0;
+ for (; c <= cur_subchannels / 8 - 4; c += 4) {
+ sum4 += bottom0[c + 0] * bottom1[c + 0];
+ sum4 += bottom0[c + 1] * bottom1[c + 1];
+ sum4 += bottom0[c + 2] * bottom1[c + 2];
+ sum4 += bottom0[c + 3] * bottom1[c + 3];
+ }
+ for (; c < cur_subchannels / 8; c++) {
+ sum4 += bottom0[c] * bottom1[c];
+ }
+
+ half sum = __builtin_shave_sau_sumx_f16_r(sum4);
+
+ for (c = c * 8; c < cur_subchannels; c++) {
+ sum += line0[x1 * max_channels + c] * line1[(x1 + o) * max_channels + c];
+ }
+
+ dline[blockIdx_x + (((o + neighborhood_grid_radius * stride2) / stride2) * topwidth)] += sum;
+ }
+ }
+ }
+ }
+ }
+}
+
+__kernel void correlate2_half(
+ __global const half *restrict bottom0,
+ __global const half *restrict bottom1,
+ __global half *restrict top,
+ int topwidth,
+ int topheight,
+ int bottomwidth,
+ int bottomheight,
+ int bottomchannels,
+ int max_displacement,
+ int padding,
+ int neighborhood_grid_radius,
+ int neighborhood_grid_width,
+ int kernel_size,
+ int stride1,
+ int stride2)
+{
+ int max_channels = (MAX_OPENCL_BUFF_SIZE / sizeof(half) - topwidth * neighborhood_grid_width) / (3 * bottomwidth);
+ if (max_channels > 64) max_channels = 64;
+ int subchannels_count = (bottomchannels + max_channels - 1) / max_channels;
+ int subchannels = (bottomchannels + subchannels_count - 1) / subchannels_count;
+ if (subchannels < max_channels) subchannels = max_channels;
+
+ const int sumelems = kernel_size * kernel_size * bottomchannels;
+
+ __private half cmx[MAX_OPENCL_BUFF_SIZE / sizeof(half)];
+
+ __private half *line0 = cmx;
+ __private half *line1 = line0 + bottomwidth * subchannels;
+ __private half *dline = line1 + bottomwidth * subchannels;
+
+ int blockIdx_y = get_global_id(0);
+
+#if defined(USE_DMA)
+ __private half *dmabuf = dline + topwidth * neighborhood_grid_width;
+#endif
+
+ int y1 = blockIdx_y * stride1 + max_displacement;
+
+ for (int j = 0; j < kernel_size; j++) {
+ for (int bottomchannel = 0; bottomchannel < bottomchannels; bottomchannel += subchannels) {
+ // configure channel batching
+ int startchannel = bottomchannel;
+ int endchannel = startchannel + subchannels > bottomchannels ? bottomchannels : startchannel + subchannels;
+ int deltachannels = endchannel - startchannel;
+
+ // load line form blob 0 with repackaging
+ if (y1 + j - padding >= 0 && y1 + j - padding < bottomheight) {
+#if defined(USE_DMA)
+ __global const half *curr =
+ bottom0 + startchannel * bottomheight * bottomwidth + (y1 + j - padding) * bottomwidth;
+ dmacpyLineSrcStrideStart(
+ curr,
+ dmabuf,
+ bottomwidth * deltachannels * sizeof(half),
+ bottomwidth * sizeof(half),
+ bottomwidth * bottomheight * sizeof(half));
+
+ for (int ch = 0; ch < deltachannels; ch++) {
+ for (int blockIdx_x = 0; blockIdx_x < bottomwidth / 8; blockIdx_x++) {
+ half8 val = ((half8 *)(dmabuf + ch * bottomwidth))[blockIdx_x];
+ line0[(blockIdx_x * 8 + 0) * max_channels + ch] = val[0];
+ line0[(blockIdx_x * 8 + 1) * max_channels + ch] = val[1];
+ line0[(blockIdx_x * 8 + 2) * max_channels + ch] = val[2];
+ line0[(blockIdx_x * 8 + 3) * max_channels + ch] = val[3];
+
+ line0[(blockIdx_x * 8 + 4) * max_channels + ch] = val[4];
+ line0[(blockIdx_x * 8 + 5) * max_channels + ch] = val[5];
+ line0[(blockIdx_x * 8 + 6) * max_channels + ch] = val[6];
+ line0[(blockIdx_x * 8 + 7) * max_channels + ch] = val[7];
+ }
+
+ for (int blockIdx_x = bottomwidth / 8 * 8; blockIdx_x < bottomwidth; blockIdx_x++) {
+ line0[(blockIdx_x)*max_channels + ch] = dmabuf[blockIdx_x + ch * bottomwidth];
+ }
+ }
+
+ if (deltachannels < subchannels)
+ for (int blockIdx_x = 0; blockIdx_x < bottomwidth; blockIdx_x++)
+ memzero(
+ line0 + blockIdx_x * max_channels + deltachannels,
+ (subchannels - deltachannels) * sizeof(half));
+#else
+ for (int blockIdx_x = 0; blockIdx_x < bottomwidth; blockIdx_x++) {
+ for (int ch = 0; ch < deltachannels; ch++)
+ line0[blockIdx_x * max_channels + ch] = bottom0
+ [(ch + startchannel) * bottomheight * bottomwidth + (y1 + j - padding) * bottomwidth
+ + blockIdx_x];
+
+ if (deltachannels < subchannels)
+ memzero(
+ line0 + blockIdx_x * max_channels + deltachannels,
+ (subchannels - deltachannels) * sizeof(half));
+ }
+#endif
+ } else
+ memzero(line0, max_channels * bottomwidth * sizeof(half));
+
+ for (int top_channel_y = 0; top_channel_y < neighborhood_grid_width; top_channel_y++) {
+ int y2 = y1 + (top_channel_y - neighborhood_grid_radius) * stride2;
+
+ if (y2 + j - padding >= 0 && y2 + j - padding < bottomheight) {
+#if defined(USE_DMA)
+ __global const half *curr =
+ bottom1 + startchannel * bottomheight * bottomwidth + (y2 + j - padding) * bottomwidth;
+ dmacpyLineSrcStrideStart(
+ curr,
+ dmabuf,
+ bottomwidth * deltachannels * sizeof(half),
+ bottomwidth * sizeof(half),
+ bottomwidth * bottomheight * sizeof(half));
+
+ for (int ch = 0; ch < deltachannels; ch++) {
+ for (int blockIdx_x = 0; blockIdx_x < bottomwidth / 8; blockIdx_x++) {
+ half8 val = ((half8 *)(dmabuf + ch * bottomwidth))[blockIdx_x];
+ line1[(blockIdx_x * 8 + 0) * max_channels + ch] = val[0];
+ line1[(blockIdx_x * 8 + 1) * max_channels + ch] = val[1];
+ line1[(blockIdx_x * 8 + 2) * max_channels + ch] = val[2];
+ line1[(blockIdx_x * 8 + 3) * max_channels + ch] = val[3];
+
+ line1[(blockIdx_x * 8 + 4) * max_channels + ch] = val[4];
+ line1[(blockIdx_x * 8 + 5) * max_channels + ch] = val[5];
+ line1[(blockIdx_x * 8 + 6) * max_channels + ch] = val[6];
+ line1[(blockIdx_x * 8 + 7) * max_channels + ch] = val[7];
+ }
+
+ for (int blockIdx_x = bottomwidth / 8 * 8; blockIdx_x < bottomwidth; blockIdx_x++) {
+ line1[(blockIdx_x)*max_channels + ch] = dmabuf[blockIdx_x + ch * bottomwidth];
+ }
+ }
+#else
+ for (int ch = 0; ch < deltachannels; ch++) {
+ for (int blockIdx_x = 0; blockIdx_x < bottomwidth / 8; blockIdx_x++) {
+ half8 val = ((
+ __global half8
+ *)(bottom1 + (ch + startchannel) * bottomheight * bottomwidth + (y2 + j - padding) * bottomwidth))
+ [blockIdx_x];
+ line1[(blockIdx_x * 8 + 0) * max_channels + ch] = val[0];
+ line1[(blockIdx_x * 8 + 1) * max_channels + ch] = val[1];
+ line1[(blockIdx_x * 8 + 2) * max_channels + ch] = val[2];
+ line1[(blockIdx_x * 8 + 3) * max_channels + ch] = val[3];
+
+ line1[(blockIdx_x * 8 + 4) * max_channels + ch] = val[4];
+ line1[(blockIdx_x * 8 + 5) * max_channels + ch] = val[5];
+ line1[(blockIdx_x * 8 + 6) * max_channels + ch] = val[6];
+ line1[(blockIdx_x * 8 + 7) * max_channels + ch] = val[7];
+ }
+ for (int blockIdx_x = bottomwidth / 8 * 8; blockIdx_x < bottomwidth; blockIdx_x++) {
+ half val =
+ (bottom1 + (ch + startchannel) * bottomheight * bottomwidth
+ + (y2 + j - padding) * bottomwidth)[blockIdx_x];
+ line1[(blockIdx_x)*max_channels + ch] = val;
+ }
+ }
+#endif
+ for (int blockIdx_x = 0; blockIdx_x < bottomwidth; blockIdx_x++) {
+ if (deltachannels < subchannels)
+ memzero(
+ line1 + blockIdx_x * max_channels + deltachannels,
+ (subchannels - deltachannels) * sizeof(half));
+ }
+ } else
+ memzero(line1, max_channels * bottomwidth * sizeof(half));
+
+ if (j == 0 && startchannel == 0) {
+ memzero(dline, neighborhood_grid_width * topwidth * sizeof(half));
+ } else {
+#if defined(USE_DMA)
+ dmacpyLineSrcStrideStart(
+ top + top_channel_y * neighborhood_grid_width * topheight * topwidth + blockIdx_y * topwidth,
+ dline,
+ topwidth * neighborhood_grid_width * sizeof(half),
+ topwidth * sizeof(half),
+ topwidth * topheight * sizeof(half));
+#else
+ for (int top_channel_x = 0; top_channel_x < neighborhood_grid_width; top_channel_x++) {
+ for (int blockIdx_x = 0; blockIdx_x < topwidth / 8; blockIdx_x++) {
+ half8 val = ((
+ __global half8
+ *)(top + ((top_channel_y * neighborhood_grid_width + top_channel_x) * topheight * topwidth + blockIdx_y * topwidth)))
+ [blockIdx_x];
+ ((half8 *)(dline + top_channel_x * topwidth))[blockIdx_x] = val;
+ }
+ for (int blockIdx_x = (topwidth / 8) * 8; blockIdx_x < topwidth; blockIdx_x++) {
+ dline[top_channel_x * topwidth + blockIdx_x] =
+ top[(top_channel_y * neighborhood_grid_width + top_channel_x) * topheight * topwidth
+ + blockIdx_y * topwidth + blockIdx_x];
+ }
+ }
+#endif
+ }
+
+ if (y1 + j - padding >= 0 && y1 + j - padding < bottomheight && y2 + j - padding >= 0
+ && y2 + j - padding < bottomheight) {
+ crosscorrh(
+ line0,
+ line1,
+ dline,
+ topwidth,
+ max_displacement,
+ neighborhood_grid_radius,
+ kernel_size,
+ padding,
+ bottomwidth,
+ stride1,
+ stride2,
+ max_channels,
+ subchannels);
+ }
+
+ if (j == kernel_size - 1 && endchannel == bottomchannels) {
+ half8 scale = (half8){
+ (half)sumelems,
+ (half)sumelems,
+ (half)sumelems,
+ (half)sumelems,
+ (half)sumelems,
+ (half)sumelems,
+ (half)sumelems,
+ (half)sumelems};
+ for (int top_channel_x = 0; top_channel_x < neighborhood_grid_width; top_channel_x++) {
+ for (int blockIdx_x = 0; blockIdx_x < topwidth / 8; blockIdx_x++) {
+ ((half8 *)(dline + top_channel_x * topwidth))[blockIdx_x] =
+ ((half8 *)(dline + top_channel_x * topwidth))[blockIdx_x] / scale;
+ }
+ for (int blockIdx_x = (topwidth / 8) * 8; blockIdx_x < topwidth; blockIdx_x++) {
+ dline[top_channel_x * topwidth + blockIdx_x] =
+ dline[top_channel_x * topwidth + blockIdx_x] / (half)sumelems;
+ }
+ }
+ }
+
+#if defined(USE_DMA)
+ dmacpyLineDstStrideStart(
+ dline,
+ top + top_channel_y * neighborhood_grid_width * topheight * topwidth + blockIdx_y * topwidth,
+ topwidth * neighborhood_grid_width * sizeof(half),
+ topwidth * sizeof(half),
+ topwidth * topheight * sizeof(half));
+#else
+ for (int top_channel_x = 0; top_channel_x < neighborhood_grid_width; top_channel_x++) {
+ for (int blockIdx_x = 0; blockIdx_x < topwidth / 8; blockIdx_x++) {
+ ((__global half8
+ *)(top + ((top_channel_y * neighborhood_grid_width + top_channel_x) * topheight * topwidth + blockIdx_y * topwidth)))
+ [blockIdx_x] = ((half8 *)(dline + top_channel_x * topwidth))[blockIdx_x]
+ + (half8){0, 0, 0, 0, 0, 0, 0, 0};
+ }
+ for (int blockIdx_x = (topwidth / 8) * 8; blockIdx_x < topwidth; blockIdx_x++) {
+ top[(top_channel_y * neighborhood_grid_width + top_channel_x) * topheight * topwidth
+ + blockIdx_y * topwidth + blockIdx_x] =
+ dline[top_channel_x * topwidth + blockIdx_x] + (half)0;
+ }
+ }
+#endif
+ }
+ }
+ }
+}
diff --git a/openvino/vpu_custom_kernels/ctc.bin b/openvino/vpu_custom_kernels/ctc.bin
new file mode 100644
index 0000000000000000000000000000000000000000..462d61af833ab77215f7a9a1c297315634b4a93d
--- /dev/null
+++ b/openvino/vpu_custom_kernels/ctc.bin
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:292de0fbb8dc6ead6970576d1b9a26a323fc9febfceb92c3af6b84496d523def
+size 10196
diff --git a/openvino/vpu_custom_kernels/ctc.cl b/openvino/vpu_custom_kernels/ctc.cl
new file mode 100644
index 0000000000000000000000000000000000000000..94888ac0ec640bb2244f83c785f76183c227b323
--- /dev/null
+++ b/openvino/vpu_custom_kernels/ctc.cl
@@ -0,0 +1,94 @@
+// Copyright (C) 2018-2022 Intel Corporation
+// SPDX-License-Identifier: Apache-2.0
+//
+
+#pragma OPENCL EXTENSION cl_khr_fp16 : enable
+#pragma OPENCL EXTENSION cl_khr_extended_async_copies : enable
+
+__global half *find(__global const half *begin, __global const half *end, half value)
+{
+ while (begin != end) {
+ if (*begin == value) {
+ return begin;
+ }
+ ++begin;
+ }
+ return end;
+}
+
+__kernel void CTCDecoder(
+ __global half *restrict probabilities,
+ __global half *restrict sequence_indicators,
+ __global half *restrict output,
+ int width,
+ int height,
+ int channels)
+{
+ __local half local_src[88 * 1 * 77];
+ __local half local_dst[88 * 1];
+
+ event_t e1 = async_work_group_copy_2D2D(
+ local_src, // dst
+ probabilities, // src
+ width, // num_elements_per_line,
+ height * channels, // num_lines,
+ width * (height - 1), // src_line_stride,
+ width * (height - 1), // dst_line_stride,
+ 0);
+
+ wait_group_events(1, &e1);
+
+ const int T = channels; // Time
+ const int B = height; // Batches
+ const int C = width; // Chars
+
+ #pragma unroll 4
+ for (int i = 0; i < B * T; i++) {
+ local_dst[i] = -1.h;
+ }
+
+ int output_index = 0;
+
+ for (int b = 0; b < B; ++b) {
+ __global const half *restrict seq_ind = sequence_indicators + b * T;
+ const int seq_len = find(seq_ind + 1, seq_ind + T, 0.h) - seq_ind;
+ const int time = min(seq_len, T);
+
+ int prev_class_idx = -1;
+
+ #pragma unroll 4
+ for (int t = 0; t < time; ++t) {
+ __local const half *restrict probs = local_src + b * C + t * C * B;
+
+ int max_class_idx = 0;
+ half max_prob = probs[0];
+ for (int c = 1; c < C; ++c) {
+ const half prob = probs[c];
+ if (prob > max_prob) {
+ max_class_idx = c;
+ max_prob = prob;
+ }
+ }
+
+ if (max_class_idx < C - 1 && max_class_idx != prev_class_idx) {
+ local_dst[b * T + output_index] = (half)max_class_idx;
+ output_index++;
+ }
+
+ prev_class_idx = max_class_idx;
+ }
+ }
+
+ barrier(CLK_LOCAL_MEM_FENCE);
+
+ event_t e2 = async_work_group_copy_2D2D(
+ output, // dst
+ local_dst, // src
+ channels, // num_elements_per_line,
+ height, // num_lines,
+ 0, // src_line_stride,
+ 0, // dst_line_stride,
+ 0);
+
+ wait_group_events(1, &e2);
+}
diff --git a/openvino/vpu_custom_kernels/customLayerBindings.xml b/openvino/vpu_custom_kernels/customLayerBindings.xml
new file mode 100644
index 0000000000000000000000000000000000000000..8a27ff52cb04e4d96f503a473e21715da4d54bc0
--- /dev/null
+++ b/openvino/vpu_custom_kernels/customLayerBindings.xml
@@ -0,0 +1,507 @@
+
+
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diff --git a/openvino/vpu_custom_kernels/cvtf32f16.bin b/openvino/vpu_custom_kernels/cvtf32f16.bin
new file mode 100644
index 0000000000000000000000000000000000000000..7a605845c3f68d68dedc622d0e0a42ca7b8e4c2b
--- /dev/null
+++ b/openvino/vpu_custom_kernels/cvtf32f16.bin
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:703ef56f84299e76d36b3ba5a632ae3d5e3ecd54761dcfe0006ca69ddce4bc6d
+size 2664
diff --git a/openvino/vpu_custom_kernels/cvtf32f16.cl b/openvino/vpu_custom_kernels/cvtf32f16.cl
new file mode 100644
index 0000000000000000000000000000000000000000..2cd40af12b89dab150bae2b5f11ac3b9e54865f5
--- /dev/null
+++ b/openvino/vpu_custom_kernels/cvtf32f16.cl
@@ -0,0 +1,17 @@
+// Copyright (C) 2018-2022 Intel Corporation
+// SPDX-License-Identifier: Apache-2.0
+//
+
+#pragma OPENCL EXTENSION cl_khr_fp16 : enable
+
+__kernel void cvtf32f16(const __global float* restrict inImage,
+ __global half* restrict outImage,
+ float scale,
+ float bais)
+{
+ int idx = get_global_id(0)
+ + get_global_id(1) * get_global_size(0)
+ + get_global_id(2) * get_global_size(0) * get_global_size(1);
+
+ outImage[idx] = convert_half(inImage[idx]*scale+bais);
+}
diff --git a/openvino/vpu_custom_kernels/cvtu8f16.bin b/openvino/vpu_custom_kernels/cvtu8f16.bin
new file mode 100644
index 0000000000000000000000000000000000000000..3e854d24c32211c92552b2a484dac6ae3c884301
--- /dev/null
+++ b/openvino/vpu_custom_kernels/cvtu8f16.bin
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:46c943e08f37cedac77f727f55835637d4878edcc20aaa24f16ed5888d13bd43
+size 4588
diff --git a/openvino/vpu_custom_kernels/cvtu8f16.cl b/openvino/vpu_custom_kernels/cvtu8f16.cl
new file mode 100644
index 0000000000000000000000000000000000000000..1265d633add1d5235ebea5d24604cf5363cd53f7
--- /dev/null
+++ b/openvino/vpu_custom_kernels/cvtu8f16.cl
@@ -0,0 +1,48 @@
+// Copyright (C) 2018-2022 Intel Corporation
+// SPDX-License-Identifier: Apache-2.0
+//
+
+#pragma OPENCL EXTENSION cl_khr_fp16 : enable
+#pragma OPENCL EXTENSION cl_khr_extended_async_copies : enable
+
+__kernel void cvtu8f16(__global const uchar *restrict src, __global half *restrict dst, float scale, float bias)
+{
+ __local uchar local_src[8 * 1024];
+ __local half local_dst[8 * 1024];
+
+ event_t e1 = async_work_group_copy_3D3D(
+ local_src, // dst
+ src + get_group_id(0) * get_local_size(0) + get_group_id(1) * get_local_size(1) * get_global_size(0)
+ + get_group_id(2) * get_local_size(2) * get_global_size(0) * get_global_size(1), // src
+ get_local_size(0), // num_elements_per_line
+ get_local_size(0) * get_local_size(1) / (get_local_size(0)), // num_lines
+ get_global_size(0) - get_local_size(0), // src_line_stride
+ 0, // dst_line_stride
+ get_local_size(2), // num planes
+ get_global_size(0) * (get_global_size(1) - get_local_size(1)), // src plane stride
+ 0, // dst plane stride
+ 0);
+ wait_group_events(1, &e1);
+
+ size_t idx = get_local_id(0)
+ + get_local_id(1) * get_local_size(0)
+ + get_local_id(2) * get_local_size(0) * get_local_size(1);
+
+ local_dst[idx] = convert_half(local_src[idx]) * (half)scale + (half)bias;
+
+ barrier(CLK_LOCAL_MEM_FENCE);
+
+ event_t e2 = async_work_group_copy_3D3D(
+ dst + get_group_id(0) * get_local_size(0) + get_group_id(1) * get_local_size(1) * get_global_size(0)
+ + get_group_id(2) * get_local_size(2) * get_global_size(0) * get_global_size(1), // dst
+ local_dst, // src
+ get_local_size(0), // num_elements_per_line
+ get_local_size(1), // num_lines
+ 0, // src_line_stride
+ get_global_size(0) - get_local_size(0), // dst_line_stride
+ get_local_size(2), // num_planes
+ 0, // src_plane_stride
+ get_global_size(0) * (get_global_size(1) - get_local_size(1)), // dst_plane_stride
+ 0);
+ wait_group_events(1, &e2);
+}
diff --git a/openvino/vpu_custom_kernels/detectron_prior_grid_gen.bin b/openvino/vpu_custom_kernels/detectron_prior_grid_gen.bin
new file mode 100644
index 0000000000000000000000000000000000000000..3e382da027fc632f47a098086ada99f35a1a2dad
--- /dev/null
+++ b/openvino/vpu_custom_kernels/detectron_prior_grid_gen.bin
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:4c80d556d23f1c959fa10c00ff1cd9c3ae10aba607b37c7a0620d903fc7cedd8
+size 6972
diff --git a/openvino/vpu_custom_kernels/detectron_prior_grid_gen.cl b/openvino/vpu_custom_kernels/detectron_prior_grid_gen.cl
new file mode 100644
index 0000000000000000000000000000000000000000..5076ec0de66af19d9fa889cc3dae9d274648c2db
--- /dev/null
+++ b/openvino/vpu_custom_kernels/detectron_prior_grid_gen.cl
@@ -0,0 +1,65 @@
+// Copyright (C) 2018-2022 Intel Corporation
+// SPDX-License-Identifier: Apache-2.0
+//
+
+#pragma OPENCL EXTENSION cl_khr_fp16 : enable
+#pragma OPENCL EXTENSION cl_khr_extended_async_copies : enable
+
+__kernel void experimental_detectron_prior_grid_generator(
+ __global const half *restrict input_priors,
+ __global const half *restrict input_feature_map,
+ __global const half *restrict input_rois,
+ __global half *restrict output,
+ int grid_h,
+ int grid_w,
+ float stride_h,
+ float stride_w,
+ int num_priors,
+ int num_anchors_per_prior)
+{
+ __local half local_input_priors[8 * 1024];
+ __local half local_output[8 * 1024];
+
+ event_t e1 = async_work_group_copy(
+ local_input_priors,
+ input_priors,
+ num_anchors_per_prior * num_priors,
+ 0);
+ wait_group_events(1, &e1);
+
+ int width_start = get_group_id(0) * get_local_size(0);
+ int width_end = min(width_start + get_local_size(0), (unsigned)grid_w);
+ int width = width_end - width_start;
+
+ int h = get_group_id(1);
+ int w_idx = get_group_id(0) * get_local_size(0);
+ for (int w = 0; w < width; ++w) {
+ #pragma unroll 4
+ for (int p = 0; p < num_priors; ++p) {
+ local_output[(w * num_priors + p) * num_anchors_per_prior + 0] =
+ local_input_priors[4 * p + 0]
+ + convert_half(stride_w) * (convert_half(w_idx + w) + 0.5);
+ local_output[(w * num_priors + p) * num_anchors_per_prior + 1] =
+ local_input_priors[4 * p + 1] + convert_half(stride_h) * (convert_half(h) + 0.5);
+ local_output[(w * num_priors + p) * num_anchors_per_prior + 2] =
+ local_input_priors[4 * p + 2]
+ + convert_half(stride_w) * (convert_half(w_idx + w) + 0.5);
+ local_output[(w * num_priors + p) * num_anchors_per_prior + 3] =
+ local_input_priors[4 * p + 3] + convert_half(stride_h) * (convert_half(h) + 0.5);
+ }
+ }
+
+ barrier(CLK_LOCAL_MEM_FENCE);
+
+ event_t e2 = async_work_group_copy_2D2D(
+ output + get_group_id(0) * get_local_size(0) * num_anchors_per_prior * num_priors
+ + get_group_id(1) * get_local_size(1) * grid_w * num_anchors_per_prior
+ * num_priors, // dst
+ local_output, // src
+ width * num_anchors_per_prior * num_priors, // num_elements_per_line
+ 1, // num_lines
+ (grid_w - width) * num_anchors_per_prior * num_priors, // src_line_stride
+ (grid_w - width) * num_anchors_per_prior * num_priors, // dst_line_stride
+ 0);
+ wait_group_events(1, &e2);
+}
diff --git a/openvino/vpu_custom_kernels/fakequantize.bin b/openvino/vpu_custom_kernels/fakequantize.bin
new file mode 100644
index 0000000000000000000000000000000000000000..c983be094e2a451810fae4a17da822c91e7219a2
--- /dev/null
+++ b/openvino/vpu_custom_kernels/fakequantize.bin
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:d17659bbf12a172849085003a055bfb4b91d3bb5bdc7f820395820eaa90b46ef
+size 15688
diff --git a/openvino/vpu_custom_kernels/fakequantize.cl b/openvino/vpu_custom_kernels/fakequantize.cl
new file mode 100644
index 0000000000000000000000000000000000000000..d70c4e4f5a1b0aa4194c1ef061e9e249c36dbcab
--- /dev/null
+++ b/openvino/vpu_custom_kernels/fakequantize.cl
@@ -0,0 +1,111 @@
+// Copyright (C) 2018-2022 Intel Corporation
+// SPDX-License-Identifier: Apache-2.0
+//
+
+#pragma OPENCL EXTENSION cl_khr_fp16 : enable
+#pragma OPENCL EXTENSION cl_khr_extended_async_copies : enable
+
+__kernel void quantize(
+ __global const half *restrict src_data,
+ __global const half *restrict input_low,
+ __global const half *restrict input_high,
+ __global const half *restrict output_low,
+ __global const half *restrict output_high,
+ __global half *restrict dst_data,
+ int levels,
+ int input_low_size,
+ int input_high_size,
+ int output_low_size,
+ int output_high_size,
+ int W,
+ int H)
+{
+ __local half local_src[15 * 1024];
+ __local half local_dst[15 * 1024];
+
+ event_t e1 = async_work_group_copy(local_src, src_data + get_group_id(2) * W * H, W * H, 0);
+ wait_group_events(1, &e1);
+
+ int c = get_group_id(2);
+
+ half h_ilow = (input_low_size == 1 ? input_low[0] : input_low[c]);
+ half h_ihigh = (input_high_size == 1 ? input_high[0] : input_high[c]);
+ half h_olow = (output_low_size == 1 ? output_low[0] : output_low[c]);
+ half h_ohigh = (output_high_size == 1 ? output_high[0] : output_high[c]);
+
+ half const1 = (half)(
+ !(h_ihigh - h_ilow) ? 0.0f : convert_float(levels - 1) / (convert_float(h_ihigh) - convert_float(h_ilow)));
+ half const2 =
+ (half)(!(levels - 1) ? 0.0f : (convert_float(h_ohigh) - convert_float(h_olow)) / convert_float(levels - 1));
+
+ __local const half *restrict src = local_src + W * get_local_id(1);
+ __local half *restrict dst = local_dst + W * get_local_id(1);
+
+ for (int w = 0; w < W / 8; w++) {
+ half8 val = *((__local half8 *)src + w);
+ half8 aux = (val - (half8)h_ilow) * (half8)const1 + (half8)0.5h;
+
+ aux = (half8){
+ (half)(short)(aux.s0),
+ (half)(short)(aux.s1),
+ (half)(short)(aux.s2),
+ (half)(short)(aux.s3),
+ (half)(short)(aux.s4),
+ (half)(short)(aux.s5),
+ (half)(short)(aux.s6),
+ (half)(short)(aux.s7)};
+
+ aux = aux * (half8)const2 + (half8)h_olow;
+
+ short8 a;
+ short8 b;
+ a.s0 = (val.s0 <= h_ilow);
+ a.s1 = (val.s1 <= h_ilow);
+ a.s2 = (val.s2 <= h_ilow);
+ a.s3 = (val.s3 <= h_ilow);
+ a.s4 = (val.s4 <= h_ilow);
+ a.s5 = (val.s5 <= h_ilow);
+ a.s6 = (val.s6 <= h_ilow);
+ a.s7 = (val.s7 <= h_ilow);
+
+ b.s0 = (val.s0 > h_ihigh);
+ b.s1 = (val.s1 > h_ihigh);
+ b.s2 = (val.s2 > h_ihigh);
+ b.s3 = (val.s3 > h_ihigh);
+ b.s4 = (val.s4 > h_ihigh);
+ b.s5 = (val.s5 > h_ihigh);
+ b.s6 = (val.s6 > h_ihigh);
+ b.s7 = (val.s7 > h_ihigh);
+
+ a = ~(a - (short8)1);
+ b = ~(b - (short8)1);
+
+ short8 c1 = (~a & b);
+ short8 c2 = (~a & ~b);
+
+ short8 res = (a & as_short8((half8)h_olow)) | (c1 & as_short8((half8)h_ohigh)) | (c2 & as_short8(aux));
+
+ *((__local half8 *)dst + w) = as_half8(res);
+ }
+
+ for (int w = W & (~0x7); w < W; w++) {
+ half val = src[w];
+ short a = val <= h_ilow;
+ a = ~(a - 1);
+ short b = val > h_ihigh;
+ b = ~(b - 1);
+
+ short c1 = (~a & b);
+ short c2 = (~a & ~b);
+
+ short res = (a & as_short(h_olow)) | (c1 & as_short(h_ohigh))
+ | (c2 & as_short(((half)(round((val - h_ilow) * const1) * const2) + h_olow)));
+
+ dst[w] = as_half(res);
+ }
+
+ barrier(CLK_LOCAL_MEM_FENCE);
+
+ event_t e2 = async_work_group_copy(dst_data + get_group_id(2) * W * H, local_dst, W * H, 0);
+ wait_group_events(1, &e2);
+}
diff --git a/openvino/vpu_custom_kernels/grn.bin b/openvino/vpu_custom_kernels/grn.bin
new file mode 100644
index 0000000000000000000000000000000000000000..c4610aef795fdfde5355a67091eeb16db59878c6
--- /dev/null
+++ b/openvino/vpu_custom_kernels/grn.bin
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:6e3dbe5173ca93f39fecaf29f820e1704bcb485affc1a09554e4c86f8de46214
+size 7972
diff --git a/openvino/vpu_custom_kernels/grn.cl b/openvino/vpu_custom_kernels/grn.cl
new file mode 100644
index 0000000000000000000000000000000000000000..e1910ba14e8c8df03ae7c00cccd0e544d74afcda
--- /dev/null
+++ b/openvino/vpu_custom_kernels/grn.cl
@@ -0,0 +1,63 @@
+// Copyright (C) 2018-2022 Intel Corporation
+// SPDX-License-Identifier: Apache-2.0
+//
+
+#pragma OPENCL EXTENSION cl_khr_fp16 : enable
+#pragma OPENCL EXTENSION cl_khr_extended_async_copies : enable
+
+__kernel void grn(__global const half *restrict src_data, __global half *restrict dst_data, int C, float bias)
+{
+ __local half src[8 * 1024];
+ __local half dst[8 * 1024];
+
+ const size_t index = get_group_id(0) * get_local_size(0) + get_group_id(1) * get_local_size(1) * get_global_size(0);
+
+ event_t e1 = async_work_group_copy_3D3D(
+ src, // dst
+ src_data + index, // src
+ get_local_size(0), // num_elements_per_line,
+ get_local_size(1), // num_lines,
+ get_global_size(0) - get_local_size(0), // src_line_stride,
+ 0, // dst_line_stride,
+ C, // num_planes,
+ get_global_size(0) * (get_global_size(1) - get_local_size(1)), // src_plane_stride
+ 0, // dst_plane_stride
+ 0);
+ wait_group_events(1, &e1);
+
+ float variance = bias + 1e-9f;
+
+ #pragma unroll 8
+ for (int c = 0; c < C; c++) {
+ float val = (float)src[c * get_local_size(1) * get_local_size(0)
+ + get_local_id(1) * get_local_size(0)
+ + get_local_id(0)];
+ variance += val * val;
+ }
+
+ half hvariance = (half)(native_rsqrt((half)(variance / 16.f)) * 0.25f);
+
+ #pragma unroll 8
+ for (int c = 0; c < C; c++) {
+ dst[c * get_local_size(1) * get_local_size(0)
+ + get_local_id(1) * get_local_size(0)
+ + get_local_id(0)] =
+ src[c * get_local_size(1) * get_local_size(0)
+ + get_local_id(1) * get_local_size(0) + get_local_id(0)] * hvariance;
+ }
+
+ barrier(CLK_LOCAL_MEM_FENCE);
+
+ event_t e2 = async_work_group_copy_3D3D(
+ dst_data + index, // src
+ dst, // dst
+ get_local_size(0), // num_elements_per_line,
+ get_local_size(1), // num_lines,
+ 0, // src_line_stride,
+ get_global_size(0) - get_local_size(0), // dst_line_stride,
+ C, // num_planes,
+ 0, // src_plane_stride
+ get_global_size(0) * (get_global_size(1) - get_local_size(1)), // dst_plane_stride
+ 0);
+ wait_group_events(1, &e2);
+}
diff --git a/openvino/vpu_custom_kernels/mvn_reduction.bin b/openvino/vpu_custom_kernels/mvn_reduction.bin
new file mode 100644
index 0000000000000000000000000000000000000000..bcce32ce0e8bfab24e054b1c689af1f09d932de1
--- /dev/null
+++ b/openvino/vpu_custom_kernels/mvn_reduction.bin
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:581206fc5c0e0d429094bc7076d8772dc6ba69199a3ee75d269f13dc2f0d7ac8
+size 7840
diff --git a/openvino/vpu_custom_kernels/mvn_reduction.cl b/openvino/vpu_custom_kernels/mvn_reduction.cl
new file mode 100644
index 0000000000000000000000000000000000000000..45b4ac20087252315cf4b29f36e48170cadd9795
--- /dev/null
+++ b/openvino/vpu_custom_kernels/mvn_reduction.cl
@@ -0,0 +1,115 @@
+// Copyright (C) 2018-2022 Intel Corporation
+// SPDX-License-Identifier: Apache-2.0
+//
+
+#pragma OPENCL EXTENSION cl_khr_fp16 : enable
+#pragma OPENCL EXTENSION cl_khr_extended_async_copies : enable
+
+// Set to 1 only if output is zerroed before kernel execution
+#define USE_ATOMICS 0
+
+void atomic_add_global(volatile __global float *source, const float operand)
+{
+ union {
+ unsigned int intVal;
+ float floatVal;
+ } newVal;
+ union {
+ unsigned int intVal;
+ float floatVal;
+ } prevVal;
+
+ do {
+ prevVal.floatVal = *source;
+ newVal.floatVal = prevVal.floatVal + operand;
+ } while (atomic_cmpxchg((volatile __global unsigned int *)source, prevVal.intVal, newVal.intVal) != prevVal.intVal);
+}
+
+__kernel void reduction_mean(
+ __global const half *restrict src,
+ __global float *restrict mean,
+ __global float *restrict variance,
+ int W,
+ int H,
+ int across_channels)
+{
+ __local half src_line[4 * 1024];
+ event_t e;
+
+ e = async_work_group_copy_2D2D(
+ src_line, // dst
+ src + get_group_id(1) * get_local_size(1) * W
+ + get_group_id(2) * get_local_size(2) * W * get_global_size(1), // src
+ W * get_local_size(1), // num_elements_per_line,
+ get_local_size(2), // num_lines,
+ W * (get_global_size(1) - get_local_size(1)), // src_line_stride,
+ 0, // dst_line_stride,
+ 0);
+
+ wait_group_events(1, &e);
+
+ int h = get_global_id(1);
+ int c = get_global_id(2);
+
+ const int MAX_LOCAL_SIZE = 8;
+
+ __local float mbuf[MAX_LOCAL_SIZE];
+ __local float vbuf[MAX_LOCAL_SIZE];
+
+ mbuf[get_local_id(1)] = 0;
+ vbuf[get_local_id(1)] = 0;
+
+ if (h < H) {
+ float sum = 0.f;
+ float sum2 = 0.f;
+
+ float8 sum4 = (float8){0.f, 0.f, 0.f, 0.f, 0.f, 0.f, 0.f, 0.f};
+ float8 sum24 = (float8){0.f, 0.f, 0.f, 0.f, 0.f, 0.f, 0.f, 0.f};
+
+ const __local half8 *restrict lsrc = ((const __local half8 *)(src_line + get_local_id(1) * W));
+
+ #pragma unroll 16
+ for (size_t w = 0; w < W / 8; w++) {
+ half8 sh = lsrc[w];
+ float8 valf = convert_float8(sh);
+
+ sum4 += valf;
+ sum24 += valf * valf;
+ }
+
+ for (size_t w = W / 8 * 8; w < W; w++) {
+ float val = (float)src_line[get_local_id(1) * W + w];
+ sum += val;
+ sum2 += val * val;
+ }
+
+ mbuf[get_local_id(1)] = sum4.s0 + sum4.s1 + sum4.s2 + sum4.s3 + sum4.s4 + sum4.s5 + sum4.s6 + sum4.s7 + sum;
+ vbuf[get_local_id(1)] =
+ sum24.s0 + sum24.s1 + sum24.s2 + sum24.s3 + sum24.s4 + sum24.s5 + sum24.s6 + sum24.s7 + sum2;
+ }
+
+ barrier(CLK_LOCAL_MEM_FENCE);
+
+ if (get_local_id(1) == 0) {
+ float res = 0;
+ float res2 = 0;
+
+ for (int i = 0; i < get_local_size(1); i++) {
+ res += mbuf[i];
+ res2 += vbuf[i];
+ }
+
+// requires memory reset before layer execution
+#if USE_ATOMICS
+ int idx = (across_channels == 0) ? c : 0;
+
+ atomic_add_global(mean + idx, res);
+ atomic_add_global(variance + idx, res2);
+#else
+ int idx = c * get_num_groups(1) + get_group_id(1);
+
+ mean[idx] = res;
+ variance[idx] = res2;
+#endif
+ }
+}
diff --git a/openvino/vpu_custom_kernels/mvn_scale.bin b/openvino/vpu_custom_kernels/mvn_scale.bin
new file mode 100644
index 0000000000000000000000000000000000000000..6c97a7b9c1deb2986a31c93349fd3fd629167406
--- /dev/null
+++ b/openvino/vpu_custom_kernels/mvn_scale.bin
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:527d82ec9e71bbbfaf86c1e3f1b2beea02875cf719a45592b1f3d5e244e5c15c
+size 3564
diff --git a/openvino/vpu_custom_kernels/mvn_scale.cl b/openvino/vpu_custom_kernels/mvn_scale.cl
new file mode 100644
index 0000000000000000000000000000000000000000..7a4ece1537cc76430585c0ef6a28df4602c39a0b
--- /dev/null
+++ b/openvino/vpu_custom_kernels/mvn_scale.cl
@@ -0,0 +1,68 @@
+// Copyright (C) 2018-2022 Intel Corporation
+// SPDX-License-Identifier: Apache-2.0
+//
+
+#pragma OPENCL EXTENSION cl_khr_fp16 : enable
+#pragma OPENCL EXTENSION cl_khr_extended_async_copies : enable
+
+// Set to 1 only if output is zerroed before kernel execution
+#define USE_ATOMICS 0
+
+__attribute__((reqd_work_group_size(1, 1, 1))) __kernel void mvn_scale(
+ const __global half *restrict src,
+ __global float *restrict mean_part,
+ __global float *restrict power_mean,
+ __global half *restrict dst,
+ int W,
+ int H1,
+ int across_channels,
+ int normalize_variance,
+ int nparts)
+{
+ __local half src_line[4 * 1024];
+ __local half dst_line[4 * 1024];
+
+ int c = get_group_id(2);
+ int C = get_global_size(2);
+
+ int h = get_group_id(1);
+ int H = get_global_size(1);
+
+ event_t e1 = async_work_group_copy(src_line, src + c * H * W + h * W, W, 0);
+ wait_group_events(1, &e1);
+
+ int idx = (across_channels == 0) ? nparts * c : 0;
+ float scale = (across_channels == 0) ? H * W : H * W * C;
+
+#if USE_ATOMICS
+ float mean = mean_part[idx];
+ float variance = power_mean[idx];
+#else
+
+ int total = (across_channels == 0) ? nparts : nparts * C;
+ float mean = 0.f;
+ float variance = 0.f;
+
+ for (int i = 0; i < total; i++) {
+ mean += mean_part[idx + i];
+ variance += power_mean[idx + i];
+ }
+#endif
+
+ mean = mean / scale;
+ variance = variance / scale;
+ variance = variance - mean * mean;
+ variance = native_sqrt(variance) + 1e-9f;
+
+ half hmean = mean;
+ half hvariance = (normalize_variance == 0) ? 1.f : (1.f / variance);
+
+ for (size_t w = 0; w < W; w++) {
+ dst_line[w] = (src_line[w] - hmean) * hvariance;
+ }
+
+ barrier(CLK_LOCAL_MEM_FENCE);
+
+ event_t e2 = async_work_group_copy(dst + c * H * W + h * W, dst_line, W, 0);
+ wait_group_events(1, &e2);
+}
diff --git a/openvino/vpu_custom_kernels/region_chw.bin b/openvino/vpu_custom_kernels/region_chw.bin
new file mode 100644
index 0000000000000000000000000000000000000000..7ebc06cd74d2eca19a418c2c22e4b550db91c553
--- /dev/null
+++ b/openvino/vpu_custom_kernels/region_chw.bin
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:5c02ada5f9718e59c1c908799a77ab383e6ca333d46c9577608bdb9c3bf15388
+size 22828
diff --git a/openvino/vpu_custom_kernels/region_chw.cl b/openvino/vpu_custom_kernels/region_chw.cl
new file mode 100644
index 0000000000000000000000000000000000000000..af15af664e868c075b0727bd7e7d80109a58d5e7
--- /dev/null
+++ b/openvino/vpu_custom_kernels/region_chw.cl
@@ -0,0 +1,108 @@
+// Copyright (C) 2018-2022 Intel Corporation
+// SPDX-License-Identifier: Apache-2.0
+//
+
+#pragma OPENCL EXTENSION cl_khr_fp16 : enable
+#pragma OPENCL EXTENSION cl_khr_extended_async_copies : enable
+
+__constant static half log_2_e = (half)1.442695040888963; // log2(exp(1.0))
+
+#define ALLOW_EARLY_RETURN 1
+
+static void inline logistic_activate(__local const half *restrict src, __local half *restrict dst, int offset)
+{
+ half val = src[offset];
+ val = 1.0h / (1.0h + exp2(val * -log_2_e));
+ dst[offset] = val;
+}
+
+__kernel void region_chw(
+ __global const half *restrict src_data,
+ __global half *restrict dst_data,
+ int W,
+ int H,
+ int classes,
+ int coords,
+ int num,
+ int maskSize,
+ int doSoftmax)
+{
+ __local half local_src[13 * 13 * (4 + 1 + 80)];
+ __local half local_dst[13 * 13 * (4 + 1 + 80)];
+
+ const int box_sz = W * H * (classes + coords + 1);
+ event_t e1 = async_work_group_copy(local_src, src_data + get_group_id(1) * box_sz, box_sz, 0);
+ wait_group_events(1, &e1);
+
+ const int pixel_pos = get_local_id(0);
+ const int stride = W * H;
+
+#if ALLOW_EARLY_RETURN
+ if (pixel_pos < W * H)
+#endif
+ {
+ __local const half *restrict src = local_src + pixel_pos;
+ __local half *restrict dst = local_dst + pixel_pos;
+
+ logistic_activate(src, dst, 0 * stride);
+ logistic_activate(src, dst, 1 * stride);
+
+ //copy plane 2 and 3
+ dst[2 * stride] = src[2 * stride];
+ dst[3 * stride] = src[3 * stride];
+
+ logistic_activate(src, dst, 4 * stride);
+
+ src += (coords + 1) * stride;
+ dst += (coords + 1) * stride;
+
+ if (doSoftmax) {
+ half max_val = src[0];
+ #pragma unroll 4
+ for (int c = 1; c < classes; c++) {
+ max_val = max(max_val, src[c * stride]);
+ }
+
+ half expSum = 0.0h;
+ #pragma unroll 4
+ for (int c = 0; c < classes; c++) {
+ const half e = src[c * stride] - max_val;
+ const half tmp = exp2(e * log_2_e);
+ dst[c * stride] = tmp;
+ expSum += tmp;
+ }
+
+ const half recip = 1.h / expSum;
+ int c = 0;
+ for (; c < (classes & ~0x3); c += 4) {
+ const half t0 = dst[(c + 0) * stride];
+ const half t1 = dst[(c + 1) * stride];
+ const half t2 = dst[(c + 2) * stride];
+ const half t3 = dst[(c + 3) * stride];
+
+ const half e0 = t0 * recip;
+ const half e1 = t1 * recip;
+ const half e2 = t2 * recip;
+ const half e3 = t3 * recip;
+
+ dst[(c + 0) * stride] = e0;
+ dst[(c + 1) * stride] = e1;
+ dst[(c + 2) * stride] = e2;
+ dst[(c + 3) * stride] = e3;
+ }
+ for (; c < classes; c++) {
+ dst[c * stride] *= recip;
+ }
+ } else {
+ #pragma unroll 4
+ for (int c = 0; c < classes; c++) {
+ logistic_activate(src, dst, c * stride);
+ }
+ }
+ }
+
+ barrier(CLK_LOCAL_MEM_FENCE);
+
+ event_t e2 = async_work_group_copy(dst_data + get_group_id(1) * box_sz, local_dst, box_sz, 0);
+ wait_group_events(1, &e2);
+}
diff --git a/openvino/vpu_custom_kernels/region_hwc.bin b/openvino/vpu_custom_kernels/region_hwc.bin
new file mode 100644
index 0000000000000000000000000000000000000000..42eeb6f8b9a543e05e8a408779add8524239cc44
--- /dev/null
+++ b/openvino/vpu_custom_kernels/region_hwc.bin
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:88f7bb144d85d08e9f7879e43ed6f8722bb2f93534e5becd8c7ff2a220cdd9f3
+size 81896
diff --git a/openvino/vpu_custom_kernels/region_hwc.cl b/openvino/vpu_custom_kernels/region_hwc.cl
new file mode 100644
index 0000000000000000000000000000000000000000..6087daedf4ee43e4e1eb483d90759a99f9eddfef
--- /dev/null
+++ b/openvino/vpu_custom_kernels/region_hwc.cl
@@ -0,0 +1,114 @@
+// Copyright (C) 2018-2022 Intel Corporation
+// SPDX-License-Identifier: Apache-2.0
+//
+
+#pragma OPENCL EXTENSION cl_khr_fp16 : enable
+#pragma OPENCL EXTENSION cl_khr_extended_async_copies : enable
+
+__constant static half log_2_e = (half)1.442695040888963; // log2(exp(1.0))
+
+#define ALLOW_EARLY_RETURN 1
+
+static void inline logistic_activate_hwc(
+ __local const half *restrict src,
+ __local half *restrict dst,
+ int offset,
+ int stride)
+{
+ half val = src[offset];
+ val = 1.0h / (1.0h + exp2(val * -log_2_e));
+ dst[offset * stride] = val;
+}
+
+__kernel void region_hwc(
+ __global const half *restrict src,
+ __global half *restrict dst,
+ int W,
+ int H,
+ int classes,
+ int coords,
+ int num,
+ int maskSize,
+ int doSoftmax)
+{
+ __local half local_src[13 * 13 * (4 + 1 + 80)];
+ __local half local_dst[13 * 13 * (4 + 1 + 80)];
+
+ const int pixel_pos = get_local_id(0);
+
+ const int local_C = classes + coords + 1;
+ const int c = get_group_id(1) * local_C;
+ const int h = get_group_id(0);
+
+ num = (doSoftmax != 0) * num + (doSoftmax == 0) * maskSize;
+ const int C = local_C * num;
+
+ event_t e1 = async_work_group_copy_2D2D(
+ local_src, // dst
+ src + h * W * C + c, // src
+ local_C, // num_elements_per_line,
+ H * W, // num_lines,
+ C - local_C, // src_line_stride,
+ 0, // dst_line_stride,
+ 0);
+
+ wait_group_events(1, &e1);
+
+#if ALLOW_EARLY_RETURN
+ if (pixel_pos < W * H)
+#endif
+ {
+ const int w = pixel_pos % W;
+ const int h = pixel_pos / W;
+
+ __local const half *restrict src = local_src + h * W * local_C + w * local_C;
+ __local half *restrict dst = local_dst + h * W + w;
+
+ const int stride = H * W;
+ logistic_activate_hwc(src, dst, 0, stride);
+ logistic_activate_hwc(src, dst, 1, stride);
+
+ //copy plane 2 and 3
+ dst[2 * stride] = src[2];
+ dst[3 * stride] = src[3];
+
+ logistic_activate_hwc(src, dst, 4, stride);
+
+ src += coords + 1;
+ dst += (coords + 1) * stride;
+
+ if (doSoftmax) {
+ half max_val = src[0];
+ #pragma unroll 4
+ for (int c = 1; c < classes; c++) {
+ max_val = max(max_val, src[c]);
+ }
+
+ half expSum = 0.0h;
+ #pragma unroll 4
+ for (int c = 0; c < classes; c++) {
+ const half e = src[c] - max_val;
+ const half tmp = exp2(e * log_2_e);
+ dst[c * stride] = tmp;
+ expSum += tmp;
+ }
+
+ const half invExpSum = 1.0h / expSum;
+ #pragma unroll 4
+ for (int c = 0; c < classes; c++) {
+ dst[c * stride] *= invExpSum;
+ }
+ } else {
+ #pragma unroll 4
+ for (int c = 0; c < classes; c++) {
+ logistic_activate_hwc(src, dst, c, stride);
+ }
+ }
+ }
+
+ barrier(CLK_LOCAL_MEM_FENCE);
+
+ const int box_sz = W * H * (classes + coords + 1);
+ event_t e2 = async_work_group_copy(dst + get_group_id(1) * box_sz, local_dst, box_sz, 0);
+ wait_group_events(1, &e2);
+}
diff --git a/openvino/vpu_custom_kernels/reorg_chw.bin b/openvino/vpu_custom_kernels/reorg_chw.bin
new file mode 100644
index 0000000000000000000000000000000000000000..bdbfda4fa81a66a07a3ae7ee164554e152033fb1
--- /dev/null
+++ b/openvino/vpu_custom_kernels/reorg_chw.bin
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:16758c3a629f5e397b7b51d417686fd745603c119e1f5d9985b05f4f3ef7efc7
+size 12208
diff --git a/openvino/vpu_custom_kernels/reorg_chw.cl b/openvino/vpu_custom_kernels/reorg_chw.cl
new file mode 100644
index 0000000000000000000000000000000000000000..ab1d832e204efacccc4710a2bb72e776d7c5ffb3
--- /dev/null
+++ b/openvino/vpu_custom_kernels/reorg_chw.cl
@@ -0,0 +1,67 @@
+// Copyright (C) 2018-2022 Intel Corporation
+// SPDX-License-Identifier: Apache-2.0
+//
+
+#pragma OPENCL EXTENSION cl_khr_fp16 : enable
+#pragma OPENCL EXTENSION cl_khr_extended_async_copies : enable
+
+__kernel void reorg_chw(
+ __global const half *restrict src,
+ __global half *restrict dst,
+ int W,
+ int H,
+ int C,
+ int stride)
+{
+ __local half local_src[8 * 1024];
+ __local half local_dst[8 * 1024];
+
+ event_t e1 = async_work_group_copy_2D2D(
+ local_src, // dst
+ src + get_group_id(1) * W * stride
+ + get_group_id(0) * W * stride * stride, // src
+ W * stride, // num_elements_per_line,
+ get_local_size(0), // num_lines,
+ W * stride * (stride * get_num_groups(0) - 1), // src_line_stride,
+ 0, // dst_line_stride,
+ 0);
+ wait_group_events(1, &e1);
+
+ const int c = get_local_id(0);
+ const int stride_x = get_local_id(1);
+
+ const int srcIdx = stride_x + c * W * stride;
+ const int dstIdx = stride_x * W * get_local_size(0) + c * W;
+
+ int x = 0;
+ for (; x <= W - 8; x += 8) {
+ half8 data = (half8){
+ local_src[srcIdx + (x + 0) * stride],
+ local_src[srcIdx + (x + 1) * stride],
+ local_src[srcIdx + (x + 2) * stride],
+ local_src[srcIdx + (x + 3) * stride],
+ local_src[srcIdx + (x + 4) * stride],
+ local_src[srcIdx + (x + 5) * stride],
+ local_src[srcIdx + (x + 6) * stride],
+ local_src[srcIdx + (x + 7) * stride]};
+
+ *((__local half8 *)(&local_dst[dstIdx + x])) = data;
+ }
+
+ for (; x < W; x++) {
+ local_dst[dstIdx + x] = local_src[srcIdx + x * stride];
+ }
+
+ barrier(CLK_LOCAL_MEM_FENCE);
+
+ event_t e2 = async_work_group_copy_2D2D(
+ dst + get_group_id(0) * W
+ + get_group_id(1) * W * stride * get_global_size(0), // dst
+ local_dst, // src
+ W, // num_elements_per_line
+ get_local_size(0) * stride, // num_lines
+ 0, // src_line_stride
+ W * (get_num_groups(0) - 1), // dst_line_stride
+ 0);
+ wait_group_events(1, &e2);
+}
diff --git a/openvino/vpu_custom_kernels/reorg_hwc.bin b/openvino/vpu_custom_kernels/reorg_hwc.bin
new file mode 100644
index 0000000000000000000000000000000000000000..31004be98333d092efb90a21f557985f61c3f638
--- /dev/null
+++ b/openvino/vpu_custom_kernels/reorg_hwc.bin
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:d57494f39baecc4011f87ab5241c1b0a19a07a7bbd14e20b135a94a0d7ecb3c1
+size 42144
diff --git a/openvino/vpu_custom_kernels/reorg_hwc.cl b/openvino/vpu_custom_kernels/reorg_hwc.cl
new file mode 100644
index 0000000000000000000000000000000000000000..7a7d0eb98b9f77ad84f28fdf17399e64ad734e44
--- /dev/null
+++ b/openvino/vpu_custom_kernels/reorg_hwc.cl
@@ -0,0 +1,65 @@
+// Copyright (C) 2018-2022 Intel Corporation
+// SPDX-License-Identifier: Apache-2.0
+//
+
+#pragma OPENCL EXTENSION cl_khr_fp16 : enable
+#pragma OPENCL EXTENSION cl_khr_extended_async_copies : enable
+
+__kernel void reorg_hwc(
+ __global half const *restrict src,
+ __global half *restrict dst,
+ int W,
+ int H,
+ int C,
+ int stride)
+{
+ __local half local_src[8 * 1024];
+ __local half local_dst[8 * 1024];
+
+ event_t e1 = async_work_group_copy_2D2D(
+ local_src, // dst
+ src + get_group_id(0) * stride + get_group_id(1) * C, // src
+ stride, // num_elements_per_line
+ H * W / stride, // num_lines
+ (C - 1) * stride, // src_line_stride
+ 0, // dst_line_stride
+ 0);
+ wait_group_events(1, &e1);
+
+ const int stride_y = get_local_id(1);
+ const int blocks = get_local_size(0);
+ const int b = get_local_id(0);
+
+ const int OC = stride * stride;
+ const int OH = H / stride;
+ const int OW = W / stride;
+ const int IC = stride;
+ const int IH = H;
+ const int IW = W / stride;
+
+ for (int block_h = 0; block_h < stride; block_h++) {
+ const int src_line = b * stride * stride + stride_y * stride + block_h;
+ const int c = src_line / IH;
+ const int h = src_line % IH;
+
+ const int dst_line = b * stride + stride_y * blocks * stride + block_h;
+ const int oc = dst_line / OH;
+ const int oh = dst_line % OH;
+
+ for (int w = 0; w < W / stride; w++) {
+ local_dst[oh * OW * OC + w * OC + oc] = local_src[h * IW * IC + w * IC + c];
+ }
+ }
+
+ barrier(CLK_LOCAL_MEM_FENCE);
+
+ event_t e2 = async_work_group_copy_2D2D(
+ dst + get_group_id(1) * C + get_group_id(0) * stride, // dst
+ local_dst, // src
+ stride, // num_elements_per_line
+ W * H / stride, // num_lines
+ 0, // src_line_stride
+ C * stride - stride, // dst_line_stride
+ 0);
+ wait_group_events(1, &e2);
+}
diff --git a/openvino/vpu_custom_kernels/reorg_hwc_naive.bin b/openvino/vpu_custom_kernels/reorg_hwc_naive.bin
new file mode 100644
index 0000000000000000000000000000000000000000..411736c2e40a26c680ee3b1d8cb027104da5ae24
--- /dev/null
+++ b/openvino/vpu_custom_kernels/reorg_hwc_naive.bin
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:14d3b747218694b644afe03e205955c1a5be042b2d7e62d261973a4ea1b8aaa8
+size 13396
diff --git a/openvino/vpu_custom_kernels/reorg_hwc_naive.cl b/openvino/vpu_custom_kernels/reorg_hwc_naive.cl
new file mode 100644
index 0000000000000000000000000000000000000000..9c34f3ba4012a85e1efa795cee545c66d2b01e64
--- /dev/null
+++ b/openvino/vpu_custom_kernels/reorg_hwc_naive.cl
@@ -0,0 +1,53 @@
+// Copyright (C) 2018-2022 Intel Corporation
+// SPDX-License-Identifier: Apache-2.0
+//
+
+#pragma OPENCL EXTENSION cl_khr_fp16 : enable
+
+__kernel void reorg_hwc_naive(
+ __global half const *restrict src,
+ __global half *restrict dst,
+ int W,
+ int H,
+ int C,
+ int stride)
+{
+ const int out_c = C / (stride * stride);
+ const int oc = C * (stride * stride);
+ const int oh = H / stride;
+ const int ow = W / stride;
+
+ const int c = get_global_id(0);
+
+ for (int h = 0; h < H; ++h) {
+ int in_index = W * (h + H * c) + (0);
+ int new_z = in_index / (oh * ow);
+ int new_y = (in_index % (oh * ow)) / ow;
+ int new_x = (in_index % (oh * ow)) % ow;
+ int new_index = new_z + new_x * oc + new_y * oc * ow;
+
+ in_index++;
+
+ int c2 = c % out_c;
+ int offset = c / out_c;
+ int w2 = 0 * stride + offset % stride;
+ int h2 = h * stride + offset / stride;
+ int out_index = w2 + W * stride * (h2 + H * stride * c2);
+
+ #pragma unroll 2
+ for (int i = 0; i < W; ++i, out_index += stride, in_index++) {
+ // repacking coordinates
+ int k0 = out_index / (H * W);
+ int j0 = (out_index % (H * W)) / W;
+ int i0 = (out_index % (H * W)) % W;
+ int out_index_repack = k0 + C * i0 + C * W * j0;
+
+ dst[new_index] = src[out_index_repack];
+
+ int new_z = in_index / (oh * ow);
+ int new_y = (in_index % (oh * ow)) / ow;
+ int new_x = (in_index % (oh * ow)) % ow;
+ new_index = new_z + new_x * oc + new_y * oc * ow;
+ }
+ }
+}
diff --git a/openvino/vpu_custom_kernels/resample_AA.bin b/openvino/vpu_custom_kernels/resample_AA.bin
new file mode 100644
index 0000000000000000000000000000000000000000..489f8a965647dcb07f7c0f4ee3729845187f58e7
--- /dev/null
+++ b/openvino/vpu_custom_kernels/resample_AA.bin
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:98ca582aaa70d3e7cc339aba88150eb12839ab67a0fac9c563f8c8ea37e705e2
+size 67860
diff --git a/openvino/vpu_custom_kernels/resample_AA.cl b/openvino/vpu_custom_kernels/resample_AA.cl
new file mode 100644
index 0000000000000000000000000000000000000000..7456f27add69ae27438174baa85883a27724615e
--- /dev/null
+++ b/openvino/vpu_custom_kernels/resample_AA.cl
@@ -0,0 +1,122 @@
+// Copyright (C) 2018-2022 Intel Corporation
+// SPDX-License-Identifier: Apache-2.0
+//
+
+#pragma OPENCL EXTENSION cl_khr_fp16 : enable
+#pragma OPENCL EXTENSION cl_khr_extended_async_copies : enable
+
+#define USE_OPTIMIZED_ROUND
+
+#ifdef USE_OPTIMIZED_ROUND
+#define ROUND(x) ((int)((x) + 0.5f))
+#else
+#define ROUND(x) (int)(round(x))
+#endif
+
+inline int out_to_in(float ox, float f)
+{
+#ifdef USE_OPTIMIZED_ROUND
+ return (int)((ox + 0.5f) / f);
+#else
+ return ROUND((ox + 0.5f) / f - 0.5f);
+#endif
+}
+
+static inline float triangleCoeff(float x) { return 1.0f - fabs(x); }
+
+static inline float4 triangleCoeff4(float4 x) { return 1.0f - fabs(x); }
+
+__kernel void resample_with_antialias(
+ __global const half *restrict src,
+ __global half *restrict dst,
+ int iw,
+ int ih,
+ float factor,
+ int ow,
+ int oh,
+ int channels)
+{
+ __local half local_src[20 * 1024];
+ __local half local_dst[8 * 1024];
+
+ const int r = (factor > 1.0f) ? 2 : ceil(1.0f / factor);
+ const int oy_first = get_group_id(1) * get_local_size(1);
+ const int oy_last = (get_group_id(1) + 1) * get_local_size(1) - 1;
+ const int iy_first = max(out_to_in(oy_first, factor) - r, 0);
+ const int iy_last = min(out_to_in(oy_last, factor) + r, ih - 1);
+ const int iy_size = iy_last - iy_first + 1;
+
+ event_t e1 = async_work_group_copy_2D2D(
+ local_src, // dst
+ src + get_group_id(2) * get_local_size(2) * ih * iw + iy_first * iw, // src
+ iy_size * iw, // num_elements_per_line,
+ get_local_size(2), // num_lines,
+ (ih - iy_size) * iw, // src_line_stride,
+ 0, // dst_line_stride,
+ 0);
+ wait_group_events(1, &e1);
+
+ const int oy = get_global_id(1);
+ const float iy_f = ((oy + 0.5f) / factor - 0.5f) - iy_first;
+ const int iy = ROUND(iy_f);
+
+ __local half const *restrict start_src =
+ local_src + iw * get_local_id(1) + iw * iy_size * get_local_id(2);
+ __local half *restrict start_dst =
+ local_dst + ow * get_local_id(1) + ow * get_local_size(1) * get_local_id(2);
+
+ for (int ox = 0; ox < ow; ox++) {
+ const float ix_f = (float)((ox + 0.5f) / factor) - 0.5f;
+ const int ix_i = ROUND(ix_f);
+
+ float4 v_sum = 0.f;
+ float4 v_wsum = 0.f;
+ for (int y = 0; y < iy_size; y++) {
+ float dy = iy_f - y;
+ int x = max(ix_i - r, 0);
+ int end_x = min(ix_i + r, iw - 1);
+
+ float4 dx;
+ for (int i = 0; i < 4; i++) dx[i] = ix_f - x - i;
+
+ for (; x < end_x - 3; x += 4, dx -= 4) {
+ float4 w =
+ factor * triangleCoeff4(factor * dx) * factor * triangleCoeff(factor * dy);
+ float4 src_vec = {
+ start_src[y * iw + x + 0],
+ start_src[y * iw + x + 1],
+ start_src[y * iw + x + 2],
+ start_src[y * iw + x + 3]};
+
+ v_sum += w * src_vec;
+ v_wsum += w;
+ }
+
+ for (; x <= end_x; x++) {
+ float dx = ix_f - x;
+ float w = factor * triangleCoeff(factor * dx) * factor * triangleCoeff(factor * dy);
+
+ v_sum[0] += w * start_src[y * iw + x];
+ v_wsum[0] += w;
+ }
+ }
+
+ v_sum[0] = v_sum[0] + v_sum[1] + v_sum[2] + v_sum[3];
+ v_wsum[0] = v_wsum[0] + v_wsum[1] + v_wsum[2] + v_wsum[3];
+
+ start_dst[get_local_id(1) * ow + ox] = (!v_wsum[0]) ? 0.0f : (half)(v_sum[0] / v_wsum[0]);
+ }
+
+ barrier(CLK_LOCAL_MEM_FENCE);
+
+ event_t e2 = async_work_group_copy_2D2D(
+ dst + get_group_id(2) * get_local_size(2) * get_global_size(1) * ow
+ + get_group_id(1) * get_local_size(1) * ow, // dst
+ local_dst, // src
+ get_local_size(1) * ow, // num_elements_per_line,
+ get_local_size(2), // num_lines,
+ 0, // src_line_stride,
+ (get_global_size(1) - get_local_size(1)) * ow, // dst_line_stride,
+ 0);
+ wait_group_events(1, &e2);
+}
diff --git a/openvino/vpu_custom_kernels/resample_noAA.bin b/openvino/vpu_custom_kernels/resample_noAA.bin
new file mode 100644
index 0000000000000000000000000000000000000000..d2b6604354e126c4d5afdd7d2709dc9020a30095
--- /dev/null
+++ b/openvino/vpu_custom_kernels/resample_noAA.bin
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:9c67917cd959fe4add69b139f44ef07e36c4ca37bc2b8a47b2bdfe48e8a3f559
+size 68828
diff --git a/openvino/vpu_custom_kernels/resample_noAA.cl b/openvino/vpu_custom_kernels/resample_noAA.cl
new file mode 100644
index 0000000000000000000000000000000000000000..6e8c26225af91707ca693bbe1e8951723d3184f6
--- /dev/null
+++ b/openvino/vpu_custom_kernels/resample_noAA.cl
@@ -0,0 +1,112 @@
+// Copyright (C) 2018-2022 Intel Corporation
+// SPDX-License-Identifier: Apache-2.0
+//
+
+#pragma OPENCL EXTENSION cl_khr_fp16 : enable
+#pragma OPENCL EXTENSION cl_khr_extended_async_copies : enable
+
+#define USE_OPTIMIZED_ROUND
+
+#ifdef USE_OPTIMIZED_ROUND
+#define ROUND(x) ((int)((x) + 0.5f))
+#else
+#define ROUND(x) (int)(round(x))
+#endif
+
+inline int out_to_in(float ox, float f) { return (int)((ox + 0.5f) * f); }
+
+void interpolationCHW_nn(__local half *psrc, __local half *pdst, int OW, int IW, int C, float rw, float rh)
+{
+ float alpha = rh / 2.0f - 0.5f;
+
+ for (int w = 0; w < OW / 8; w++) {
+ float fw0 = rw * (w * 8 + 0) + alpha;
+ float fw1 = rw * (w * 8 + 1) + alpha;
+ float fw2 = rw * (w * 8 + 2) + alpha;
+ float fw3 = rw * (w * 8 + 3) + alpha;
+
+ float fw4 = rw * (w * 8 + 4) + alpha;
+ float fw5 = rw * (w * 8 + 5) + alpha;
+ float fw6 = rw * (w * 8 + 6) + alpha;
+ float fw7 = rw * (w * 8 + 7) + alpha;
+
+ int iw0 = min((int)ROUND(fw0), IW - 1);
+ int iw1 = min((int)ROUND(fw1), IW - 1);
+ int iw2 = min((int)ROUND(fw2), IW - 1);
+ int iw3 = min((int)ROUND(fw3), IW - 1);
+
+ int iw4 = min((int)ROUND(fw4), IW - 1);
+ int iw5 = min((int)ROUND(fw5), IW - 1);
+ int iw6 = min((int)ROUND(fw6), IW - 1);
+ int iw7 = min((int)ROUND(fw7), IW - 1);
+
+ for (int c = 0; c < C; c++) {
+ half8 val = {
+ *((__local half *)(psrc + c * IW + iw0)),
+ *((__local half *)(psrc + c * IW + iw1)),
+ *((__local half *)(psrc + c * IW + iw2)),
+ *((__local half *)(psrc + c * IW + iw3)),
+
+ *((__local half *)(psrc + c * IW + iw4)),
+ *((__local half *)(psrc + c * IW + iw5)),
+ *((__local half *)(psrc + c * IW + iw6)),
+ *((__local half *)(psrc + c * IW + iw7)),
+ };
+ *((__local half8 *)(pdst + c * OW + w * 8)) = val;
+ }
+ }
+
+ for (int w = OW / 8 * 8; w < OW; w++) {
+ float fw = rw * w + alpha;
+ int iw0 = min((int)ROUND(fw), IW - 1);
+
+ for (int c = 0; c < C; c++) {
+ *((__local half *)(pdst + c * OW + w)) = *((__local half *)(psrc + c * IW + iw0));
+ }
+ }
+}
+
+kernel void resample_nearest(
+ __global const half *restrict src,
+ __global half *restrict dst,
+ int iw,
+ int ih,
+ float factor,
+ int ow,
+ int oh,
+ int channels)
+{
+ __local half local_src[14 * 1024];
+ __local half local_dst[14 * 1024];
+
+ const int oy_first = get_group_id(1) * get_local_size(1);
+ const int oy_last = (get_group_id(1) + 1) * get_local_size(1) - 1;
+ const int iy_first = out_to_in(oy_first, 1.0 / factor);
+ const int iy_last = out_to_in(oy_last, 1.0 / factor);
+
+ const int iy_size = iy_last - iy_first + 1;
+
+ event_t e1 = async_work_group_copy_2D2D(
+ local_src, // dst
+ src + get_group_id(2) * channels * ih * iw + iy_first * iw, // src
+ iy_size * iw, // num_elements_per_line,
+ channels, // num_lines,
+ ih * iw - iy_size * iw, // src_line_stride,
+ 0, // dst_line_stride,
+ 0);
+
+ wait_group_events(1, &e1);
+
+ interpolationCHW_nn(local_src, local_dst, ow, iw, channels, 1.0 / factor, 1.0 / factor);
+
+ event_t e2 = async_work_group_copy_2D2D(
+ dst + get_group_id(2) * channels * get_global_size(1) * ow + get_group_id(1) * get_local_size(1) * ow, // dst
+ local_dst, // src
+ get_local_size(1) * ow, // size_t num_elements_per_line,
+ channels, // size_t num_lines,
+ 0, // size_t src_line_stride,
+ get_global_size(1) * ow - get_local_size(1) * ow, // size_t dst_line_stride,
+ 0);
+
+ wait_group_events(1, &e2);
+}
diff --git a/openvino/vpu_custom_kernels/shuffle_channels.bin b/openvino/vpu_custom_kernels/shuffle_channels.bin
new file mode 100644
index 0000000000000000000000000000000000000000..3309204a67ae09a90ca68aded3a900b364910d39
--- /dev/null
+++ b/openvino/vpu_custom_kernels/shuffle_channels.bin
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:230aa8e01a387beb4de512de1f3599867cc74dc36578359d78f5c856af9428cd
+size 10740
diff --git a/openvino/vpu_custom_kernels/shuffle_channels.cl b/openvino/vpu_custom_kernels/shuffle_channels.cl
new file mode 100644
index 0000000000000000000000000000000000000000..6da05168676e3be1f90d1e95ff17ac463adcacfc
--- /dev/null
+++ b/openvino/vpu_custom_kernels/shuffle_channels.cl
@@ -0,0 +1,33 @@
+// Copyright (C) 2018-2022 Intel Corporation
+// SPDX-License-Identifier: Apache-2.0
+//
+
+#pragma OPENCL EXTENSION cl_khr_fp16 : enable
+
+__kernel void ShuffleChannel(
+ __global const half *restrict src_data,
+ __global half *restrict dst_data,
+ int C,
+ int H,
+ int W,
+ int G)
+{
+ int c = get_global_id(0);
+ if (c >= C) return;
+ int CX = C / G;
+ int CY = G;
+ int cy = c % G;
+ int cx = c / G;
+
+ __global const half8 *src_line =
+ ((__global const half8 *)(src_data + cy * CX * H * W + cx * H * W));
+ __global half8 *dst_line = ((__global half8 *)(dst_data + cx * CY * H * W + cy * H * W));
+
+ for (int i = 0; i < W * H / 8; i++) {
+ dst_line[i] = src_line[i];
+ }
+
+ for (int i = W * H / 8 * 8; i < W * H; i++) {
+ dst_data[cx * CY * H * W + cy * H * W + i] = src_data[cy * CX * H * W + cx * H * W + i];
+ }
+}
diff --git a/openvino/vpu_custom_kernels/st.bin b/openvino/vpu_custom_kernels/st.bin
new file mode 100644
index 0000000000000000000000000000000000000000..6839a27b25ee481a3241944ca53c30d63ac71233
--- /dev/null
+++ b/openvino/vpu_custom_kernels/st.bin
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:0f4e46dc0a701ea9d32ed113d8be30448306fea92560e617bed9605e24d1d6fb
+size 20376
diff --git a/openvino/vpu_custom_kernels/st.cl b/openvino/vpu_custom_kernels/st.cl
new file mode 100644
index 0000000000000000000000000000000000000000..440f0b6096caf36abc6076bd98ef6ab280c7e114
--- /dev/null
+++ b/openvino/vpu_custom_kernels/st.cl
@@ -0,0 +1,278 @@
+// Copyright (C) 2018-2022 Intel Corporation
+// SPDX-License-Identifier: Apache-2.0
+//
+
+#pragma OPENCL EXTENSION cl_khr_fp16 : enable
+#pragma OPENCL EXTENSION cl_khr_extended_async_copies : enable
+
+#define MAX_WIDTH 512
+
+__attribute__((noinline)) void calcInd(
+ __global const half *restrict theta,
+ __local half *restrict weight,
+ __local int *restrict ind,
+ int y,
+ int H,
+ int x0,
+ int length,
+ int step,
+ int W)
+{
+ float a = (float)y * 1.0f / H * 2 - 1;
+
+ int x = 0;
+
+ float8 va = (float8){a, a, a, a, a, a, a, a};
+ float8 vxy = (float8){x0 + 0, x0 + 1, x0 + 2, x0 + 3, x0 + 4, x0 + 5, x0 + 6, x0 + 7};
+
+ for (; x <= length - 8; x += 8, vxy += 8) {
+ float8 va1 = vxy * 1.0f / W * 2 - 1.f;
+
+ float8 vx = (va * theta[0] + va1 * theta[1] + theta[2] + 1.f) / 2.f * H;
+ float8 vy = (va * theta[3] + va1 * theta[4] + theta[5] + 1.f) / 2.f * W;
+
+ const int8 ix = convert_int8(vx) - ((vx < 0) & 1);
+ const int8 iy = convert_int8(vy) - ((vy < 0) & 1);
+
+ float8 ax = vx - convert_float8(ix);
+ float8 ay = vy - convert_float8(iy);
+ float8 bx = 1.f - ax;
+ float8 by = 1.f - ay;
+
+ union {
+ int8 d;
+ uint8 i;
+ } check_x;
+
+ check_x.d = ix;
+ int8 b01 = check_x.i < (uint8)H;
+
+ check_x.d = ix + 1;
+ int8 b45 = check_x.i < (uint8)H;
+
+ union {
+ int8 d;
+ uint8 i;
+ } check_y;
+
+ check_y.d = iy;
+ int8 b23 = check_y.i < (uint8)W;
+
+ check_y.d = iy + 1;
+ int8 b67 = check_y.i < (uint8)W;
+
+ int8 b0123 = b01 & b23;
+ int8 b0167 = b01 & b67;
+ int8 b4523 = b45 & b23;
+ int8 b4567 = b45 & b67;
+
+ int8 TL_id = ((ix + 0) * W + (iy + 0)) * (b0123 & 1);
+ int8 BL_id = ((ix + 1) * W + (iy + 0)) * (b4523 & 1);
+ int8 TR_id = ((ix + 0) * W + (iy + 1)) * (b0167 & 1);
+ int8 BR_id = ((ix + 1) * W + (iy + 1)) * (b4567 & 1);
+
+ union {
+ float8 f;
+ int8 i;
+ } w0;
+ w0.f = bx * by;
+ union {
+ float8 f;
+ int8 i;
+ } w1;
+ w1.f = ax * by;
+ union {
+ float8 f;
+ int8 i;
+ } w2;
+ w2.f = bx * ay;
+ union {
+ float8 f;
+ int8 i;
+ } w3;
+ w3.f = ax * ay;
+
+ w0.i = w0.i & b0123;
+ w1.i = w1.i & b4523;
+ w2.i = w2.i & b0167;
+ w3.i = w3.i & b4567;
+
+ *((__local half8 *)(weight + x + 0 * step)) = convert_half8(w0.f);
+ *((__local half8 *)(weight + x + 1 * step)) = convert_half8(w1.f);
+ *((__local half8 *)(weight + x + 2 * step)) = convert_half8(w2.f);
+ *((__local half8 *)(weight + x + 3 * step)) = convert_half8(w3.f);
+
+ *((__local int8 *)(ind + x + 0 * step)) = TL_id;
+ *((__local int8 *)(ind + x + 1 * step)) = BL_id;
+ *((__local int8 *)(ind + x + 2 * step)) = TR_id;
+ *((__local int8 *)(ind + x + 3 * step)) = BR_id;
+ }
+
+ for (; x < length; x++) {
+ float a1 = (float)(x0 + x) * 1.0f / W * 2 - 1;
+
+ float fx = (a * theta[0] + a1 * theta[1] + theta[2] + 1) / 2 * H;
+ float fy = (a * theta[3] + a1 * theta[4] + theta[5] + 1) / 2 * W;
+
+ const int ix = (int)(fx) - (fx < 0);
+ const int iy = (int)(fy) - (fy < 0);
+
+ float ax = fx - ix;
+ float ay = fy - iy;
+ float bx = 1 - ax;
+ float by = 1 - ay;
+
+ int b0 = ix >= 0;
+ int b4 = ix >= -1;
+ int b1 = ix < H;
+ int b5 = ix < H - 1;
+
+ int b2 = iy >= 0;
+ int b6 = iy >= -1;
+ int b3 = iy < W;
+ int b7 = iy < W - 1;
+
+ int b01 = b0 & b1;
+ int b23 = b2 & b3;
+ int b45 = b4 & b5;
+ int b67 = b6 & b7;
+
+ int b0123 = b01 & b23;
+ int b0167 = b01 & b67;
+ int b4523 = b45 & b23;
+ int b4567 = b45 & b67;
+
+ int TL_id = ((ix + 0) * W + (iy + 0)) * b0123;
+ int BL_id = ((ix + 1) * W + (iy + 0)) * b4523;
+ int TR_id = ((ix + 0) * W + (iy + 1)) * b0167;
+ int BR_id = ((ix + 1) * W + (iy + 1)) * b4567;
+
+ half w0 = bx * by * b0123;
+ half w1 = ax * by * b4523;
+ half w2 = bx * ay * b0167;
+ half w3 = ax * ay * b4567;
+
+ weight[x + 0 * step] = w0;
+ weight[x + 1 * step] = w1;
+ weight[x + 2 * step] = w2;
+ weight[x + 3 * step] = w3;
+
+ ind[x + 0 * step] = TL_id;
+ ind[x + 1 * step] = BL_id;
+ ind[x + 2 * step] = TR_id;
+ ind[x + 3 * step] = BR_id;
+ }
+}
+
+__attribute__((noinline)) void apply(
+ __global half const *restrict src,
+ __local half const *restrict weight,
+ __local int const *restrict ind,
+ __local half *restrict dst,
+ int src_stride,
+ int step)
+{
+ int x = 0;
+ for (; x <= src_stride - 8; x += 8) {
+ int8 TL_id = *((__local int8 *)(ind + x + 0 * step));
+ int8 BL_id = *((__local int8 *)(ind + x + 1 * step));
+ int8 TR_id = *((__local int8 *)(ind + x + 2 * step));
+ int8 BR_id = *((__local int8 *)(ind + x + 3 * step));
+
+ half8 w00 = *((__local half8 *)(weight + x + 0 * step));
+ half8 w01 = *((__local half8 *)(weight + x + 1 * step));
+ half8 w02 = *((__local half8 *)(weight + x + 2 * step));
+ half8 w03 = *((__local half8 *)(weight + x + 3 * step));
+
+ half8 TL = (half8){
+ src[TL_id[0]], src[TL_id[1]],
+ src[TL_id[2]], src[TL_id[3]],
+ src[TL_id[4]], src[TL_id[5]],
+ src[TL_id[6]], src[TL_id[7]]};
+ half8 TR = (half8){
+ src[TR_id[0]], src[TR_id[1]],
+ src[TR_id[2]], src[TR_id[3]],
+ src[TR_id[4]], src[TR_id[5]],
+ src[TR_id[6]], src[TR_id[7]]};
+ half8 BL = (half8){
+ src[BL_id[0]], src[BL_id[1]],
+ src[BL_id[2]], src[BL_id[3]],
+ src[BL_id[4]], src[BL_id[5]],
+ src[BL_id[6]], src[BL_id[7]]};
+ half8 BR = (half8){
+ src[BR_id[0]], src[BR_id[1]],
+ src[BR_id[2]], src[BR_id[3]],
+ src[BR_id[4]], src[BR_id[5]],
+ src[BR_id[6]], src[BR_id[7]]};
+
+ half8 res = w00 * TL + w01 * BL + w02 * TR + w03 * BR;
+
+ *((__local half8 *)(dst + x)) = res;
+ }
+
+ for (; x < src_stride; x++) {
+ int TL_id = ind[x + 0 * step];
+ int BL_id = ind[x + 1 * step];
+ int TR_id = ind[x + 2 * step];
+ int BR_id = ind[x + 3 * step];
+
+ half w00 = weight[x + 0 * step];
+ half w01 = weight[x + 1 * step];
+ half w02 = weight[x + 2 * step];
+ half w03 = weight[x + 3 * step];
+
+ half TL = src[TL_id];
+ half TR = src[TR_id];
+ half BL = src[BL_id];
+ half BR = src[BR_id];
+
+ half res = w00 * TL + w01 * BL + w02 * TR + w03 * BR;
+
+ dst[x] = res;
+ }
+}
+
+__kernel void ocl_st(
+ __global half const *const restrict src_data,
+ __global half const *const restrict theta,
+ __global half *const restrict dst_data,
+ int C,
+ int W)
+{
+ __local int ind[4 * MAX_WIDTH] __attribute__((aligned(16)));
+ __local half weight[4 * MAX_WIDTH] __attribute__((aligned(16)));
+ __local half local_dst[4 * 1024];
+
+ int w = get_group_id(0);
+
+ int y = get_global_id(1);
+ int H = get_global_size(1);
+
+ const int x0 = w * MAX_WIDTH;
+ const int x1 = min(x0 + MAX_WIDTH, W);
+ const int src_stride = x1 - x0;
+
+ calcInd(theta, weight, ind, y, H, x0, src_stride, MAX_WIDTH, W);
+
+ for (int c = 0; c < C; c++) {
+ __global half const *restrict src = src_data + c * H * W;
+ __local half *restrict dst = local_dst + c * get_local_size(1) * src_stride + get_local_id(1) * src_stride;
+
+ apply(src, weight, ind, dst, src_stride, MAX_WIDTH);
+ }
+
+ barrier(CLK_LOCAL_MEM_FENCE);
+
+ event_t e = async_work_group_copy_3D3D(
+ dst_data + get_group_id(1) * get_local_size(1) * W + x0, // dst
+ local_dst, // src
+ src_stride, // num_elements_per_line
+ get_local_size(1), // num_lines
+ 0, // src_line_stride
+ W - src_stride, // dst_line_stride
+ C, // num planes
+ 0, // src plane stride
+ W * (get_global_size(1) - get_local_size(1)), // dst plane stride
+ 0);
+ wait_group_events(1, &e);
+}