evolvable hardware gp paper available post script rapidly reconfigurable fieldprogrammable gate arrays accelerating fitness evaluation genetic programming latebreaking papers gp97 conference abstract dominant component computational burden solving nontrivial problems evolutionary algorithms task measuring fitness individual generation evolving population advent rapidly reconfigurable fieldprogrammable gate arrays fpgas idea evolvable hardware opens possiblity embodying individual evolving population hardware purpose accelerating timeconsuming fitness evaluation task paper demonstrates massive parallelism rapidly reconfigurable xilinx xc6216 fpga exploited accelerate computationally burdensome fitness evaluation task genetic programming work done virtual computing corporation lowcost hots expansion board pc type computers 16 step 7 sorter evolved two fewer steps sorting network described 1962 oconnor nelson patent sorting networks number steps minimal 7 sorter devised floyd knuth subsequent patent john r koza forrest h bennett iii jeffrey l hutchings stephen l bade martin keane david andre published koza john r editor late breaking papers genetic programming 1997 conference stanford university july 1316 1997 stanford ca stanford university bookstore pages 121 p 131 available post script www http wwwcs faculty stanford edu koza john r koza computer science department 258 gates building mail code 9020 stanford university stanford california 94305 usa email koza cs stanford edu office phone 650723 1517 note new area code 650 home phone 650941 0336 fax 650941 9430 www http wwwcs faculty stanford edu koza www gp98 conference http www genetic programming org