I’m trying to get correct transmission from a custom board with a DAC38RF82 on-board. However with a DAC clock of 9000MHz, the only thing I can get the DAC to do is either a constant frequency of 2250MHz or (with different settings) a constant frequency of 562.5MHz. I think I’m missing something on the setup of the chip or setup of the JESD communication, but the DEC indicates everything is working correctly I just can’t get the start of a signal related to the JESD – communication out of the device as a starting point to work from. Any help would be appreciated. The setup is as follows: The chip is connected to a Xilinx Kintex-7 FPGA, which generates the JESD204 signal with a rate of 7.5Gbps on 8 lines to the DAC chip. I’ve tested the JESD204 signal using a spectrum analyser and it appears to be trying to send a signal. The input clock to the DAC chip is 375MHz to both the DACCLK pins and to the SYSREF pins. I’m using the onboard PLL to generate the 9000MHz reference DAC frequency (M=6, N=1). The DAC mode is Single (DAC A), 1 IQ Pair with 6x interpolation. While we are not using the evaluation board, the equivalent settings would be: The actual messages I send are as follows (Hex, ADDRESS (2 characters), DATA (4 characters)) x"090000", x"007860", x"011880", x"0200FF", x"0300FF", x"090004", x"0B0000", x"1B0100", x"0CA002", x"241001", x"310400", x"320508", x"33C318",
I’m trying to get correct transmission from a custom board with a DAC38RF82 on-board. However with a DAC clock of 9000MHz, the only thing I can get the DAC to do is either a constant frequency of 2250MHz or (with different settings) a constant frequency of 562.5MHz. I think I’m missing something on the setup of the chip or setup of the JESD communication, but the DEC indicates everything is working correctly – I just can’t get the start of a signal related to the JESD communication out of the device as a starting point to work from. Any help would be appreciated. The setup is as follows: The chip is connected to a Xilinx Kintex-7 FPGA, which generates the JESD204 signal with a rate of 7.5Gbps on 8 lines to the DAC chip. I’ve tested the JESD204 signal using a spectrum analyser and it appears to be trying to send a signal. The input clock to the DAC chip is 375MHz to both the DACCLK pins and to the SYSREF pins. I’m using the onboard PLL to generate the 9000MHz reference DAC frequency (M=6, N=1). The DAC mode is Single (DAC A), 1 IQ Pair with 6x interpolation. While we are not using the evaluation board, the equivalent settings would be: The actual messages I send are as follows (Hex, ADDRESS (2 characters), DATA (4 characters)) x"090000", x"007860", x"011880", x"0200FF", x"0300FF", x"090004", x"0B0000", x"1B0100", x"0CA002", x"241001", x"310400", x"320508", x"33C318",
DAC38RF82_5F00_Test_5F00_Settings.docx