This simplifies the interface and reduces master/slave clock contention issues. The optical interface also isolates a local utility’s communications ground reference from a foreign ground reference. If a C37.94 interface is not possible, a G.703 interface is the next option. Due to strict timing requirements, utilities must inform each other when significant synchronization changes, which could affect the performance of inter-utility digital circuits, are planned (i.e.; a local utility retiming a previously floating DS1 by grooming the DS1 using a DCS or channel bank) (See Figure 7). RS-232 interfaces should have all the control available to allow full “handshaking” between the utilities. As a last resort, back-to-back VF interfaces can be used when synchronization issues cannot be resolved. RS-422, RS-449, and RS-485 are becoming obsolete and are not described here. Appendix A References — ANSI T1.105.03-2003, Optical Network (SONET) Jitter and Wander at Network and “Synchronous Equipment Interfaces.” ANSI T1.105.09-1996 (R2002), Optical Network (SONET) Network Timing and “Synchronous Synchronization.” ANSI T1.TR.81-2003, Network Architecture.” “Synchronization ANSI T1.403, and Customer Installation Interfaces DS1 Electrical Interface.” “Network – ITU-T Recommendation G.803, Mar. 2000, of transport networks based on the “Architecture synchronous digital hierarchy (SDH).” ITU-T Timing Recommendation G.810, Aug. 1996, and terminology for “Definitions synchronization networks.” ITU-T Recommendation G.811, Sept. 1997, requirements at the output of primary “Timing reference clocks suitable for plesiochronous operation of international digital ITU-T Recommendation G.812, June 1998, requirements of slave clocks suitable for use “Timing as node clocks in synchronization networks.” ITU-T Recommendation G.813, Mar. 2003, characteristics of SDH equipment slave clocks “Timing (SEC).” ITU-T Recommendation G.824, Mar. 2000, control of jitter and wander within digital “The networks which are based upon the 1544 Kbps hierarchy.”
This simplifies the interface and reduces master/slave clock contention issues. The optical interface also isolates a local utility’s communications ground reference from a foreign ground reference. If a C37.94 interface is not possible, a G.703 interface is the next option. Due to strict timing requirements, utilities must inform each other when significant synchronization changes, which could affect the performance of inter-utility digital circuits, are planned (i.e.; a local utility retiming a previously floating DS1 by grooming the DS1 using a DCS or channel bank) (See Figure 7). RS-232 interfaces should have all the control available to allow full “handshaking” between the utilities. As a last resort, back-to-back VF interfaces can be used when synchronization issues cannot be resolved. RS-422, RS-449, and RS-485 are becoming obsolete and are not described here. Appendix A — References ANSI T1.105.03-2003, “Synchronous Optical Network (SONET) Jitter and Wander at Network and Equipment Interfaces.” ANSI T1.105.09-1996 (R2002), “Synchronous Optical Network (SONET) Network Timing and Synchronization.” ANSI T1.TR.81-2003, “Synchronization Network Architecture.” ANSI T1.403, “Network and Customer Installation Interfaces – DS1 Electrical Interface.” ITU-T Recommendation G.803, Mar. 2000, “Architecture of transport networks based on the synchronous digital hierarchy (SDH).” ITU-T Timing Recommendation G.810, Aug. 1996, “Definitions and terminology for synchronization networks.” ITU-T Recommendation G.811, Sept. 1997, “Timing requirements at the output of primary reference clocks suitable for plesiochronous operation of international digital ITU-T Recommendation G.812, June 1998, “Timing requirements of slave clocks suitable for use as node clocks in synchronization networks.” ITU-T Recommendation G.813, Mar. 2003, “Timing characteristics of SDH equipment slave clocks (SEC).” ITU-T Recommendation G.824, Mar. 2000, “The control of jitter and wander within digital networks which are based upon the 1544 Kbps hierarchy.”
Digital%20Circuits%20Synchronization%20Guideline%20(Rev%202).docx