microinstruction sequencing, implementation of control unit, 2 Enhancing performance with pipelining. The need for a memory hierarchy (Locality of reference 2 principle, Memory hierarchy in practice: Cache, main memory and secondary memory, Memory parameters: access/ 2 cycle time, cost per bit); Main memory (Semiconductor RAM & ROM organization, 2 memory expansion, Static & dynamic memory types); Cache memory (Associative & 2 direct mapped cache organizations. of parallelism (Exploitation of concurrency, 1 throughput enhancement); Amdahl’s law; Instruction level parallelism 1 (pipelining, super scaling –basic features); Power Point Processor parallelism October+ CSE-V Assignment : 4 2 (Multiprocessor systems Presentations, Lab November Semester Class Test : 4 Experiments overview). Instruction codes, computer register, computer instructions, timing and control, instruction 2 cycle, type of instructions, memory reference, register reference. I/O reference, Basics of Logic Design, accumulator logic, Control 2 memory, address sequencing, micro-instruction formats, micro-program sequencer, Stack Organization, Instruction 2 Formats, Types of interrupts; Memory Hierarchy. Total Lectures 46 Text Books: 1 Computer Organization and Design, 2nd Ed., by David A. Patterson and John L. 2. Hennessy, Morgan 1997, Kauffmann. Computer Architecture and Organization, 3rd Edi, by John P. Hayes, 1998, TMH. Reference books: Operating Systems Internals and Design Principles by William Stallings,4th edition, 2001, Prentice-Hall Upper Saddle River, New Jersey Computer Organization, 5th Edi, by Carl Hamacher, Zvonko Vranesic,2002, Safwat Zaky.
2 microinstruction sequencing, implementation of control unit, Enhancing performance with pipelining. 2 The need for a memory hierarchy (Locality of reference principle, Memory hierarchy in practice: Cache, main memory and secondary memory, 2 Memory parameters: access/ cycle time, cost per bit); October+ November CSE-V Semester 2 Main memory (Semiconductor RAM & ROM organization, memory expansion, Static & dynamic memory types); Power Point Presentations, Lab Experiments Assignment : 4 Class Test : 4 2 Cache memory (Associative & direct mapped cache organizations. 1 of parallelism (Exploitation of concurrency, throughput enhancement); Amdahl’s law; 1 Instruction level parallelism (pipelining, super scaling –basic features); 2 Processor parallelism (Multiprocessor systems overview). 2 Instruction codes, computer register, computer instructions, timing and control, instruction cycle, type of instructions, memory reference, register reference. I/O reference, 2 Basics of Logic Design, accumulator logic, Control memory, address sequencing, micro-instruction formats, micro-program sequencer, 2 Stack Organization, Instruction Formats, Types of interrupts; Memory Hierarchy. Total Lectures 46 Text Books: 1 Computer Organization and Design, 2nd Ed., by David A. Patterson and John L. 2. Hennessy, Morgan 1997, Kauffmann. Computer Architecture and Organization, 3rd Edi, by John P. Hayes, 1998, TMH. Reference books: Operating Systems Internals and Design Principles by William Stallings,4th edition, 2001, Prentice-Hall Upper Saddle River, New Jersey Computer Organization, 5th Edi, by Carl Hamacher, Zvonko Vranesic,2002, Safwat Zaky.
COA-Lesson-plan.docx