ModelSim software. Since the code was not up to the industrial standard, I was asked to rewrite the code meeting those standards. 2.1.2.1.3.1 Functionality of pointers Figure 2.2: Traversal of Pointers The Asynchronous FIFO in CDC works using Synchronize architecture of FIFO module. I.e. synchronizing read and write pointers between clock domains. Thus the flags are generated after comparing the read and write pointers. Later in the week I could possibly test the functionality of pointers in FIFO and sent to the management for review. The observations are listed along with the feedback I received (In red). First I tested whether the pointers are working properly. For that I just enabled the and fetched input data continuously (20 130 ps). Since the ‘asff_wr_en’ – DEPTHLN2 is 3 and hence the size of the memory is 8x8, the maximum it can fetch in to the memory is 8 bytes. In that the is incremented as expected. ‘wr_ptr’ Then the is set (130 320 ps) and allowed to be read whole the memory. ‘asff_rd_en’ – In that the is also incremented as expected. And at this stage (280 ps + 4 ps ‘rd_ptr’ (clock offset)) both pointers are at 3’b000. But the problem at this stage is since the initially points on first element in the memory and since that time it should ‘rd_ptr’ point on the second element in the memory when the first element is trigerred (but since it is not happening here) the cycle of reading extends to one more element (reads nine elements). The next element in the memory from where the limit created by the wr_ptr is also read by the rd_ptr (if it is end of the memory then the first element). Closely look at the time gap between 280 300 ps with respect to asff_rddata and – rd_ptr. See how empty flag works and conditions on how we use a FIFO Figure 2.3: inspection on asff_rddata and asff_rdptr
ModelSim software. Since the code was not up to the industrial standard, I was asked to rewrite the code meeting those standards. 2.1.2.1.3.1 Functionality of pointers Figure 2.2: Traversal of Pointers The Asynchronous FIFO in CDC works using Synchronize architecture of FIFO module. I.e. synchronizing read and write pointers between clock domains. Thus the flags are generated after comparing the read and write pointers. Later in the week I could possibly test the functionality of pointers in FIFO and sent to the management for review. The observations are listed along with the feedback I received (In red). First I tested whether the pointers are working properly. For that I just enabled the ‘asff_wr_en’ and fetched input data continuously (20 – 130 ps). Since the DEPTHLN2 is 3 and hence the size of the memory is 8x8, the maximum it can fetch in to the memory is 8 bytes. In that the ‘wr_ptr’ is incremented as expected. Then the ‘asff_rd_en’ is set (130 – 320 ps) and allowed to be read whole the memory. In that the ‘rd_ptr’ is also incremented as expected. And at this stage (280 ps + 4 ps (clock offset)) both pointers are at 3’b000. But the problem at this stage is since the ‘rd_ptr’ initially points on first element in the memory and since that time it should point on the second element in the memory when the first element is trigerred (but since it is not happening here) the cycle of reading extends to one more element (reads nine elements). The next element in the memory from where the limit created by the wr_ptr is also read by the rd_ptr (if it is end of the memory then the first element). Closely look at the time gap between 280 – 300 ps with respect to asff_rddata and rd_ptr. See how empty flag works and conditions on how we use a FIFO Figure 2.3: inspection on asff_rddata and asff_rdptr
training-experience-2.docx