Fault Detection in Digital Circuits 23 Assuming the input line is s-a-1, the singular cubes for the faulty NAND gate are: b a b c f c1 0 1 x x c2 0 1 x x c3 1 1 0 x Hence, = = c1 c3� Dx1D c4 c1� D11D ∩ ∩ c2 ∩ c3� = 101D = 11DD c4 c2� ∩ c3 ∩ = 1 c3� xDD Therefore, the primitive of the s-a-1 fault is 101D. The pdcf for all single stuck-at D-cube b ’s faults for the three-input NAND gate are: Fault a b c f 0 s-a-0 x x D f 0 s-a-0 x x D f 0 s-a-0 x x D f 1 1 1 s-a-1 D f 0 1 1 s-a-1 D a 1 0 1 s-a-1 D b 1 1 0 s-a-1 D c Let us next consider how the various described are used in the method to D-algorithm a test for a given fault. The test generation process consists of three steps: Select a pdcf for the given fault. Step 1. Drive the (or ) from the output of the gate under test to an output of the Step 2. D D circuit by successively intersecting the current with the propagation of test cube D-cubes successive gates. A test cube represents the signal values at various lines in the circuit during each step of the test generation process. The intersection of a test cube with the propagation of a successor gate results in a test cube. D-cube Justify the internal line values by driving back toward the inputs of the circuit, Step 3. assigning input values to the gates so that a consistent set of circuit input values may be
c1 c2 c3 Fault Detection in Digital Circuits 23 Assuming the input line b is s-a-1, the singular cubes for the faulty NAND gate are: a b c f 0 x x 1 x x 0 1 1 x 1 0 Hence, c1 ∩ c3� = Dx1D c4 ∩ c1� = D11D c2 ∩ c3� = 101D c4 ∩ c2� = 11DD c3 ∩ c3� = 1 xDD Therefore, the primitive D-cube of the b s-a-1 fault is 101D. The pdcf ’s for all single stuck-at faults for the three-input NAND gate are: a b c f Fault 0 x x D f s-a-0 x 0 x D f s-a-0 x x 0 D f s-a-0 1 1 1 f s-a-1 D 0 1 1 D a s-a-1 1 0 1 D b s-a-1 1 1 0 D c s-a-1 Let us next consider how the various described are used in the D-algorithm method to a test for a given fault. The test generation process consists of three steps: Step 1. Select a pdcf for the given fault. Step 2. Drive the D (or D ) from the output of the gate under test to an output of the circuit by successively intersecting the current test cube with the propagation D-cubes of successive gates. A test cube represents the signal values at various lines in the circuit during each step of the test generation process. The intersection of a test cube with the propagation D-cube of a successor gate results in a test cube. Step 3. Justify the internal line values by driving back toward the inputs of the circuit, assigning input values to the gates so that a consistent set of circuit input values may be
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