Video Input to DDR Memory, DDR Memory to TFT Controller VGA Output by ECE532-2015-Group01 This describes how to take video input from the OV7670 Camera and write a frame buffer to memory through an AXI Master Interface. The following instructions describe how to create a system on the Nexys4DDR which takes video input, writes it to memory, and sets up the TFT controller to display through the VGA port. Follow the ECE532 DDR Tutorial to create a system with MicroBlaze and the MIG. The Camera will write to DDR Memory through the MIG. Copy the folder included with this tutorial into a local directory. Include this IP by clicking on OV7670 under Project Manager in Vivado. Select and click Point to Project Settings IP Add Repository. OV7670. Click Select and OK to exit Project Settings. In the block diagram created in step 1, add the OV7670 IP. This takes the raw Camera signals and converts them to AXI-Stream signals compatible with the VDMA Block. Next add the Axi Video Direct Memory Access (VDMA) IP. This block converts the AXI-Stream into full AXI transactions to DDR Memory. Double Click on the VDMA and re-customize as follows: The Camera requires a 25.175MHz clock to produce 30 frames per second. Add a clock by on the Clocking Wizard block and setting clk_out3 to 25.175MHz. This clock also requires a separate reset module. Add a Processor System Reset block. The added blocks should look like this: Connect the blocks as shown below: Next, connect clk_out3 (25.175MHz) to: OV7670/clk25 axi_vdma_0/s_axis_s2mm_aclk proc_sys_reset_0/slowest_sync_clk. Next Run Connection Automation as follows: Connect /axi_vdma_0/M_AXI_S2MM to
Video Input to DDR Memory, DDR Memory to TFT Controller VGA Output by ECE532-2015-Group01 This describes how to take video input from the OV7670 Camera and write a frame buffer to memory through an AXI Master Interface. The following instructions describe how to create a system on the Nexys4DDR which takes video input, writes it to memory, and sets up the TFT controller to display through the VGA port. Follow the ECE532 DDR Tutorial to create a system with MicroBlaze and the MIG. The Camera will write to DDR Memory through the MIG. Copy the OV7670 folder included with this tutorial into a local directory. Include this IP by clicking on Project Settings under Project Manager in Vivado. Select IP and click Add Repository. Point to OV7670. Click Select and OK to exit Project Settings. In the block diagram created in step 1, add the OV7670 IP. This takes the raw Camera signals and converts them to AXI-Stream signals compatible with the VDMA Block. Next add the Axi Video Direct Memory Access (VDMA) IP. This block converts the AXI-Stream into full AXI transactions to DDR Memory. Double Click on the VDMA and re-customize as follows: The Camera requires a 25.175MHz clock to produce 30 frames per second. Add a clock by on the Clocking Wizard block and setting clk_out3 to 25.175MHz. This clock also requires a separate reset module. Add a Processor System Reset block. The added blocks should look like this: Connect the blocks as shown below: Next, connect clk_out3 (25.175MHz) to: OV7670/clk25 axi_vdma_0/s_axis_s2mm_aclk proc_sys_reset_0/slowest_sync_clk. Next Run Connection Automation as follows: Connect /axi_vdma_0/M_AXI_S2MM to
VideoIn%20and%20VideoOut%20with%20DDR%20Tutorial_withTFT.docx