UP counting mode (M=0) − The Q output of the preceding FF is connected to the clock of the next stage if up counting is to be achieved. For this mode, the mode select input M is at logic 0 (M=0). DOWN counting mode (M=1) If M = 1, then the Q bar output of the preceding FF is − connected to the next FF. This will operate the counter in the counting mode. Example 3-bit binary up/down ripple counter. 3-bit hence three FFs are required. − UP/DOWN − So a mode control is essential. For a ripple up counter, the Q output of preceding FF is connected to the clock input of the next one. For a ripple up counter, the Q output of preceding FF is connected to the input of the next one. For a ripple down counter, the Q bar output of preceding FF is connected to the clock input of the next one. Let the selection of Q and Q bar output of the preceding FF be controlled by the mode control input M such that, If M = 0, UP counting. So connect Q to CLK. If M = 1, DOWN counting. So connect Q bar to CLK. Block Diagram Truth Table Operation S.N. Condition Operation If M = 0 and M bar = 1, then the AND gates 1 and 3 in fig. will be enabled whereas the AND gates 2 and 4 will be disabled. QA gets connected to the clock input of 1 Case 1 With M = 0 (Up counting mode) FF-B and QB gets connected to the clock input − of FF-C. These connections are same as those for the normal up counter. Thus with M = 0 the circuit work as an up counter.
UP counting mode (M=0) − The Q output of the preceding FF is connected to the clock of the next stage if up counting is to be achieved. For this mode, the mode select input M is at logic 0 (M=0). DOWN counting mode (M=1) − If M = 1, then the Q bar output of the preceding FF is connected to the next FF. This will operate the counter in the counting mode. Example 3-bit binary up/down ripple counter. 3-bit − hence three FFs are required. UP/DOWN − So a mode control is essential. For a ripple up counter, the Q output of preceding FF is connected to the clock input of the next one. For a ripple up counter, the Q output of preceding FF is connected to the input of the next one. For a ripple down counter, the Q bar output of preceding FF is connected to the clock input of the next one. Let the selection of Q and Q bar output of the preceding FF be controlled by the mode control input M such that, If M = 0, UP counting. So connect Q to CLK. If M = 1, DOWN counting. So connect Q bar to CLK. Block Diagram Truth Table Operation S.N. Condition Operation 1 Case 1 − With M = 0 (Up counting mode) If M = 0 and M bar = 1, then the AND gates 1 and 3 in fig. will be enabled whereas the AND gates 2 and 4 will be disabled. QA gets connected to the clock input of FF-B and QB gets connected to the clock input of FF-C. These connections are same as those for the normal up counter. Thus with M = 0 the circuit work as an up counter.
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