address register pointers for the Data Space addressing to be able to have efficient calculations of the address. The program flash memory space is also divided into two sections, the Boot Program section and the Application Program section. The input/output memory space contains 64 addresses for CPU peripheral functions such as Control Registers, SPI, and other I/O functions. The status register is key to understanding what the last arithmetic instruction that was executed by the ALU. Understanding the status register is vital in altering the flow of the program to perform conditional operations. Table 5.3-2 shows how the status register is read from the least significant bit. 7 6 5 4 3 2 1 0 I T H S V N Z C R/W R/W R/W R/W R/W R/W R/W R/W Bit Name Description 7 / I Global Interrupt Enable Must be set for interrupts to be enabled 6 / T Bit Copy Storage Uses as source or destination for the operated bit 5 / H Half Carry Flag Half carry in arithmetic operations. Useful in BCD arithmetic 4 / S Sign Bit Always an exclusive or between the Negative Flag N and the Two's complement Overflow Flag V. 3 / V Two's Complement Supports two's complement arithmetic Overflow Flag 2 / N Negative Flag Indicates a negative result in an arithmetic or operation 1 / Z Zero Flag Indicates a zero result in an arithmetic or logic operation 0 / C Carry Flag Indicates a carry in an arithmetic or logic operation Table 5.3-2 SREG Description Also vital to knowing is the AVR CPU general purpose working registers addresses; knowing the Register File. Since most instructions have direct access to every register in the Register file, they are single cycle instructions. The registers are mapped in the first 32 locations of the Data Space. The X, Y and Z pointers can be set to index any of the registers of the file. Figure 5.3-3 is a diagram of the register file displaying all 32 registers and their address. Figure 5.3-3 Register File
address register pointers for the Data Space addressing to be able to have efficient calculations of the address. The program flash memory space is also divided into two sections, the Boot Program section and the Application Program section. The input/output memory space contains 64 addresses for CPU peripheral functions such as Control Registers, SPI, and other I/O functions. The status register is key to understanding what the last arithmetic instruction that was executed by the ALU. Understanding the status register is vital in altering the flow of the program to perform conditional operations. Table 5.3-2 shows how the status register is read from the least significant bit. 7 6 5 4 3 2 1 0 I T H S V N Z C R/W R/W R/W R/W R/W R/W R/W R/W Bit Name Description 7 / I Global Interrupt Enable Must be set for interrupts to be enabled 6 / T Bit Copy Storage Uses as source or destination for the operated bit 5 / H Half Carry Flag Half carry in arithmetic operations. Useful in BCD arithmetic 4 / S Sign Bit Always an exclusive or between the Negative Flag N and the Two's complement Overflow Flag V. 3 / V Two's Complement Overflow Flag Supports two's complement arithmetic 2 / N Negative Flag Indicates a negative result in an arithmetic or operation 1 / Z Zero Flag Indicates a zero result in an arithmetic or logic operation 0 / C Carry Flag Indicates a carry in an arithmetic or logic operation Table 5.3-2 SREG Description Also vital to knowing is the AVR CPU general purpose working registers addresses; knowing the Register File. Since most instructions have direct access to every register in the Register file, they are single cycle instructions. The registers are mapped in the first 32 locations of the Data Space. The X, Y and Z pointers can be set to index any of the registers of the file. Figure 5.3-3 is a diagram of the register file displaying all 32 registers and their address. Figure 5.3-3 Register File
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