errors occur, tell your teacher so that steps can be taken to check for proper installation of driver, Multisim, and Xilinx software. If the device is not found: check whether the USB cable is connected. check the user constraint path under PLD export Step 2. the Xilinx tools path under Global Settings. check your Device Manager to see whether USB Device” is found. “Digilent Exporting to the PLD will take several minutes. the OR gate on the PLD. Using Both Hardware Platforms (DMS and DLB) If you are using only one hardware option, disregard this optional information below. If your classroom is using both hardware platforms (Digital MiniSystem and Digital Logic Board), check whether the CDS is pointing to the correct version of Xilinx, the correct drivers, and the correct user constraint file each time you Export to PLD”. If you have “Transfer → trouble transferring the project to the PLD, check the following settings. Digital MiniSystem (DMS) Option Global Settings Options Global options Paths Miscellaneous Xilinx tools path → → → → C:\NIFPGA\programs\Xilinx14_7\ISE Transfer Export to PLS Settings → Xilinx tool: LabVIEW FPGA Xilinx ISE 14.7 (32-bit or 64-bit)” “NI Xilinx user constraint file: Cmod S6.ucf” “Digilent Digital Logic Board (DLB) Option Global Settings Options Global options Paths Miscellaneous Xilinx tool path → → → → C:\NIFPGA\programs\Xilinx12_4\ISE Transfer to PLS Settings” → “Export Xilinx tool: ISE Design Suite 12.4 (32-bit or 64-bit)” “Xilinx Xilinx user constraint file: “DEFB.ucf” Conclusion Look up the names and definitions for the following programmable logic acronyms: PLD: PAL:
errors occur, tell your teacher so that steps can be taken to check for proper installation of driver, Multisim, and Xilinx software. If the device is not found: check whether the USB cable is connected. check the user constraint path under PLD export Step 2. the Xilinx tools path under Global Settings. check your Device Manager to see whether “Digilent USB Device” is found. Exporting to the PLD will take several minutes. the OR gate on the PLD. Using Both Hardware Platforms (DMS and DLB) If you are using only one hardware option, disregard this optional information below. If your classroom is using both hardware platforms (Digital MiniSystem and Digital Logic Board), check whether the CDS is pointing to the correct version of Xilinx, the correct drivers, and the correct user constraint file each time you “Transfer → Export to PLD”. If you have trouble transferring the project to the PLD, check the following settings. Digital MiniSystem (DMS) Option Global Settings Options → Global options → Paths → Miscellaneous → Xilinx tools path C:\NIFPGA\programs\Xilinx14_7\ISE Transfer → Export to PLS Settings Xilinx tool: “NI LabVIEW FPGA Xilinx ISE 14.7 (32-bit or 64-bit)” Xilinx user constraint file: “Digilent Cmod S6.ucf” Digital Logic Board (DLB) Option Global Settings Options → Global options → Paths → Miscellaneous → Xilinx tool path C:\NIFPGA\programs\Xilinx12_4\ISE Transfer → “Export to PLS Settings” Xilinx tool: “Xilinx ISE Design Suite 12.4 (32-bit or 64-bit)” Xilinx user constraint file: “DEFB.ucf” Conclusion Look up the names and definitions for the following programmable logic acronyms: PLD: PAL:
2.4.2.AProgrammingTutorialDMS.docx