SRAM DRAM Bits stored as on/off switches Bits stored as charge in No charges to leak capacitors No refreshing needed when Charges leak powered Need refreshing even when More complex construction powered Larger per bit Simpler construction More expensive Smaller per bit Does not need refresh circuits Less expensive Faster Need refresh circuits Cache Slower Digital Main memory Uses flip-flops Essentially analogue Level of charge determines value Q. 2b) Brifly define the seven RAID levels? Answer yourself
SRAM DRAM Bits stored as on/off switches No charges to leak No refreshing needed when powered More complex construction Larger per bit More expensive Does not need refresh circuits Faster Cache Digital Uses flip-flops Bits stored as charge in capacitors Charges leak Need refreshing even when powered Simpler construction Smaller per bit Less expensive Need refresh circuits Slower Main memory Essentially analogue Level of charge determines value Q. 2b) Brifly define the seven RAID levels? Answer yourself
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