Introduction: The SPICE, VHDL-AMS and Verilog-AMS languages are supported by IBIS. This chapter describes how models written in these languages can be referenced and used by IBIS files. Table 11 shows the keywords used by the language extensions within the IBIS framework. Keyword Description [External Circuit] References enhanced descriptions of structures on the die, [End External Circuit] including digital and/or analog, active and/or passive circuits [External Model] Same as [External Circuit], except limited to the connection [End External Model] format and usage of the [Model] keyword, with one additional feature added: support for true differential buffers [Node Declarations] Lists on-die connection points related to the [Circuit Call] [End Node Declarations] keyword [Circuit Call] Instantiates [External Circuit]s and connects them to each [End Circuit Call] other and/or die pads The placement of these keywords within the hierarchy of IBIS is shown below: [Component] ├── │ │ [Node Declarations] │ ├── [End Node Declarations] │ │ └── │ │ [Circuit Call] │ ├── │ │ [End Circuit Call] │ └── │ │ [Model] ├── │ │ │ │ │ │ [External Model] │ ├── │ │ [End External Model] │ └── │ [External Circuit] ├──
Introduction: The SPICE, VHDL-AMS and Verilog-AMS languages are supported by IBIS. This chapter describes how models written in these languages can be referenced and used by IBIS files. Table 11 shows the keywords used by the language extensions within the IBIS framework. Keyword Description [External Circuit] [End External Circuit] References enhanced descriptions of structures on the die, including digital and/or analog, active and/or passive circuits [External Model] [End External Model] Same as [External Circuit], except limited to the connection format and usage of the [Model] keyword, with one additional feature added: support for true differential buffers [Node Declarations] [End Node Declarations] Lists on-die connection points related to the [Circuit Call] keyword [Circuit Call] [End Circuit Call] Instantiates [External Circuit]s and connects them to each other and/or die pads The placement of these keywords within the hierarchy of IBIS is shown below: ├── [Component] │ │ │ ├── [Node Declarations] │ │ └── [End Node Declarations] │ │ │ ├── [Circuit Call] │ │ │ └── [End Circuit Call] │ │ ├── [Model] │ │ │ │ │ │ │ ├── [External Model] │ │ │ └── [End External Model] │ ├── [External Circuit]
IBIS-5.1-draft-v130.docx