Topics and activities checklist Group member in Topics Activities Comments charge 1 2 3 Explain the concept of a top-down design of a) a digital circuit. Explain the logic gates AND, NAND, OR, a) NOR, XOR, NXOR, NOT) Analyze a logic circuit built using logic a), g) gates. Analysis concept map. Use WolframAlpha to obtain a a)b), h) circuit’s truth table. c) Use the HADES JAVA-based platform simulate. Simulate a digital circuit in Proteus-ISIS. d) Install the ispLEVER Classic and follow its e), f) design flow to implement an example project into a sPLD. Explain the basics of a SPLD GAL22V10. i), Search books and the Internet to learn about k) VHDL language. Explain the VDHL-based design flow of a k) modern digital circuit. Simulate projects in ModelSim or p) ActiveHDL Structural versus behavioural design styles in k) VHDL Relate the following concepts for designing a , logic circuit: truth table, Boolean algebra and logic functions, minimisation, SoP (sum of products) and PoS (product of sums), canonical algebraic equations, minterms and maxterms. Design concept map. Simplify or minimize logic function using software like Minilog.exe. Find the datasheets of SSI and MSI chips. , Explain the concepts of flat and hierarchical designs using and their components instantiation in VHDL language. Design and use standard blocks and apply , , combinational circuits. Produce a concept map (or a mind map) to k) explain a topic on the subject. List advantages of using VHDL Organise a plan to work in cooperative group Sec. 1.12 for solving the exercises. Analyse your own individual and group Sec. 1.12 study time. Produce a quality written solution using a Sec. 1.11 word processor template: spelling and grammar chapter enumeration page headers and footers
Topics and activities checklist Topics Activities Group member in charge Comments 1 2 3 Explain the concept of a top-down design of a digital circuit. a) Explain the logic gates AND, NAND, OR, NOR, XOR, NXOR, NOT) a) Analyze a logic circuit built using logic gates. Analysis concept map. a), g) Use WolframAlpha to obtain a circuit’s truth table. a)b), h) Use the HADES JAVA-based platform simulate. c) Simulate a digital circuit in Proteus-ISIS. d) Install the ispLEVER Classic and follow its design flow to implement an example project into a sPLD. e), f) Explain the basics of a SPLD GAL22V10. i), Search books and the Internet to learn about VHDL language. k) Explain the VDHL-based design flow of a modern digital circuit. k) Simulate projects in ModelSim or ActiveHDL p) Structural versus behavioural design styles in VHDL k) Relate the following concepts for designing a logic circuit: truth table, Boolean algebra and logic functions, minimisation, SoP (sum of products) and PoS (product of sums), canonical algebraic equations, minterms and maxterms. Design concept map. , Simplify or minimize logic function using software like Minilog.exe. Find the datasheets of SSI and MSI chips. , Explain the concepts of flat and hierarchical designs using components and their instantiation in VHDL language. Design and use standard blocks and apply combinational circuits. , , Produce a concept map (or a mind map) to explain a topic on the subject. List advantages of using VHDL k) Organise a plan to work in cooperative group for solving the exercises. Sec. 1.12 Analyse your own individual and group study time. Sec. 1.12 Produce a quality written solution using a word processor template: spelling and grammar chapter enumeration page headers and footers Sec. 1.11
EX1_10-11_Q1B.docx