6.2 Void 6.3 Wrong point Time-slot monitoring, or H.2.18.10.4 Timing in time scheduled transmission H.2.18.18 Time-slot and logical monitoring, or H.2.18.10.3 comparison of redundant communication channels by either: reciprocal comparison H.2.18.15 – independent hardware comparator H.2.18.3 – Logical monitoring, or H.2.18.10.2 sequence time-slot monitoring, or H.2.18.10.4 scheduled transmission H.2.18.18 (same options as for wrong point in time) 7. Input/output Fault Plausibility check H.2.18.13 periphery conditions specified in Comparison of redundant CPUs by either: 19.11.2 reciprocal comparison H.2.18.15 – independent hardware comparator, or H.2.18.3 – 7.1 Void Table R.1 (continued) Document Document Verdict Component Fault/error Acceptable measures Definitions reference reference for applied For applied measure test 7.2 Analog I/O 7.2.1 A/D- Fault Plausibility check H.2.18.13 and conditions D/A- converter specified in 19.11.2 7.2.2 Analog Wrong Plausibility check H.2.18.13 multiplexer addressing 8. Void 9. Custom Any output Periodic self test H.2.16.6 chips outside the 5) e.g. ASIC, static and GAL, Gate dynamic array functional specification When applicable in the specific Part 2 the software may be analysed with Table R2 Table R.2 Specific fault/error conditions – Component Fault/error Acceptable measures Definitions Document Document Verdict reference reference for applied For applied measure test
6.2 Void 6.3 Timing Wrong point in time Time-slot monitoring, or scheduled transmission H.2.18.10.4 H.2.18.18 Time-slot and logical monitoring, or H.2.18.10.3 comparison of redundant communication channels by either: – reciprocal comparison H.2.18.15 – independent hardware comparator H.2.18.3 Logical monitoring, or H.2.18.10.2 sequence time-slot monitoring, or H.2.18.10.4 scheduled transmission H.2.18.18 (same options as for wrong point in time) 7. Input/output Fault Plausibility check H.2.18.13 periphery conditions specified in Comparison of redundant CPUs by either: 19.11.2 – reciprocal comparison H.2.18.15 – independent hardware comparator, or H.2.18.3 7.1 Void Table R.1 (continued) Component Fault/error Acceptable measures Definitions Document reference Document reference Verdict for applied measure For applied test 7.2 Analog I/O 7.2.1 A/D- and Fault conditions Plausibility check H.2.18.13 D/A- converter specified in 19.11.2 7.2.2 Analog multiplexer Wrong addressing Plausibility check H.2.18.13 8. Void 9. Custom Any output Periodic self test H.2.16.6 chips 5) outside the e.g. ASIC, static and GAL, Gate dynamic array functional specification When applicable in the specific Part 2 the software may be analysed with Table R2 Table R.2 – Specific fault/error conditions Component Fault/error Acceptable measures Definitions Document reference Document reference Verdict for applied measure For applied test
od-2045_ed.2.0.docx