28 An Introduction to Logic Circuit Testing Figure 2.11: Test derivation using PODEM. Since is not a test for the fault, we assign 0 to (the other primary input to x1x2x3x4=0XXX x2 which sets up as the output of gate A) D A: 1 2 3 4 5 6 7 8 9 10 11 12 0 0 X X D X X X X X X X Because the output of gate namely, net 5, is not it is necessary to find a gate closer to the A, X, primary output with as its input and as output. Both gates and satisfy the requirements. D X G H The selection of gate and the subsequent assignment of 0 to primary input results in the G x3 1 2 3 4 5 6 7 8 9 10 11 12 0 0 0 1 0 D X D X X X X It is clear that is not a test for the fault because the primary output is x1x2x3x4=000X X. Gate has on input net 10 and on input nets 9 and 11. The initial objective is to set the J D X ’s objective net 12 to logic 1. The selection of net 9 as the next objective results in the assignment of 0 to pri-mary input x4: 1 2 3 4 5 6 7 8 9 10 11 12 0 0 0 0 1 1 0 0 D D D D Thus, the test for the s-a-0 is The same test could be found for the fault by α x1x2x3x4=0000. applying the however, the requires substantial and error before the test D-algorithm; D-algorithm is found. This is because of the variety of propagation paths and the attendant consistency operations that are required. For example, s-a-0 has to be simultaneously propagated to the output α
28 An Introduction to Logic Circuit Testing Figure 2.11: Test derivation using PODEM. Since x1x2x3x4=0XXX is not a test for the fault, we assign 0 to x2 (the other primary input to A) which sets up D as the output of gate A: 1 2 3 4 5 6 7 8 9 10 11 12 0 0 X X D X X X X X X X Because the output of gate A, namely, net 5, is not X, it is necessary to find a gate closer to the primary output with D as its input and X as output. Both gates G and H satisfy the requirements. The selection of gate G and the subsequent assignment of 0 to primary input x3 results in the 1 2 3 4 5 6 7 8 9 10 11 12 0 0 0 X D 1 X 0 X X X D It is clear that x1x2x3x4=000X is not a test for the fault because the primary output is X. Gate J has D on input net 10 and X ’s on input nets 9 and 11. The initial objective is to set the objective net 12 to logic 1. The selection of net 9 as the next objective results in the assignment of 0 to pri-mary input x4: 1 2 3 4 5 6 7 8 9 10 11 12 0 0 0 0 D 1 1 0 0 D D D Thus, the test for the α s-a-0 is x1x2x3x4=0000. The same test could be found for the fault by applying the D-algorithm; however, the D-algorithm requires substantial and error before the test is found. This is because of the variety of propagation paths and the attendant consistency operations that are required. For example, α s-a-0 has to be simultaneously propagated to the output