DSP-Based ADSL Transceiver Front End Circuit contains both the analog front end circuit and digital signal processing interface circuit function blocks. In order to cope with the high attenuation of the line and maintain acceptable signal to noise ratio (SNR), the analog front end circuit takes an import role. It also dominates the performance of the whole system. Furthermore, many parameters of the digital part depend on the circuit design of the analog front end. Since the data transmission speed and formats are different between digital signal processor and analog frond end circuit, it should be multiplexed, sampled, and buffered by using specifically designed FPGA Chip. In this paper, we discuss the circuit design and simulation results in detail.