structures and unions work much like they do in the c programming language. systemverilog enhancements include the packed attribute and the tagged attribute. the codice_14 attribute allows runtime tracking of which member(s) of a union are currently in use. the codice_15 attribute causes the structure or union to be mapped 1:1 onto a packed array of bits. the contents of codice_16 data types occupy a continuous block of memory with no gaps, similar to bitfields in c and c++: