Concurrency and Asynchronous Programming: a Detailed Overview 20 Step 2-Registering events with the OS This is handled in one of three ways: 1. We tell the operating system that we're interested in Read events but we want to wait for it to happen by yielding control over our thread to the OS. The OS then suspends our thread by storing the register state and switches to some other thread From our perspective, this will be blocking our thread until we have data to read. 2. We tell the operating system that we're interested in Read events but we just want a handle to a task that we can poll to check whether the event is ready or not. The OS will not suspend our thread, so this will not block our code. 3. We tell the operating system that we are probably going to be interested in many events, but we want to subscribe to one event queue. When we poll this queue, it will block our thread until one or more events occur. This will block our thread while we wait for events to occur. Chapters 3 and 4 will go into detail about the third method, as it's the most used method for modern async frameworks to handle concurrency. Step 3-The network card We're skipping some steps here, but I don't think they're vital to our understanding. On the network card, there is a small microcontroller running specialized firmware. We can imagine that this microcontroller is polling in a busy loop, checking whether any data is incoming. The exact way the network card handles its internals is a little different from what I suggest here, and will most likely vary from vendor to vendor. The important part is that there is a very simple but specialized CPU running on the network card doing work to check whether there are incoming events. Once the firmware registers incoming data, it issues a hardware interrupt. Step 4-Hardware interrupt A modern CPU has a set of interrupt request line (IRQs ) for it to handle events that occur from external devices. A CPU has a fixed set of interrupt lines. A hardware interrupt is an electrical signal that can occur at any time. The CPU immediately interrupts its normal workflow to handle the interrupt by saving the state of its registers and looking up the interrupt handler. The interrupt handlers are defined in the interrupt descriptor table (IDT ).