Page Table




Each Process has Page Table, Page table entry(PTE) has valid, access bit

### Page Table Arguments
1. V = {0 ,1 , ..., N-1}: virtual address space
2. P = {0, 1, ..., M-1}: physical address space
3. N > M: difference that not comparable
4. MAP: V → P U {null} address mapping function
5. null if in Disk (if valid is 0): page fault

### Page Table Parameters
log upper = lower
6. P = Page size (bytes): typically KBs
7. N = Virtual Address limit
8. M = Physical address limit

<details><summary>

virtual address = virtual page number(VPN) bit + page offset</summary>

VPN acts page index in page table
</details>

physical address = physical page number bit + page offset
address translation change previous one only (32 bit to other)

> compare start by page table base register

page table need protection and cache do not need because of address translation