Physical coding sublayer
The physical coding sublayer (PCS) is a networking protocol sublayer in the Fast Ethernet, Gigabit Ethernet, and 10 Gigabit Ethernet standards. It resides at the top of the physical layer (PHY), and provides an interface between the Physical Medium Attachment (PMA) sublayer and the media-independent interface (MII). It is responsible for data encoding and decoding, scrambling and descrambling, alignment marker insertion and removal, block and symbol redistribution, and lane block synchronization and deskew. Description 
The Ethernet PCS sublayer is at the top of the Ethernet physical layer (PHY). The hierarchy is as follows:

 Data link layer (Layer 2)
 Logical link control (LLC) sublayer
 Medium access control (MAC) sublayer
 Reconciliation sublayer (RS) - This sublayer processes PHY local/remote fault messages and handles DDR conversion
 PHY Layer (Layer 1)
 Physical coding sublayer (PCS) - This sublayer determines when a functional link has been established, provides rate difference compensation, and performs coding such as 64b/66b encoding and  scrambling/descrambling
 Physical Medium Attachment (PMA) sublayer - This sublayer performs PMA framing, octet synchronization/detection, and  scrambling/descrambling
 Physical Medium Dependent (PMD) sublayer - This sublayer consists of a transceiver for the physical medium

Specifications

10 Mbit/s Ethernet
 Classic Ethernet uses Manchester code in the Physical signaling sublayer (PLS), encoding each bit as a high-low (logical zero) or low-high transition (logical one). Fast Ethernet 
 100BASE-X for fiber (100BASE-FX) and twisted pair copper (100BASE-TX) encodes data nibbles to five-bit code groups (4B5B). Gigabit Ethernet 
1000BASE-X for fiber and 150 Ω balanced copper (twinaxial) uses 8b/10b encoding with a symbol rate of 1.25 GBd. 1000BASE-T for twisted pair copper splits the data into four lanes and uses four-dimensional, five-level (quinary) Trellis modulation with PAM-5 and a symbol rate of 125 MBd. 2.5 and 5 Gigabit Ethernet
 2.5GBASE-T and 5GBASE-T use the same encoding as 10GBASE-T slowed by a factor of four or two, respectively. 10 Gigabit Ethernet 
10GBASE-R (LAN) is the serial encoded PCS using 64b/66b encoding that allows for Ethernet framing at a rate of 10.3125 Gbit/s. This rate does not match the rate 9.953 Gbit/s used in SONET and SDH and is not supported over a WAN based on SONET or SDH. 10GBASE-X (LAN/WAN) uses 8b/10b encoding over four lanes at 3.125 GBd each and is used for 10GBASE-LX4 (single-mode and multi-mode fiber), 10GBASE-CX4 (twinax), and 10GBASE-KX4 (backplane). 10GBASE-W (WAN) defines WAN encoding for 10GbE. It uses 64/66b encoding and lowers the MAC rate to 9.95 Gbit/s, so that is compatible with SONET STS-192c data rates and SDH VC-4-64 transmission standards when wrapped into a SONET frame. 10GBASE-T for twisted pair copper splits the data into four lanes and uses 64B/65B encoding, scrambling, and 128 double-square (DSQ128) checkerboard encoding with PAM-16 generated at 800 MBd. 25 Gigabit Ethernet 
 25GBASE-R uses the same 64b/66b encoding as 10GBASE-R with a speed-up to 25.78125 GBd. 40/100 Gigabit Ethernet 
 40GBASE-R and 100GBASE-R use 64b/66b encoding over multiple lanes of 10.3125 GBd or 25.78125 GBd each. These lanes – four for 40 Gbit/s, four or ten for 100 Gbit/s per direction – are either transmitted separately over short distance or together with coarse wavelength division multiplexing on long distance fiber (-LR). References

External links 
 IEEE 802.3 Meeting
 Ethernet 1000BASE-X PCS/PMA Technology Basics

Ethernet