Launch Vehicle Digital Computer
The Launch Vehicle Digital Computer (LVDC) was a computer that provided the autopilot for the Saturn V rocket from launch to Earth orbit insertion. Designed and manufactured by IBM's Electronics Systems Center in Owego, New York, it was one of the major components of the Instrument Unit, fitted to the S-IVB stage of the Saturn V and Saturn IB rockets. The LVDC also supported pre- and post-launch checkout of the Saturn hardware. It was used in conjunction with the Launch Vehicle Data Adaptor (LVDA) which performed signal conditioning from the sensor inputs to the computer from the launch vehicle. Hardware
The LVDC was capable of executing 12190 instructions per second. For comparison, as of 2022, researchers at the University of California created a chip capable of running at 1.78 trillion instructions per second, 146 million times faster. Its master clock ran at 2.048 MHz, but operations were performed bit-serially, with 4 cycles required to process each bit, 14 bits per instruction phase, and 3 phases per instruction, for a basic instruction cycle time of 82 μs (168 clock cycles) for a simple add. A few instructions (such as multiply or divide) took several multiples of the basic instruction cycle to execute. Memory was in the form of 13-bit syllables, each with a 14th parity bit. Instructions were one syllable in size, while data words were two syllables (26 bits). Main memory was random access magnetic core, in the form of 4,096-word memory modules. Up to 8 modules provided a maximum of 32,768 words of memory. Ultrasonic delay lines provided temporary storage. For reliability, the LVDC used triple-redundant logic and a voting system. The computer included three identical logic systems. Each logic system was split into a seven-stage pipeline. At each stage in the pipeline, a voting system would take a majority vote on the results, with the most popular result being passed on to the next stage in all pipelines. This meant that, for each of the seven stages, one module in any one of the three pipelines could fail, and the LVDC would still produce the correct results. The result was an estimated reliability of 99.6% over 250 hours of operation, which was far more than the few hours required for an Apollo mission. With four memory modules, giving a total capacity of 16,384 words, the computer weighed , was  in size and consumed 137W. The LVDC communicated digitally with a Launch Vehicle Data adapter (LVDA). The LVDA converted analog-to-digital and digital-to-analog with a Flight Control Computer (FCC). The FCC was an analog computer. Software architecture and algorithms
LVDC instruction words were split into a 4-bit opcode field (least-significant bits) and a 9-bit operand address field (most-significant bits). This left it with sixteen possible opcode values when there were eighteen different instructions: consequently, three of the instructions used the same opcode value, and used two bits of the address value to determine which instruction was executed. Memory was broken into 256-word "sectors". 8 bits of the address specified a word within a sector, and the 9th bit selected between the software-selectable "current sector" or a global sector called "residual memory". The eighteen possible LVDC instructions were:

Programs and algorithms

In flight the LVDC ran a major computation loop every 2 seconds for vehicle guidance, and a minor loop 25 times a second for attitude control. The minor loop is triggered by a dedicated interrupt every 40 ms and takes 18 ms to run. Unlike the Apollo Guidance Computer software, the software which ran on the LVDC seems to have vanished. While the hardware would be fairly simple to emulate, the only remaining copies of the software are probably in the core memory of the Instrument Unit LVDCs of the remaining Saturn V rockets on display at NASA sites. Interrupts

The LVDC could also respond to a number of interrupts triggered by external events. For a Saturn IB these interrupts were:

For a Saturn V these interrupts were:

Construction
The LVDC was approximately  wide,  high, and  deep and weighed . The chassis was made of magnesium-lithium alloy LA 141, chosen for its high stiffness, low weight, and good vibration damping characteristics. The chassis was divided into a 3 x 5 matrix of cells separated by walls through which coolant was circulated to remove the 138 watts of power dissipated by the computer. Slots in the cell walls held "pages" of electronics. The decision to cool the LVDC by circulating coolant through the walls of the computer was unique at the time and allowed the LVDC and LVDA (part-cooled using this technique) to be placed in one cold plate location due to the three dimensional packaging. The cold plates used to cool most equipment in the Instrument Unit were inefficient from a space view although versatile for the variety of equipment used. The alloy LA 141 had been used by IBM on the Gemini keyboard, read out units, and computer in small quantities and the larger frame of the LVDC was produced from the largest billets of LA 141 cast at the time and subsequently CNC machined into the frame. A page consisted of two  boards back to back and a magnesium-lithium frame to conduct heat to the chassis on low power pages and magnesium-aluminun-zinc on higher power pages. The 12-layer boards contained signal, power, and ground layers and connections between layers were made by plated-through holes. The plated-through holes were deliberately placed below the unit logic devices (ULD) to help conduct heat from the devices to the metal frames and thus the coolant walls. Up to 35 alumina squares of  could be reflow soldered to a board. These alumina squares had conductors silk screened to the top side and resistors silk-screened to the bottom side. Semiconductor chips of , each containing either one transistor or two diodes, were reflow soldered to the top side. The complete module was called a unit logic device. The unit logic device (ULD) was a smaller version of IBM's Solid Logic Technology (SLT) module, but with clip connections. Copper balls were used for contacts between the chips and the conductive patterns. The hierarchy of the electronic structure is shown in the following table. Gallery

See also
Apollo Guidance Computer
Apollo PGNCS primary spacecraft guidance system
Gemini Spacecraft On-Board Computer (OBC)

Notes

References

 IBM, Saturn V Launch Vehicle Digital Computer, Volume One: General Description and Theory, 30 November 1964
 IBM, Saturn V Guidance Computer, Semiannual Progress Report, 1 Apr. - 30 Sep. 1963, 31 October 1963; archive
 Bellcomm, Inc, Memory Requirements for the Launch Vehicle Digital Computer (LVDC), April 25, 1967
 Boeing, Saturn V Launch Vehicle Guidance Equations, SA-504, 15 July 1967
 
 NASA Marshall Spaceflight Center, Saturn V Flight Manual SA-503, 1 November 1968
 NASA Marshall Spaceflight Center, Skylab Saturn IB Flight Manual, 30 September 1972
 M.M. Dickinson, J.B. Jackson, G.C. Randa. IBM Space Guidance Center, Owego, NY. "Saturn V Launch Vehicle Digital Computer and Data Adapter." Proceedings of the Fall Joint Computer Conference, 1964, pages 501–516. S. Bonis, R. Jackson, and B. Pagnani. IBM Space Guidance Center, Owego, NY. "Mechanical and Electronic Packaging for a Launch-Vehicle Guidance Computer." International Electronic Circuit Packaging Symposium 21–24 August 1964. Pages 226–241. IBM, Apollo Study Report, Volume 2. IBM Space Guidance Center, Owego, NY, 1 October 1963. 133 pages. Also available on Virtual AGC (search for 63-928-130). NASA MSFC, Astrionics System Handbook Saturn Launch Vehicles NASA Marshall Space Flight Center, 1 Nov 1968. MSFC No. IV-4-401-1. IBM No. 68-966-0002. 419 pages. Chapter 15 is about the LVDC and Launch Vehicle Data Adapter. External links
 IBM Archives: Saturn Guidance Computer
 High-resolution photos of LDVC components at the SpaceAholic collection of Apollo Lunar Module and Saturn V spaceflight artifacts

Guidance computers
Apollo program hardware
IBM avionics computers
Spacecraft navigation instruments