IIRC, it&#x27;s actually a bit worse: each core could run two threads, but they&#x27;d run alternating clock cycles, like the Cell PPUs - unless you have two threads running, each core has half that speed. A normal optimization trick of spreading across as many cores as possible backfires here.<p>But that was integer performance. Each core also had a beefy SIMD unit, twice as wide as the one in then current Xeons.