Old news says Kris Kaspersky:<p><a href="http:&#x2F;&#x2F;cs.dartmouth.edu&#x2F;~sergey&#x2F;cs258&#x2F;2010&#x2F;D2T1%20-%20Kris%20Kaspersky%20-%20Remote%20Code%20Execution%20Through%20Intel%20CPU%20Bugs.pdf" rel="nofollow">http:&#x2F;&#x2F;cs.dartmouth.edu&#x2F;~sergey&#x2F;cs258&#x2F;2010&#x2F;D2T1%20-%20Kris%2...</a><p>Will likely continue to get worse in full-custom designs like Intel&#x27;s since complexity keeps going up but ease of modeling and verification doesn&#x27;t.<p>On the other end, look up VAMP from Verisoft, SSP from Sandia, or AAMP7G from Rockwell-Collins if you want to see what high-assurance processors look like. They ran error-free during testing IIRC with a ton of validation. Sandia SSP was first-pass. In any case, they&#x27;re all kind of simple compared to Intel&#x27;s stuff. That&#x27;s on purpose given there&#x27;s an upper limit to how much complexity you can squeeze into a chip without significant errata. One can expand such methods to larger SOC&#x27;s but that&#x27;s not what big vendors are doing [out of necessity]. And that has security implications that aren&#x27;t going away.