But aren&#x27;t modern Intel and AMD CPUs <i>internally</i> RISC(-like)? It seems like we have great compilers for CISC targets, and can make great RISC CPUs that process CISC instruction sets really well?<p>Perhaps the issue is that the internals of eg. modern Intel CPUs are locked up at Intel, so the missing step from CISC assembly to efficient RISC is missing (while we&#x27;ve got high-level&#x2F;C&#x2F;C++ to CISC covered)?