<i>You seem to be implying that there&#x27;s RISC failed.</i><p>It did fail to deliver on all its promises.<p><i>RISC is requires less logic (=area,power) to implement</i><p>True, but ultimately it is overall energy usage that is important. A tiny low-power CPU with less performance will take longer to complete a task than a larger faster higher-power one, meaning it consumes more energy. That&#x27;s what the article I linked to shows.<p><i>processors have faster cycle times</i><p>That&#x27;s not necessarily a good thing, as Intel&#x27;s failed NetBurst microarchitecture shows. Making a CPU with such short delays that it can run at upwards of 10GHz is futile, as power dissipation becomes a huge problem long before that.<p><i>In fact, Intel have a few proprietary microcontrollers hidden inside their chipsets and SoCs that were designed post-2005ish and these have RISC architectures.</i><p>If you&#x27;re referring to the ARC4 in the Management Engine, I have a feeling that was chosen for reasons other than being RISC or otherwise.<p><i>It is completely absurd to expect a team of 10 or so grad students to compete with them.</i><p>I remember it said that RISC would be so simple and performant that such small teams could easily design CPUs which vastly outperform the big CISCs at much lower prices, so I don&#x27;t think it&#x27;s that absurd of an expectation.