A few problems I&#x27;m trying to knock out in one solution. That&#x27;s always risk but FPGA&#x27;s are versatile. Here&#x27;s a few:<p>1. Subversion and security concerns of all the black boxes in hardware alleviated with open I.P., tooling, and HW. Main concern in my field.<p>2. Both ASIC and FPGA entry cost to startups trying to get custom stuff out the door. Need to lower it.<p>3. Hobbyists and academics experimenting currently benefit from FPGA&#x27;s with some HW and SW ecosystems built around them. I see that expanding with easy-to-use, open tooling. Plus maybe decent HLS system. Synflow is one I know in that niche.<p>4. I&#x27;ve been pushing potential of FPGA as accelerators for cloud, networked, and HPC applications for a while. There&#x27;s an uptake in their use but cloud is cost-sensitive. FPGA&#x27;s w&#x2F; OpenCL-style tooling sold at cost in boards pluggable into regular servers or desktops could... well, you know the potential because you&#x27;re in that market &amp; brave enough to compete on architecture. ;) Pico Computing also comes to mind with their FPGA desktops.<p>5. <i>Maybe</i> make HW prototyping, verification, etc cheaper as another source of revenue as I&#x27;ve seen some ASIC-oriented products that use FPGA&#x27;s for this. I know many of the tools are too slow, too, so there&#x27;s potential for straight acceleration as in 4.<p>6. Reduce cost (and runtime risk) of FPGA-proven components with S-ASIC conversion. Also thought about anti-fuse but think S-ASIC is legally &amp; physically safer. Not a HW expert, though, so going on second-hand comments there.<p>So, there&#x27;s at least 5 potential benefits from an open-source FPGA sold at cost. Especially on performance if people start cramming them into boards like Pico and Maxeler do with cloud company orders. Good on trustworthy, hobbyist, and prototyping ends with low cost &amp; open, expanding SW side.<p>So, that&#x27;s the idea. Pretty ambitious and with high failure potential for sure. It&#x27;s why, if I attempt it, I&#x27;ll be enlisting cloud companies and academics. AMD&#x27;s &quot;semi-custom&quot; business seems to indicate some potential if it&#x27;s integrated into a CPU&#x27;s memory bus or a CPU itself. Core logic and stuff only needs to be done once on one good node. Subsequent integrations much cheaper.