There didn&#x27;t seem to be a lot in there but I don&#x27;t know Scala. I wish it was scripted in Lua or something with the Scala doing execution and analysis. Make it easier for others to follow.<p>Doesn&#x27;t seem nearly as thorough as what I&#x27;ve read in ASIC papers on verification. They did (co-simulation?), equivalence, gate-level testing, all kinds of stuff. Plus, you did it for a living so I take your word there. I do hope they have some other stuff somewhere if they&#x27;re doing tapeouts at 28nm. Hard to imagine unless they just <i>really</i> trust the synthesis and formal verification tools.<p>The flow is here:<p><a href="http:&#x2F;&#x2F;www.cs.berkeley.edu&#x2F;~yunsup&#x2F;papers&#x2F;riscv-esscirc2014.pdf" rel="nofollow">http:&#x2F;&#x2F;www.cs.berkeley.edu&#x2F;~yunsup&#x2F;papers&#x2F;riscv-esscirc2014....</a><p>Are those tools and techniques good enough to get first pass if the Chisel output was good enough to start with? Would it work in normal cases until it hits corner cases or has physical failures?