I don&#x27;t know, Make is difficult because we are used to think in procedures and not in rules; and the rule and macro syntax is a bit weird; it takes time to master it.<p>i have a makefile&#x2F;make system that uses gnu make macros;
(here <a href="http:&#x2F;&#x2F;mosermichael.github.io&#x2F;cstuff&#x2F;all&#x2F;projects&#x2F;2011&#x2F;06&#x2F;17.." rel="nofollow">http:&#x2F;&#x2F;mosermichael.github.io&#x2F;cstuff&#x2F;all&#x2F;projects&#x2F;2011&#x2F;06&#x2F;17...</a>. )
this saves you from repeating the same make constructs many times over, in the following example you do a static library and executable.<p><pre><code>  1: TOPDIR=..&#x2F;..
  2:
  3: # - declare build targets. (built with make)
  4: TARGETS:=shlib slibuser
  5: 
  6: # - slib target is a static library -
  7: shlib_TYPE=lib
  8: shlib_SRC=slib.c
  9:
  10:
  11: # - slibuser target is a executable using slib -
  12: slibuser_TYPE=exe
  13: slibuser_SRC=slibuser.c slibuser2.c slibuser3.c
  14: slibuser_LIBS=shlib
  15:
  16: include $(TOPDIR)&#x2F;rules.make
</code></pre>
At a previous job they had an even more convoluted make system - it was simulating macros: the makefile was including another generic make file; this included make file was writing hidden files that contained the make rules ; then as the last step these generated files were included.