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vrtx0 1 hour ago | parent<p>I&#x27;m probably missing something, but I don&#x27;t see how this is feasible. Moving all firmware to a device that lives on an external bus means that you must either create a &#x27;trustworthy&#x27; distribution channel for all supported firmware (including all system components and peripheral devices), or support only a select few devices and forbid adding any new peripherals.<p>In general, most of the firmware needed for system components is streamed from the main SPI chip to the various components as they are configured by the main system BIOS.  Thus, there mainly is a single chip we are concerned about.  However, the author identified a second embedded controller )EC_ flash that is also usually present, so we end up being concerned about 2 flash modules.  The author addresses other firmwares - the main one being discrete GPUs - and suggests having a system that does not include them.<p>&gt; Also, I have to disagree that FPGAs are ideal for the architecture proposed by this paper. Performance and state issues of an FPGA aside, they&#x27;re field programmable, which seems more vulnerable than &#x27;microcode updates&#x27;. Of course, you could just disable field programming, but why even use an FPGA in the first place?<p>If your only interface between the computer and the FPGA is a three wire interface that emulates an SPI chip, that does not provide any vector for reconfiguring the FPGA.  The bitstream for configuring the FPGA is provided via a completely separate set of hardware pins.