Neither tool has a good way to do matched-impedance traces. Both rely on scripting or a plugin to do this, and the feedback is not real-time nor can you make design rules on matched nets.<p>Also, neither tool integrates smoothly with simulation software yet. One of my pet ideas for a while has been to integrate EEScheme, the KiCad schematic capture tool, with ngspice, an open-source spice engine. The integration would include things like probing voltages and currents in the schematic to make graphs appear. Or, associating spice models with library components.<p>However, this would also require some way to create &quot;simulation-only&quot; versions of schematics. Typically, you only want to simulate a sub-section of the schematic at once. No other schematic tool, even the big ones (Cadence, Mentor), does this very well yet.