I believe the phrase &quot;it is architecturally specified that these would be delivered sequentially&quot; means that #DF doesn&#x27;t always occur, depending on what the two exception types were; this goes back to the 80386:<p><a href="http:&#x2F;&#x2F;intel80386.com&#x2F;386htm&#x2F;s09_08.htm" rel="nofollow">http:&#x2F;&#x2F;intel80386.com&#x2F;386htm&#x2F;s09_08.htm</a><p>That has always been there, but I guess the wording is a bit unclear&#x2F;the edge case where a &quot;benign exception&quot; occurs while handling another one was never really considered. If I had time I&#x27;d try these scenarios on real hardware to see if double or triple-fault happens, or if the CPU does get stuck in a loop.<p>The real problem might not be this edge-case itself, if real hardware can also get into an infinite loop (after all, some process running in a VM can easily execute one of those); it&#x27;s the fact that the host loses control of the virtualised CPU.