The debate about non-symetric RISC cores feels like a tech battle that was already fought in the 2k10&#x27;s. Amusingly its nearly the exact same debate this time around. The only difference is 2 orders of magnitude of TDW really, and Google is now playing Oracle.<p>You say to Oracle, <i>Yeah T4 SPARC64 RISC chips look nice. But coding against non-symetric asychronous cores is hard.</i><p>Oracle counters, <i>Yup, that is why we wrote &#x2F;maintain the Java JIT that does that for you!</i>.<p>Now Google is selling ARMv8 with A57 non-symetric asynchronous RISC chips, which you optimize with Java and we do this song and dance over again.<p>Intel, Nvidia, AMD (formerly ATI) solved this problem a long time ago just by putting the binary logic between the scalar processors and only exposing 1 <i>scheduler</i> to pipeline these smaller weaker cores but make them <i>pretend</i> to be a single processor to the OS&#x2F;User.