I implemented a distributed messages System&#x2F;API a long time (10+ years) ago on SMP, AMP, x86 CPU that were completely no-lock, none-blocking.   The APIs&#x2F;system on both userspace and Linux kernel space.<p>One thing the APIs depended on was atomic-add.   I tried to get to 10 millions msg&#x2F;second between process&#x2F;thread withing a SMP CPU group at that time.   For 10 millions msg&#x2F;s, the APIs had 100ns to routed and distributed the msg.        The main issue was none-cache memory access latency especially for &amp;atomic-add variables.    The none-cache memory latency was 50+ns on DDR2 at that time when I measured that on 1.2GHz Xeon.   It was hard to get that performance.<p>I even considered adding and FPGA on PCI&#x2F;PCIe which can mmap to a physical&#x2F;virtual address that will auto increment on every read access to get a very high performance atomic_add.<p>If that same FPGA is mapped to 128,256,1024 cores, one can easily build a very high speed distributed sync message system.   Hopefully for 10+ millions &#x2F; second for 1024 cores.<p>That would be cool!