I&#x27;d have to read and understand the paper to be sure. However, high-level and logic synthesis tools do a job that sounds pretty similar. The Synthagate HLS tool converts [1] an algorithm into automata that are simplified, combined, used to generate data paths, used to generate control paths, integrated, and synthesized into hardware. They have a book [2] on the method that I&#x27;m trying to get HW experts to peer review in interest of imitating (or not) the techniques. Further, there&#x27;s plenty of academics working with neural nets, error correction, and probabilistic systems on FPGA&#x27;s. So, old as it is, elements of his writings might aid modern researchers or just be an interesting look on prior ideas.<p>[1] <a href="http:&#x2F;&#x2F;synthezza.com&#x2F;logic-synthesis-in-synthagate-4&#x2F;" rel="nofollow">http:&#x2F;&#x2F;synthezza.com&#x2F;logic-synthesis-in-synthagate-4&#x2F;</a><p>[2] <a href="http:&#x2F;&#x2F;synthezza.com&#x2F;download&#x2F;AboutUs&#x2F;Book2011.zip" rel="nofollow">http:&#x2F;&#x2F;synthezza.com&#x2F;download&#x2F;AboutUs&#x2F;Book2011.zip</a>