PhilWright and executesorder66 comments are interesting given some things that make Hacker News without such comments. I hope the second paragraph of this article explains things a bit more:<p><a href="https:&#x2F;&#x2F;queue.acm.org&#x2F;detail.cfm?id=1189286" rel="nofollow">https:&#x2F;&#x2F;queue.acm.org&#x2F;detail.cfm?id=1189286</a><p>The people that invented RISC, SPARC and MIPS namely, wrote some books teaching computer architecture that had a large effect on academia, industry, etc. This course is based on their advanced work. You get the information for free. It&#x27;s in PDF form for easy reading. Great to get stuff for free that some people paid a lot of money to learn, eh?<p>Useful too. One just confirmed an idea my past year of HW research had about 180nm being sweet spot for open-source HW efforts: Pentium 4 was done on it albeit full-custom and with Intel level of expertise. Should be able to do plenty at that node in 2015 with application-specific designs. The 130 node required physical verification tied to synthesis but 180-350 might work with Qflow synthesis. Seeing what P4 achieved. I also have an upper bound on what eventual full-custom would likely achieve. I&#x27;m extra confident in my recommendation despite never having built an ASIC. Thanks Thomas. :)