Well, IA64 is not just in-order, but Very Long Instruction Word (VLIW), per Wikipedia a 128 bit instruction had 3 instructions.  If your compiler is not smart enough (hmmm, especially if your language is too low level, like C&#x2F;C++), it sure looks like &quot;just in time&quot; out-of-ordering will beat VLIW in keeping your execution engines running.  And surely caching makes a big difference here.<p>I don&#x27;t know how to compare a MIPS family in-order superscalar with Intel&#x27;s P6 style out-of-order.  ARM out-of-order cores are supposed to be quite a bit faster than their in-order designs in IRL, aren&#x27;t they?