Silicon Austria Labs (SAL) is a top research center for Electronic Based Systems (EBS). At three locations (Graz, Villach, Linz), SAL is conducting research along the entire EBS value chain in the areas of sensor systems, power electronics, RF (radiofrequency) systems, system integration and embedded systems to develop future-oriented solutions for industrial production, health, energy, mobility, safety and more. SAL brings together key players from industry, science and research and thus valuable expertise and know-how and conducts cooperative, application-oriented research along the value chain. Cooperative projects are co-financed by SAL 1 Senior Scientist - Digital/FPGA Design (f/m/d) . YOUR FUTURE RESPONSIBILITIES -Deliver complex digital IPs, meeting schedule, area, power, and performance targets. -Collaborate in developing precise design specifications for digital control blocks. -Implement FSM¿s and other control logic in System Verilog. -Extend RISC-V based software systems by novel hardware accelerators for numerically intensive operations (e.g. ML, PQC) in the context of high performance computing (HPC). -Collaborate with managers and program managers to track progress and gauge functional readiness. -Work with digital verification teams to create verification plans. -Work with laboratory teams to create and verify FPGA based prototypes for HPC computing. -Commitment to writing publications and attendance on relevant conferences. -Leading research projects and participating in acquisition of industry projects and funding grants. YOUR PROFILE -PhD in Electrical Engineering with strong background in digital IC design + min. of 4 years of relevant working experience or MSc in relevant topic + min. 7 years of relevant working experience. -RTL design fundamentals (Verilog and System-Verilog). -Architecture exploration and micro-architecture development. -On Chip Infrastructure (AMBA/PCIe/USB/JTAG,NoC). -Silicon development experience. -Digital IP design/integration experience. -Back-end tool experience (synthesis & Place and Route). -Static Timing Analysis tools. -Clock Domain Crossing. -Functional and formal Verification. -Scripting languages (Tcl, Python, Perl, MATLAB, Shell-scripting). -Experience with EDA tools (simulator/debug/synthesis/timing analysis/place&route) from major vendors (Synopsys/Cadence/Mentor). -Experience with FPGA tools. -Software development skills (bare metal, RISC-V/ARM) is a plus -Excellent oral and written English skills, German is a plus. -Autonomous, well organized and enjoy working in a dynamic and multicultural team. -Good experience in project management. IMPORTANT FACTS ABOUT SAL -Diversified research activities with plenty of technical challenges. -State-of-the-art lab facilities and instruments. -Internal and external training opportunities for further development. -Home Office possible. -€ 4 per day food allowance in restaurants or € 2 per day in supermarkets. -Family & kids friendly. -Free coffee/milk/tea & fresh fruits. -Start of the employment: as soon as possible This position is subject to the Collective Agreement for employees in non-university research (Research CA) starting in occupational group F (F1 salary = EUR 4.226, paid 14 times a year) based on 38,5 hours per week). For this position we offer competitive salaries and additional benefits based on your experience and qualifications, starting with a minimum salary of EUR 70.000 (annual, based on an All-in contract and bonus). BECOME PART OF SILICON AUSTRIA LABS In the network of science and industry, SAL offers research in the areas of Sensor Systems, Intelligent Wireless Systems, Power Electronics and Embedded Systems. SAL -a great place to research. Apply now Das Mindestentgelt für die Stelle als Senior Scientist - Digital/FPGA Design (f/m/d) beträgt 4.226,00 EUR brutto pro Monat auf Basis Vollzeitbeschäftigung. Bereitschaft zur Überzahlung.
Senior Scientist - Digital/FPGA Design (f/m/d)