Looking for the next step in your career? Then join our „Design Enabling and Services“ team in Dresden as an Staff Engineer for Digital Functional Verification (f/m/div). You will elevate your expertise in areas with high security and safety requirements while working in verification projects of all Infineon divisions worldwide. Bring in your experience and build up an expert network across sites and departments! With this position, you will be entering our „technical ladder”: Our career path for experts. You will be able to focus deeply on technology – while further pursuing your career. As you continually expand your expert knowledge, puzzle over matters and solve problems, you will position yourself as a thought leader – thus helping our products improve our world a bit more each day. In your new role you will: · Create and define verification plans in Cadence vManager · Develop verification environments for our ICs using Universal Verification Methodology (UVM) · Implement test scenarios using SystemVerilog and verify functionality using the constrained-random approach · Develop assertions in SystemVerilog for formal verification · Interact with other disciplines, such as System Architecting and Application Engineering, to define verification plans and strategies · Proactively provide support to internal stakeholders of our verification flow environment · Be responsible for well established verification methods Your Profile As a true team player you treat your colleagues with respect and trust. You are precise, highly motivated and keen to develop yourself within a professional, innovative, and multi-cultural environment. You are best equipped for this task if you have: · Successfully completed an university degree in Electrical Engineering, Computer Science or a similar academic discipline · At least 3 years of experience in Metric Driven Verification (digital and optionally mixed-signal) · Capabilities and experience in working with microcontroller-based ICs, as well as with security and safety requirements · Excellent know-how with UVM especially using SystemVerilog · Knowledge in RTL design and firmware
Staff Engineer Digital Functional Verification (f/m/div)* (Softwareentwickler/in)