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Delay calculation. Delay calculation is the term used in integrated circuit design for the calculation of the gate delay of a single logic gate and the wires attached to it. By contrast, static timing analysis computes the delays of entire paths, using delay calculation to determine the delay of each gate and wire.
The typical digital propagation delay of a resistive wire is about half of R times C; since both R and C are proportional to wire length, the delay scales as the square of wire length. Charge spreads by diffusion in such a wire, as explained by Lord Kelvin in the mid nineteenth century.