How long has the Xeon processor been in use for?
Xeon
Introduced in May 2013, Xeon E3-12xx v3 is the first Xeon series based on the Haswell microarchitecture. It uses the new LGA 1150 socket, which was introduced with the desktop Core i5/i7 Haswell processors, incompatible with the LGA 1155 that was used in Xeon E3 and E3 v2. As before, the main difference between the desktop and server versions is added support for ECC memory in the Xeon-branded parts. The main benefit of the new microarchitecture is better power efficiency.
Pentium II
In 1998, Intel stratified the Pentium II family by releasing the Pentium II-based Celeron line of processors for low-end workstations and the Pentium II Xeon line for servers and high-end workstations. The Celeron was characterized by a reduced or omitted (in some cases present but disabled) on-die full-speed L2 cache and a 66 MT/s FSB. The Xeon was characterized by a range of full-speed L2 cache (from 512 KB to 2048 KB), a 100 MT/s FSB, a different physical interface (Slot 2), and support for symmetric multiprocessing.
Celeron
The Celeron P1053 is an embedded processor for Socket 1366 from the "Jasper Forest" family. All other members of this family are known as Xeon C35xx or C55xx. The Jasper Forest chip is closely related to Lynnfield and contains four cores, 8 MB of L3 and a QPI interface, but most of these are disabled in the Celeron version, leaving a single core with 2 MB of L3 cache.
Xenon (processor)
The processor was developed by Microsoft and IBM under the IBM chip program codenamed "Waternoose", which was named after Henry J. Waternoose III in "Monsters, Inc.". The development program was originally announced on 2003-11-03.
Cray
On October 4, 2004, the company announced the Cray XD1 range of entry-level supercomputers which use dual-core 64-bit AMD Opteron CPUs running Linux. This system was previously known as the OctigaBay 12K before Cray's acquisition of that company. The XD1 provided one Xilinx Virtex II Pro field-programmable gate array (FPGA) with each node of four Opteron processors. The FPGAs could be configured to embody various digital hardware designs and could augment the processing or input/output capabilities of the Opteron processors. Furthermore, each FPGA contains a pair of PowerPC 405 processors which can add to the already considerable power of a single node. The Cray XD1, although moderately successful, was eventually discontinued.
Xeon
The first dual-core CPU branded Xeon, codenamed Paxville DP, product code 80551, was released by Intel on October 10, 2005. Paxville DP had NetBurst microarchitecture, and was a dual-core equivalent of the single-core Irwindale (related to the Pentium D branded "Smithfield") with 4 MB of L2 Cache (2 MB per core). The only Paxville DP model released ran at 2.8 GHz, featured an 800 MT/s front side bus, and was produced using a 90 nm process.
Xeon
The 3000 series, codenamed Conroe (product code 80557) dual-core Xeon (branded) CPU, released at the end of September 2006, was the first Xeon for single-CPU operation. The same processor is branded as Core 2 Duo or as Pentium Dual-Core and Celeron, with varying features disabled.
They use LGA 775 (Socket T), operate on a 1066 MHz front-side bus, support Enhanced Intel SpeedStep Technology and Intel Virtualization Technology but do not support Hyper-Threading. Conroe Processors with a number ending in "5" have a 1333 MT/s FSB.The 3100 series, codenamed Wolfdale (product code 80570) dual-core Xeon (branded) CPU, was just a rebranded version of the Intel's mainstream Core 2 Duo E7000/E8000 and Pentium Dual-Core E5000 processors, featuring the same 45 nm process and 6 MB of L2 cache. Unlike most Xeon processors, they only support single-CPU operation. They use LGA 775 (Socket T), operate on a 1333 MHz front-side bus, support Enhanced Intel SpeedStep Technology and Intel Virtualization Technology but do not support Hyper-Threading.
Multiprocessing
Tightly coupled multiprocessor systems contain multiple CPUs that are connected at the bus level. These CPUs may have access to a central shared memory (SMP or UMA), or may participate in a memory hierarchy with both local and shared memory (SM)(NUMA). The IBM p690 Regatta is an example of a high end SMP system. Intel Xeon processors dominated the multiprocessor market for business PCs and were the only major x86 option until the release of AMD's Opteron range of processors in 2004. Both ranges of processors had their own onboard cache but provided access to shared memory; the Xeon processors via a common pipe and the Opteron processors via independent pathways to the system RAM.
Tachyon (software)
Tachyon was originally developed for the Intel iPSC/860, a distributed memory parallel computer based on a hypercube interconnect topology based on the Intel i860, an early RISC CPU with VLIW architecture and . Tachyon was originally written using Intel's proprietary NX message passing interface for the iPSC series, but it was ported to the earliest versions of MPI shortly thereafter in 1995. Tachyon was adapted to run on the Intel Paragon platform using the Paragon XP/S 150 MP at Oak Ridge National Laboratory. The ORNL XP/S 150 MP was the first platform Tachyon supported that combined both large-scale distributed memory message passing among nodes, and shared memory multithreading within nodes. Adaptation of Tachyon to a variety of conventional Unix-based workstation platforms and early clusters followed, including porting to the IBM SP2. Tachyon was incorporated into the PARAFLOW CFD code to allow in-situ volume visualization of supersonic combustor flows performed on the Paragon XP/S at NASA Langley Research Center, providing a significant performance gain over conventional post-processing visualization approaches that had been used previously. Beginning in 1999, support for Tachyon was incorporated into the molecular graphics program VMD, and this began an ongoing period co-development of Tachyon and VMD where many new Tachyon features were added specifically for molecular graphics. Tachyon was used to render the winning image illustration category for the NSF 2004 Visualization Challenge. In 2007, Tachyon added support for ambient occlusion lighting, which was one of the features that made it increasingly popular for molecular visualization in conjunction with VMD. VMD and Tachyon were gradually adapted to support routine visualization and analysis tasks on clusters, and later for large petascale supercomputers. Tachyon was used to produce figures, movies, and the Nature cover image of the atomic structure of the HIV-1 capsid solved by Zhao et al. in 2013, on the Blue Waters petascale supercomputer at NCSA, U. Illinois.
Power Architecture
2005 saw the specifications of the Cell processor, jointly developed by IBM, Sony and Toshiba over a four-year period. Its primary use is for Sony's PlayStation 3. Cell uses a single 64-bit Power Architecture core, and adds 8 independent SIMD cores called SPEs. IBM also revealed the Xenon processor, a tri-core 64-bit processor for use in Microsoft's Xbox 360. With the 32-bit PowerPC based Broadway processor that Nintendo would use for its Wii console, IBM had put Power Architecture processors in all three of the major seventh-generation game consoles.
Xeon
Introduced in June 2015, Xeon E3-12xx v4 is the first Xeon series based on the Broadwell micro architecture. It uses LGA 1150 socket, which was introduced with the desktop Core i5/i7 Haswell processors. As before, the main difference between the desktop and server versions is added support for ECC memory in the Xeon-branded parts. The main benefit of the new microarchitecture is the new lithography process, which results in better power efficiency.
Xenon
Xenon is the preferred propellant for ion propulsion of spacecraft because it has low ionization potential per atomic weight and can be stored as a liquid at near room temperature (under high pressure), yet easily evaporated to feed the engine. Xenon is inert, environmentally friendly, and less corrosive to an ion engine than other fuels such as mercury or caesium. Xenon was first used for satellite ion engines during the 1970s. It was later employed as a propellant for JPL's Deep Space 1 probe, Europe's SMART-1 spacecraft and for the three ion propulsion engines on NASA's Dawn Spacecraft.
X86
There have been several attempts, including by Intel itself, to end the market dominance of the "inelegant" x86 architecture designed directly from the first simple 8-bit microprocessors. Examples of this are the iAPX 432 (a project originally named the "Intel 8800"), the Intel 960, Intel 860 and the Intel/Hewlett-Packard Itanium architecture. However, the continuous refinement of x86 microarchitectures, circuitry and semiconductor manufacturing would make it hard to replace x86 in many segments. AMD's 64-bit extension of x86 (which Intel eventually responded to with a compatible design) and the scalability of x86 chips such as the eight-core Intel Xeon and 12-core AMD Opteron is underlining x86 as an example of how continuous refinement of established industry standards can resist the competition from completely new architectures.
Advanced Comprehensive Operating System
In late September 2012, NEC announced a return from IA-64 to the previous NOAH line of proprietary mainframe processors for ACOS-4, now produced in a quad-core variant on 40 nm, called NOAH-6.
ACOS-2 runs on Intel Xeon servers.
Silicon Graphics
Although SGI continued to market Itanium-based machines, its more recent machines were based on the Intel Xeon processor. The first Altix XE systems were relatively low-end machines, but by December 2006 the XE systems were more capable than the Itanium machines by some measures (e.g., power consumption in FLOPS/W, density in FLOPS/m, cost/FLOPS). The XE1200 and XE1300 servers used a cluster architecture. This was a departure from the pure NUMA architectures of the earlier Itanium and MIPS servers.
ARM architecture
The "Advanced SIMD" extension (aka "NEON" or "MPE" Media Processing Engine) is a combined 64- and 128-bit SIMD instruction set that provides standardized acceleration for media and signal processing applications. NEON is included in all Cortex-A8 devices, but is optional in Cortex-A9 devices. NEON can execute MP3 audio decoding on CPUs running at 10 MHz, and can run the GSM adaptive multi-rate (AMR) speech codec at 13 MHz. It features a comprehensive instruction set, separate register files, and independent execution hardware. NEON supports 8-, 16-, 32-, and 64-bit integer and single-precision (32-bit) floating-point data and SIMD operations for handling audio and video processing as well as graphics and gaming processing. In NEON, the SIMD supports up to 16 operations at the same time. The NEON hardware shares the same floating-point registers as used in VFP. Devices such as the ARM Cortex-A8 and Cortex-A9 support 128-bit vectors, but will execute with 64 bits at a time, whereas newer Cortex-A15 devices can execute 128 bits at a time.
Athlon 64
The Athlon architecture was further extended with the release of Athlon Neo processors on January 9, 2009. Based on the same architecture as the other Athlon 64 variants, the new processor features a small package footprint targeting Ultra-portable notebook market.
There are four variants: "Athlon 64", "Athlon 64 FX", "Mobile Athlon 64" (later renamed "Turion 64") and the dual-core "Athlon 64 X2". Common among the Athlon 64 line are a variety of instruction sets including MMX, 3DNow!, SSE, SSE2, and SSE3. All Athlon 64s also support the NX bit, a security feature named "Enhanced Virus Protection" by AMD. And as implementations of the AMD64 architecture, all Athlon 64 variants are able to run 16 bit, 32 bit x86, and AMD64 code, through two different modes the processor can run in: "Legacy mode" and "long mode". Legacy mode runs 16-bit and 32-bit programs natively, and long mode runs 64-bit programs natively, but also allows for 32-bit programs running inside a 64-bit operating system. All Athlon 64 processors feature 128 Kilobytes of level 1 cache, and at least 512 KB of level 2 cache.
Xeon
Westmere-EX is the follow-on to Beckton/Nehalem-EX and the first Intel Chip to have ten CPU cores. The microarchitecture is the same as in the six-core Gulftown/Westmere-EP processor, but it uses the LGA 1567 package like Beckton to support up to eight sockets.
Xeon
Announced on September 15, 2008.
Itanium
The "Tukwila" Itanium processor model had been designed to share a common chipset with the Intel Xeon processor EX (Intel's Xeon processor designed for four processor and larger servers). The goal was to streamline system development and reduce costs for server OEMs, many of which develop both Itanium- and Xeon-based servers. However, in 2013, this goal was pushed back to "evaluated for future implementation opportunities".
Xeon
Jasper Forest is a Nehalem-based embedded processor with PCI Express connections on-die, core counts from 1 to 4 cores and power envelopes from 23 to 85 watts.
Intel Xeon chipsets
The Pentium III Xeon bus protocol allowed four processors on the same bus, so the 440GX AGPset could be used in four-CPU systems; the limit of 2GB of main memory remained. These support Slot 2.
Pentium Pro
The Pentium Pro is a sixth-generation x86 microprocessor developed and manufactured by Intel introduced in November 1, 1995. It introduced the P6 microarchitecture (sometimes referred to as i686) and was originally intended to replace the original Pentium in a full range of applications. While the Pentium and Pentium MMX had 3.1 and 4.5 million transistors, respectively, the Pentium Pro contained 5.5 million transistors. Later, it was reduced to a more narrow role as a server and high-end desktop processor and was used in supercomputers like ASCI Red, the first computer to reach the teraFLOPS performance mark. The Pentium Pro was capable of both dual- and quad-processor configurations. It only came in one form factor, the relatively large rectangular Socket 8. The Pentium Pro was succeeded by the Pentium II Xeon in 1998.
Enriched Xenon Observatory
In August 2011, EXO-200 was the first experiment to observe double beta decay of Xe, with a half life of 2.11×10 years. This is the slowest directly observed process. An improved half life of 2.165 ±0.016(stat) ±0.059(sys) × 10 years was published in 2014. EXO set a limit on neutrinoless beta decay of 1.6×10 years in 2012. A revised analysis of run 2 data with 100 kg·yr exposure, reported in the June issue of "Nature" reduced the limits on half-life to 1.1×10 yr, and mass to 450 meV. This was used to confirm the power of the design and validate the proposed expansion.
X86-64
The first processor to implement Intel 64 was the multi-socket processor Xeon code-named "Nocona" in June 2004. In contrast, the initial Prescott chips (February 2004) did not enable this feature. Intel subsequently began selling Intel 64-enabled Pentium 4s using the E0 revision of the Prescott core, being sold on the OEM market as the Pentium 4, model F. The E0 revision also adds eXecute Disable (XD) (Intel's name for the NX bit) to Intel 64, and has been included in then current Xeon code-named "Irwindale". Intel's official launch of Intel 64 (under the name EM64T at that time) in mainstream desktop processors was the N0 stepping Prescott-2M.
History of personal computers
In 2013, a Xeon Phi extension card is released with 57 x86 cores, at a price of $1695, equalling circa 30 dollars per core.
Xeon
The 7200 series, codenamed Tigerton (product code 80564) is an MP-capable processor, similar to the 7300 series, but, in contrast, only one core is active on each silicon chip and the other one is disabled, resulting in a dual-core processor.
Hyper-threading
Intel implemented hyper-threading on an x86 architecture processor in 2002 with the Foster MP-based Xeon. It was also included on the 3.06 GHz Northwood-based Pentium 4 in the same year, and then remained as a feature in every Pentium 4 HT, Pentium 4 Extreme Edition and Pentium Extreme Edition processor since. Previous generations of Intel's processors based on the Core microarchitecture do not have Hyper-Threading, because the Core microarchitecture is a descendant of the P6 microarchitecture used in iterations of Pentium since the Pentium Pro through the Pentium III and the Celeron (Covington, Mendocino, Coppermine and Tualatin-based) and the Pentium II Xeon and Pentium III Xeon models.
Sun Fire
Since late 2010, Oracle Corporation no longer uses Sun Fire brand for their current T series SPARC servers, and since mid-2012 for new X series x86-64 machines based on Intel Xeon CPUs. x86-64 server models which had been developed by Sun Microsystems before its acquisition, and were still in production, have all been rebranded as Sun Server X-series.
Celeron
Introduced in April 1998, the first Celeron branded CPU was based on the Pentium II. Subsequent Celeron branded CPUs were based on the Pentium III, Pentium 4, Pentium M, and Intel Core. The latest Celeron design () is based on the seventh generation Core i3/i5/i7 series (Kaby Lake). This design features independent processing cores (CPUs), but with only 66% as much cache memory as the comparable Core i3 offering.
Xeon
To improve this situation, Intel released another version, officially also named "Cascades", but often referred to as "Cascades 2 MB". That came in two variants: with 1 MB or 2 MB of L2 cache. Its bus speed was fixed at 100 MHz, though in practice the cache was able to offset this. The product code for Cascades mirrored that of "Coppermine"; 80526.
Pentium
In 2000, Intel introduced a new microarchitecture named "NetBurst", with a much longer pipeline enabling higher clock frequencies than the P6-based processors. Initially, these were named "Pentium 4", and the high-end versions have since been named simply Xeon. As with Pentium III, there are both "Mobile Pentium 4" and "Pentium 4 M" processors for the laptop market, with Pentium 4 M denoting the more power-efficient versions. Enthusiast versions of the Pentium 4 with the highest clock rates were named "Pentium 4 Extreme Edition".
Mac Pro
The 2009 and later Mac Pro systems were available with one or two central processing units (CPU) with options giving four, six, eight, or twelve cores. As an example, the eight core standard configuration Mac Pro uses two Quad core ×8 Intel E5620 Xeon CPUs at 2.4 GHz, but could be configured with two Hexa Core Intel Xeon X5670 CPUs at 2.93 GHz. The 2008-2009 model CPUs use the LGA 771 socket, while the 2010 and later use the LGA 1366 socket, meaning either can be removed and replaced with compatible 64-bit Intel Xeon CPUs; however, it should be noted that as a 64-bit EFI firmware was not introduced until the MacPro3,1, earlier models can only operate as 32-bit despite having 64-bit Xeon processors. The newer LGA 1366 sockets utilize Intel's QuickPath Interconnect (QPI) integrated into the CPU in lieu of an independent system bus; this means the "bus" frequency is relative to the CPU chipset, and upgrading a CPU is not bottlenecked by the computer's existing architecture.
Xenon
Some radioactive isotopes of xenon (for example, Xe and Xe) are produced by neutron irradiation of fissionable material within nuclear reactors. Xe is of considerable significance in the operation of nuclear fission reactors. Xe has a huge cross section for thermal neutrons, 2.6×10 barns, and operates as a neutron absorber or "poison" that can slow or stop the chain reaction after a period of operation. This was discovered in the earliest nuclear reactors built by the American Manhattan Project for plutonium production. However, the designers had made provisions in the design to increase the reactor's reactivity (the number of neutrons per fission that go on to fission other atoms of nuclear fuel).
Xe reactor poisoning was a major factor in the Chernobyl disaster. A shutdown or decrease of power of a reactor can result in buildup of Xe, with reactor operation going into a condition known as the iodine pit.
512-bit
There are currently no mainstream general-purpose processors built to operate on 512-bit integers or addresses, though a number of processors do operate on 512-bit data. , the Intel Xeon Phi has a vector processing unit with 512-bit vector registers, each one holding sixteen 32-bit elements or eight 64-bit elements, and a single instruction can operate on all these values in parallel. However, the Xeon Phi's vector processing unit does not operate on individual numbers that are 512 bits in length.
Xeon
Most models have a 1333 MT/s FSB, except for the 5110 and 5120, which have a 1066 MT/s FSB. The fastest processor (5160) operates at 3.0 GHz. All Woodcrests use LGA 771 and all except two models have a TDP of 65 W. The 5160 has a TDP of 80 W and the 5148LV (2.33 GHz) has a TDP of 40 W. The previous generation Xeons had a TDP of 130 W. All models support Intel 64 (Intel's x86-64 implementation), the XD bit, and Virtualization Technology, with the Demand-based switching power management option only on Dual-Core Xeon 5140 or above. Woodcrest has 4 MB of shared L2 Cache.
Xeon
On May 23, 2006, Intel released the dual-core CPU (Xeon branded 5000 series) codenamed Dempsey (product code 80555). Released as the Dual-Core Xeon 5000-series, Dempsey is a NetBurst microarchitecture processor produced using a 65 nm process, and is virtually identical to Intel's "Presler" Pentium Extreme Edition, except for the addition of SMP support, which lets Dempsey operate in dual-processor systems. Dempsey ranges between 2.50 GHz and 3.73 GHz (model numbers 5020–5080). Some models have a 667 MT/s FSB, and others have a 1066 MT/s FSB. Dempsey has 4 MB of L2 Cache (2 MB per core). A Medium Voltage model, at 3.2 GHz and 1066 MT/s FSB (model number 5063), has also been released. Dempsey also introduces a new interface for Xeon processors: LGA 771, also known as Socket J. Dempsey was the first Xeon core in a long time to be somewhat competitive with its Opteron-based counterparts, although it could not claim a decisive lead in any performance metric – that would have to wait for its successor, the Woodcrest.
History of personal computers
In 2003, AMD shipped its 64-bit based microprocessor line for desktop computers, Opteron and Athlon 64. Also in 2003, IBM released the 64-bit based PowerPC 970 for Apple's high-end Power Mac G5 systems. Intel, in 2004, reacted to AMD's success with 64-bit based processors, releasing updated versions of their Xeon and Pentium 4 lines. 64-bit processors were first common in high end systems, servers and workstations, and then gradually replaced 32-bit processors in consumer desktop and laptop systems since about 2005.
Pleiades (supercomputer)
In late 2014, more Westmere nodes were removed to make room for new Intel Xeon Haswell processors, increasing the theoretical processing power by one petaflop to 4.49 petaflops. In January 2015, additional Haswell nodes were installed and released to users, giving Pleiades a new peak theoretical processing capacity of 5.35 petaflops. An upgrade, completed in June 2016, replaced all remaining racks containing nodes with six-core Intel Xeon X5670 (Westmere) processors with racks containing nodes using 14-core Intel Xeon E5-2680v4 (Broadwell) processors. This improved the theoretical peak performance to 7.25 petaflops.
Lexicon Branding
Intel hired Lexicon again in 1998 to name the Celeron and Xeon chips. The "San Jose Mercury News" described Lexicon's reasoning behind the former name: "Celer is Latin for swift. As in 'accelerate.' And 'on.' As in 'turned on.' Celeron is seven letters and three syllables, like Pentium. The 'Cel' of Celeron rhymes with 'tel' of Intel." Placek told the "San Francisco Chronicle" said that the "X" of "Xeon" evokes "the next generation", "eon" refers to the long period of time, and the novelty of the name as a whole reflects the product's novelty. It also was supposed to recall "Pentium's Greek roots".
Xserve
On January 8, 2008 Xserve was updated to use Intel Xeon ('Harpertown') processors faster memory, and a maximum storage capacity of 3 TB when used with three 1 TB drives. The front-mounted FireWire 400 port featured in previous models was also replaced with a USB 2.0 port. The Xserve RAID was discontinued on February 19, 2008.
Xeon
The Xeon E7 v2 line was an update, released in February 2014 to replace the original Xeon E7 processors with a variant based on the Ivy Bridge shrink. There was no Sandy Bridge version of these processors.
Xeon
Dunnington – the last CPU of the Penryn generation and Intel's first multi-core (above two) die – features a single-die six- (or "hexa-") core design with three unified 3 MB L2 caches (resembling three merged 45 nm dual-core Wolfdale dies), and 96 kB L1 cache (Data) and 16 MB of L3 cache. It features 1066 MHz FSB, fits into the Tigerton's mPGA604 socket, and is compatible with both the Intel Caneland and IBM X4 chipsets. These processors support DDR2-1066 (533 MHz), and have a maximum TDP below 130 W. They are intended for blades and other stacked computer systems. Availability was scheduled for the second half of 2008. It was followed shortly by the Nehalem microarchitecture. Total transistor count is 1.9 billion.
Xeon Phi
On November 12, 2012, Intel announced two Xeon Phi coprocessor families using the 22 nm process size: the Xeon Phi 3100 and the Xeon Phi 5110P. The Xeon Phi 3100 will be capable of more than 1 teraFLOPS of double precision floating point instructions with 240 Gbit/s memory bandwidth at 300 W. The Xeon Phi 5110P will be capable of 1.01 teraFLOPS of double precision floating point instructions with 320 Gbit/s memory bandwidth at 225 W. The Xeon Phi 7120P will be capable of 1.2 teraFLOPS of double precision floating point instructions with 352 Gbit/s memory bandwidth at 300 W.
Xeon
The Xeon E5 v2 line was an update, released in September 2013 to replace the original Xeon E5 processors with a variant based on the Ivy Bridge shrink. The maximum number of CPU cores was raised to 12 per processor module and the total L3 cache was upped to 30 MB.
The consumer version of the Xeon E5-16xx v2 processor is the Core i7-48xx and 49xx.
Xeon
One of the new features of this generation is that Xeon E5 v3 models with more than 10 cores support cluster on die (COD) operation mode, allowing CPU's multiple columns of cores and LLC slices to be logically divided into what is presented as two non-uniform memory access (NUMA) CPUs to the operating system. By keeping data and instructions local to the "partition" of CPU which is processing them, thus decreasing the LLC access latency, COD brings performance improvements to NUMA-aware operating systems and applications.
Victim cache
Processor performance and frequency has grown rapidly over the past three decades. Post mid-1980's it has grown by 52% annually largely driven by organisational and architectural ideas. 64-bit Intel Xeon processor (2004) can clock at 3.6 GHz thus having a cycle time of 0.27 ns. Memory cycle time however has not grown at this fast rate. This has resulted in processor cycle times being currently much faster than memory cycle times, and the trend has been for this gap to increase over time. The problem of increasing memory latency, relative to processor speed, has been dealt with by adding high speed cache memory.
Merom (microprocessor)
"Merom" is the code name for various Intel processors that are sold as Core 2 Duo, Core 2 Solo, Pentium Dual-Core and Celeron. It was the first mobile processor to be based on the Core microarchitecture, replacing the Enhanced Pentium M based Yonah processor. Merom has the product code 80537, which is shared with "Merom-2M" and "Merom-L" that are very similar but have a smaller L2 cache. Merom-L has only one processor core and a different CPUID model. The desktop version of Merom is Conroe and the dual-socket server version is Woodcrest. Merom was manufactured in a 65 nanometer process, and was succeeded by Penryn, a 45 nm version of the Merom architecture. Together, Penryn and Merom represented the first 'tick-tock' in Intel's Tick-Tock manufacturing paradigm, in which Penryn was the 'tick' (new process) to Merom's 'tock' (new architecture).
Xeon
64-bit Xeon MPs were introduced in April 2005. The cheaper "Cranford" was an MP version of "Nocona", while the more expensive "Potomac" was a "Cranford" with 8 MB of L3 cache. Like Nocona and Irwindale, they also have product code 80546.
Socket 603
Socket 603 is a motherboard socket for Intel's Xeon processor.
Xserve
On April 7, 2009 Xserve was updated to use Intel Xeon ('Gainestown') processors DDR3 memory, and NVIDIA graphics with Mini DisplayPort output. The update also saw an increase to the maximum storage capacity, bringing it to 6 TB when used with three 2 TB drives. An option to add a SSD boot-drive that does not occupy a drive bay was also implemented. The addition of the SSD boot drive allows all drives to be swapped whilst the server remains online. It is also Apple's first Xserve to use PVC-free internal cables and components and contain no brominated flame retardants.
Xenon (processor)
The XCPU processors are manufactured at IBM's East Fishkill, New York fabrication plant and Chartered Semiconductor Manufacturing (now part of GlobalFoundries) in Singapore. Chartered reduced the fabrication process in 2007 to 65 nm from 90 nm, thus reducing manufacturing costs for Microsoft.The Xbox 360 S introduced the XCGPU, which integrated the Xenon CPU and the Xenos GPU onto the same die, and the eDRAM into the same package. The XCGPU follows the trend started with the integrated EE+GS in PlayStation 2 Slimline, combining CPU, GPU, memory controllers and IO in a single cost-reduced chip. It also contains a "front side bus replacement block" that connects the CPU and GPU internally in exactly the same manner as the front side bus would have done when the CPU and GPU were separate chips, so that the XCGPU doesn't change the hardware characteristics of the Xbox 360.
Itanium
Rumors of a successor to Poulson (code named "Kittson") began to circulate in 2012–2013. This was at first associated with a forthcoming 22 nm process shrink, and later revised in the face of declining Itanium sales to a less-ambitious 32 nm node. In April 2015, Intel, although it had not yet confirmed formal specifications, did confirm that it continued to work on the project. Meanwhile, the aggressively multicore Xeon E7 platform displaced Itanium-based solutions in the Intel roadmap.
LGA 771
It was succeeded by LGA 1366 for the Nehalem-based Xeon processors.
Xeon Phi
In June 2012, ScaleMP announced a virtualization update allowing Xeon Phi as a transparent processor extension, allowing legacy MMX/SSE code to run without code changes.
An important component of the Intel Xeon Phi coprocessor's core is its vector processing unit (VPU).
The VPU features a novel 512-bit SIMD instruction set, officially known as Intel Initial Many Core Instructions (Intel IMCI). Thus, the VPU can execute 16 single-precision (SP) or 8 double-precision (DP) operations per cycle. The VPU also supports Fused Multiply-Add (FMA) instructions and hence can execute 32 SP or 16 DP floating point operations per cycle. It also provides support for integers.
The VPU also features an Extended Math Unit (EMU) that can execute operations such as reciprocal, square root, and logarithm, thereby allowing these operations to be executed in a vector fashion with high bandwidth. The EMU operates by calculating polynomial approximations of these functions.
Xeon
A slightly updated core called "Irwindale" was released in early 2005, with 2 MB L2 cache and the ability to have its clock speed reduced during low processor demand. Although it was a bit more competitive than the "Nocona" had been, independent tests showed that AMD's Opteron still outperformed "Irwindale". Both of these Prescott-derived Xeons have the product code 80546.
Xeon
The Xeon E5-16xx processors follow the previous Xeon 3500/3600-series products as the high-end single-socket platform, using the LGA 2011 package introduced with this processor. They share the Sandy Bridge-E platform with the single-socket Core i7-38xx and i7-39xx processors. The CPU chips have no integrated GPU but eight CPU cores, some of which are disabled in the entry-level products. The Xeon E5-26xx line has the same features but also enables multi-socket operation like the earlier Xeon 5000-series and Xeon 7000-series processors.
Itanium
In March 2005, Intel announced that it was working on a new Itanium processor, codenamed "Tukwila", to be released in 2007. Tukwila would have four processor cores and would replace the Itanium bus with a new Common System Interface, which would also be used by a new Xeon processor.
Later that year, Intel revised Tukwila's delivery date to late 2008.
Xeon
The Xeon E3-12xx line of processors, introduced in April 2011, uses the Sandy Bridge chips that are also the base for the Core i3/i5/i7-2xxx and Celeron/Pentium Gxxx products using the same LGA 1155 socket, but with a different set of features disabled. Notably, the Xeon variants include support for ECC memory, VT-d and trusted execution that are not present on the consumer models, while only some Xeon E3 enable the integrated GPU that is present on Sandy Bridge. Like its Xeon 3400-series predecessors, the Xeon E3 only supports operation with a single CPU socket and is targeted at entry-level workstations and servers. The CPUID of this processor is 0206A7h, the product code is 80623.
Xeon Phi
On June 17, 2013, the Tianhe-2 supercomputer was announced by TOP500 as the world's fastest. Tianhe-2 used Intel Ivy Bridge Xeon and Xeon Phi processors to achieve 33.86 petaFLOPS. It was the fastest on the list for two and a half years, lastly in November 2015.
Xeon Phi
Intel announced the product discontinuance during Summer 2018
Xeon
On June 26, 2006, Intel released the dual-core CPU (Xeon branded 5100 series) codenamed Woodcrest (product code 80556); it was the first Intel Core microarchitecture processor to be launched on the market. It is a server and workstation version of the Intel Core 2 processor. Intel claims that it provides an 80% boost in performance, while reducing power consumption by 20% relative to the Pentium D.
Xenon (processor)
The processor is based on IBM PowerPC instruction set architecture. It consists of three independent processor cores on a single die. These cores are slightly modified versions of the PPE in the Cell processor used on the PlayStation 3. Each core has two symmetric hardware threads (SMT), for a total of six hardware threads available to games. Each individual core also includes 32 KiB of L1 instruction cache and 32 KiB of L1 data cache.
Xeon
The uni-processor version without QPI comes as LC35xx and EC35xx, while the dual-processor version is sold as LC55xx and EC55xx and uses QPI for communication between the processors. Both versions use a DMI link to communicate with the 3420 that is also used in the 3400-series Lynfield Xeon processors, but use an LGA 1366 package that is otherwise used for processors with QPI but no DMI or PCI Express links. The CPUID code of both Lynnfield and Jasper forest is 106Ex, i.e., family 6, model 30.
Xenon difluoride
Xenon difluoride is also used as an isotropic gaseous etchant for silicon, particularly in the production of microelectromechanical systems, (MEMS),
as first demonstrated in 1995. Commercial
systems use pulse etching with an expansion chamber
Xeon
On March 14, 2006, Intel released a dual-core processor codenamed Sossaman and branded as "Xeon" LV (low-voltage). Subsequently, an ULV (ultra-low-voltage) version was released. The "Sossaman" was a low-/ultra-low-power and double-processor capable CPU (like AMD Quad FX), based on the ""Yonah"" processor, for ultradense non-consumer environment (i.e., targeted at the blade-server and embedded markets), and was rated at a thermal design power (TDP) of 31 W (LV: 1.66 GHz, 2 GHz and 2.16 GHz) and 15 W (ULV: 1.66 GHz). As such, it supported most of the same features as earlier Xeons: Virtualization Technology, 667 MT/s front side bus, and dual-core processing, but did not support 64-bit operations, so it could not run 64-bit server software, such as Microsoft Exchange Server 2007, and therefore was limited to 16 GB of memory. A planned successor, codenamed ""Merom MP"" was to be a drop-in upgrade to enable "Sossaman"-based servers to upgrade to 64-bit capability. However, this was abandoned in favour of low-voltage versions of the "Woodcrest LV" processor leaving the "Sossaman" at a dead-end with no upgrade path.
Xeon Phi
Initially in the form of PCIe-based add-on cards, a second generation product, codenamed "Knights Landing", was announced in June 2013. These second generation chips could be used as a standalone CPU, rather than just as an add-in card.
In June 2013, the Tianhe-2 supercomputer at the National Supercomputer Center in Guangzhou (NSCC-GZ) was announced as the world's fastest supercomputer (, it is ). It uses Intel Xeon Phi coprocessors and Ivy Bridge-EP Xeon processors to achieve 33.86 petaFLOPS.
Xeon
At low end of the 3400-series is not a Lynnfield but a Clarkdale processor, which is also used in the Core i3-500 and Core i5-600 processors as well as the Celeron G1000 and G6000 Pentium series. A single model was released in March 2010, the Xeon L3406. Compared to all other Clarkdale-based products, this one does not support integrated graphics, but has a much lower thermal design power of just 30 W. Compared to the Lynnfield-based Xeon 3400 models, it only offers two cores.
Pentium
Pentium is a brand used for a series of x86 architecture-compatible microprocessors produced by Intel since 1993. In their form , Pentium processors are considered entry-level products that Intel rates as "two stars", meaning that they are above the low-end Atom and Celeron series, but below the faster Core i3, i5, i7, i9, and high-end Xeon series.
Ivy Bridge (microarchitecture)
Both Core-i7 and Xeon versions are produced: the Xeon versions marketed as Xeon E5-1400 V2 act as drop-in replacements for the existing Sandy Bridge-EN based Xeon E5, Xeon E5-2600 V2 versions act as drop-in replacements for the existing Sandy Bridge-EP based Xeon E5, while Core-i7 versions designated i7-4820K, i7-4930K and i7-4960X were released on September 10, 2013, remaining compatible with the X79 and LGA 2011 hardware.
Xeon
Intel Xeon is a distinct product line from the similarly-named Intel Xeon Phi. The first-generation Xeon Phi is a completely different type of device more comparable to a graphics card; it is designed for a PCI Express slot and is meant to be used as a multi-core coprocessor, like the Nvidia Tesla. In the second generation, Xeon Phi evolved into a main processor more similar to the Xeon. It conforms to the same socket as a Xeon processor and is x86-compatible; however, as compared to Xeon, the design point of the Xeon Phi emphasizes more cores with higher memory bandwidth.
Xbox 360
Known during development as Xbox Next, Xenon, Xbox 2, Xbox FS or NextBox, the Xbox 360 was conceived in early 2003. In February 2003, planning for the Xenon software platform began, and was headed by Microsoft's Vice President J Allard. That month, Microsoft held an event for 400 developers in Bellevue, Washington to recruit support for the system. Also that month, Peter Moore, former president of Sega of America, joined Microsoft. On August 12, 2003, ATI signed on to produce the graphic processing unit for the new console, a deal which was publicly announced two days later. Before the launch of the Xbox 360, several Alpha development kits were spotted using Apple's Power Mac G5 hardware. This was because the system's PowerPC 970 processor running the same PowerPC architecture that the Xbox 360 would eventually run under IBM's Xenon processor. The cores of the Xenon processor were developed using a slightly modified version of the PlayStation 3's Cell Processor PPE architecture. According to David Shippy and Mickie Phipps, the IBM employees were "hiding" their work from Sony and Toshiba, IBM's partners in developing the Cell Processor. Jeff Minter created the music visualization program Neon which is included with the Xbox 360.
Xeon Phi
Code name for the second generation MIC architecture product from Intel. Intel officially first revealed details of its second generation Intel Xeon Phi products on June 17, 2013. Intel said that the next generation of Intel MIC Architecture-based products will be available in two forms, as a coprocessor or a host processor (CPU), and be manufactured using Intel's 14 nm process technology. Knights Landing products will include integrated on-package memory for significantly higher memory bandwidth.
AmigaOne X1000
The specifications from A-EON Technology's website:The 'Xena' coprocessor is an XMOS XCore MCU integrated on the X1000 motherboard and connected a non-standard expansion slot, called the 'Xorro' slot, named after the Zorro bus used in the Commodore Amiga. However, it uses a PCI-express like connector, using a custom I/O layout. 
The XMOS processor is connected to the local CPU bus in addition to the Xorro slot, allowing timing critical custom hardware to be controlled by the I/O optimized XCore without loading the main processor.
Nuclear reactor physics
Short-lived reactor poisons in fission products strongly affect how nuclear reactors can operate. Unstable fission product nuclei transmute into many different elements ("secondary fission products") as they undergo a decay chain to a stable isotope. The most important such element is xenon, because the isotope Xe, a secondary fission product with a half-life of about 9 hours, is an extremely strong neutron absorber. In an operating reactor, each nucleus of Xe becomes Xe (which may later sustain beta decay) by neutron capture almost as soon as it is created, so that there is no buildup in the core. However, when a reactor shuts down, the level of Xe builds up in the core for about 9 hours before beginning to decay. The result is that, about 6–8 hours after a reactor is shut down, it can become physically impossible to restart the chain reaction until the Xe has had a chance to decay over the next several hours. This temporary state, which may last several days and prevent restart, is called the iodine pit or xenon-poisoning. It is one reason why nuclear power reactors are usually operated at an even power level around the clock.
List of CPU power dissipation figures
Released in 2007, the Phenom was AMD's highest-end line of processors until the launch of the Phenom II. They were AMD's first processors to be based on the K10 microarchitecture, so they introduced a plethora of new features, including 2 MB of L3 Cache, a faster HyperTransport link, a 128-bit FPU, an integrated memory controller that supports DDR2-1066 (PC2-8500) memory and were manufactured at a 65 nm process for the first time. AMD claims the Phenom X4 to be the first "true" quad-core processor, because it uses a monolithic die design rather than the multi-chip-module design used by the Core 2 Quad and quad-core Core 2 Extreme processors. Suffixes: B=Business class, e=energy efficient, Black Edition=unlocked clock multiplier.
Xeon
Introduced in October 2015, Xeon E3-12xx v5 is the first Xeon series based on the Skylake microarchitecture. It uses new LGA 1151 socket, which was introduced with the desktop Core i5/i7 Skylake processors. Although it uses the same socket as consumer processors, it is limited to the C200 server chipset series and will not work with consumer chipsets like Z170. As before, the main difference between the desktop and server versions is added support for ECC memory in the Xeon-branded parts.
Xeon
Introduced in September 2014, Xeon E5-16xx v3 and Xeon E5-26xx v3 series use the new LGA 2011-v3 socket, which is incompatible with the LGA 2011 socket used by earlier Xeon E5 and E5 v2 generations based on Sandy Bridge and Ivy Bridge microarchitectures. Some of the main benefits of this generation, compared to the previous one, are improved power efficiency, higher core counts, and bigger last level caches (LLCs). Following the already used nomenclature, Xeon E5-26xx v3 series allows dual-socket operation.
Xeon
Gulftown or Westmere-EP, a six-core 32 nm architecture Westmere-based processor, is the basis for the Xeon 36xx and 56xx series and the Core i7-980X. It launched in the first quarter of 2010. The 36xx-series follows the 35xx-series Bloomfield uni-processor model while the 56xx-series follows the 55xx-series Gainestown dual-processor model and both are socket compatible to their predecessors.
Intel
In July 2011, Intel announced that its server chips, the Xeon series, will use new sensors that can improve data center cooling efficiency.
Cheyenne (supercomputer)
Cheyenne is an SGI ICE XA system with 4,032 dual-socket scientific computation nodes running 18-core 2.3-GHz Intel Xeon E5-2697v4 processors with 203 [now 315] terabytes of memory. Interconnecting these nodes is a Mellanox EDR InfiniBand network with 9-D enhanced hypercube topology that performs with a latency of only 0.5 microsecond. Cheyenne runs the SUSE Linux Enterprise Server 12 SP1 operating system.
Cray XC30
The Cray XC30 is a massively parallel multiprocessor supercomputer manufactured by Cray. It consists of Intel Xeon processors, with optional Nvidia Tesla or Xeon Phi accelerators, connected together by Cray's proprietary "Aries" interconnect, stored in air-cooled or liquid-cooled cabinets. Each liquid-cooled cabinet can contain up to 48 blades, each with eight CPU sockets, and uses 90 kW of power. The XC series supercomputers are available with the Cray DataWarp applications I/O accelerator technology.
Xenon-135
Xenon-135 (Xe) is an unstable isotope of xenon with a half-life of about 9.2 hours. Xe is a fission product of uranium and it is the most powerful known neutron-absorbing nuclear poison (2 million barns; up to 3 million barns under reactor conditions.), with a significant effect on nuclear reactor operation. The ultimate yield of xenon-135 from fission is 6.3%, though most of this is from fission-produced tellurium-135 and iodine-135.
LG Xenon (GR500)
The LG Xenon comes in black, blue, red, and purple. It runs on an OS similar to its predecessor the LG Vu, and has a slide out QWERTY keyboard and resistive touch screen. Its keyboard has dedicated buttons for text and email messages. When opened, the phone is viewed in a wider aspect than when closed. A lock button on the right side allows the phone to be used while it is not open. The default themes are white with blue outlining, and black with red outlining.
Intel Xeon chipsets
In August 1999 Intel began shipping the Profusion PCIset. The chipset was based on technology developed by the Corollary company, which Intel acquired. It supported up to 8 Pentium III Xeon processors on two busses and maintained cache coherency between them. Profusion supported up to 32 GB of memory. It saw some limited competition from the NEC Aqua II chipset. Another minor player in the eight-way space was Axil Computer's NX801, which was used in an 8-way (two buses) Pentium Pro design, commercialized by Data General as their AV-8600 computer.
HTC One X
The HTC One X for North America has been carried in Canada since and the United States since by Rogers and AT&T respectively. It is 0.4 mm longer than the international model, and features a 1.5 GHz dual-core Qualcomm Snapdragon S4 (MSM8960) SoC with an integrated on-die LTE (4G) modem instead of the Nvidia Tegra 3 which requires an external modem and is LTE-incompatible, and 16 GB of internal storage instead of 32 GB. Benchmarks have shown the battery life of the North American One X to be marginally better than the international model for various common tasks, except for web browsing where the North American model placed 15-30% better. This is primarily due to a smaller manufacturing process, 28 nm, of the Snapdragon S4 SoC compared to 40 nm for the Nvidia Tegra 3 inside the international HTC One X. AT&T cites incompatibility between Nvidia's Tegra 3 processor and LTE radios currently available on the market as the reason for the difference in processors.
HP Superdome
In 2016, Hewlett Packard Enterprise released the Superdome X, which is based on Intel Xeon processors.
Xenon (processor)
Microsoft XCPU, codenamed Xenon, is a CPU used in the Xbox 360 game console, to be used with ATI's Xenos graphics chip.
Opteron
In a variety of computing benchmarks, the Opteron architecture has demonstrated better multi-processor scaling than the Intel Xeon which didn't have a point to point system until QPI and integrated memory controllers with the Nehalem design. This is primarily because adding another Opteron processor increases memory bandwidth, while that is not always the case for Xeon systems, and the fact that the Opterons use a switched fabric, rather than a shared bus. In particular, the Opteron's integrated memory controller allows the CPU to access local RAM very quickly. In contrast, multiprocessor Xeon system CPUs share only two common buses for both processor-processor and processor-memory communication. As the number of CPUs increases in a typical Xeon system, contention for the shared bus causes computing efficiency to drop. Intel is migrating to a memory architecture similar to the Opteron's for the Intel Core i7 family of processors and their Xeon derivatives.
Celeron
A 90 nm Celeron M with half of the L2 cache of the 90 nm "Dothan" Pentium Ms (twice the L2 cache of the 130 nm Celeron Ms, though), and, like its predecessor, lacking SpeedStep. The first Celeron Ms that supports the XD bit was released in January 2005, in general any Celeron M released after that supports the XD bit. There is also a 512 KB low voltage version that was used in the early ASUS Eee PC models.
Xeon
An MP-capable version of Paxville DP, codenamed Paxville MP, product code 80560, was released on November 1, 2005. There are two versions: one with 2 MB of L2 Cache (1 MB per core), and one with 4 MB of L2 (2 MB per core). Paxville MP, called the dual-core Xeon 7000-series, was produced using a 90 nm process. Paxville MP clock ranges between 2.67 GHz and 3.0 GHz (model numbers 7020–7041), with some models having a 667 MT/s FSB, and others having an 800 MT/s FSB.
Xeon
Xeon E7-48xx v3 and E7-88xx v3 series also contain functional bug-free support for Transactional Synchronization Extensions (TSX), which was disabled via a microcode update in August 2014 for Haswell-E, Haswell-WS (E3-12xx v3) and Haswell-EP (E5-16xx/26xx v3) models, due to a bug that was discovered in the TSX implementation.
Oracle Exadata
Oracle Corporation releases a new generation of Exadata every twelve to eighteen months. At each release, Oracle refreshes most hardware components to the latest Intel Xeon processors, memory, disk, flash and networking. The hardware refreshes in themselves result in performance increases with every release. Exadata software is also refreshed with each generation and periodically in between, enhancing some combination of performance, availability, security, management and workload consolidation. In October 2015, features to support the Oracle Cloud were introduced.
Mac Pro
The first-generation Mac Pro has a rectangular tower case which outwardly resembles the last version of the Power Mac G5, and has similar expansion capabilities. The first Mac Pro offered a dual Dual-core Xeon Woodcrest processor. It was replaced by a dual Quad-core Xeon Clovertown model on April 4, 2007, and again on January 8, 2008 by a dual Quad-core Xeon Harpertown model. The 2012 Mac Pro is nearly identical to a model that was announced on July 27, 2010. It features Nehalem/Westmere architecture Intel Xeon processors. These CPUs offer optionally twelve processing cores. The machine itself at its most evolved is able to accommodate up to four 2 TB hard disk drives or 512 GB solid state drives, as well as the ATI Radeon HD 5770/5870 GPU units, one per slot.
Xeon
Xeon E3-12xx v2 is a minor update of the Sandy Bridge-based E3-12xx, using the 22 nm shrink, and providing slightly better performance while remaining backwards compatible. They were released in May 2012 and mirror the desktop Core i3/i5/i7-3xxx parts.
List of Intel microprocessors
This generational list of Intel processors attempts to present all of Intel's processors from the pioneering 4-bit 4004 (1971) to the present high-end offerings, which include the 64-bit Itanium 2 (2002), Intel Core i9, and Xeon E3 and E5 series processors (2015). Concise technical data is given for each product.
Xeon
Subsequent to the "Prestonia" was the "Gallatin", which had an L3 cache of 1 MB or 2 MB. Its Xeon MP version also performed much better than the "Foster MP", and was popular in servers. Later experience with the 130 nm process allowed Intel to create the Xeon MP branded "Gallatin" with 4 MB cache. The Xeon branded "Prestonia" and "Gallatin" were designated 80532, like Northwood.
Xenon
Because a Xe nucleus has a spin of 1/2, and therefore a zero electric quadrupole moment, the Xe nucleus does not experience any quadrupolar interactions during collisions with other atoms, and the hyperpolarization persists for long periods even after the engendering light and vapor have been removed. Spin polarization of Xe can persist from several seconds for xenon atoms dissolved in blood to several hours in the gas phase and several days in deeply frozen solid xenon. In contrast, Xe has a nuclear spin value of and a nonzero quadrupole moment, and has t relaxation times in the millisecond and second ranges.
Xeon Phi
On June 18, 2012, Intel announced at the 2012 Hamburg International Supercomputing Conference that "Xeon Phi" will be the brand name used for all products based on their Many Integrated Core architecture. In June 2012, Cray announced it would be offering 22 nm 'Knight's Corner' chips (branded as 'Xeon Phi') as a co-processor in its 'Cascade' systems.
Opteron
Opteron is AMD's x86 former server and workstation processor line, and was the first processor which supported the AMD64 instruction set architecture (known generically as x86-64). It was released on April 22, 2003, with the "SledgeHammer" core (K8) and was intended to compete in the server and workstation markets, particularly in the same segment as the Intel Xeon processor. Processors based on the AMD K10 microarchitecture (codenamed "Barcelona") were announced on September 10, 2007, featuring a new quad-core configuration. The most-recently released Opteron CPUs are the Piledriver-based Opteron 4300 and 6300 series processors, codenamed "Seoul" and "Abu Dhabi" respectively. In January 2016, the first ARMv8-A based Opteron SoC was released.
Intel Core (microarchitecture)
The first processors that used this architecture were code-named 'Merom', 'Conroe', and 'Woodcrest'; Merom is for mobile computing, Conroe is for desktop systems, and Woodcrest is for servers and workstations. While architecturally identical, the three processor lines differ in the socket used, bus speed, and power consumption. Mainstream Core-based processors are branded "Pentium Dual-Core" or "Pentium" and low end branded "Celeron"; server and workstation Core-based processors are branded "Xeon", while Intel's first 64-bit desktop and mobile Core-based processors were branded "Core 2".