Transformers are ubiquitous in Natural Language Processing (NLP) tasks, but they are dif-ficult to be deployed on hardware due to the intensive computation. To enable low-latency inference on resource-constrained hardware platforms, we propose to design Hardware-Aware Transformers (HAT) with neural architecture search. We first construct a large design space with arbitrary encoder-decoder attention and heterogeneous layers . Then we train a SuperTransformer that covers all candidates in the design space, and efficiently produces many SubTransformers with weight sharing. Finally, we perform an evolutionary search with a hardware latency constraint to find a specialized SubTransformer dedicated to run fast on the target hardware. Extensive experiments on four machine translation tasks demonstrate that HAT can discover efficient models for different hardware (CPU, GPU, IoT device). When running WMT'14 translation task on Raspberry Pi-4, HAT can achieve 3  speedup, 3.7  smaller size over baseline Transformer; 2.7  speedup, 3.6  smaller size over Evolved Transformer with 12,041  less search cost and no performance loss. HAT is open-sourced. Transformer (Vaswani et al., 2017) has been widely used in natural language processing tasks. By stacking multiple identical encoder/decoder layers with attention modules, it provides a significant performance improvement over previous convolutional or recurrent neural network models (Kim, 2014). Nevertheless, it is challenging to deploy Transformers on mobile devices due to the high computation cost. For instance, in order to translate a sentence with only 30 words, a Transformer-Big model needs to execute 13G FLOPs and takes 20 seconds on a Raspberry Pi. Such long latency will hurt the user experience on edge devices. Thus we SuperTransformer Evolutionary Search with Hardware Constraints Specialized Deployment is Efficient Hardware Latency Feedback SubTransformers 12 / 3 / 2019 (cid:81)(cid:82)(cid:88)(cid:81)_ (cid:86) e (cid:81) (cid:86) (cid:82) (cid:85) _1895988 . need hardware-efficient Transformers (Figure 1). There are two common pitfalls when evaluating the efficiency of a Transformer. (1) FLOPs does not reflect the measured latency . Although FLOPs is used as an metric for efficiency in prior arts (Howard et al., 2017; Wu et al., 2020), it is not a good latency proxy. As in Figure 2 ( Right ), models with the same FLOPs can result in very different measured latencies; (2) different hardware prefers different Transformer architecture. As in Table 1, the Transformer model optimized on one hardware is sub-optimal for another because latency is in-fluenced by different factors on different hardware platforms. For example, the embedding size has significant impact on the Raspberry Pi latency but hardly influences the GPU latency (Figure 2). Inspired by the success of Neural Architecture Search (NAS) (Bender et al., 2018; Guo et al., 2019; Pham et al., 2018; Cai et al., 2019a), we propose to search for H ardwareA ware T ransformers (HAT) On Titan xp MACs vs latency Change #Layers Change #Layers Change Hidden Dim Change Hidden Dim Change Embed Dim Change Embed Dim 159.171850 5.24E+01 159.171850 5.24E+01 159.171850 5.24E+01 192.514580 9.62E+01 194.561290 5.09E+01 194.564170 5.14E+01 225.857310 1.37E+02 226.018570 5.13E+01 229.956490 5.42E+01 259.200040 1.74E+02 257.475850 5.17E+01 265.348810 5.15E+01 292.542770 2.16E+02 288.933130 5.04E+01 300.741130 5.17E+01 325.885500 2.61E+02 320.390410 5.25E+01 336.133450 5.15E+01 Table 2 From Scratch #5 Acc Loss Prune+Distill #5 Acc Loss GAN Compression Untitled 1 Untitled 1 10.6 33.55 10.603462656 34.61 7.944142848 35.75 Untitled 2 7.5 34 7.51501312 32.89 6.9599232 34.84 Untitled 3 6.17 33.09 6.168969216 29.76 5.664538624 34.34 Untitled 4 4.955045888 31.62 4.955045888 30.27 4.67861504 33.14 Untitled 5 Untitled 6 Untitled 7 Untitled 8 Untitled 9 Untitled 10 Untitled 11 Untitled 12 Untitled 13 Untitled 14 Untitled 15 Untitled 16 Untitled 17 m A P (  ) 28 30 32 34 36 4 5 6 7 8 9 10 11 From Scratch Prune+DistillGAN Compression 0 75 150 225 300 120 180 240 300 360 On raspberry pi MACs vs latency Change #Layers Change #Layers Change Hidden Dim Change Hidden Dim Change Embed Dim Change Embed Dim 159.171850 1012.378561 159.171850 1012.378561 159.171850 1012.378561 192.514580 1321.4497 194.561290 1147.812423 194.564170 1114.87281 225.857310 1630.328098 226.018570 1281.604218 229.956490 1270.467544 259.200040 1925.809944 257.475850 1451.090652 265.348810 1403.119045 292.542770 2266.552657 288.933130 1585.657468 300.741130 1635.061976 325.885500 2580.540898 320.390410 1730.037206 336.133450 1831.49392 600 1150 1700 2250 2800 120 180 240 300 360 Hidden Dim Scaling Embed Dim Scaling Layer Number Scaling On 40-core Xeon CPU FLOPs vs latency Change #Layers Change #Layers Change Hidden Dim Change Hidden Dim Change Embed Dim Change Embed Dim 159.171850 57.81710545 159.171850 57.81710545 159.171850 57.81710545 192.514580 100.9847422 194.561290 73.918281 194.564170 62.03208764 225.857310 150.8454541 226.018570 80.10061979 229.956490 63.28665018 259.200040 205.2778184 257.475850 83.99975101 265.348810 69.9605157 292.542770 268.6143021 288.933130 89.46600159 300.741130 70.42247256 325.885500 295.1284428 320.390410 96.02826834 336.133450 77.27889021 10 90 170 250 330 120 180 240 300 360 Jatson Nano GPU FLOPs vs latency #Layers latency_layers FFN Hidden Dim latency_hidden Embedding Dim latency_embed 159.171850 276.686898 159.171850 276.686898 159.171850 276.686898 192.514580 502.7163233 194.561290 276.6293568 194.564170 279.5712204 225.857310 729.463118 226.018570 278.9684391 229.956490 283.4879486 259.200040 998.0243301 257.475850 287.5616707 265.348810 285.4414597 292.542770 1279.55703 288.933130 299.8618034 300.741130 294.368388 325.885500 1450.864827 320.390410 309.1898384 336.133450 297.9405331 L a t e n c y o n N v i d i a GPU ( m s ) 200 550 900 1250 1600 120 180 240 300 360 Layer Num FFN Hidden Dim Embedding Dim #Mult-Add (M) FLOPs (M) Nvidia GPU Raspberry Pi ARM CPU Intel CPU Hidden & Embed dim have no impact on Nvidia GPU latency Hidden & Embed dim have large impact on Raspberry Pi ARM CPU latency Hidden & Embed dim have small impact on Intel CPU latency La t en cy ( m s ) FLOPs (M) FLOPs (M) Similar FLOPs, Di  erent Latency Figure 2: Latency of different Transformer models on different hardware. by directly involving the latency feedback into the design loop. In this way, we do not need FLOPs as the latency proxy and can search specialized models for various hardware. We first construct a large search space with arbitrary encoder-decoder attention and heterogeneous Transformer layers . Traditional Transformer has an information bottleneck between the encoder and decoder. Arbitrary encoder-decoder attention breaks the bottleneck, allowing all decoder layers to attend to multiple and different encoder layers instead of only the last one. Thus low-level information from the encoder can also be used by the decoder. Motivated by Figure 2, we introduce heterogeneous Transformer layers to allow different layers to have different architecture adapting various hardware. To perform a low-cost search in such a large design space, we first train a Transformer supernet  SuperTransformer, which contains many SubTransformers sharing the weights. We train all SubTransformers simultaneously by optimizing the uniformly sampled SubTransformers from the SuperTransformer. The performance of a SubTransformer with inherited weights from the SuperTransformer can provide a good relative performance approximation for different architectures trained from-scratch. Unlike conventional NAS, we only need to pay the SuperTransformer training cost for once and can evaluate all the models in the design space with it. Finally, we conduct an evolutionary search to find the best SubTransformer under the hardware latency constraint. Experiments show that HAT can be naturally incorporated with model compression techniques such as quantization and knowledge distillation. We evaluate HAT with WMT'14 En-De, WMT'14 En-Fr, WMT'19 En-De, and IWSLT'14 De-En tasks on Raspberry Pi ARM CPU, Intel Xeon CPU, and Nvidia TITAN Xp GPU. Compared with previous work (Vaswani et al., 2017; So et al., 2019; Gu et al., 2019; Wu et al., 2020), HAT achieves up to 3  speedup, 3.7  smaller size over Transformer-Big without loss of accuracy. With 12,041  less search cost, HAT outperforms the Evolved Transformer with 2.7  speedup and 3.6  smaller size. It also achieves up to 1.9  speedup over Levenshtein and Lite Transformers with no BLEU score loss. With 4-bit quantization, HAT can further reach 25  model size reduction. HAT has three contributions: (1) Hardware-Aware and Specialization. To our best knowledge, we are the first to directly involve the hardware feedback in the model design, to reduce NLP model latency for target hardware, instead of relying on proxy signals (FLOPs). For different hardware platforms, specialized models for low-latency inference are explored. (2) Low-cost Neural Architecture Search with a Large Design Space. We propose arbitrary encoder-decoder attention to break the information bottleneck; and heterogeneous layer to let different layers alter its capacity. A weight-shared SuperTransformer is trained to search for efficient models at a low cost. (3) Design Insights. Based on the search results, we reveal some design insights: Attending to multiple encoder layers is beneficial for the decoder; GPU prefers shallow and wide models while ARM CPU prefers deep and thin ones. A large design space is constructed with Arbitrary Encoder-Decoder Attention and Heterogeneous Layers. (1) Train a weight-shared SuperTransformer by iteratively optimizing randomly sampled SubTransformers. It can provide a performance proxy for SubTransformers. (2) Collect (SubTransformer architecture, latency) data pairs on the target hardware. (3) Train a latency predictor for each hardware to provide fast and accurate latency feedback. (4) Perform an evolutionary search with hardware latency constraint to find the model with the lowest validation loss . (5) Finally, the searched model is trained from scratch to get the final performance. An overview of the HAT framework is shown in Figure 3. We firstly train a SuperTransformer with a large design space. Then, for a given hardware platform, we collect a dataset of (SubTrans-former architecture, measured latency) pairs for different models, and train a latency predictor. Finally, we conduct an evolutionary search with a latency constraint to find an efficient model specialized for the target hardware. We construct a large design space by breaking two conventions in the Transformer design: (1) All decoder layers only attend to the last encoder layer; (2) All the layers are identical. Arbitrary Encoder-Decoder Attention. Different encoder layers extract features on different abstraction levels. Conventionally, all the decoder layers only attend to the last encoder layer. It forms an information bottleneck that forces all the decoder layers to learn solely from the high abstraction level and ignore the low-level information. To break the bottleneck, we propose Arbitrary Encoder-Decoder Attention to learn the most suitable connections between the encoder and the decoder. Each decoder layer can choose multiple encoder layers to attend. The key and value vectors from encoder layers are concatenated in the sentence length dimension (Figure 4) and fed to the encoder-decoder cross attention module. The mechanism is efficient because it introduces no additional parameters. The latency overhead is also negligible. For example, with each decoder layer attending to two encoder layers, the latency of Transformer-Base on Nvidia TITAN Xp GPU barely increases by 0.4%. It improves the model capacity by allowing attention to different abstraction levels. Heterogeneous Transformer Layers. Previous Transformers repeat one architecture for all layers. In HAT, instead, different layers are heterogeneous , with different numbers of heads, hidden dim, and embedding dim. In attention layers, different heads are used to capture various dependencies. However, Voita et al. (2019) shows that many heads are redundant. We thereby make attention head number elastic so that each attention module can decide its necessary number of heads. activation layer. Traditionally, the hidden dim is set as 2  or 4  of the embedding dim, but this is sub-optimal since different layers need different capacities depending on the feature extraction difficulty. We hence make the hidden dim elastic . Moreover, we also support elastic embedding dim of encoder and decoder, but it is consistent inside encoder/decoder. The number of encoder & decoder layers are also elastic to learn the proper level of feature encoding and decoding. Other design choices such as the length of Q, K, V vectors in attention modules can be naturally incorporated in our framework, which we leave for future work. It is critical to have a large design space in order to find high-performance models. However, training all the models and comparing their BLEU scores is infeasible. We thus propose SuperTransformer, a supernet for performance approximation , which can judge the performance of a model without fully training it. The SuperTransformer is the largest model in the search space with weight sharing (Pham et al., 2018; Liu et al., 2019; Cai et al., 2019a). Every model in the search space (a SubTransformer) is a part of the SuperTransformer. All SubTransformers share the weights of their common parts. For elastic embedding dim, all SubTransformers share the front portion of the longest word embedding and corresponding FC layer weights. As in Figure 5, for elastic FFN hidden dim, the front part of the FC weights is shared. For elastic head number in attention modules, the whole Q, K, V vectors (the lengths are fixed in our design space) are shared by dividing into head number parts. Elastic layer numbers let all SubTransformers share the first several layers. In the SuperTransformer training, all possible SubTransformers are uniformly sampled , and the corresponding weights are updated. In practice, the SuperTransformer only needs to be trained for the same steps as a baseline Transformer model, which is fast and low-cost. After training, we can get the performance proxy of sampled models in the design space by evaluating the corresponding SubTransformers on the validation set without training. Given a latency requirement, we perform an evolutionary search to find a satisfactory SubTransformer. There are two ways to evaluate the hardware latency of a SubTransformer: (1) Online measurement in which we measure the models during the search process. (2) Offline, where we train a latency predictor to provide the latency. We apply the offline method here because it is fast and accurate . For the online method, a single sampled SubTransformer requires hundreds of inferences to get an accurate latency, which lasts for minutes and slows down the searching. For the offline method, we encode the architecture of a SubTransformer into a feature vector, and predict its latency instantly with a multi-layer perceptron (MLP). Trained with thousands of real latency data points, the predictor yields high accuracy (Figure 6). Note that the predicted latency is only used in the search process, and we report real measured latency in the experiment section. Compared with deducing a closed-form latency model for each hardware, the latency predictor method is more general and faster. We use an evolutionary algorithm to conduct the search process. As in Figure 3, the search engine queries the latency predictor for SubTransformer latency, and validates the loss on the validation set. The engine only adds SubTransformers with latency smaller than the hardware constraint to the population. We conduct experiments on four machine translation tasks: WMT'14 En-De, WMT'14 En-Fr, WMT'19 En-De, and IWSLT'14 De-En, consisting of 4.5M, 36.3M, 43.0M, and 160K pairs of training sentences, respectively. For WMT'14 En-De, we apply 32K source-target BPE vocabulary, train on WMT'16, validate on newstest2013 and test on newstest2014, replicating Wu et al. (2019b); For WMT'14 En-Fr, we use 40K source-target BPE vocabulary, validate on newstest2012&2013, and test on newstest2014, replicating Gehring et al. (2017). WMT'19 En-De adopts 49.6K source-target BPE vocabulary, validates on newstest2017, and tests on newstest2018, the same as Junczys-Dowmunt (2019). We use 10K joint BPE vocabulary in lower case for IWSLT'14 De-En (Grave et al., 2017). Baselines. Our baseline models are Transformer (Vaswani et al., 2017), Levenshtein Transformer (Gu et al., 2019), both with the Ott et al. (2019) implementation, Evolved Transformer (So et al., 2019) and Lite Transformer (Wu et al., 2020). Evaluation Metrics. For evaluation, we use beam four and length penalty 0.6 for WMT, and beam five for IWSLT (Vaswani et al., 2017). All BLEUs are calculated with case-sensitive tokeniza-tion 1 , but we also apply the compound splitting BLEU 2 for WMT, the same as Vaswani et al. (2017). We test the model with the lowest validation set loss for WMT and the last ten checkpoints averaged for IWSLT. We test the latency of the models by measuring translation from a source sentence to a target sentence with the same length. The length is the average output length on the test set  30 for WMT and 23 for IWSLT. For each model, we measure the latency for 300 times, remove the fastest and slowest 10% and then take the average of the rest 80%. We conduct experiments on three representative hardware platforms: Raspberry Pi-4 with an ARM Cortex-A72 CPU, Intel Xeon E5-2640 CPU, and Nvidia TITAN Xp GPU. SuperTransformer Setups. The SuperTransformer for WMT has the following design space: [512, 640] for embedding dim, [1024, 2048, 3072] for hidden dim, [4, 8] for the head number in all attention modules, [1, 2, 3, 4, 5, 6] for decoder layer number. Due to decoder auto-regression, encoder only accounts for less than 5% of the measured latency; thereby, we set the encoder layer number fixed as 6. For arbitrary encoder-decoder attention, each decoder can choose to attend to the last one, two, or three encoder layers. The SuperTransformer design space for IWSLT is the same as WMT except for [2048, 1024, 512] for hidden dim and [4, 2] for head number. We set the Q, K, V vector dim fixed as 512. The design space contains around 10 15 possible SubTransformers and covers a wide range of model size and latency (largest = 6  smallest). We train the SuperTransformers of WMT for 40K steps and 50K steps for IWSLT. Hardware-Aware Evolutionary Search Setups. The input of the latency predictor is a feature vector of SubTransformer architecture with ten elements: layer number, embed dim, average hidden dim, average self-attention heads, of both encoder and decoder; plus average encoder-decoder attention heads, and the average number of encoder layers each decoder layer attends. A dataset of 2000 (SubTransformer architecture, measured latency) samples for each hardware is collected, and split into train:valid:test=8:1:1. We normalize the features and latency, and train a three-layer MLP with 400 hidden dim and ReLU activation. We choose three-layer because it is more accurate than the one-layer model, and over three layers do not improve accuracy anymore. With the predictor, we conduct an evolutionary search for 30 iterations in the SuperTransformer, with population 125, parents population 25, mutation population 50 with 0.3 probability and crossover population 50. Training Settings. Our training settings are in line with Wu et al. (2019b) and Wu et al. (2020). For WMT, we train for 40K steps with Adam optimizer and a cosine learning rate (LR) scheduler (Kingma and Ba, 2015; Loshchilov and Hut-ter, 2017), where the LR is linearly warmed up from 10  7 to 10  3 , and then cosine annealed. For IWSLT, we train for 50K steps with inverse square root LR scheduler. The baseline Transformers are trained with the same settings as the searched SubTransformers for fair comparisons. HAT consistently outperforms the baseline Transformers and achieves up to 3  faster inference speed and 3.7  smaller size over Transformer-Big. Specific latency, BLEU and SacreBLEU (Post, 2018) are in Appendix Table 8. 0 HAT (Ours) Layer Number Scaling of Transformer (Vaswani et al.) Dimension Scaling of Transformer (Vaswani et al.) Transformer-Base BLEUS c o r e 33 34 35 Transformer-Base Figure 8: Inference latency and BLEU trade-offs of WMT'19 and IWSLT'14 tasks on Nvidia GPU. On ARM CPU, HAT is 3  faster and 3.7  smaller than Transformer-Big with the same BLEU. On Intel CPU, HAT achieves over 2  speedup. On Nvidia GPU, the blue dash line is nearly vertical , indicating that dimension scaling can hardly reduce the latency. In this case, HAT can still find models with low latency and high performance. In Figure 7, 8 and Appendix Table 8, we compare HAT with Transformer baselines on four tasks. The embedding dims are 512 and 1024 for the Transformer-Base and Big, respectively. The hidden dims are 4  and 2  of the embedding dim for WMT and IWSLT. The IWSLT models are smaller to prevent overfitting (Wu et al., 2019b). We obtain a series of baseline models with layer number scaling (yellow) and dimension scaling (blue). We set different latency constraints on three hardware to get a series of HAT models. HAT consistently outperforms baselines with a large gap under different latency constraints. We further compare various aspects of HAT with Transformer (Vaswani et al., 2017) and Evolved Transformer (So et al., 2019) in Table 2. HAT achieves up to 1.6  , 3  , and 3.4  speedup with up to 1.4  , 3.7  , and 4  smaller size than baselines. We report FLOPs for translating a 23-token sentence for IWSLT and 30 for WMT. We show the overall GPU hours for training the SuperTransformer and the searched SubTransformer. We also calculate the cloud computing costs with different modes: preemptable is cheaper ($0.74/h) than on-demand ($2.48/h) (Strubell et al., 2019). HAT is highly affordable since the total GPU-hour is over 12000  smaller than the Evolved Transformer, and is even smaller than Transformer-Big by virtue of the compact model size. In Table 3, we compare HAT with other latest models. We scale down all models to have similar BLEU scores with Levenshtein for fair comparisons. We adopt the average iteration time of 2.88 for decoding (Gu et al., 2019), without limiting the length of the output sentence (12 tokens after Hardware-Aware Hetero.Layers Latency #Params FLOPs(G) BLEU GPUHours CO 2 e (lbs) Cloud Comp. decoding). HAT runs 1.3  faster than Transformer with higher BLEU; 1.9  faster than Levenshtein with 0.7 higher BLEU. Under similar latency, HAT also outperforms Lite Transformer. These results demonstrate HAT's effectiveness in lower latency scenarios. Our framework can also be adopted to speedup those models. Design Insights. For all HAT WMT models in Figure 7, 10% of all decoder layers attend to SubTransformer Latency #Params BLEU WMT'14En-De Largest 10.1s 71M 28.1 Searched HAT 6.9s 48M 28.4 WMT'14En-Fr Largest 10.1s 71M 41.4 Searched HAT 9.1s 57M 41.8 Table 4: The searched HAT compared with the largest SubTransformer in the design space. three encoder layers, 40% attend to two encoder layers. That demonstrates the necessity of arbitrary encoder-decoder attentions. In Appendix Figure 12, we visualize the models specialized for different hardware mentioned in Table 1. We find that the GPU model is wide but shallow ; the Raspberry Pi model is deep but thin . The phenomenon echos with our latency profiling (Figure 2) as GPU latency is insensitive to embedding and hidden dim, but Raspberry Pi is highly sensitive. It guides manual designs: on GPU, we can reduce the layer number and increase dimension to reduce latency and keep high performance. Ablation Study. HAT achieves higher BLEU with 1.5  lower latency and 1.5  smaller size compared with the largest SubTransformer (Table 4). This suggests that larger models do not always provide better performance, and demonstrates the effectiveness of HAT. We also compare the evolutionary search with random search (Figure 9). Evolutionary search can find models with lower losses than random search. SubTransformer Performance Proxy. All SubTransformers inside the SuperTransformer are uniformly sampled and thus equally trained , so the performance order is well-preserved during training. We conduct experiments to show the effectiveness of the SubTransformer performance proxy as in Table 5 and Appendix Figure 11. The BLEUs of SubTransformers with inherited weights and weights trained from-scratch are very close. More importantly, they also have the same relative performance order . Therefore, we can rely on the proxy to search high-performance model architecture, significantly reducing the search cost. Low Search Cost. As shown in Table 2 and Figure 10, the search cost of HAT is 12,041  lower than the Evolved Transformer. Although both are using Evolutionary Search, the key difference is that Evolved Transformer needs to train all individual models and sort their final performance to pick top ones; on the contrary, HAT trains all models together inside SuperTransformer and sorts their performance proxy to pick top ones. The superior performance of HAT proves that the performance proxy is accurate enough to find good models. from-scratch in order to conduct fair comparisons with baselines. In practice, we can also directly finetune the SubTransformers with the inherited weights from the SuperTransformer to further reduce the training cost. With 10K finetuning steps (1/4 of from-scratch training), the inherited SubTransformers can achieve similar or better performance than trained from-scratch ones (Table 6). In this way, the training cost for a model under a new hardware constraint can be further reduced by 4  , since the SuperTransformer training cost is amortizable among all searched models. Quantization Friendly. HAT is orthogonal to other model compression techniques such as quantization. We apply K-means quantization to HAT and further reduce the model size. We initialize centroids uniformly in the range of [min, max] of each weight matrix and run at most 300 iterations for each of them. Even without any finetuning, 4-bit quantization can reduce the model size by 25  with negligible BLEU loss compared to the Transformer-Big baseline (Table 7). Interestingly, the 8-bit model even has 0.1 higher BLEU than the full precision model, indicating the robustness of searched HAT. Compared with the Transformer-Base 4-bit quantization baseline, which has 24MB model size and 38.9 BLEU score, HAT has 2.2 higher BLEU with similar model size. Knowledge Distillation Friendly. HAT is also orthogonal to knowledge distillation (KD) because HAT focuses on searching for an efficient architecture while KD focuses on better training a given architecture. We combine KD with HAT by distilling token-level knowledge (top-5 soft labels) from a high-performance SubTransformer to a low-performance SubTransformer on WMT'14 En-De task. The teacher model has a BLEU of 28.5 and 49M parameters; the student model has 30M parameters. KD can improve the BLEU of the student model from 25.8 to 26.1. Transformer. Transformer (Vaswani et al., 2017) has prevailed in sequence modeling (Ng et al., 2019; Junczys-Dowmunt, 2018). By stacking identical blocks, the model obtains a large capacity but incurs high latency. Recently, a research trend is to modify the Transformer to improve the performance (Chen et al., 2018; Wu et al., 2019b; Sukhbaatar et al., 2019; Wang et al., 2019). Among them, Wu et al. (2019b) introduced a convolution-based module to replace the attention; Wang et al. (2019) proposed to train deep Transformers by propagating multiple layers together in the encoder. Zhang et al. (2018) and Kim et al. (2019) also proposed AAN and SSRU to replace the attention mechanism. HAT is orthogonal to them and can be combined to search for efficient architecture with those new modules. Another trend is to apply nonor partially-autoregressive models to cut down the iteration number for decoding (Gu et al., 2019; Akoury et al., 2019; Wei et al., 2019; Gu et al., 2018). Although reducing latency, they sometimes suffer from low performance. Bapna et al. (2018) explored using learned linear combinations of encoder outputs as decoder inputs, while HAT concatenates the outputs without linear combinations, thus better preserving the low-level information. Wu et al. (2020) investigated mobile settings for NLP tasks and proposed a multi-branch Lite Transformer. However, it relied on FLOPs for efficient model design, which is an inaccurate proxy for hardware latency (Figure 2). There are also works (Kim and Rush, 2016; Junczys-Dowmunt et al., 2018; Kim et al., 2019; Yan et al., 2020) using Knowledge Distillation (KD) to obtain small student models. Our method is orthogonal to KD and can be combined with it to improve the efficiency further. There are also hardware accelerators (Ham et al., 2020; Zhang et al., 2020) for attention and fully-connected layers in the Transformer to achieve efficient processing. Neural Architecture Search. In the computer vision community, there has been an increasing interest in automating efficient model design with Neural Architecture Search (NAS) (Zoph and Le, 2017; Zoph et al., 2018; Pham et al., 2018; He et al., 2018). Some applied black-box optimization such as evolutionary search (Wang et al., 2020b) and reinforcement learning (Cai et al., 2019b; He et al., 2018; Wang et al., 2018, 2020a; Mao et al., 2019); Some leveraged backpropagation with differentiable architecture search (Liu et al., 2019). Some also involved hardware constraints into optimizations such as MNasNet (Tan et al., 2019), ProxylessNAS (Cai et al., 2019b), FBNet (Wu et al., 2019a) and APQ (Wang et al., 2020b). To reduce the NAS cost, supernet based methods (Pham et al., 2018; Bender et al., 2018; Guo et al., 2019) apply a proxy for sub-network performance and adopt search algorithms to find good sub-networks. For NLP tasks, the benefits of the architecture search have not been fully investigated. Recently, So et al. (2019) proposed the Evolved Transformer to search for architectures under model size constraints and surpassed the original Transformer baselines. However, it suffered from very high search costs ( 250 GPU years ), making it unaffordable to search specialized models for various hardware and tasks. In addition, hardware latency feedback was not taken into account for better case-by-case specializations. Since different hardware has distinct architecture and features (Cong et al., 2018), feedback from hardware is critical for efficient NLP. We propose Hardware-Aware Transformers (HAT) framework to solve the challenge of efficient deployments of Transformer models on various hardware platforms. We conduct hardware-aware neural architecture search in an ample design space with an efficient weight-shared SuperTransformer, consuming four orders of magnitude less cost than the prior Evolved Transformer, and discover high-performance low-latency models. We hope HAT can open up an avenue towards efficient Transformer deployments for real-world applications. We thank NSF Career Award #1943349, MIT-IBM Watson AI Lab, Semi-conductor Research Corporation (SRC), Intel, and Facebook for supporting this research.
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