src: FPGA designers and librarians can import pin assignment information directly from FPGA design suites such as Intel Quartus II, Xilinx ISE Design Suite, Microsemi Libero SoC Design Software, Lattice + ispLEVER/Diamond and Aldec Active-HDL.
tgt: FPGA-Designer und Bibliotheksverwalter können Pinbelegungsinformationen direkt aus FPGA-Design-Suiten wie Intel Quartus II, Xilinx ISE Design Suite, Microsemi Libero SoC Design Software, Lattice + ispLEVER/Diamond und Aldec Active-HDL importieren.