For statistical timing analysis and physical design optimization, interconnect delay metrics that model the delay as a function of the metal process variations are very important. Accurate linear or at most second order delay models in terms of the process variables are necessary to efficiently propagate uncertainty in the state-of-the-art VLSI designs with millions of transistors and on chip interconnects. In this paper, we develop a method to extend the traditional moment based delay analysis of interconnects to consider the impact of Gaussian metal process variations and obtain mean-square optimal linear delay models for interconnects. We consider linear models for the variations in the conductance and capacitance of interconnects and represent the moments (m/sub 0/, m/sub 1/, m/sub 2/) of the interconnect impulse response as a first order orthogonal polynomial series expansion in the process variables. We obtain the coefficients of the expansion by using the Galerkin residual error minimization method on the recursive equations that relate the interconnect moments (m/sub 0/, m/sub 1/, m/sub 2/). We compare the accuracy of our approach against SPICE based Monte Carlo simulations and demonstrate a good match.
['Praveen Ghanta', 'Sarma B. K. Vrudhula']
Variational Interconnect Delay Metrics for Statistical Timing Analysis