In this paper we present a high density three-dimensional (3D) interconnect network implementation based on a modified Mesh-of-Trees (MoT) topology for an embedded FPGA architecture design targeted for high performance 3D integration. To obtain the optimal MoT-based interconnect structure, the routing architecture of the 2D MoT-based FPGA is modified to include long routing segments that span multiple switch blocks in every row and column. By adjusting the percentage of long wire and span, a 2.5D or 3D high density MoT-based embedded FPGAs can be designed. For the 3D multi-stacked MoT-based FPGAs, the 2D MoTbased FPGA is sliced into two or more equal sections by adjusting the length of the long wire span. The long wire segments are realized using 3D through silicon via (TSVs) and 2.5D interposer-based multi-FPGAs, we increase the number of cuts and apply appropriate optimization models to scale down the number of long wires and horizontal inter-FPGA interposer wires. Using our 2.5/3D CAD models, we demonstrate the speed and area of 3D MoT-based FPGA architecture improved by 54% and 41% respectively in comparison to 3D Mesh-based FPGAs.
['Vinod Pangracious', 'Mulhim Al-Doori']
Novel Three-Dimensional Embedded FPGA Technology and Achitecture