This paper presents a finite impulse response (FIR) filter chip that relies on a charge-recovery logic family to achieve multi-MHz clock frequencies with subthreshold DC supply levels. Fabricated in a 0.13 ?m CMOS process with V th,nmos  = 0.40 V, the FIR operates with a two-phase power-clock in the 5 MHz-187 MHz range and with DC supplies in the 0.16 V-0.36 V range. Using a single DC supply, the chip achieves its most energy-efficient operating point when resonating at 20 MHz with a 0.27 V supply. Recovering 89 % of the energy supplied to its 57 pF per-phase load, it consumes 15.57 pj per cycle and yields 17.37 nW/Tap/MHz/InBit/ CoeffBit. Using two subthreshold DC supplies at 20 MHz, energy per cycle can be further reduced by 17.1 %, yielding 14.40 nW/Tap/ MHz/InBit/CoeffBit.
['Wei Hsiang Ma', 'Jerry C. Kao', 'Visvesh S. Sathe', 'Marios C. Papaefthymiou']
187 MHz Subthreshold-Supply Charge-Recovery FIR