A new transimpedance amplifier (TIA) design procedure using stagger tuning with inverted transformer coils is described in this paper. A broadband TIA, realized using the proposed staggered design technique that enhances the transimpedance limit and the bandwidth while only adding small passband gain ripple, was implemented in a 0.13-   ${\mu }\text {m}$    standard CMOS process. The TIA achieves a 3-dB bandwidth of 33 GHz with a 150 fF photodiode capacitance. The TIA transimpedance gain is    $43.8~{\text {dB}}\Omega $    with ±8 ps group-delay variation over the entire bandwidth. The circuit occupies an active area of    ${250~\mu }\text {m}\times 260~\mu \text {m}$    and consumes 9 mW from a 2 V supply. Despite operating with much larger photodiode capacitance, the TIA achieves the highest figure of merit, and occupies smaller area while consuming the least amount of power among previously published TIAs designed for the same data rate in similar technologies.
['Mohammad Hossein Taghavi', 'Peyman Ahmadi', 'Leonid Belostotski', 'James W. Haslett']
A Stagger-Tuned Transimpedance Amplifier