For application in a software defined radio, a CORDIC processor has been developed that can operate both in synchronous and asynchronous mode. Each mode of operation has advantages and drawbacks. Depending on the actual application, an optimal trade-off can be achieved by selecting the mode of operation that fits best with system demands. We believe that for a system developer this additional degree of freedom significantly increases the application space. The design has been implemented on a 0.25 /spl mu/m SiGe:C BiCMOS process. Simulation results using post-layout extracted parameters indicate that the design is competitive both with purely synchronous and purely asynchronous implementations.
['Eckhard Grass', 'Bodhisatya Sarker', 'Koushik Maharatna']
A dual-mode synchronous/asynchronous CORDIC processor