This paper presents a case study to design a Blokus Duo solver by using our system-level design toolkitnamed SystemBuilder. We start with a modeling of the Blokus nDuo solver by C language and communication APIs which are provided by SystemBuilder. Then, we iteratively verified and tuned the parameters in the solver by running the model on a general computer in order to improve the performance of the solver. Finally, the implementation on FPGA was automatically generated from the model by SystemBuilder. Despite the FPGA implementation, we have never written hardware description language throughout the case study. The case study demonstrates the easiness to design system on FPGA by System-level design tools.
['Yuki Ando', 'Masataka Ogawa', 'Yuya Mizoguchi', 'Kouta Kumagai', 'Miaw Torng-Der', 'Shinya Honda']
A Case Study of FPGA Blokus Duo Solver by System-Level Design