Many VLSI floorplanners work by recursively decomposing rectangular modules into lower-level rectangular modules until the leaf-level modules are reached[5]. Good layouts require good floorplans. The quality of a floorplan depends (among other things) on how the leaf-level modules are clustered into the various levels of the hierarchy. Some of the factors that determine the suitability of a decomposition are the geometry of the modules, the connectivity among modules, and timing constraints. Our experience with the mechanization of a VLSI design manager[1] has shown that the initial structural hierarchy that arises during synthesis from behavioral specifications is not always suitable for floorplanning. We describe hierarchical-clustering-based algorithms that lead to a small number of superior candidate hierarchies.
['John D. Gabbe', 'P. A. Subrahmanyam']
A Note on Clustering Modules for Floorplanning