This paper summarizes our work involving the successive refinements of a conservative superstep protocol. The refined protocols are known as the SST, SLS, and FET protocols. Each of the refinements improves the safetime bound, which in turn reduces the number of supersteps. In general, this helps to reduce the synchronization overhead and thus the execution time. However, a change in the number of supersteps can also introduce load imbalances within supersteps into the simulation. This observation becomes apparent with the FET protocol in particular. The performance of the refined protocols is compared through several semiconductor supply-chain simulation models. The results from the experiments strongly indicate the feasibility of using parallel discrete-event simulation techniques in the simulation of large scale systems such as a supply-chain.
['Boon-Ping Gan', 'Yoke-Hean Low', 'Wentong Cai', 'Stephen John Turner', 'Sanjay Jain', 'Wen-Jing Hsu', 'Shell-Ying Huang']
The Development of Conservative Superstep Protocols for Shared Memory Multiprocessor Systems