This paper explores microarchitecture controlled proactive gain boosting as a means of lowering the effects of supply voltage droop in digital circuits powered by embedded, all-digital linear regulators. A behavioral power supply rejection model for all-digital linear regulator is presented. The presented regulator shows enhanced power supply rejection under increased operating frequency. Test-chip measurements in a 130nm CMOS process reveal more than 2X (4X) reduction in voltage droop (settling time) over purely reactive gain boosting.
['Saad Bin Nasir', 'Arijit Raychowdhury']
All-digital linear regulators with proactive and reactive gain-boosting for supply droop mitigation in digital load circuits