This paper presents an adaptive technique for compensating manufacturing and environmental variability in sub-threshold circuits using "canary flip-flop" that can predict timing errors. A 32-bit Kogge-Stone adder whose performance was controlled by body-biasing was fabricated in a 65 nm CMOS process. Measurement results show that the adaptive control can reduce the power dissipation by 46% in comparison with the worst-case design with guardbanding.
['Hiroshi Fuketa', 'Masanori Hashimoto', 'Yukio Mitsuyama', 'Takao Onoye']
Adaptive performance control with embedded timing error predictive sensors for subthreshold circuits