Computer architects rely heavily on simulation to explore increasingly complex design spaces. Keeping simulations within tractable limits forces architects to evaluate only subsets of design parameters, which must be carefully chosen to yield accurate reflections of the benefits and costs of a new architecture. As a first step in formulating a methodology to appropriately evaluate processor design parameters for simulation, we develop an approach based on statistical correlation analysis, which measures the interaction between processor parameters. The resulting parameter correlation matrix (PCM) allows architects to determine how parameters affect each other, which parameter variations introduce bottlenecks and where, and what tradeoffs can be made to maintain performance while optimizing power consumption. This approach can be used to constrain a simulation model, narrowing the design space for optimization. As an initial demonstration, we develop and evaluate a preliminary analytic model for the instruction fetch unit (IFU).
['Nana B. Sam', 'Sally A. McKee', 'Prabhakar Kudva']
Rethinking Processor Design: Parameter Correlations