An advance in folding-interpolating ADCs is presented that simplifies their extension to higher resolution by building the converter out of identical but scaled pipelined cascaded folding stages. The limitation of the classical folding architecture [1] is the separate coarse channel to determine which fold an input signal is in. Higher-resolution ADCs benefit from a higher order of folding, which results in more closely spaced folds and makes the alignment between this “fine” channel and the “coarse” channel increasingly difficult due to offset and settling mismatch. In this paper we eliminate this separate coarse channel using instead a single “unified” set of cascaded folding stages, in which each folding stage acts as the coarse channel for the following folding stage. This extends the work of [2] where the coarse channel is distributed and [3] where the cascaded folding stages are pipelined. Our approach is demonstrated in a dual 1.8V 1.0GS/s 10b ADC that achieves ±0.2 LSB DNL and 9.1 ENOB at Nyquist while consuming 1.2W/channel.
['Robert C. Taft', 'Pier Andrea Francese', 'Maria Rosaria Tursi', 'Ols Hidri', 'Alan MacKenzie', 'Tobias Hoehn', 'Philipp Schmitz', 'Heinz Werker', 'Andrew Glenny']
A 1.8 V 1.0 GS/s 10b Self-Calibrating Unified-Folding-Interpolating ADC With 9.1 ENOB at Nyquist Frequency