This session describes state-of-the-art wireless systems and building blocks implemented in low-cost, deep-submicron CMOS processes to support a wide range of applications. This session includes a 45nm multimode cellular base station transceiver SoC, a highly integrated 28nm WLAN/BT combo SoC, a compact 40nm WLAN digital transmitter, a high performance 28nm fractional-N sampling PLL with an FOM of −246.8dB, a 28nm 10Mb/s GMSK modulator and three advanced receiver techniques including digital beamforming with spatio-spectral-filtering, a frequency-translational quadrature-hybrid receiver, and an N-path-filter-based non-reciprocal circulator.
['Ali Afsahi', 'Guang-Kaai Dehng']
Session 9 overview: High-performance wireless