We have proposed a power-aware, high-performance, dependable communication link using PCI Express as a direct communication device, referred to as PEARL, for application in a wide range of parallel processing systems from high-end embedded system to small-scale high-performance clusters. In the present study, we describe the structure and function of a communicator chip, referred to as the PEACH chip, for realizing PEARL. The PEACH chip connects four ports of PCI Express Gen 2 with four lanes, and uses an M32R processor with four cores and several DMACs. We also develop the PEACH board as the network interface card for implementing the PEACH chip. The PEACH board provides a power-aware, dependable communication link with a theoretical peak bandwidth of 2 Gbytes/s per link.
['Toshihiro Hanawa', 'Taisuke Boku', "Shin'ichi Miura", 'Mitsuhisa Sato', 'Kazutami Arimoto']
PEARL: Power-Aware, Dependable, and High-Performance Communication Link Using PCI Express