We have fabricated an improved version of an imager reported earlier (Kramer, J., Int. Symp. Circuits and Systems, vol.II, p.165-8, 2002), primarily by using a better pixel circuit and better layout principles. The new imager functions over 5 decades of background illumination and has much more symmetrical ON and OFF responses. This imager achieves massive redundancy reduction by temporally differentiating the image contrast. The ideal functions of the pixels are to compute the rectified derivatives /sup d///sub dt/(log I) = (dI/dt)/I, where I is the photocurrent in the pixel. The values of these derivatives are rectified and output as rate-coded events on the AER (address-event representation) bus. The 2.2 mm by 2.2 mm, chip was built in a 0.35 /spl mu/m 4M 2P CMOS process. The pixels are 40 /spl mu/m by 40 /spl mu/m and the array has 32 by 32 pixels, each with ON and OFF outputs. System power consumption is about 30 mA at 3.3 V.
['Patrick Lichtsteiner', 'Tobi Delbruck', 'Jörg Kramer']
Improved ON/OFF temporally differentiating address-event imager