Memory access rate is a primary performance bottleneck in high-performance networking systems. The MoSys Bandwidth Engine family of integrated circuits provides a significant improvement in effective memory performance by using high-speed serial I/O's, many banks of memory, a low-latency, highly efficient protocol, and intelligence within the device. The first member of the family can perform 2 billion 72-bit reads per second or 1 billion read-modify-write operations per second.
['Bendik Kleveland', 'Michael J. Miller', 'Ronald B. David', 'Jay Patel', 'Rajesh Chopra', 'Dipak K. Sikdar', 'Jeff Kumala', 'Socrates D. Vamvakos', 'Mike Morrison', 'Ming Liu', 'Jayaprakash Balachandran']
An Intelligent RAM with Serial I/Os