Applying appropriate minimum leakage vector (MLV) to each RTL module instance results in a low leakage state with significant area overhead. For each RTL module, via Monte Carlo simulation, we identify a set of MLV intervals such that maximum leakage is within (say) 10% of the lowest known leakage. We can reduce area overhead by choosing PI MLVs such that resultant inputs to internal nodes are also MLVs. Otherwise, control points can be inserted. Based on interval arithmetic, given a DFG, we propose a heuristic for Primary Input (PI) MLV identification with minimal control points. Experimental results for DSP filters implemented in 16nm technology are promising.
['Shilpa Pendyala', 'Srinivas Katkoori']
Interval arithmetic based input vector control for RTL subthreshold leakage minimization