Thread Level Speculation (TLS) is a technique aims at boosting the performance of sequential programs running on Chip Multiprocessors (CMPs) by automatically parallelizing them. It exempts programmers from the heavy task of parallel programming. But its performance may suffer from frequent squashing caused by inter-thread data dependency violation. In this paper, we propose a Network-on-Chip (NoC) in CMP that employs a priority-aware packet arbitration policy. Packet scheduling guided by such policy reduces the occurrence of TLS squashes. Simulation results with 5 applications show that our policy reduces squashes by 22% in best case and 15% on average. Moreover, our priority aware approach could be generalized to similar scenarios in which different threads running on CMP manifest different priorities.
['Wenbo Dai', 'Hong An', 'Qi Li', 'Gongming Li', 'Bobin Deng', 'Shilei Wu', 'Xiaomei Li', 'Yu Liu']
A Priority-Aware NoC to Reduce Squashes in Thread Level Speculation for Chip Multiprocessors