An architecture optimized for strategic computing was built. The architecture employs a comprehensive VLSI approach, with new hardware and a new operating system. By starting from scratch it was possible to make tradeoffs at all levels (VLSI, hardware systems, and software systems) to provide optimal solutions to meet the challenges of strategic computing. In addition to a high-performance microprocessor based on reduced-instruction-set-computer (RISC) principles, a VLSI component was built for each functional block of a computer system to construct a balanced computer architecture. Instead of implementing fault tolerance with additional hardware, the requisite fault-tolerant features were built directly into these same VLSI components. >
['Fred J. Pollack', 'D.W. Johnson', 'Dave Carson', 'Ron Ebersole', 'Vittal Kini', 'Konrad Lai', 'Bernie Silvernail', 'Steve Stacey']
A VLSI-intensive fault-tolerant computer architecture