The operating frequency and the number of cores and active layers in multi-processor systems-on-chips (MPSoC) continue to increase, resulting in rising power density and operating temperature on the die. The increasing temperature reduces the system reliability and performance and increases the cooling cost. Most traditional MPSoC thermal optimization tools are based on two-dimensional planar IC thermal modeling, which is insufficient to capture the different thermal characteristics of three-dimensional (3D) MPSoCs and the behavior subjected to dynamic voltage and frequency scaling (DVFS). The recently proposed 3D optimization approach still ignores the mutual thermal impact between cores in the same layer, which reduces the precision of frequency assignment and may cause violation in the maximum temperature constraint. In this paper, we propose an approach based on polynomial programming that addresses the problem of processor frequency assignment in 3D MPSoC system, such that the total system performance can be maximized as well as the temperature and power constraints are met for all time instances. We also compare the performance improvement of DVFS in 3D MPSoC with that in 2D MPSoC, studying the importance of intra-layer temperature correlation in 3D MPSoC.
['G. C. Zhao', 'Hing-Kit Kwan', 'Chi-Un Lei', 'Ngai Wong']
Processor frequency assignment in three-dimensional MPSoCs under thermal constraints by polynomial programming