A hybrid architecture for neural coprocessing is presented. A fixed set of analog multipliers and capacitors (analog memory) emulates multilayer perceptrons through digitally-controlled multiplexing. Thus parallelism is partially preserved without direct analog implementation of the whole structure. Details of system VLSI implementation are given, along with simulation results and performance estimation.
['Alexandre R. S. Romariz', 'P. U. A. Ferreira', 'J. V. Campêlo', 'Mariângela Graciano', 'J.C. da Costa']
Design of a hybrid digital-analog neural co-processor for signal processing