FIFO memories impose special test problems because of their built-in addressing restrictions and access limitations. With the increasing use of FIFOs, as a stand-alone chip or as embedded macros in ASICs, generic algorithms are needed to test FIFOs. This paper addresses the problem of testing the widely available shifting-type FIFOs; it introduces specific fault models and a set of generic tests which have a test length of O(n) and can be used for the stand-alone chip as well as for the embedded macro version of the FIFO. >
['A. J. van de Goor', 'Ivo Schanstra', 'Yervant Zorian']
Functional test for shifting-type FIFOs