The HiBRID-SoC multi-core system-on-chip targets a wide range of application fields with particularly high processing demands, including general signal processing applications, video and audio de-/encoding, and a combination of these tasks. For this purpose, the HiBRID-SoC integrates three fully programmable processors cores and various interfaces onto a single chip, all tied to a 64 bit AMBA AHB bus. The processor cores are individually optimized to the particular computational characteristics of different application fields, complementing each other to deliver high performance levels with high flexibility at reduced system cost. The HiBRID-SoC is fabricated in a 0.18 /spl mu/m 6LM standard-cell CMOS technology, occupies about 82 mm/sup 2/, and operates at 145 MHz.
['Hans-Joachim Stolberg', 'Mladen Berekovic', 'Lars Friebe', 'Sören Moch', 'S. Flugel', 'Xun Mao', 'Mark Bernd Kulaczewski', 'Heiko Klussmann', 'Peter Pirsch']
HiBRID-SoC: A Multi-Core System-on-Chip Architecture for Multimedia Signal Processing Applications