Hardware-assisted verification, or emulation, delivers the capacity and performance for extremely fast, full System-on-Chip (SoC) testing. Emulation enables longer test cases and more tests to be run in less time. In doing so, it allows more design requirements to be covered while more bugs are uncovered. However, emulation is no longer only about performance and capacity. The landscape is shifting beyond these two fundamental benefits in terms of all that can be accomplished virtually with an emulator. As a result, leading electronic-design companies want to take advantage of the benefits of both megahertz verification and a fully virtual, block to SoC level accelerated verification flow. In this paper, we survey different solution methodologies that are built so far and present our SoC verification platform using HW emulation & Co-modeling Testbench technologies. High-performance, high-capacity hardware-assisted emulators and co-modeling Testbench technology can speed up to 10,000x the verification of any System-On-Chip.
['Mohamed AbdelSalam', 'Ashraf Salem']
SoC verification platforms using HW emulation and co-modeling Testbench technologies