This paper describes a CMOS imaging receiver for free-space optical (FSO) communication. The die contains 256 optical receive channels with -47 dBm optical sensitivity and 30 dB optical dynamic range at 500 kb/s/channel while consuming 67 mW. Received signals are amplified by digitally self-calibrated open-loop amplifiers and digitized before clock and data recovery. The sampled data also provide inputs for digital automatic gain and offset control loops closed around the analog amplifier chain to compensate for signal variations due to atmospheric turbulence and daylight interference. Gain control logic can adapt to incident signals over the 30 dB dynamic range within 28 bit periods. Low-power logic design and analog circuit techniques are used to minimize digital crosstalk to single-ended photodetectors referenced to a bulk substrate. Local arbitration circuitry at each channel forms an intrachip data passing network to multiplex received data words from the 16 /spl times/ 16 array onto a common off-chip bus. The 1.6 M transistor mixed-signal die fabricated in a 0.25 /spl mu/m CMOS process measures 6.5/spl times/6.5 mm/sup 2/. Reception at 500 kb/s through a 1.5 km atmospheric channel is demonstrated with 3 mW optical transmit power during nighttime and daylight hours.
['Brian S. Leibowitz', 'Bernhard E. Boser', 'Kristofer S. J. Pister']
A 256-element CMOS imaging receiver for free-space optical communication