The emergence of high-definition video into mainstream applications has imposed a challenge to researchers and engineers in the field: achieving optimal balance between programmability and hardware efficiency. The DM6467 System-on-Chip (SOC) from Texas Instruments provides both DSP-like design flexibility and ASIC-like performance at the same time for codec designs. In this paper, we investigate how to efficiently implement H.264 HD encoder and decoder based on a C64+ DSP core accompanied by the on-chip coprocessor. The overall system provides full programmability on critical coding toolsets that impact codec quality, such as motion estimation and rate control, while at the same time, utilize base functions that are fully hardware accelerated. We provide performance analysis based on such a system, in terms of system loading for HD encoders.
['Jian Wang', 'Gang Hua']
Implementing high definition video codec on TI DM6467 SOC