Network-on-Chip (NoC) is considered to be a promising approach to implement many-core systems and a large number of on-chip router optimization studies have been proposed. In this paper, we propose to dynamically adjust link-width of each port on a router optimized to spatially biased traffic. Different from the previous No Coptimization approaches, in which the optimization is almost performed in the NoC design step, the proposed method achieves a dynamical link-width optimization at run-time.
['Daihan Wang', 'Michihiro Koibuchi', 'Tomohiro Yoneda', 'Hiroki Matsutani', 'Hideharu Amano']
A Dynamic Link-Width Optimization for Network-on-Chip