This paper describes a 60 GHz high gain power amplifiers (PA) designed in a 0.18-μm SiGe BiCMOS technology. It consists of four cascode stages with inter-stage matching implemented by the conductor-backed coplanar waveguide (CBCPW) structures and metal-insulator-metal (MIM) capacitors. A double-stub low Q input matching network is design to achieve wideband input matching. Since one of double-stub is open stub, the S 11  can easily be tuned by trimming after fabrication. Load-pull simulation generates the optimal load impedance. A wideband harmonic rejection ESD is introduced to simultaneously reject the harmonics and achieve ESD protection. Simulation result shows that the maximum gain is 35.4 dB with 3 dB bandwidth 55–69 GHz. The S 11  is  2 . It consumes 60mW from a 1.8V supply.
['Keping Wang', 'Kaixue Ma', 'Kiat Seng Yeo']
Design consideration for 60 GHz SiGe power amplifier with ESD protection