Purely-digital techniques that can be used to analyze The Performance Of A High-speed On-chip Reconfigurable Conversion System are described. The proposed techniques make use of an unconventional digital-to-analog-analog-to-digital testing loop, and therefore do not require external analog resources. This is verified by simulations performed on a dedicated test model. >
['João C. Vital', 'J.E. Franca', 'N.S. Silva']
Fully-digital testability of a high-speed conversion system