A compact and fast hardware architecture using a digital approximation and current VLSI technology as a field- programmable gate array (FPGA) structure has been developed for applications in broadband sonar signal detection. The VLSI implementation is sought to maximize the speed of a hybrid algorithm developed previously for the underwater active sonar echolocation system. It consists of two parts: discrete wavelet transform (DWT) filtering bank, and continuous wavelet transform (CWT) convolver. The DWT filtering bank is employed to minimize the unwanted sonar channel characteristics thus enhancing the signal received from the target. The output of the DWT denoising block is then processed by the CWT convolver in order to estimate target's motion parameters. Simulation results obtained have clearly demonstrated the capability of the VLSI architecture in providing the very efficient and accurate solution in sonar signal detection.
['Sheng Cheng', 'Chien-Hsun Tseng', 'Marina Cole']
Efficient and Effective VLSI Architecture for a Wavelet-based Broadband Sonar Signal Detection System