An analytical method for VLSI general floorplan design and optimization is proposed. This method is based on a mixed integer programming model and all application of a standard mathematical software. The method allows arbitrary combinations of rigid and flexible modules. Various objective functions, such as chip area, interconnection length, timing delays or any combinations of them, are permitted. Routing space is estimated by the global router. Experimental data are provided. >
['Suphachai Sutanthavibul', 'Eugene Shragowitz', 'J. Ben Rosen']
An analytical approach to floorplan design and optimization