This paper presents a flexible timing circuit with 1.1ns delay resolution for energy detection IR-UWB receivers. Referenced at 900MHz input clock, the circuit generates multi-phased integration windows and reset signals that enable/disable the operation of analog blocks. The design is highly programmable, adapting the receiver to pulse level synchronization, symbol level synchronization, different data rates and various channel environments. Mixed-signal design flow is adopted to avoid the complexity of full custom design and the large power consumption of full synthesized digital design. The timing circuit is implemented in UMC 90nm CMOS process, with 219µW power consumption and 190*295µm 2  die area.
['Qin Zhou', 'Jia Mao', 'Zhuo Zou', 'Fredrik Jonsson', 'Li-Rong Zheng']
A mixed-signal timing circuit in 90nm CMOS for energy detection IR-UWB receivers