Simply but effectively, morphological transform can be used for obstacle detection in visual navigation. Since the resolution of captured images increases, this paper presents a high-speed circuit for grayscale morphological transform to satisfy real-time processing requirement. The design adopts pipelined architecture with by-pass lines to exploit the most flexibility and scalability. It supports flat structure elements of any shape and size by easy configuration. The overall architecture is implemented based on a Xilinx Virtex-4 FPGA chip with low resource overhead and a high synthesized frequency of 290MHz. It achieves a good performance over 100fps for processing 1080P images.
['Rongdi Sun', 'Peilin Liu', 'Zhenqi Wei']
A flexible processing circuit of morphological transform for obstacle detection