In this paper, a new Hamming neural network integrated circuit using neuron-MOS transistor is presented. A matching calculation circuit and a winner-take-all circuit have been designed using neuron-MOS transistor as a key circuit element. The structure of the proposed circuit has been simplified significantly. From the HSPICE simulation results using TSMC 0.35µm double-polysilicon CMOS technology, the effectiveness of the proposed approach is validated.
['Guoqiang Hang', 'Guofei Wang', 'Yinan Mo', 'Xiaohui Hu']
A Hamming neural network integrated circuit using neuron-MOS transistor