This paper proposes an efficient Spurious Power Suppression Technique (SPST) and its applications on an MPEG-4 AVC/H.264 transform coding design. There are three techniques addressed in this paper, which are (1) the SPST, (2) the direct 2-D algorithm, and (3) the interlaced I/O schedule to solve the design challenges induced by both the real-time processing and low-power requirements. The major novelty of this paper is implementing the SPST concept on the transform architecture for H.264, which save 31.9% power consumption at the cost of 20.9% area price. Moreover, the proposed transform design also possesses 60.05% higher hardware efficiency through the TPUA index than the existing designs
['Kuan-Hung Chen', 'Kuo-Chuan Chao', 'Jinn-Shyan Wang', 'Yuan-Sun Chu', 'Jiun-In Guo']
An efficient spurious power suppression technique (SPST) and its applications on MPEG-4 AVC/H.264 transform coding design