As the process technology scales down, interconnects become the performance bottleneck when designing multi-core processors. 3D IC can be a good solution for reducing the interconnection delay in the multi-core processors by stacking multiple layers connected through TSVs. However, 3D technology magnifies the thermal challenges in 3D multi-core processors. For this reason, 3D multi-core architecture cannot be practical without proper solutions to the thermal problems such as efficient DFS. This paper investigates how the continuous engaged DFS technique handles the thermal problem on 3D multi-core processors in unit level. We also identify the optimal matrix to achieve best performance varying application features, cooling characteristics, and frequency levels when the thermal problem is considered. Experimental results conclude two rules for managing and balancing the temperature of the die, especially the IntReg unit: 1) To optimize the thermal profile of both dies, the die with higher cooling efficiency should be clocked at a higher frequency; and 2) To lower the temperature of IntReg unit, workload with higher thermal impact should be assigned to cores with higher cooling efficiency.
['Young Jin Park', 'Min Zeng', 'Byeong-Seok Lee', 'Jeong-A Lee', 'Seung Gu Kang', 'Cheol Hong Kim']
Thermal Analysis for 3D Multi-core Processors with Dynamic Frequency Scaling