The decisions on when to acquire debug data during post-silicon validation are determined by trigger events that are programmed into on-chip trigger units. In this paper, we investigate how to design trigger units that are both resource-efficient and runtime programmable. To achieve these two goals, we introduce new architectural features, as well as an algorithm for automatically mapping trigger events onto trigger units.
['Ho Fai Ko', 'Nicola Nicolici']
Resource-Efficient Programmable Trigger Units for Post-Silicon Validation