The PowerPC 603 microprocessor is a low-power implementation of the PowerPC architecture. The superscalar organization includes dynamic localized shutdown of execution units to reduce normal-mode power consumption. Three levels of static low-power operation are software programmable for system power management. The 603 PLL (phase lock loop) is capable of generating an internal processor clock at 1/spl times/, 2/spl times/, 3/spl times/ or 4/spl times/ the system clock speed to allow control of system power while maintaining processor performance. Various design features optimize the 603 for both power and performance, creating an ideal microprocessor solution for portable applications. >
['Sonya Gary', 'Carl Dietz', 'Jim Eno', 'Gianfranco Gerosa', 'Sung-Ho Park', 'Hector Sanchez']
The PowerPC 603 microprocessor: a low-power design for portable applications