I/O has become the limiting factor in scaling down size and power toward the goal of invisible computing. Achieving this goal will require composing optimized and specialized--yet reusable--components with an interconnect that permits tiny, ultra-low-power systems. In contrast to today's interconnects, which are limited by power-hungry pull-ups or high-overhead chip select lines, the authors' approach operates at lower power, with a fixed pin count, using fully synthesizable logic, and with surprisingly low-protocol overhead. The authors present MBus, a new four-pin, 22.6 pJ/bit/chip chip-to-chip interconnect made of two "shoot-through" rings. MBus facilitates ultra-low-power system operation by automatically power gating each chip in the system, easing the integration of active and inactive circuits. In addition, they introduce power-oblivious communication, which guarantees message reception even if the recipient is inactive. This disentangles power management from communication, greatly simplifying the creation of viable, modular, and heterogeneous systems that draw nanowatts.
['Pat Pannuto', 'Yoonmyung Lee', 'Ye-Sheng Kuo', 'Zhiyoong Foo', 'Benjamin P. Kempke', 'Gyouho Kim', 'Ronald G. Dreslinski', 'David Blaauw', 'Prabal Dutta']
MBus: A System Integration Bus for the Modular Microscale Computing Class