The implementation of a robust, unconditionally stable, and high-Q image reject filter in standard CMOS is presented, enabling the realization of on-chip heterodyne receivers at 5 GHz and beyond. We propose the use of two cascaded notch filters, with slightly offsetted frequencies, resulting in a wide rejection bandwidth, thus eliminating the overhead of automatic tuning. A single-notch prototype achieves 62 dB of rejection at 7.4 GHz, and a double-notch design achieves 30 dB of rejection over 400 MHz
['Rola A. Baki', 'Mourad N. El-Gamal']
Robust multi-GHz (7.4GHz) on-chip image rejection in CMOS