Taking into account the nanostructures measured in Fig. 3, the charge traps in the PVPNP parts of the X-ASiO-PVPNP layers can be proposed as a core factor for memory operation for the present hybrid TOMDs. As illustrated in Fig. 5c, the PVPNP parts are charged simultaneously when the X-ASiO-PVPNP layers undergo polarization upon applying bias between the gate and source electrodes (VG = −5 V). However, the charges made in the PVPNP parts cannot easily go away but trapped inside the PVPNP parts by the heterogeneous dielectric interfaces between PVPNP and X-ASiO because of different nature of materials. So the charged PVPNP parts play a critical role in delivering the hysteresis characteristics of the hybrid TOMDs.