The main disadvantage of this type of MOSFET is the poor on-state performance, as it uses holes as charge carriers, which have a much lower mobility than electrons. As resistivity is directly related to mobility, a given PMOS device will have a formula_9 three times higher than a N-MOSFET with the same dimensions. The VMOS structure has a V-groove at the gate region and was used for the first commercial devices. In this power MOSFET structure, also called trench-MOS, the gate electrode is buried in a trench etched in the silicon. This results in a vertical channel. The main interest of the structure is the absence of the JFET effect. The name of the structure comes from the U-shape of the trench. Especially for voltages beyond 500 V, some manufacturers, including Infineon Technologies with its CoolMOS™ products, have begun to use a charge compensation principle. With this technology, the resistance of the epitaxial layer, which is the biggest contributor (more than 95%) to the device resistance of high-voltage MOSFETs, can be reduced by a factor of greater than 5. Seeking to improve the manufacturing efficiency and reliability of super-junction MOSFETs, Renesas Electronics developed a super-junction structure with a deep-trench process technique. This technology entails etching trenches in the low-impurity N-type material to form P-type regions. This process overcomes problems inherent to the multi-level epitaxial growth approach and results in extremely low on-resistance and reduced internal capacitance. Due to the increased p-n junction area, a super-junction structure has a smaller reverse recovery time but larger reverse recovery current compared to a conventional planar power MOSFET.