_:n6c8e065ec45c43b6bfab09e245732ccexb24
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"My initial though was, as long as AMD don't correct what seems to be an obvious drawback with the memory subsystem, won't this still be an issue? However, it could be that the cost (from a real estate, power, and heat standpoint) of improving IF at this point is economically higher than boosting L3 cache, and perhaps Zen4 team is already working on memory subsystem improvements, hence the shared L3 is a good stop-gap.\n\nWe shall see. I'd be very surprised if Zen 3 has no memory-latency improvements. Moving to a shared L3 for 8-cores should remove a ton of coherency issues (particularily if it's also inclusive) for all CPUs that have up to 8 cores (previously all memory relatad stuff needed to be synced between 2 CCXes, through I/O die). IMO gaming is an important market. Enough to justify optimizing at least all the CPUs up to 8 cores. It's not just the X series but all of the APUs would also benefit greatly from a simple inclusive L3 mode.\n\nInclusive L3 would not be enough for multi-chiplet CPUs (12+ cores) as these still need to coherently access the memory, but even there it should help somewhat (you only need to peek the other L3 not any L2 caches).\n\nAnyway, I would be very surprised if they redid their entire cache layout and got no memory latency improvement out of that (despite greatly simplifying things by adding unified caches)"
<https://forums.anandtech.com/threads/video-ryzen-7-3800x-5ghz-vs-core-i9-9900k-5-ghz.2580198/>