<http://schema.org/description>
"...Lead Engineer (289695)\n\nRegular Full-Time, Travel Required 20%\n\nSamsung R&amp;D Institute India-Delhi\n\nOct 18, 2016\n\nGeneral Description\n\nTo work on system modeling , bus performance evaluation , verification of NoC + DDR scheduler.\n\nNecessary Skills / Attributes\n\nSkills : Verilog , System Verilog, SystemC , good debugging skills ,\nProtocol - AXI , OCP, DDR\nFunctional verification and simulations.\nBehavioral modeling , RTL\n\nCompany Information\n\nB.Tech/M.Tech in Electronics/computer science.\n4-7 year..."^^<http://www.w3.org/2001/XMLSchema#string>
<https://tapwage.com/region/1273293-nct-india/tech-management/jobs>