<http://schema.org/description>
"\u8AD6\u6587\u76EE\u9332 /  (0002.jp2)\nTABLE OF CONTENTS / p7 (0009.jp2)\nABSTRACT / p3 (0005.jp2)\nTABLE OF CONTENTS / p7 (0009.jp2)\nLIST OF SYMBOLS / p11 (0013.jp2)\nACKNOWLEDGMENTS / p15 (0017.jp2)\nCHAPTER1 INTRODUCTION / p1 (0019.jp2)\n1.1 Background of GaAs MESFET Technology for Digital ICs / p1 (0019.jp2)\n1.2 Problems in Short Gate GaAs MESFETs / p3 (0021.jp2)\n1.3 Purpose of This Thesis / p4 (0022.jp2)\nCHAPTER2 A TWO-DIMENSIONAL NUMERICAL MODEL FOR GaAs MESFETS / p7 (0025.jp2)\n2.1 Introduction / p7 (0025.jp2)\n2.2 Fundamental Equations / p8 (0026.jp2)\n2.3 GaAs Properties and Physical Parameters / p10 (0028.jp2)\n2.4 Electron Velocity Model / p11 (0029.jp2)\n2.5 Schottky Contact Model / p16 (0034.jp2)\n2.6 Other Boundary Conditions / p19 (0037.jp2)\n2.7 Semi-Insulating Substrate Model / p20 (0038.jp2)\nCHAPTER3 AN IMPROVED ELECTRON MOBILITY MODEL FOR A TWO-DIMENSIONAL GaAs MESFET MODEL / p22 (0040.jp2)\n3.1 Intyoduction / p22 (0040.jp2)\n3.2 Improved Electron Mobility Model / p24 (0042.jp2)\n3.3 MESFET with an Ion-Implanted Channel Layer / p25 (0043.jp2)\n3.4 MESFET with an MBE-Grown Channel Layer / p38 (0056.jp2)\n3.5 MESFET with a very short gate / p43 (0061.jp2)\n3.6 Summary of Chapter 3 / p48 (0066.jp2)\nCHAPTER4 STRUCTURE DEPENDENCE OF SHORT CHANNEL EFFECTS IN GaAs MESFETS / p49 (0067.jp2)\n4.1 Introduction / p49 (0067.jp2)\n4.2 Five FET Structure Models / p51 (0069.jp2)\n4.3 Threshold Voltages and K-Values of the Five FET Structures / p57 (0075.jp2)\n4.4 Short Channel Effects in a Conventional Structure / p61 (0079.jp2)\n4.5 Reduction in the Short Channel Effects in the Other Four Structures / p68 (0086.jp2)\n4.6 Summary of Chapter4 / p69 (0087.jp2)\nCHAPTER5 TEMPERATURE DEPENDENCE OF GaAs MESFET CHARACTERISTICS / p71 (0089.jp2)\n5.1 Introduction / p71 (0089.jp2)\n5.2 FET Structure Model / p72 (0090.jp2)\n5.3 Results and Discussion / p74 (0092.jp2)\n5.4 Summary of Chapter5 / p82 (0100.jp2)\nCHAPTER6 A POSSIBLE SCALING LIMIT FOR ION-IMPLANTED MESFETS / p83 (0101.jp2)\n6.1 Introduction / p83 (0101.jp2)\n6.2 FET Model and Scaling Rule / p85 (0103.jp2)\n6.3 Barrier Height and Threshold Voltage of Scaled FET / p89 (0107.jp2)\n6.4 Attainable Minimum Threshold Voltage / p94 (0112.jp2)\n6.5 A Possible Scaling Limit for an Enhancement-Mode MESFET / p96 (0114.jp2)\n6.6 Summary of Chapter6 / p98 (0116.jp2)\nCHAPTER7 ION-IMPLANTED MESFET ISOLATION IN A SEMIINSULATING GaAs SUBSTRATE / p100 (0118.jp2)\n7.1 Introduction / p100 (0118.jp2)\n7.2 Device Isolation Model / p101 (0119.jp2)\n7.3 I-V Characteristics of an N-I-N Structure / p103 (0121.jp2)\n7.4 Minimum Isolation Distance / p111 (0129.jp2)\n7.5 Summary of Chapter7 / p117 (0135.jp2)\nCHAPTER8 SUMMARY AND CONCLUDING REMARKS / p118 (0136.jp2)\nREFERENCES / p122 (0140.jp2)\nLIST OF PAPERS / p131 (0149.jp2)\nLIST OF PRESENTATIONS / p133 (0151.jp2)\n\u535A\u58EB\u8AD6\u6587\n"^^<http://www.w3.org/2001/XMLSchema#string>
<http://ci.nii.ac.jp/naid/500000097016>