<http://schema.org/description>
"...:\n\nKey Responsibilities:\n- Responsible for participating in the pre-silicon verification for full chip, blocks, multi-chip and system level verification\n- Specifying design verification plan at SOC level/IP level\n- Specifying or reviewing verification plans for complex blocks within the ASIC\n- Responsible for developing complex verification environment using the latest coverage/assertions based verification design methodology, which includes : self-checking, reusable, automated verification envi..."^^<http://www.w3.org/2001/XMLSchema#string>
<https://tapwage.com/region/1254788-telangana-india/semiconductors/jobs>