<http://schema.org/description>
"...: Bachelor of Science Degree in computer engineering, electrical engineering or other engineering disciplines. 3+ years of experience working with complex FPGAs and/or ASICs. 3+ years of experience in Verilog / System Verilog and/or VHDL. Preferred Skills and Experience: ASIC / FPGA / SoC system integration experience. Ability to solve complex problems including clock domain crossings and power optimization. Experience with latest simulation and verification methodologies. Understanding of Datap..."^^<http://www.w3.org/2001/XMLSchema#string>
<https://tapwage.com/company/blue-origin/perl/jobs>