title: VHDL Case/When: multiple cases, single clause
body: <p>Inside a process I have something like this:</p>
  
  <pre><code>CASE res IS
    WHEN "00" =&gt; Y &lt;= A;
    WHEN "01" =&gt; Y &lt;= A;
    WHEN "10" =&gt; Y &lt;= B;
    WHEN "11" =&gt; Y &lt;= C;
    WHEN OTHERS =&gt; Y &lt;= 'X';
  END CASE;
  </code></pre>
  
  <p>Note that case <code>"00"</code> and <code>"01"</code> get the same value. Is there a correct syntax for something like</p>
  
  <p><code>WHEN "00", "01"  =&gt;</code> ?</p>
  
  <p><em>Extra note: There's far more to this than Y being changed, I just used that for simplicity. So the case/when is necessary.</em></p>