title: Using Makefile to clean subdirectories
body: <p>Is it possible to perform a make clean from the parent directory which also recursively cleans all sub-directories without having to include a makefile in each sub-directory?</p>
  
  <p>For example, currently in my Makefile, I have something like:</p>
  
  <pre><code>SUBDIRS = src, src1
  
  .PHONY: clean subdirs $(SUBDIRS)
  
  clean: $(SUBDIRS)
      rm -rf *.o *~ core .depend .*.cmd *.ko *.mod.c
  
  $(SUBDIRS):
      $(MAKE) -C $(SUBDIRS) clean 
  </code></pre>
  
  <p>However, this requires me to have a Makefile in both src and src1. Otherwise, I would get the error</p>
  
  <pre><code>No rule to make target clean
  </code></pre>
  
  <p>Since I only want to run the command "rm -rf *.o <em>~ core .depend .</em>.cmd *.ko *.mod.c" in each subdirectory anyways, it seems redundant to have to include a Makefile in every subdirectory with the exact same line for clean. Is there no way to simply have the same clean command run in each of the subdirectories?</p>