title: How to make sure interrupt can not be generated between specific Code Snippet?
body: <p>I have one question about the timing of interrupt generation between code snippets...</p>
  
  <p>@ "example" code</p>
  
  <pre><code>1. ...
  2. assign value to global variable  // 0/1 means invalid/valid
  3. set H/W register via memory-mapped IO method  // 0 means completed
  </code></pre>
  
  <p>@ "example" ISR code</p>
  
  <pre><code>a. ...
  b. if(global value is valid &amp;&amp; H/W register is "0") then count++;
  </code></pre>
  
  <ul>
  <li>One thing to note: <em>After H/W register is set, its value will be 0 when "completion" !</em></li>
  </ul>
  
  <p><em><strong>My question is</em></strong>: if the interrupt is generated between <strong>2</strong> and <strong>3</strong>, then count will be increased by one because step <strong>3</strong> is not done yet(value is 0)... And if 
  exchange <strong>2</strong> and <strong>3</strong>, then it is possible count will NOT be increased by 1 because even HW register is 0(after some time, completed) global variable is 0 !</p>
  
  <p>My first idea is: is it possible <strong>2</strong> and <strong>3</strong> can be "tied together" in some way and interrupt is not allowed to be generated until <strong>3</strong> is done ?</p>
  
  <ul>
  <li>I use watcom c and test in DOS...</li>
  </ul>