title: Using GCC dependency files causes Make to rebuild project completely every time
body: <p>I've followed the instructions online to set up gcc (actually g++) to generate .d files for dependencies, and now my makefile looks something like this:</p>
  
  <pre><code>CPPFLAGS := ... -MMD -MP
  ...
  OBJECTS := $(shell find *.cpp *.s | sed -e 's/\.cpp/\.o/' -e 's/\.s/\.o/')
  all: setupdir $(OBJECTS) link image
  </code></pre>
  
  <p>And then at the end of the file:</p>
  
  <pre><code>-include $(pathsubst %.d,obj/%.d,$(OBJECTS:.o=.d))
  </code></pre>
  
  <p>The .d files are being correctly generated, and all show up in the obj directory. The problem is, now, even with the assembly files that don't have .d files generated for them the entire source tree is being rebuilt every time I run make. The project doesn't take long to compile, but still, how would one go about fixing it so that make runs correctly?</p>