title: Controlling verbosity of make
body: <p>I'm using a makefile to compile a program made of many <code>.c</code> files, and any time <code>make</code> is invoked it only compiles those files modified after the last run (nothing special until here).</p>
  
  <p>To avoid cluttering my screen, I prepend <code>@</code> at the beginning of each <code>$(CC)</code> call, and before it I print a customized <code>echo</code> message. For example:</p>
  
  <pre><code>%.o: %.c $(h1) $(h3) %.h
      @echo -e "\tCompiling &lt;" $&lt; 
      @$(CC) $(CFLAGS) -c $&lt; -o $(libDir)$@$(MATHOPTS)
  </code></pre>
  
  <p>My question is: how can I control the verbosity of <code>make</code> in a more "dynamic way", in order to be able to:</p>
  
  <ol>
  <li><strong>Normal behaviour</strong>: only a customized message is printed for every makefile rule executed.</li>
  <li><strong>Verbose behaviour</strong>: print the command actually executed by every makefile rule (as if the <code>@</code> wasn't used at all).</li>
  </ol>