title: make: *** No rule to make target `all'. Stop
body: <p>I keep getting this error:</p>
  
  <pre><code>make: *** No rule to make target `all'.  Stop.
  </code></pre>
  
  <p>Even though my make file looks like this: </p>
  
  <pre><code>CC=gcc
  CFLAGS=-c -Wall
  
  all: build
  
  build: inputText.o outputText.o main.o
      gcc main.o inputText.o outputText.o -o main
  
  main.o: main.c
      $(CC) $(CFLAGS) main.c -o main.o
  
  inputText.o: inputText.c
      $(CC) $(CFLAGS) inputText.c -o inputText.o
  
  outputText.o: outputText.c
      $(CC) $(CFLAGS) outputText.c -o outputText.o
  </code></pre>
  
  <p>Yes there should be a tab space underneath the target and there is in my make file. </p>
  
  <p>I can get it to work if I try one of the targets like main.o, inputText.o and outputText.o but can't with either build or all. </p>
  
  <p>EDIT: 
  I just randomly tried running make and telling it the file using the following command: </p>
  
  <pre><code>make -f make
  </code></pre>
  
  <p>This works but why doesn't just typing make work?</p>