title: Why do weak memory models exist and how is their instruction order selected?
body: <p>CPUs such as ARM have the weak memory model. Assume we have two threads T1 and T2.</p>
  
  <pre><code>| T1      | T2      |
  |---------|---------|
  | Instr A | Instr C |
  | Instr B | Instr D |
  </code></pre>
  
  <p>In a weak order any instruction can run at any time which mean "D -> A -> B -> C" is possible.</p>
  
  <p>My first question is why is this beneficial? And my second question is how is the selection (optimization) done? is the CPU randomly picking them or are there algorithms behind it? Is the CPU doing the picking or there is another chip which is doing the work (memory chip or something)?</p>