title: VHDL - Need some advice on division & multiplication
body: <p>Fellow SO users,</p>
  
  <p>I'm trying to calibrate a resistive humidity sensor that I'm reading values from the ADC. The ADC outputs an 8-bit value. I'm using a Vref value of 5V.</p>
  
  <p>My first step in calibrating is to divide the number by 255 and multiply by the Vref value.
  Hence, calibrated value = (output / 255) * Vref.</p>
  
  <p>Now, in VHDL, I've come across some VHDL code to divide two numbers. The one I have divides two unsigned numbers so that shouldn't be a problem. It is over here;
  <a href="http://vhdlguru.blogspot.com.au/2010/03/vhdl-function-for-division-two-signed.html" rel="nofollow">VHDL divide two unsigned numbers</a></p>
  
  <p>Now, in my VHDL file, I have the 8 bit ADC value (humidity) and I have defined two constants, max_val (11111111 = 255) and Vref (00000101 = 5) both as unsigned.
  I'm first converting humidity to an unsigned by using unsigned(humidity) and then passing this value and the max_num value into the division function. With the result, I'm multiplying it by Vref.</p>
  
  <p>Now, my question is;</p>
  
  <ol>
  <li>Is this a good approach? I.e; the way I'm dividing and multiplying.</li>
  <li>How do I convert the unsigned value back into a std_logic_vector?</li>
  </ol>
  
  <p>Kind regards.</p>