title: vhdl "for loop" with step size not equal to 1
body: <p>I have a simple question . Is it possible to write a VHDL for loop with step size not equal to 1 e.g 16</p>
  
  <p>The loop should go like</p>
  
  <p>0--> 16 -->  32-->  48.... to some value</p>
  
  <p>any immediate help is appreciated</p>