title: Compare std_logic_vector in a if() condition vhdl
body: <p>I am trying to compare counting value (std_logic_vector) with a defined hex value. but i dont get the result the way i did as below</p>
  
  <pre><code>signal count : STD_LOGIC_VECTOR(res_bits-1 DOWNTO 0):= x"0000"; --res_bits =16
  signal round : STD_LOGIC_VECTOR(res_bits-1 DOWNTO 0):= x"0000";
  signal cnt : STD_LOGIC_VECTOR(res_bits-1 DOWNTO 0):= x"0000"; --res_bits =16
      process(clk_50)
  begin
      if (falling_edge(clk_50)) then
          t(1)&lt;=t(0); 
          t(0)&lt;=A;
          t(3)&lt;=t(2); 
          t(2)&lt;=B;
          case (temp) is
              when "0001" =&gt; cnt&lt;= cnt + '1';
              when "0010" =&gt; cnt&lt;= cnt - '1';
              when "1000" =&gt; cnt&lt;= cnt + '1';     
              when "1011" =&gt; cnt&lt;= cnt - '1';
  
          end case;
          count &lt;= cnt;
          if (count = x"0320") then --if count 800
              round &lt;= round + '1';
              cnt &lt;= x"0000";   -- reset cnt
              count &lt;= x"0000";   -- reset count
          end if;
      end if;
  end process;
  </code></pre>