title: Turning a number negative in Verilog
body: <p>When you have a <code>binary number</code>, <code>A = 5'b00100</code>, and you get the negative <code>version</code> of it, <code>B</code>.</p>
  
  <pre><code> reg signed [4:0] A, B;
   B = -A;
  </code></pre>
  
  <p>What does this do?</p>