title: x86 segment descriptor layout - why is it weird?
body: <p>Why did Intel choose to split the base and limit of a segment into different parts in the segment descriptor rather than using contiguous bits?</p>
  
  <p>See figure 5-3 of <a href="http://css.csail.mit.edu/6.858/2014/readings/i386/s05_01.htm" rel="noreferrer">http://css.csail.mit.edu/6.858/2014/readings/i386/s05_01.htm</a></p>
  
  <p>Why did they not store base address in bits 0 through 31, limit in bits 32 through 51 and use the remaining position for other bits (or some similar layout)?</p>