The present invention relates to a receiving circuit to be used for a MSK (Minimum Shift Keying) receiver or QPSK (Quadrature Phase Shift Keying) receiver, and more particularly to a demodulating circuit which operates to stably demodulate a digital angle modulated signal under the drifting condition of a an intermediate-frequency resulting from the drift of a local oscillator and to provide an intermediate-frequency signal required for demodulating a suppressed-carrier double sideband signal, the demodulating circuit being proper to a heterodyne receiver for receiving a signal from a broadcasting satellite or a communication satellite.
A Communication Satellite (CS) audio broadcasting system capable of doing PCM broadcasting in a multi-channel manner employs a direct frequency modulation system for directly modulating a carrier in the overlapped condition of multi-channel signals. The CS audio broadcasting system employs an electromagnetic wave MSK-modulated at a transmission rate of 24,576 Mbps. In order to reduce the fixed deterioration, the coherent detection type demodulating circuit for a digital angle modulated wave such as a MSK-modulated wave or a QPSK-modulated wave normally has a carrier recovery circuit whose capture range is designed to be as narrow as several hundreds kHz. On the other hand, a frequency converter is, in general, located immediately after an antenna for the purpose of reducing a cable loss after receiving a wave from the satellite. Since the frequency converter has a local oscillator, it is necessary to consider about .+-.1.5 MHz of frequency variation appearing in the local oscillator. To compensate for the frequency variation, a pull-in circuit is required to be installed for synchronizing the received signal. In addition, the demodulating performance greatly depends on the frequency variation.
An example of a demodulating circuit for stably demodulating the MSK-modulated signal has been disclosed in JP-A-63-30049. This circuit is arranged so that another converter is provided in addition to an antenna converter; a selection converter and a phase error signal of the MSK demodulating circuit is fed back to the additional converter. That is, the circuit has a three-stage heterodyne arrangement. FIG. 1 shows this circuit. The antenna converter is not shown in FIG. 1. As shown, 1 is an input terminal. 2 is a first local oscillator. 3 is a first mixer, 4 is a second local oscillator. 5 is a second mixer. 6 is a band-pass filter (BPF). 7 is a first multiplier. 8 is a second multiplier. 9 is a reference oscillator. 10 is a .pi./2 phase shifter. 11 is a first low-pass filter (LPF). 12 is a second LPF. 13 is a first discriminating circuit. 14 is a second discriminating circuit. 15 is an inverter. 16 is a digital signal processing circuit. 17 is an output terminal for a reproduced signal. 18 is a third multiplier. 19 is a fourth multiplier. 20 is a loop filter. 21 is a clock recovery circuit. 22 is a MSK demodulating circuit. The demodulating circuit shown in FIG. 1 is arranged to have a first and a second frequency converting circuits. The first frequency converting circuit is composed of the first local oscillator 2 and the first mixer 3. The second frequency converting circuit is composed of the second local oscillator 4 and the second mixer 5. The first and the second frequency converting circuits serve to lower a carrier frequency in a dual heterodyne manner in which two frequencies are prepared for an intermediate frequency. Though the operation of the demodulating circuit is not descriptive in detail, the input modulated signal is converted into first and second intermediate frequencies. The first multiplier 7 serves to multiply the signal converted into the second intermediate frequency by a in-phase carrier generated in the reference oscillator 9. The second multiplier 8 serves to multiply the signal converted into the second intermediate frequency by a quadrature carrier generated in the .pi./2 phase shifter 10. That is, the first and the second multiplier 7 and 8 perform the synchronous wave detection and produce an in-phase component and a quadrature component, respectively. Then, the third multiplier 18 serves to multiply the in-phase component by the quadrature component. The multiplied result of the third multiplier 18 is sent to the fourth multiplier 19 in which it is further multiplied by a clock signal recovered in the clock recovery circuit 21. Those multipliers 7, 8, 18, 19 compose a negative feed-back loop for keeping a constant phase difference between the second middle frequency and the output of the reference oscillator 9. This prior art may use a highly-stable crystal oscillator as the reference oscillator 9. Hence, if the frequency of the first local oscillator 2 is drifted due to the ambient temperature variation or the temperature variation resulting from the electronic conduction, the negative feed-back loop makes the second intermediate frequency stable. This prior art is capable of recovering the carrier and demodulating a modulated wave if the intermediate frequency is drifted as a result of drifting the first local oscillator of the heterodyne receiver. However, this prior art cannot sufficiently compensate for the drift of the antenna converter. Hence, if the drift may appear in the range of several megahertz, the demodulating performance is degraded. FIG. 2 shows a relation between a bit error rate (BER) and a detuning frequency, which shows a demodulating performance. As shown in a curve (a) of FIG. 2, the BER characteristic degrades as the frequency goes farther from the center. As shown in a curve (b) of FIG. 2, the degrading amount can be reduced as the loop gain is made larger. If the loop gain is made too large, however, a noise-caused erroneous operation may result if a C/N (Carrier to Noise Ratio) is low. Hence, the modulating circuit has difficulty in synchronizing the signals when the C/N is made lower.
An example of a pull-in circuit for compensating for the detuning phenomenon resulting from the frequency drift has been disclosed in JP-A-62-136152. As shown in FIG. 3, this pull-in circuit is provided in the modulating circuit for the QPSK-modulated signal and is arranged so that when a synchronous state is not detected in a digital signal processing unit, a low-frequency sweep signal is pulled into the modulating circuit in a manner of being overlapped with a control voltage of a voltage controlled oscillator included in the QPSK carrier recovery circuit. If the synchronous state is detected, the supply of the sweep signal is stopped. In FIG. 3, 101 is an antenna through which an electromagnetic wave on the band of 12 GHz is received. 102 and 103 are antenna converters. Specifically, 102 corresponds a mixer and 103 corresponds to a local oscillator. The mixer 102 serves to convert the received wave into a signal on the band of 1 GHz. 105 is a band-selecting local oscillator. 104 is another mixer. The mixer 104 serves to convert the signal into the signal on the band of 400 MHz. 106 is a band-pass filter for restricting a band. 107 is a QPSK demodulating circuit. 113 is a loop filter. 114 is a voltage controlled oscillator for recovering a carrier. 108 is a digital signal processing unit. 109 is a synchronous pattern detector included in the signal processing unit 108. When the QPSK demodulating circuit 107 enters into a synchronous state, the synchronous pattern is detected and the synchronous pattern detector 109 outputs a detection signal. This QPSK demodulating circuit 107 has a capture range of about .+-.500 kHz and a locked range of about .+-. several megahertz (MHz). If the local oscillator 103 drifts excessively, the demodulating circuit 107 cannot carry out the synchronous pull-in operation. To overcome this disadvantageous state, a low-frequency oscillator 110, a switch 111, and an adder 112 are provided. If no synchronous pattern is detected, the switch 111 is turned on for adding a low-frequency signal into a carrier phase error signal and sweeping the voltage controlled oscillator 114.
This prior art utilizes the characteristics appearing when the capture range is narrow and the locked range is wide. The capture range may be apparently made wider. This arrangement makes it possible to pull in the low-frequency sweep signal if the carrier frequency is shifted from the center. However, the demodulating performance against the frequency shift is degraded as shown in FIG. 2. Further, this circuit arrangement has a shortcoming that a signal spectrum is cut out and the demodulating performance is more degraded accordingly if the input carrier frequency is shifted, because the band-pass filter 106 for restricting the band located at the previous stage of the QPSK demodulating circuit has a fixed frequency.
The MSK modulated signal is a phase-serial FSK signal. Hence, it can be considered as a kind of FM wave. An automatic frequency control (AFC) AFC circuit is arranged in light of this feature. That is, the AFC circuit operates to FM-detect the input signal and feed back the error signal obtained by comparing the detected signal with the reference frequency to a band-selecting local oscillator. FIG. 4 shows the prior art disclosed in ITEJ Technical Report Vol.11, No.31, pp 7-12, TEBS'87-24 November 1987. In FIG. 4, 101 is an antenna through which an electromagnetic wave on the band of 12 GHz is received. This signal is sent to a down converter in which the signal is converted into a signal on the band of 1 GHz. The resulting signal is sent to a mixer 104. 105 is a PLL synthesizer type local oscillator which serves to select the band from the signal and convert the signal into the signal on the band of 140 MHz. Then, the 140-MHz signal is input to a MSK demodulating circuit 115 through a band-pass filter 106 for restricting the band. If the input frequency is shifted, no synchronous pull-in operation is carried out. Hence, the AFC circuit shown in FIG. 4 is used. Since the MSK signal is a kind of FM wave, the band-restricted signal is divided by the FM detector 116 and the divided frequency is compared with a reference frequency 117 for accurately knowing the direction and the amount of the frequency shift. Herein, the input signal is divided into 64 and further into 256. Then, the 256-divided signal is compared with the reference frequency of 8.545 kHz. The microcomputer 118 serves to control the band-selecting local oscillator of a PLL synthesizer type for the purpose of absorbing the frequency shift.
The feature of this prior art is that a high-precision digital FM detector provided independently of the MSK demodulating circuit makes the AFC operation possible even if the MSK demodulating circuit is not in the conducting state. However, this type of system has a shortcoming that if the input signal has an inferior C/N, the input signal cannot be accurately divided, that is, the AFC operation is made impossible if the input signal has an inferior C/N, though the digital type FM detection can achieve more accurate detection. Another shortcoming is that a circuit arrangement becomes complicated, because it is necessary to provide a high-precision FM detecting circuit leased for the AFC operation. As a further shortcoming, this arrangement does not prepare any FM detecting operation for the QPSK signal. Hence, it is inoperative to the QPSK signal.
As mentioned above, the disclosed prior art have a disadvantage that the demodulating performance is degraded if the carrier frequency of the digital angle modulated signal is shifted from the center frequency as being caused by the frequency drift of the antenna converter (outdoor unit). As the loop gain is made far higher, the operation becomes unstable if the C/N ratio is low. Further, for the MSK-modulated signal, it is possible to provide a high-precision FM detector leased for the AFC operation in order that the demodulating performance may be kept stable if the carrier frequency is shifted. However, the high-precision FM detector also operates unstably if the C/N ratio is low.
In particular, the prior art shown in FIG. 1 is capable of reproducing a carrier and demodulating a modulated wave if the intermediate frequency drifts as the first local oscillator of the heterodyne receiver drifts. However, the heterodyne receiver for receiving a signal from the broadcasting satellite or the communication satellite includes the third mixer and the local oscillator as outdoor units and the first and the second mixers and the local oscillator as indoor units. The great drift may take place in the third local oscillator located outdoors. Moreover, in order to improve the interference characteristic against the recent increase of receiving channels, the BPF is located between the first and the second mixers. If the drift may take place in the second and the third local oscillators, the attenuation of the sideband wave in the BPF results in disadvantageously increasing the error ratio of the reproduced signal.