The present invention is directed to a logic circuit having a single three state input with a pair of binary outputs.
A semiconductor device using conventional binary coding uses a number of input lines, each of which may be in one of two logic states, 0 or 1. The number of input lines determines the number of different possible input states. For n input lines using binary coding, 2.sup.n different input states may be defined.
To increase the number of input states additional input lines are necessary. This requires a considerable amount of space in the semiconductor device for connecting pins and bonding pads. The size of semiconductor devices is a prime consideration in their design and application. A substantial savings in the space required for the pins and pads could be effected by a device which required fewer input lines.
Devices are disclosed in Aoki U.S. Pat. No. 3,602,703 and Kane patent 3,697,775 which produce three distinct output logic states (0, 1 and floating) on a single line. The number of different input states which may be determined by such ternary coding is greater than that possible by binary coding. For n input lines using such ternary coding, a total of 3.sup.n different input states may be defined.