1. Field of the Invention
The present invention relates to a semiconductor device having a package structure and a manufacturing method of the same.
2. Description of the Related Art
In semiconductor devices, the sizes of the semiconductor chips become larger as the integration degrees of the integrated circuits become higher, and the surface-mount packages are gradually changed from DIP (Dual Inline Package) to thin flat packages such as SOP (Small Outline L-leaded Package), SOJ (Small Outline J-Leaded Package), PLCC (Plastic Leaded Chip Carrier), and especially QFP (Quad Flat Package). Now the industrial tendency changes to more aggregated packages such as BGA (Ball Grid Array), CSP (Chip Size Package), FC (Flip Chip) and non-lead packages.
Recently, in order to respond to requests for microfabrication and high integration, thin package structures represented by TSOP (Thin Small Outline L-Leaded Package) attract attention. TSOP is an ultra-thin SOP of which package mounting height is 1.27 mm or less, and is expected to be applied to an ultra-thin electronic apparatus of a card type or the like.
Electronic components such as diodes, transistors and integrated circuits are sealed by thermosetting resins. Especially in integrated circuits (IC), an epoxy resin, which has excellent heat resistance and moisture resistance as such a thermosetting resin, is frequently used as a sealing resin.
As the sealing resin, an epoxy resin composition exhibiting very large heat dissipation on encapsulating a high power generating IC chip (see Japanese Patent Application Laid-open No. 2002-179763), an epoxy resin composition excellent in moisture resistance and long term stability and including favorable characteristics for a semiconductor sealing material, a laminate, a solder resist and the like (see Japanese Patent Application Laid-open No. 5-163328), an epoxy resin composition excellent in fillability for filling gaps in an odd-shaped package with filling ratios of a top surface and a bottom surface differing and excellent in productivity and moisture resistance reliability after mounting by using only fine globular silica having an average particle size of 5 μm or less, and the like (see Japanese Patent Application Laid-open No. 2001-89643) have been developed.
In SOP, adhesion between a stage and a sealing resin is weak, and therefore, peeling-off of the sealing resin from the stage back surface becomes a problem. Therefore, in order to enhance adhesion of the stage and the sealing resin, a sealing resin with a large filler amount is generally used as the sealing resin. The filler amount mentioned here indicates the filler amount dissolved in the sealing resin.
On the other hand, in TSOP, a semiconductor chip easily peels off from a stage, and therefore, a sealing resin with high adhesion strength is used. However, peeling-off of the sealing resin from the stage does not become a problem. Therefore, it is general to use a sealing resin at low cost with a small filler amount, which is easy to fill. If a resin with a large filler amount is used as a sealing resin in TSOP, cost is increased, and the sealing resin does not reach the end of a mold, which causes the problem of fine pin holes formed in the surface of the sealing resin, or the like. Therefore, resins with low filler contents are practically used for TSOP as sealing resins.
In the semiconductor memories of recent years, a high-speed non-volatile memory with low power consumption and a large number of rewrites, which is called FeRAM using a ferroelectric capacitor having ferroelectric characteristics attracts attention, and is expected to develop hereafter. However, the ferroelectric capacitor has the characteristics that it is weak in water, hydrogen and stress. Therefore, a measure for preventing water/hydrogen from entering the inside of a semiconductor element is essential. As a prevention measure, necessity of preventing entrance of water/hydrogen from the surface of the protection material especially after being packaged is considered to be important.
The resin with a small filler amount which is used in TSOP does not become a problem when used as sealing resins in ordinary devices. However, the resins with small filler amounts have a large generation amount of gases with hydrogen as a component due to high solvent ratios. Therefore, when a resin with a small filler amount is applied to TSOP of a FeRAM, there arises the problem of having an adverse effect on the ferroelectric capacitor which is weak against hydrogen.
When the resin with a small filler amount is used for the sealing resin, the protection material formed is in the porous (non-dense) state, and therefore, it has the characteristic of absorbing water. By the effect of the absorbed water, there is the problem that the sealing resin expands to cause a crack and the semiconductor element is broken.
Warpage occurs to a sealing resin by expansion pressure as a result of absorbing water, compression (or contraction) stress is applied to an inside of the semiconductor chip by the expansion pressure, and the stress is exerted on the ferroelectric capacitor, thus causing the serious problems that the data holding function is lost, the data cannot be read out, a malfunction occurs and the like.