The present invention relates to a semiconductor device and, more particularly, to a semiconductor device having a voltage converting circuit to supply power to insulated gate MOS transistors each of which has a very short effective channel length.
Recently, manufacturing technology for MOS LSIs has developed remarkably so that very small MOS transistors can be formed on a semiconductor chip with high integration. A very large scale integrated circuit (i.e., VLSI) having tens of thousands of MOS transistors, each having an effective channel length of about 1.5 .mu.m, has already been developed. It is believed that a MOS transistor having an effective channel length of less than 1 .mu.m will be formed on a semiconductor chip in the future.
In the case of increasing the degree of integration of a MOS LSI circuit without changing the operation voltage, as the effective channel length of a MOS transistor is reduced, the electric field in the MOS transistor generally increases and, thus, is larger than that before such a reduction. The following phenomena are induced due to this increase in the electric field and become obstacles, particularly in the development of an MOS LSI circuit having submicron MOS transistors (that is, MOS transistors having effective channel lengths less than 1 .mu.m). These phenomena include:
1. Generation of hot electron or hot hole due to impact ionization.
2. Increase in substrate current.
3. Punch through.
4. Change in threshold voltage with the elapse of time that is caused since a gate insulation film traps the hot carrier and the like.
Especially, the time-change of the threshold voltage shown in the fourth item largely affects the performance and reliability of a MOS transistor.
As countermeasures to these phenomena, it is important to prevent the occurrence of a high electric field in the channel on the drain side. For example, use of Lightly Doped Drain (LDD) transistor technology can be considered whereby the drain of the MOS transistor is formed at a low density. Although this low-density drain can reduce the electric field in the channel, the conductance of the MOS transistor will decrease due to this type drain. In the case where a smallest MOS transistor than the current MOS transistor is desired, this reduction of conductance cannot be ignored. Additionally, the transistor's manufacturing process becomes difficult. Therefore, the usefulness of such a countermeasure will become less in the future, although this method is presently being used.
As another countermeasure the operating voltage of the MOS transistor can be set to a low value. However, this counter-measure can be impractical since a submicron MOS LSI circuit has not come into wide use yet. For instance, in the case where the MOS LSI circuit is one of the circuit parts of a computer system, the MOS LSI circuit is ordinarily operatively connected to other circuit parts, e.g., TTL devices on a printed circuit board. Therefore, to realize miniaturization and cost reduction of a computer system, it is desired that electricity be commonly supplied from a single power source to these circuit parts. If the operating voltage of the MOS LSI circuit is lower than those of other circuit parts, the computer system will need an additional power source for the MOS LSI circuit. Since, in current computer systems, the operating voltage (i.e., 5 V) of the TTL device has been adopted as the standard power source voltages, it is desired that the MOS LSI circuit operate at 5 V irrespective of the effective channel length of the MOS transistors.