The invention relates to the general field of integrated circuits with particular reference to electromigration in connections of the dual damascene type.
Electromigration (EM) has long been a problem for the semiconductor industry. Briefly stated, as electrons pass through a conductor they tend to drag the metallic ions of the conductor along with them through electrostatic attraction. This results in a slight concentration gradient in the direction of electron flow which in turn sets up an opposing diffusion gradient, or so-called back pressure, that tends to move ions towards regions of lower density. If current flows for long enough at a sufficiently high current density, the xe2x80x98electron windxe2x80x99 effect dominates and vacancies form which eventually lead to voids and, finally, open circuits.
Referring now to FIG. 1, we illustrate the above observations by showing a cross-section of a standard dual damascene section of wiring such as would typically be found in an integrated circuit. Trench 10 has been formed in dielectric layer 14 and then just filled (by first overfilling and then planarizing) with metal 11. Vias 12 extend downwards from near the ends of the trench to the next lowest level of wiring 13. In this example, electrons normally flowed from left to right so movement of metal ions was in the direction shown by arrow 17. As discussed above this resulted in a diffusion gradient, or back pressure, in the direction of arrow 16.
Experience has shown that failure due to EM always occurred in the via (area 15 in FIG. 1, for example) at, or close to, the sites of current direction change. Additionally it was observed that no failures occurred when the connectors (wiring) were short (distance between vias less than about 50 microns). Also noted was that the failures were always associated with the topmost level of wiring. This latter observation was not unexpected since the topmost wiring level is known to carry the highest currents. FIG. 2 is a plan view looking down onto trench 10.
As expected, EM is more prevalent the lighter the ion involved. Thus, light metals such as aluminum or titanium exhibit EM effects much sooner than do heavier metals such as tungsten or tantalum. A number of solutions to the EM problem have been developed by the prior art, particularly for aluminum. Most notable of these has been the addition of a few percent of copper to the aluminum. Such a solution, while effective with respect to reducing EM, comes at the price of increasing the resistance of the connector. Thus, there exists a need for an approach that reduces EM without increasing the resistivity of the wiring material.
A routine search of the prior art was performed with the following references of interest being found:
In U.S. Pat. No. 5,696,030, Cronin is concerned with interconnect EM which is reduced by increasing the area over which contact is made to studs emerging from the chip""s edge. In U.S. Pat. No. 5,963,831, Fu is also concerned with interconnect EM and effectively eliminates hot spots (areas of high current density) by using multiple parallel vias (not dummy vias). Adjustable series resistors are included which ensure equal current flow through each via.
In U.S. Pat. No. 5,770,519, Klein et al. line their vias with a metal that is known to exhibit high resistance to EM. This lining acts as a reservoir that fills in any voids in the main body of the via as soon as they form
U.S. Pat. No. 6,091,080 (Usui) shows a method to evaluate EM in lines using a void while in U.S. Pat. No. 6,072,945, Aji et al. show a system for EM verification.
It has been an object of the present invention to provide, for an integrated circuit, wiring that is not subject to failures due to electromigration.
Another object has been to provide, for an integrated circuit, wiring that is not subject to failure inside a connecting via due to electromigration.
A further object has been to provide, for an integrated circuit, damascene wiring that is not subject to failure inside a connecting via due to electromigration.
A still further object has been to provide, for an integrated circuit, top level damascene wiring that is not subject to failure inside a connecting via due to electromigration.
Yet another object has been to provide, for an integrated circuit, very long top level damascene wiring that is not subject to failure inside a connecting via due to electromigration.
These objects have been achieved by introducing, as part of the wiring, local back-diffusion sources that serve to increase back pressure on the metal that makes up the wire, thereby reversing the trend towards electromigration. These sources are located close to the vias (inside which most electromigration failures are mainly found) and may take the form of discrete local areas where the wiring is wider or they may be introduced as dummy vias.