1. Field of Invention
The present invention relates to a cylindrical bonding structure and its method of manufacture. More particularly, the present invention relates to a cylindrical bonding structure for a flip chip package and a method of fabricating the cylindrical bonding structure.
2. Description of Related Art
In this information-saturated society, working with electronic products has become an integral part of our daily life. Currently, integrated circuit products are used for doing business, educating our children or providing us with games for recreation. As a result of rapid progress in electronic technologies, devices having powerfill functions and personalized designs have been developed. Moreover, most electronic products have light and compact design. Nowadays, high-density integrated circuits are frequently housed with in compact semiconductor packages such as a flip-chip package and a ball grid array (BGA) package.
In the flip-chip technique, bumps are formed on the bonding pads of a chip so that the bumps may be attached to corresponding contact points on a substrate after flip over. Compared with conventional wire bonding and tape automatic bonding (TAB) packaging techniques, a flip-chip package has the shortest signal transmission path between the chip and the substrate and hence has superior electrical properties. In addition, a flip-chip package may be designed to have its back exposed so as to increase heat dissipation rate. Due to the above reasons, flip-chip packaging techniques are widely adopted in the semiconductor fabrication industry.
FIG. 1A is a partially magnified view showing a connection configuration between a bump on a chip and a contact point on a substrate in a conventional flip-chip package. A chip 110 normally has a plurality of bonding pads 112 (only one is shown in FIG. 1A). Each bonding pad 112 has a bump 114. In general, the bump 114 is a solder bump so that the flip-over chip 110 may directly connect with one of the bonding pads 122 (only one is shown in FIG. 1A) on the substrate 120. Since the chip 110 and the substrate 120 each has a different coefficient of thermal expansion (CTE), a standoff distance must be provided between the chip 110 and the substrate 120 so that differential thermal expansion will not accumulate too much shear stress to break the bumps 114 prematurely.
Thus, to prevent shear stress from damaging the bumps 114, bumps 114 having a great height are often attached to the bonding pads 112 of the chip 110 so as to increase the distance of separation between the chip 110 and the substrate 120 as much as possible. However, increasing the overall height of the bumps 114 must be accompanied by a corresponding increase in outer diameter and volume of the bumps. Moreover, to prevent short-circuiting, pitch between neighboring bumps 114 must be increased. Ultimately, distance between neighboring bonding pads 112 on the chip 110 is hard to reduce.
In addition, pre-solder material is often applied on the junction pads 122 of the substrate 120 before the lower end of the bumps 114 are put against the pads 122. In a reflow operation, the low melting point pre-solder melts and joins the bumps 114 and the junction pads 122 together. Because an additional step of applying low melting point solder over the junction pads 122 of the substrate 120 has to be conducted, cost of fabricating the substrate 120 is increased Furthermore, to increase the distance of separation between the chip 110 and the substrate 120, high lead solder is a principle ingredient of the bumps 114. Since a high temperature treatment of the bump material to form a spherical shape bump often produces oxide material near the surface, the bumps 114 and the junction pads 122 often have poor adhesion after the solder reflow process. Poor adhesion often leads to bad electrical connections between the chip and the substrate and a low overall yield of the flip chip package.
FIG. 1B is a partially magnified view showing an alternative connective configuration between a bump on a chip and a contact point on a substrate in a conventional flip-chip package. A solder mask 124 is formed over the substrate 120 to pattern out contact area around the junction pads 122. In fact, there are two major patterning techniques that employ the solder mask 124. The first one is called a ‘solder mask define’ (SMD) and the other one is called a ‘no solder mask define’ (NSMD). In FIG. 1A, a ‘solder mask define’ (SMD) technique is used. An opening 126 in the solder mask 124 exposes a portion of the junction pad 122 so that a bump on the chip 110 is in a corresponding position over the junction pad 122 on the substrate 120. In FIG. 1B, a ‘no solder mask define’ (NSMD) technique is used. An opening 126 in the solder mask 124 completely exposes a junction pad 122 so that a bump is completely connected to the junction pad 122. The most commonly used material for forming the solder mask 124 is, for example, green lacquer.
To shorten pitch between neighboring junction pads 122, SMD technique such as the one shown in FIG. 1A is often employed. Only a portion of the junction pad 122 is exposed through the solder mask 124 for contact with the lower edge of a bump 114 (shown in profile by dash lines 114a). However, because actual dimension of a bump 114 may vary from the standard dimension by .+−.10%, variation in positional accuracy between the bump 114 and the junction pad 122 of up to 10 micrometers is possible. Furthermore, the opening 126 in the solder mask layer 124 may have an intrinsic diametrical variation of about 15 micrometers. Hence, when the bump 114 and the junction pad 122 are laid on top of each other, the lower edge of the bump 114 may not come into direct contact with the surface of the junction pad 122. In extreme cases, part of the outer edge of the bump 114 may lean upon the upper corner of the opening 126 of the solder mask layer 124 shown by the dash line 114b in FIG. 1A. Hence, after a solder reflow operation, the bump 114 may not be properly bonded with the junction pad 122 to form a good electrical connection. To ensure proper bonding between the lower edge of the bump 114 with the junction pad 122, diameter of the opening 126 of a conventional solder mask 124 is generally larger than the external diameter of the bump 114. Since distance between neighboring junction pads 122 must be increased to accommodate the extension, ultimate level of integration is greatly reduced.