Memory devices are typically provided as internal storage areas in computers. The term memory identifies data storage that comes in the form of integrated circuit chips. In general, memory devices contain an array of memory cells for storing data, and row and column decoder circuits coupled to the array of memory cells for accessing the array of memory cells in response to an external address.
One type of memory is a non-volatile memory known as flash memory. A flash memory is a type of EEPROM (electrically-erasable programmable read-only memory) that can be erased and reprogrammed in blocks. Many modern personal computers (PCs) have their BIOS stored on a flash memory chip so that it can easily be updated if necessary. Such a BIOS is sometimes called a flash BIOS. Flash memory is also popular in wireless electronic devices because it enables the manufacturer to support new communication protocols as they become standardized and to provide the ability to remotely upgrade the device for enhanced features.
A typical flash memory comprises a memory array that includes a large number of memory cells arranged in row and column fashion. Each of the memory cells includes a floating-gate field-effect transistor capable of holding a charge. The cells are usually grouped into blocks. Each of the cells within a block can be electrically programmed on an individual basis by charging the floating gate. The charge can be removed from the floating gate by a block erase operation. The data in a cell is determined by the presence or absence of the charge on the floating gate.
Memory devices are typically formed on semiconductor substrates using semiconductor fabrication methods. The array of memory cells is disposed on the substrate. Isolation trenches formed in the substrate within the array and filled with a dielectric, e.g., shallow trench isolation (STI), provide voltage isolation on the memory array by acting to prevent extraneous current flow through the substrate between the memory cells. The isolation trenches are often filled using a physical deposition process, e.g., with high-density plasma (HDP) oxides. However, the spacing requirements for flash memory arrays often require the isolation trenches to have relatively narrow widths, resulting in large aspect (or trench-depth-to-trench-width) ratios. The large aspect ratios often cause voids to form within the dielectric while filling these trenches using physical sputtering processes.
Filling the trenches with spin-on-dielectrics (SODs) can reduce the formation of voids within the dielectric during filling. However, spin-on-dielectrics usually have to be cured (or annealed) after they are disposed within the trenches, e.g., using a steam-oxidation process that can result in unwanted oxidation of the substrate and of layers of the memory cells overlying the substrate. To protect against such oxidation, the trenches can be lined with a nitride liner prior to filling the trenches with a spin-on-dielectric. One problem with nitride liners is that they can store trapped charges that can adversely affect the reliability of the memory cells and thus the memory device.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for alternatives to existing trench-fill methods.