The present invention relates to a method for fabricating a semiconductor device, more specifically to a semiconductor device comprising a GaS film on a compound semiconductor layer, and a method for fabricating the same.
Recently, semiconductor devices using compound semiconductors, such as GaAs MESFETs (Metal-Semiconductor Field Effect Transistors) and HEMTs (High Electron Mobility Transistors), are noted as very high speed devices. GaAs MESFETS are already used in mobile communication, as of portable telephones, and HEMTs are used in antennas for satellite broadcasting receivers, etc.
On the other hand, a high speed semiconductor device which is applicable to circuits has an electric power consumption which is low and requires high power outputs. As such device, GaAs MISFETS (Metal-Insulator-Semiconductor Field Effect Transistors) are noted.
FIG. 6 shows a sectional structural view of a GaAs MISFET, which shows a structure thereof. An undoped GaAs buffer layer 42 is formed on a GaAs substrate 40. A GaAs active layer 44 doped with an n-type impurity is formed on the buffer layer 42. Source electrodes 46a and drain electrodes 46b are formed on the active layer 44, spaced from each other. Gate electrodes 50 are formed on the active layer 44 between the respective source electrodes 46a and the drain electrodes 46b through a gate insulation film 48.
The MISFET uses field effect of electric fields applied to the active layer 44, and it is very important for the device to have better device characteristics how to suppress affection of interface states between the active layer 44 and the gate insulation film 48.
Conventionally as the gate insulation film 48 of the GaAs MISFET, insulation films of SiO.sub.2, Al.sub.2 O.sub.3 etc. have been studied. However, it is known that the formation of the gate insulation film 48 of such insulation films on the active layer 44 generates high interface state density. It has been found difficult to practically form the GaAs MISFET including the gate insulation film 48 of such insulation films.
In this background, the inventors of the present application proposed a semiconductor device including an amorphous GaS (gallium sulfide) film as the gate insulation film 48 in Japanese Patent Application No. 248170/1996. Because the GaS film can lower the interface state density generated on the interface with the GaAs layer, the use of the GaS film as the gate insulation film 48 allows the GaAs MISFET to have better characteristics.
On the other hand, in consideration of fabricating an integrated circuit of the MISFETs, to interconnect the devices by a metallization layer to be formed on the devices it is essential that the metallization layer is insulated from the regions other than the contact regions. To this end, the tops of the MISFETs must be covered with an inter-layer insulation film of SiO.sub.2, SiON, SiN or others.
Furthermore, to connect the metallization layer to the gate electrodes, etc. it is necessary to form openings in the inter-layer insulation film. In addition, the interlayer insulation film must be etched with good selectivity with respect to the gate insulation film of GaS film. This is because erosion of the GaS film due to poor controllability for etching the inter-layer insulation film may degrade characteristics of the MISFETs.
However, the conventional methods for fabricating semiconductor devices have failed to establish a technique of etching the insulation film with good selectivity with respect to the GaS film. In a case that the inter-layer insulation film is formed of SiO.sub.2, SiON, SiN or others, the etching cannot be stopped on the gate insulation film with good controllability. Resultantly, characteristics of the MISFETs are often degraded in the step of forming the openings, which makes it impossible to fabricate the integrated circuit of the MISFETS.