Traditional fabrication processes used in the manufacture of semiconductor devices employ microlithography to pattern integrated circuits onto a circular wafer formed of a semiconductor such as silicon. Typically, the patterned wafers are segmented into individual integrated circuit chips or dies to separate the integrated circuits from one another. The individual integrated circuit chips are assembled or packaged using a variety of packaging technologies to form semiconductor devices that may be mounted to a printed circuit board. These packaging technologies are constantly evolving to develop smaller, cheaper, more reliable, and more environmentally-friendly packages.
Wafer-level packaging, a type of chip-scale packaging technology, has been used to package integrated circuit chips at wafer level, prior to segmentation. Wafer-level packaging extends the wafer fabrication processes to include device interconnection and device protection processes. For example, under ball metallization (UBM) may be applied to each peripheral bonding pad of each chip in the wafer. The UBM typically provides a strong, stable, low resistance electrical connection between a contact pad (e.g., an aluminum pad) of the device and a solder ball since contact pads are usually not a readily solderable surface. The UBM may also provide an electrical connection between a solder ball and a redistribution structure, which redistributes the peripheral bonding pads of each chip to an area array of pads (e.g., which may be formed of UBM) that are deployed over the chip's surface.