The present invention relates to a method of manufacturing a semiconductor device and a semiconductor device.
In recent years, transistors are becoming increasingly finer and the number of transistors embedded in a semiconductor integrated circuit is increasing. In addition, a wire for connecting transistors is becoming longer and the delay of electrical signals passing through the wire is growing.
A multilayer wiring structure interconnecting upper wiring and lower wiring through a via hole is used. Low-resistance Cu is adopted as a metal wiring material. When forming a Cu wiring, a barrier layer to prevent diffusion of Cu needs to be formed between an interlayer dielectric film and the Cu wiring.