Semiconductor devices are used in a variety of electronic applications, such as personal computers and cellular phones, for example. The semiconductor industry in general is being driven to decrease the size of semiconductor devices located on integrated circuits. Miniaturization is generally needed to accommodate the increasing density of circuits necessary for today's semiconductor products.
One common technology is complementary metal oxide semiconductor (CMOS), which is preferred because components can be fabricated to operate at relatively low power rates. An example of a MOS transistor 10 is shown in FIG. 1. The transistor 10 includes a source 12 and a drain 14, which are both formed in a semiconductor substrate 16. A gate 18 overlies a channel 20 between the source 14 and drain 16 and is insulated therefrom by a gate dielectric 22. Also illustrated are shallow trench isolation regions 24, which can serve to isolate transistor 10 from neighboring devices.
In many applications, the gate 18 is formed from doped polysilicon. It is often desirable that the resistance of the doped polysilicon gate 18 be lowered. One way to achieve this goal is to form a silicide layer 30 over the gate polysilicon 18. The silicide material has a lower resistance than the polysilicon and therefore the overall conductivity of the gate will be higher. Similarly, silicide regions 26 and 28 can be formed over the source 12 and drain 14, respectively, to lower the contact resistance to these regions. In one example, the silicide regions 26, 28 and 30 can be formed using a salicide (self-aligned silicide) process where a blanket layer of a refractory metal is deposited over the transistor and reacted with any exposed silicon (e.g., the silicon of the source 14, drain 16 and gate 18). Unreacted refractory metal can then be removed.
One type of transistor technology that is developing uses a fully silicided (FUSI) gate. For example, a refractory metal can be deposited on a patterned polysilicon gate. A sintering process can then be performed so that a diffusion between the metal and the polysilicon occurs, leading to a full reaction down to the gate dielectric interface. Such a gate can have advantages over polysilicon gates by reducing the effects of gate depletion and dopant penetration.