Numerous practical considerations have driven semiconductor integrated circuit designs to smaller size regimes and minimum feature dimensions and higher integration densities of electronic elements. In logic circuits and processors, smaller element size allows increased functionality to be developed on a chip of given area. Increased element integration density allows reduction in signal propagation time and increased noise immunity due to shorter interconnection lengths. In memory devices, reduced memory element size and increased integration density provides much the same benefits as well as greater memory capacity and decreased manufacturing process costs per memory element or cell.
Depending on the performance requirements (e.g. access time) and operating conditions (e.g. power and refresh requirements, if any), many types of memory elements have been designed and fabricated. An important type of memory element is one capable of storing data for long periods of time without any requirement for power other than at times data is being written, erased or read. Such memory elements or cells are referred to as being non-volatile (NV) and memories containing such non-volatile memory elements or cells are referred to, simply, as NV memories. An early type of NV cell included a field effect transistor with an insulated or floating gate such that a high voltage applied across the insulator caused tunneling of electrons to or from the floating gate. The memory cell could be read by applying a lower voltage to another gate to induce an electrical field in the transistor channel with the floating gate interposed therebetween. The resulting electrical field in the transistor which would be enhanced (or reduced, depending on transistor conductivity type) by charge storage on the floating gate would and thus cause differences in the conduction of the transistor channel which could be read to determine if charge had been stored in the floating gate.
While such NV memories using floating gate transistors were highly successful, the formation of transistors with floating gates required complex and expensive manufacturing processes and were subject to a significant degree of lack of uniformity in electrical characteristics of such transistors on a chip; reducing manufacturing yield and increasing manufacturing costs per chip. Also, the degree of possible size reduction and integration density was limited by lithographic exposure resolution and, importantly, the tunneling effect upon writing or erasure caused small but finite damage to the insulation of the floating gate; limiting the number of times a given memory cell could be written or erased and leading to charge leakage and loss of the data stored therein.
While these drawbacks were not particularly severe where write and erase operations were performed only infrequently, these drawbacks have led to the exploitation of other phenomena to avoid them. One phenomenon that has been exploited using an electrochemically active electrode such as copper or silver migration within an insulating material to form conductive filaments of the active electrode material. Another phenomenon that has been exploited in this manner does not require an electrochemically active electrode material and the filament is formed by oxygen vacancy motions. In this mechanism, the oxygen vacancies can agglomerate at grain boundaries within a metal oxide insulator and locally create metal-rich filaments.
When filaments are grown, they essentially become fuses that can be ruptured by joule heating in response to a high current and re-grown by a voltage significantly less than the voltage used to initially form them since the short distance of the discontinuity of a ruptured filament increases the electric field across the discontinuity. This reversible process provides high performance NV memory cells operable in much the same fashion as the two phenomena alluded to above but using other materials and other physical mechanisms. It has been found that, in either the ruptured or re-grown state, the filaments (and discontinuities) are extremely stable over time and a wide range of environmental conditions and require no power to maintain. Among the few drawbacks of such a device are that the voltage required to initially form the filaments may be large enough to present criticality in supplying sufficient current to the memory cells during manufacture and an observed lack of uniformity of electrical characteristics of memory cells on a chip during filament growth. Methods exist for providing some reduction in the voltage required for filament formation but at the cost of dielectric film density modification or special oxygen exchange layers, adding process complexity. Additionally, scaling of such devices to smaller sizes has been lithographically limited.