1. Field of the Invention
This invention relates in general to power amplifier circuits and in particular to a method and circuit system for improving low power efficiency of RF power amplifiers.
2. Description of the Related Art
A component common to wireless devices is a radio frequency (RF) power amplifier. Power amplifiers typically receive as input a frequency or phase modulated radio frequency carrier and boost the power of the RF carrier to a level sufficient for reception by a cellular base station. Unfortunately, a simple single fixed power level is not efficient when used in a cellular network. Mobile users transmitting while traveling through multiple cells at a single fixed high power setting could overwhelm several cellular base stations resulting in underutilization of the infrastructure. In contrast, a mobile user transmitting at too low a power setting could experience unreliable short-range communication with perhaps a single cellular base station.
Power control is essential to the smooth operation of wireless communication systems where there are many users sharing the frequency spectrum. Output power for each individual user should be adjusted dynamically to maximize the system capacity and resolve the near-far multiple-access in a spread-spectrum system. Accordingly, various wireless communication standards require precise output power control over a large dynamic range. Such control reduces the likelihood of a transmitter located in one cell interfering with the reception of other transmitters in neighboring cells while ensuring that communication with the targeted base station is not impaired.
Power amplifiers (PA) should be energy efficient to prolong operation time from a single battery charge. Accordingly, many RF power amplifiers have two modes of operation corresponding to a low power (LP) and a high power (HP) mode.
Selecting and efficiently controlling output power delivered by a RF amplifier presents several challenges. For example, reducing the transmitted output power by dissipating excess power, although simple, wastes power and reduces battery life. In another aspect complicating power control strategies, the efficiency of a PA varies significantly over the output power range. The PA is typically designed to maximize efficiency at higher output power levels because current drain efficiency of the PA is most affected at a higher output power. This results in poor performance and low signal-to-noise ratios at lower power levels. The low signal-to-noise ratio is, in part, due to the presence of noise generated by the power management strategy itself. These relatively high noise levels increase the stability problem of the PA.
There are several techniques in use for modulating the output power of a RF power amplifier although none of them manage to satisfactorily overcome the above-described challenges. One technique switches the quiescent current of the PA in response to a change in the power mode (such as between HP and LP). The PA is biased with high quiescent current in HP mode to maximize its output current swing and is biased with low quiescent current in LP mode to reduce power consumption.
Load switching is another technique for improving the efficiency for multiple output power levels. In this method, the output load is adjusted according to the output power requirements.
A third technique samples the output power and adjusts the supply voltage to the power amplifier in a feedback loop to adjust the output power to a desired level. Such adjustments, known as high-level modulation, have been practiced for high power AM transmitters. Motorola® and ON® Semiconductor provide chips to help manage supply voltage for RF power amplifiers based on feedback using sampled supply voltages and output RF power. The sampling, however, often results in the generation of undesirable higher harmonic signals, which requires additional (and costly) filtering to suppress such harmonics to comply with international communication regulations. In addition, the change in gain in various amplifier stages as the supply voltage changes can generate noise and cause instability problems.
Any adjustable output power implementation for RF amplifiers should comply with a specification known as a “burst mask,” which specifies the rise time, fall time, duration, and power levels associated with the adjustable power control signal. In other words, the ramp up time and ramp down time of Vramp should conform to the shape of the burst mask while the output power level corresponds to the magnitude of Vramp. For example, in GSM radiotelephones, the GSM signal further consists of eight equal time slots, each of which must conform to the burst mask specification.
U.S. Pat. No. 6,701,138 discloses a design for varying the supply voltage to control power level of a power amplifier in response to a control voltage. However, the '138 patent requires that no changes in the bias conditions for the first stage of the power amplifier be made regardless of the power level of the output signal. Moreover, for the remaining stages in the power amplifier all of the disclosed embodiments in the '138 patent require that all of the bias signals be held steady to avoid generation of noise due to changes in bias levels. Thus, the requirements for the power amplifier to respond linearly to the Vramp signal in a narrow time window with little noise generation presents significant problems in the known designs. Such requirements make designing a power amplifier suitable for efficient operation at multiple power levels a challenge.
FIG. 1 is a schematic diagram of a power amplifier capable of operating at more than one power level. Power amplifier module 160 is coupled to an adjustable voltage control signal, Vramp, at port 120 via Vapc and a regulated voltage source, Vreg, at port 180. The adjustable voltage control signal, Vramp, is coupled to op/Amp 130, which is connected to the gate of PMOS transistor 140. The source 135 of PMOS transistor 140 is coupled to battery source 110. The drain 145 of PMOS transistor 140 is connected to the power amplifier module 160 and provides power supply voltage, Vd, to power amplifier module 160. Power amplifier module 160 typically contains one or more cascaded stages. An example power amplifier module is the MMM 5062 model produced by Motorola for use in Quad-Band GSM/GPRS handheld radios.
op/Amp 130 and PMOS transistor 140 work together as a linear voltage regulator under the control of Vramp. This linear voltage regulator varies supply voltage, Vd, between about the ground voltage and approximately the battery voltage in response to the corresponding variations in Vramp. Power supply voltage, Vd, for power amplifier module 160 determines the power level for power amplifier module 160. In order to obtain linear amplification it is desirable that the bias voltage stays above a threshold voltage level.
In FIG. 1, Vapc is the power control voltage providing the bias for the cascaded RF power amplifiers in power amplifier module 160. Vapc is set by the voltage divider network formed by resistances 150 and 155 connected between Vreg and Vd.
The power control circuit shown in FIG. 1 is prone to excessive noise because changing Vd to adjust the power level of power amplifier module 160 introduces harmonics in the power amplifier output. Furthermore, the noise associated with Vreg and Vd is also introduced into power amplifier module 160. In other words, noise associated with Vreg and Vd is introduced as noise in Vapc and thereby the output of the power amplifier. The noise problem becomes more significant when operating in the low power mode because the noise tends to be a greater fraction of the total output signal.
Therefore a need exists for an adjustable RF power amplifier module resistant to noise while providing improved power efficiency especially in low power modes.