Numerous cooling systems for cooling electronic components are known in the art. Known systems which include a "hat" type of arrangement and/or intermediary thermal conduction components between a cooling medium and an electronic component to be cooled, include:
Kawamoto (U.S. Pat. No. 3,908,188) PA1 Hosono, et al. (U.S. Pat. No. 3,989,099) PA1 Chu et al. (U.S. Pat. No. 3,993,123; assigned to the same assignee, IBM, as the present application) PA1 Flint et al. (U.S. Pat. No. 4,759,403; assigned to the same assignee, IBM, as the present application) PA1 Chu et al. (U.S. Pat. No. 4,765,400; assigned to the same assignee, IBM, as the present application) E. G. Loeffel, S. W. Nutter and A. W. Rzant, IBM Technical Disclosure Bulletin, Vol. 20, No. 2, July 1977, "Liquid Cooled Module With Compliant Membrane", p. 673-674 PA1 V. W. Antonetti, H. E. Liberman and R. E. Simons, IBM Technical Disclosure Bulletin, Vol. 20, No. 11A, April 1978, "Integrated Module Heat Exchanger" PA1 P. Hwang, S. Oktay, A. L. Pascuzzo and A. C. Wong, IBM Technical Disclosure Bulletin, Vol. 20, No. 11A, April 1978, "Conduction Cooling Module", p. 4334-4335 PA1 C. J. Keller and K. P. Moran, IBM Technical Disclosure Bulletin, Vol. 21, No. 6, November 1978, "High-Power Rectifier Jet-Cooled Heat Sink", p. 2438 PA1 C. D. Ostergren, IBM Technical Disclosure Bulletin, Vol 27, No. 1B, June 1984, "Mini Conformal Cold Plate", p. 494-495 PA1 Meeker et al. (U.S. Pat. No. 4,138,692; assigned to the same assignee, IBM, as the present application) PA1 Ono (U.S. Pat. No. 4,688,147) PA1 Mittal (U.S. Pat. No. 4,750,086) PA1 Yamamoto et al. (U.S. Pat. No. 4,783,721) PA1 Nicol et al. (U.S. Pat. No. 4,791,983) PA1 Tustaniwskyj et al. (U.S. Pat. No. 4,809,134) PA1 Yamamoto et al. (European Patent No. 0 151 546 A2) PA1 D. Balderes and J. R. Lynch, IBM Technical Disclosure Bulletin. Vol. 20, No. 11A, April 1978, "Liquid Cooling of A Multichip Module Package", p. 4336-4337 PA1 V. W. Antonetti, R. C. Chu, K. P. Moran and R. E. Simons, IBM Technical Disclosure Bulletin, Vol. 21, No. 6, November 1978, "Compliant Cold Plate Cooling Scheme", p. 2431 PA1 G. T. Galyon and P. Singh, IBM Technical Disclosure Bulletin, Vol. 28, No. 11, April 1986, "New TCM Design Using Bellows", p. 4759 PA1 Wiegand (U.S. Pat. No. 2,917,685) PA1 Butler et al. (U.S. Pat. No. 3,365,620; assigned to the same assignee, IBM, as the present application) PA1 Melan et al. (U.S. Pat. No. 3,414,775; assigned to the same assignee, IBM, as the present application) PA1 Barkan (U.S. Pat. No. 3,991,396) PA1 Cutchaw (U.S. Pat. No. 4,381,032) PA1 Murphy et al. (U.S. Pat. No. 4,777,561) PA1 M. E. Ecker, IBM Technical Disclosure Bulletin, Vol. 10, No. 7, December 1967, "Interface for Thermal Exchange Devices", p. 943 PA1 J. H. Seely, IBM Technical Disclosure Bulletin, Vol. 11, No. 7, December 1968, "Combination Cooling System", p. 838-839 PA1 K. S. Sachar, IBM Technical Disclosure Bulletin, Vol. 20, No. 9, February 1978, "Liquid Jet Cooling of Integrated Circuit Chips", p. 3727-3728 PA1 A. H. Johnson, IBM Technical Disclosure Bulletin, Vol. 20, No. 10, March 1978, "Device Cooling", p. 3919 PA1 J. C. Eid and M. L. Zumbrunnen, IBM Technical Disclosure Bulletin, Vol. 29, No. 12, May 1987, "Circuit Module With Evaporative Cooling From Sintered Coating On Pistons", p. 5195-5196 PA1 Edmund L. Andrews, Business Technology, "For Chips That Overheat: A Tiny Radiator" (New York Times, Wednesday, Sep. 20, 1989)
The above and other systems including a "hat" arrangement and/or intermediary thermal conduction components are disadvantageous in that thermal resistance of the system is increased and thermal transfer efficiency decreased.
Known systems which include complex "bellows" types of arrangements, and/or complex arrangements of discrete assembled parts, include:
The above and other systems including complex "bellows" types of arrangements, and/or complex arrangements of discrete assembled parts are disadvantageous in that both manufacturing complexity and cost are increased, and alignment problems are prevalent.
Further known approaches include:
Any "essential material" not contained in the present disclosure, but contained in any above- or below-cited U.S. patents or allowed U.S. patent applications, is incorporated herein by reference. Any "non-essential material" not contained in the present disclosure, but contained in any above- or below-cited U.S., foreign or regional patent publications, prior-filed, commonly-owned U.S. applications, or non-patent publications, is incorporated herein by reference.
With the advent of ever increasing computation speeds of computers, VLSI (Very Large Scale Integration) circuit densities have increased proportionately to satisfy demand in the market place. However, increased VLSI circuit densities and chip densities increase power dissipation requirements to enormous levels. For example, typical current semiconductor chip programs are expected to require power dissipation capability in excess of 70 watts. Estimates for future semiconductor chip programs reach 90-100 watts. The increase in chip power is taking place without any increase in chip area, and in fact, it is expected that chip areas will be decreased slightly due to recent developments in VLSI technologies. All of the above developments are necessary to enhance computer machine computational speeds, but place very aggressive design requirements on electronic component cooling schemes.
Air cooling is no longer a viable method for satisfying such high power dissipation requirements. Further, none of the approaches disclosed in the above-mentioned references can provide high power dissipation, while at the same time being low in manufacturing cost and complexity, and provide accurate and easy alignment to respective discrete electronic components which are to be cooled.