1. Field of the Invention
The present invention relates to wireless communication and in particular to the joint synchronization and impairment estimation using a known data pattern sent in a packet.
2. Description of the Related Art
In a wireless communication system, a receiver needs to achieve carrier and timing synchronization to ensure correct decoding of a packet. Additionally, the receiver must estimate and correct various analog circuit impairments, such as DC offset and spurious or interfering signals (i.e. spurs). A plethora of algorithms can be used to provide synchronization or impairment estimates individually. For example, the IEEE 802.11a standard (1999) in Section 17.3.2.1(a) describes the PLCP preamble and the function of short and long training symbols in performing coarse and fine frequency estimation. Various articles, such as “n/4-shift QPSK Coherent Detection Demodulator for TDMA/TDD systems”, written by Y. Matsumoto et al., published by IEEE in 1993 and “A Low Power Demodulator LSIC for Personal Communications High Performance Coherent Detection Demodulator”, written by Y. Matsumoto et al., published by PIMRC in 1994, describe methods directed to PHS synchronization. In general, for impairment estimates, the DC offset can be estimated by averaging (e.g. using a low pass filter)(see U.S. Pat. No. 6,785,523, for example) and spurs can be estimated by converting to DC and then averaging (e.g. using a bandpass filter at spur frequency). Unfortunately, computing these algorithms takes valuable time that could be used in other important receiver functions, e.g. the actual decoding of the packet payload.
Therefore, a need arises for a technique that accelerates providing synchronization and impairment estimates.