1. Field of the Invention
The invention relates in general to an integrated circuit (IC) and its fabrication, and more particularly to a high density metal-oxide-semiconductor (MOS) device and a process for its fabrication.
2. Description of the Related Art
For the present requirements for lighter, thinner, shorter, and smaller memory devices, it is of great interest to develop high density MOS devices. Referring first to FIG. 1, which is a cross-sectional view of a conventional MOS device, a method of fabricating this conventional MOS device is briefly described as follows: An active region is first defined on a substrate 100 by forming a field oxide 101. Next, a gate oxide layer 104, a gate 103, source/drain regions 102 and spacers 105 are formed in the active region to provide a MOS device, wherein the source/drain regions 102 are formed by ion implantation and diffusion. An insulating layer 107 for planarization is then deposited, and a contact opening 106 is formed in the insulating layer 107 above the source/drain regions. Finally, metalization is performed by filling the contact opening 106 with aluminum 108. However, the MOS device as shown in FIG. 1 has the following drawbacks:
1. Since the source/drain regions are typically formed by ion implantation and also due to the short channel effect, it is difficult to minimize the size of the device by reducing the length of the channel.
2. The contact openings are formed on the source/drain regions. Therefore, a leakage path may develop in the source/drain regions because of a misalignment of the mask.
3. The minimum distance between the edge of the contact window and the edge of the gate can not be less than a certain amount. Therefore, since the contact windows must be formed on the source/drain regions, the degree to which the device size can be reduced is again limited.