Research and development has been conducted for producing an a-SiTFT for use in active matrix type liquid crystal display devices, etc.
FIG. 5 is a cross sectional view illustrating an a-SiTFT. This Figure shows the insulation substrate 1, gate electrode 2, gate insulation layer 3, amorphous silicon layer 4, n-type silicon layer 5 containing an appropriate amount of phosphor, source electrode 6, drain electrode 7, source wiring 8, pixel electrode 9, protection insulation layer 10, light shielding layer 11 and orientation film 12. A TFT having a structure as shown in the Figure in which the gate electrode 2, the source electrode 6 and the drain electrode 7 are opposed while the gate insulation layer 3 and the amorphous silicon layer 4 are between the gate electrode and the source and drain electrodes, and the gate electrode 2 is formed on the side of the insulation substrate 1 remote from the source electrode 6 and the drain electrode 7, is referred to as an inverted stagger type TFT.
FIGS. 6(a) and (b) show a static characteristic of the inverted stagger type a-SiTFT. In FIG. 6(a), the abscissa represents a gate voltage V.sub.g and the ordinate represents a drain current Id. FIG. 6(b) shows a measuring circuit in which the source-drain voltage Vds=7.5 (volts) is made constant and the voltage Vb applied to the light shielding layer is set to Vb=0 (volts) or -10 (volts). As can be seen from FIG. 6(a), the drain current Id rises from the vicinity of Vg=0 (volts) when Vb=-10 (volts), whereas the drain current Id rises from the vicinity of Vg=-15 (volts) when Vb=0 (volts) and, accordingly, the two characteristics are apparently different.
FIG. 7 shows the reason for such a difference in the characteristics. Electric current flowing through a TFT usually comprises a current flowing along the interface between the gate insulation layer 3 and the amorphous silicon layer 4, that is, a current flowing through the path A as shown in FIG. 7. However, in a TFT, a current path shown by B in FIG. 7 is also present along the interface between the protection insulation layer 10 and the amorphous silicon layer 4 in the TFT.
Accordingly, in the characteristic shown in FIG. 6(a), the current path B is interrupted when Vb=-10 (volts), whereas the current path B is not interrupted when Vb=0 (volts) to provide the characteristic as shown in FIG. 6(a). That is, the current that rises from the vicinity of Vg=-15 (volts) when Vb=0 (volts) is derived from the current path B.
Since no voltage is applied to the light shielding layer in the usual state of use, the static characteristic of the TFT is the same as the characteristic when Vb=0 (volts). Such a characteristic results in the increase of the OFF current of the TFT. This result is disadvantageous in the use of the TFT.