This application claims the priority of Korean Patent Application No. 2003-68332, filed on Oct. 1, 2003, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.
1. Field of the Invention
The present invention relates to a contact structure of a semiconductor, and more particularly, to a contact structure of a semiconductor, which provides insulation between upper and lower plates and does not affect electrical conduction in a horizontal direction by forming an insulation doping layer under a conductive layer functioning as wiring of an ultra-shallow p-n junction. The present invention further relates to a method of forming such a contact structure of a semiconductor device.
2. Description of the Related Art
With high density and high integration of a semiconductor device, a contact less than 1 μm has been required. The reduction of a device from a macro size to a micro size is difficult due to newly considerable, unexpected problems. Particularly, the reliability of a minute size contact structure is a primary factor determining performance and life of the semiconductor device.
Semiconductor devices are generally used in a state where they are interconnected on a substrate, being supplied with electric power through a high conductive contact. For example, when an electric signal or electric power is applied to a terminal of a bipolar or MOS transistor, a semiconductor terminal contacts a high electrical conductor to allow for the current flow. At this point, no voltage-drop/contact-resistance must be incurred at the contact portion. Even when there is a resistance component when polarity in opposite directions is changed, resistance must be a little.
FIG. 1 is a schematic view of a conventional contact structure of a semiconductor device.
Referring to FIG. 1, a silicon oxide (SiO2) layer is formed on a silicon substrate 11. A predetermined region of the silicon substrate 11 is exposed by removing a predetermined pattern of the silicon oxide layer through, for example, an etching process. A conductive doping layer 13 doped with conductivity-forming material such as boron (B) or phosphorus (P) is formed in the silicon substrate through the exposed region of the silicon substrate 11. A conductive layer 14 is formed on the conductive doping layer 13. The conductive layer 14 is formed of, for example, aluminum (Al) widely used for a contact of the silicon substrate.
When the aluminum is used as resistant contact metal of silicon semiconductor, a sintering process is performed to increase density and improve a contact property. However, at this point, the silicon may migrate to an aluminum layer, making it difficult to form a proper metal contact. To solve this problem, 1–2% of an alloy element is added to the aluminum to form minute silicon extraction in a basic structure of the aluminum. In addition, barrier metal such as TiN, TiW and the like is used to reduce the migration to the device. A short circuit of the device may be incurred due to a deep spike phenomenon caused by defect of the oxide layer formed around a metal contact surface.
Particularly, when an ultra-shallow junction is formed, since a self-diffusion phenomenon is incurred by silicon nodule caused by the silicon extraction and vacancy, a very good quality oxide layer must be formed to prevent the short circuit.