A wide variety of chip carriers are known in the industry. Many of these chip carriers have unique features which insure that the chips positioned in the chip carriers will perform in various environments.
One type of chip carrier, which attempts to solve problems of environmental exposure, is described in U.S. Pat. No. 4,079,511. This patent discloses a hermetically sealed chip carrier which prevents moisture from entering the recess of the chip carrier, thereby preventing moisture from reaching and damaging the chip contained therein. This particular patent is but one example of hermetically sealed chip carriers, many other hermetically sealed chip carriers are also available in the marketplace. However, these chip carriers are not designed to protect the chip under extreme conditions, such as in environments where the chip is exposed to extreme vibration, extreme lateral forces, or extreme temperature changes. Examples of such environments in which the chip and chip carrier may be exposed to these extreme conditions include; in any manufacturing facility where machines are used for processes which inherently have large vibrations associated therewith, in the oil drilling fields where large lateral forces are applied to the drill head of the equipment and where extreme temperature ranges may be reached.
If the controls for the equipment used in these extreme surroundings requires only minimal electronics, which requires the use of only small IC chips, a post molded IC package is adequate. In this type of arrangement, the chip and bonding wires are totally enclosed in plastic. The entire assembly of circuit boards and associated components is then cast into an essentially monolithic block, using 95% sand and 5% binder, as for example epoxy resin. Such a block being essentially monolithic there are no voids or spaces into which any part of the components could displace, since all volumes were solidly filled. This type of arrangement does not have problems with the mismatch of thermal coefficient of expansion, etc. due to the small package in which the electronics are contained.
However, with larger program computers requiring more highly integrated electronics, the chips are becoming large, on the order of half inch square and even larger. The larger scale of the chips highlights the problem of the thermal coefficient of expansion mismatch between the silicon and molding resin, which causes the wire bonds between the leads of the chip carrier and the conductive pads of the chip to fracture. The problem is magnified in the types environments described above. When the chip are activated, the chips will expand due to the dissipation of power in them, while the surrounding material is lagging. This results in stresses and failures of the chip and bond.
It is therefore necessary to find a way of packaging the large chips which will operate properly in the various hostile environments.