The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
An integrated circuit generally has numerous components, e.g., flip-flops, macros, counters, etc. These components periodically need to be reset, for example, at a start-up of the integrated circuit. A reset signal generator generally generates a reset signal, and transmits the reset signal to these components via a reset tree. Conventionally, considerable circuit design effort goes into designing the reset tree to be a balanced tree, in other words so that the time at which various components receive the reset signal is optimized or nearly optimized.