1. Technical Field
The present invention relates generally to a semiconductor memory, and more particularly to a memory system.
2. Related Art
A semiconductor memory (hereafter, referred to as a memory) stores data in a cell capacitor. That is, the cell capacitor can be either charged or discharged so as to store data in the cell capacitor. However, since the capacitor leaks charge, a refresh operation of sensing and amplifying the data and rewriting the amplified data is required.
Referring to FIG. 1, a known memory performs a refresh operation in response to a command provided by a controller for controlling the operation of the memory, such as a central processing unit (CPU) or graphic processing unit (GPU). The command may include an auto refresh entry command, a self refresh entry command, and a self refresh exit command.
The known memory cannot be accessed during an auto refresh operation period as well as a self refresh operation period. Therefore, an effective band width of the memory may be reduced.