Vertical MOS transistors have recently become of particular interest for use as power transistors because their design permits efficient use of chip area. In such transistors, the source/drain is positioned at one surface of the substrate and the drain/source is provided by the bulk of the substrate and current passes vertically through the substrate. In the most common, or enhancement-mode form, such a transistor is normally off but is turned on by applying an appropriate voltage to the gate electrode of the transistor. The electric field of the applied voltage creates a conducting channel by forming an inversion layer between the source and drain.
In the less common depletion-mode form, the transistor is normally on, and one achieves current control by using a voltage applied to the gate electrode to deplete the normally conducting channel between the source and drain of its majority charge carriers to increase its resistance to the flow of current therethrough.
In U.S. Pat. No. 4,611,220 which issued on Sept. 6, 1986, there is described a novel form of MOS transistor of the depletion mode type, that features a small island of opposite conductivity type located in the normally conducting channel at the gate-insulator interface and maintained essentially at the potential of the gate electrode. The island serves as a sink to collect those minority charge carriers in the channel that are attracted to the interface when a voltage is applied to the gate electrode to deplete the channel. If left uncollected, they would serve to shield the channel from the applied electric field, making complete depletion of the channel difficult. Such incomplete depletion makes it difficult to turn the transistor completely off, thereby affecting adversely its operation. The novel transistor is there described as a junction-MOS field effect transistor (j-MOSFET). Moreover, there is also described a vertical form of j-MOSFET that uses a buried-oxide layer to control the path of current flow to achieve vertical operation. Vertical forms of MOSFETs are designed for high power since this geometry facilitates the paralleling of a plurality of channel regions between the source and drain contacts. In this transistor, a junction for collecting the minority charge carriers was included in each separate channel region. This results in a relatively complex structure.