Semiconductor transistors, in particular field-effect controlled switching devices such as a MISFET (Metal Insulator Semiconductor Field Effect Transistor), in the following also referred to as MOSFET (Metal Oxide Semiconductor Field Effect Transistor) and a HEMT (high-electron-mobility Field Effect Transistor) also known as heterostructure FET (HFET) and modulation-doped FET (MODFET) are used in a variety of applications. HEMTs are preferred in many applications due to their favorable power density, on-state resistance, switching frequency, and efficiency benefits over conventional silicon based transistors. HEMTs are typically formed using type III-V semiconductor materials, such as GaN, GaAs, InGaN, AlGaN, etc.
One common technique for HEMT device formation involves an epitaxy process. According to this technique, a bulk wafer is provided. Typically, the bulk wafer includes a readily available semiconductor material, such as silicon or silicon carbide. Type III-V semiconductor material is then grown on a growth surface of the wafer using an epitaxial growth technique. The growth surface of the wafer can be aligned with the <111> crystallographic plane of the wafer crystal so as to provide a hexagonal lattice surface for the epitaxial growth of the type III-V semiconductor material thereon. Once the type III-V material is epitaxially grown, device formation (e.g., gate structuring, contact formation, etc.) is performed in the type III-V semiconductor layer. After completion of the front-end-of-the-line and back-end-of-the-line processing, the wafers are singulated (i.e., cut) into a plurality of semiconductor dies.
One notable challenge in the fabrication of HEMT devices using the above described epitaxial growth processes relates to breaking and/or cracking of the substrate. Because the growth surface of the base substrate includes the <111> crystallographic plane, the base substrate is quite prone to cleavage. Thus, the application of moderate mechanical force to the base substrate, which may be the result of unavoidable processing steps, e.g., wafer handling, may cause the base substrate to partially or completely break.
Another notable challenge in the fabrication of HEMT devices using the above described epitaxial growth processes relates to chipping and breakage of the type III-V semiconductor during die singulation process. Known die singulation techniques include mechanical or laser dicing. Typically, a mechanical scribe line is used to define the chip areas on the wafer. Subsequently, mechanical sawing or a laser cutting is performed along the mechanical scribe line to separate the wafer into individual dies. However, due to the above described issues related to the mechanical strength of the wafer, there is a substantial risk of chip breakage during the cutting process. Moreover, the sawing process can cause cracks to propagate across the type III-V semiconductor layer, which can lead to device failure. Approaches to remove type III-V semiconductor material by separate etching steps prior to mechanical dicing are very complex and costly and may also lead to increase of particle contamination on the device. The type III-V semiconductor material can also be removed by laser processes prior to mechanical sawing, but this process can lead to a decrease in chip breakage strength.