The present invention relates in general to ECL to CMOS converters and, more particularly, to single supply ECL to CMOS converters capable of being integrated in a single chip using a standard VLSI CMOS process.
Conversion from the logic levels of one logic family to another logic family is well known in the art. A prior art circuit which is used to convert ECL logic levels to CMOS logic levels is shown in FIG. 1. The converter 10 provides conversion for both the data (ECL DATA INPUT) and the clock (ECL CLOCK and ECL CLOCK). The ECL data is converted by being level shifted and compared to a reference voltage. The reference voltage (BANDGAP REFERENCE VOLTAGE) is provided by an external bipolar circuit. The level shifters 12 and 14 provide a four volt positive level shift to enable the CMOS comparator 20 to compare the two levels and provide a CMOS compatible output (CMOS DATA OUTPUT). The clock conversion is provided in a similar manner, using levels shifters 16 and 18, and CMOS comparator 22. In the special case of clock conversion, no external bandgap reference voltage is needed, since alternating phases of the clock signal provide the reference for the comparison.
Typically, the level shifters 12, 14, 16, and 18 are zener diodes and are external to the integrated circuit which contains CMOS comparators 20 and 22 as well as other CMOS circuitry. Although CMOS circuits usually operate using a positive five volt supply and ground, the external bandgap reference voltage circuit provides a negative voltage, and therefore requires an additional negative supply.
What is desired is a CMOS to ECL converter in which the bandgap reference voltage circuit is eliminated and the level shifting circuits are fabricated in a VLSI CMOS process, enabling the entire converter to be integrated with other CMOS circuitry on a single chip powered by a single supply voltage.