1. Field of the Invention
This invention relates to a low-voltage detection reset circuit that detects reduction in a power supply voltage supplied to a semiconductor integrated circuit and resets a system of the semiconductor integrated circuit.
2. Description of the Related Art
When a programmable low-voltage detection circuit is incorporated into a microcomputer, a low-voltage detection circuit with a power-on reset function has been also incorporated in the microcomputer in order to make sure that a reset pulse is generated at power-on (turning-on of a power supply). The programmable low-voltage detection circuit is a low-voltage detection circuit capable of programming a detection level corresponding to a power supply voltage. The low-voltage detection circuit with the power-on reset function is a low-voltage detection circuit provided with a function to generate the reset pulse at the power-on. While the programmable low-voltage detection circuit is inactivated during a non-use period, the low-voltage detection circuit with the power-on reset function is in operation all the time.
FIG. 4 is a circuit diagram of such a low-voltage detection reset circuit. A programmable low-voltage detection circuit 10 is provided with a first comparator circuit 1, a PMOS (P-channel type MOS transistor) 12 that controls supply of a power supply voltage Vdd to the first comparator circuit 11 and a first detection level setting circuit 13 capable of setting a first detection level that is variable corresponding to the power supply voltage Vdd. A reference voltage Vref (1.0 V-1.5 V) that is independent of the power supply voltage Vdd is applied from a reference voltage generating circuit 14 to a positive terminal (+) of the first comparator circuit 11. A first detection level is applied from the first detection level setting circuit 13 to a negative terminal (−) of the first comparator circuit 11. The reference voltage generating circuit 14 can be made of a so-called band gap type reference voltage generating circuit.
The first detection level from the first detection level setting circuit 13 can be set at any of 2n levels corresponding to n bits of control signals from a register 15. Control data is set to the register 15 through bus lines 16 of a microcomputer. To describe concretely, the first detection level setting circuit 13 can be composed of ladder resistors that divide the power supply voltage Vdd and a group of switches that selects an output voltage divided by the ladder resistors corresponding to the control signals. If the first detection level is set to be the reference voltage Vref when the power supply voltage Vdd is 2.5 V for example, the first detection level becomes equal to or lower than the reference voltage Vref and the first comparator circuit 11 outputs a reset pulse of a high level when the power supply voltage Vdd drops to 2.5 V or below.
A low-voltage detection circuit with a power-on reset function 20 is provided with a second comparator circuit 21 and a second detection level setting circuit 22 that sets a second detection level corresponding to the power supply voltage Vdd. The reference voltage Vref is applied from the reference voltage generating circuit 14 to a positive terminal (+) of the second comparator circuit 21. The second detection level is applied from the second detection level setting circuit 22 to a negative terminal (−) of the second comparator circuit 21.
The second detection level from the second detection setting circuit 22 is set to be lower than the first detection level from the first detection setting circuit 13, and is set to become the reference voltage Vref when the power supply voltage Vdd is 1.8 V, for example. When the power supply voltage Vdd drops to 1.8 V or below, the second detection level becomes equal to or lower than the reference voltage Vref, and the second comparator circuit 21 outputs a reset pulse of the high level. The second comparator circuit 21 in the low-voltage detection circuit with the power-on reset function 20 is in operation all the time and an electric current I0 flows through it all the time.
The reset pulse outputted from the programmable low-voltage detection circuit 10 and the reset pulse outputted form the low-voltage detection circuit with the power-on reset function 20 are inputted to an OR circuit 23 that outputs a system reset signal SRES used to reset the microcomputer.
Operations of the low-voltage detection reset circuit structured as described above will be explained. The reset pulse of the high level is outputted from the low-voltage detection circuit with the power-on reset function 20 at the power-on. The reset pulse is turned to a low level to lift the reset when the power supply voltage Vdd becomes 1.8 V or above. After that, the PMOS 12 is turned on in response to the control signals from the register 15 of the programmable low-voltage detection circuit 10 to activate the programmable low-voltage detection circuit 10 to detect the reduction in the power supply voltage Vdd at a programmed detection level. Therefore, the power-on reset function and a programmable low-voltage detection function can be acquired with this low-voltage detection reset circuit.
However, since the low-voltage detection reset circuit described above includes the low-voltage detection circuit with the power-on reset function 20, it has problems that the electric current I0 flows in a stand-by mode and a size of the circuit is large.