One type of non-volatile memory known in the art relies on magnetic memory cells. These devices, known as magnetic random access memory (MRAM) devices, include an array of magnetic memory cells. The magnetic memory cells may be of different types. For example, a magnetic tunnel junction (MTJ) memory cell or a giant magnetoresistive (GMR) memory cell.
Generally, the magnetic memory cell includes a layer of magnetic film in which the orientation of magnetization is alterable and a layer of magnetic film in which the orientation of magnetization may be fixed or “pinned” in a particular direction. The magnetic film having alterable magnetization may be referred to as a sense layer or data storage layer and the magnetic film that is fixed may be referred to as a reference layer or pinned layer.
Conductive traces referred to as word lines and bit lines are routed across the array of memory cells. Word lines extend along rows of the memory cells and bit lines extend along columns of the memory cells. A memory cell stores a bit of information as an orientation of magnetization at each intersection of a word line and a bit line. The orientation of magnetization in the sense layer aligns along an axis of the sense layer that is commonly referred to as its easy axis. Magnetic fields are applied to flip the orientation of magnetization in the sense layer along its easy axis to either a parallel or anti-parallel orientation with respect to the orientation of magnetization in the reference layer.
The resistance through the sense layer and reference layer differs according to the parallel or anti-parallel orientation of magnetization. This resistance is highest when the orientation is anti-parallel, i.e., the logic “0” state, and lowest when the orientation is parallel, i.e., the logic “1” state. Thus, the state of the memory cell can be determined by sensing the resistance of the memory cell.
Conductive traces referred to as sense conductors are routed across the array of memory cells to aid in sensing the resistance of a memory cell. These sense conductors extend along columns of the memory cells and are electrically coupled to the magnetic layers of the memory cells. The word lines, which extend along rows of the memory cells, are electrically coupled to other magnetic layers of the memory cells. A memory cell is situated at each intersection of a sense conductor and a word line.
A read circuit is electrically coupled to the sense conductors and the word lines to read the state of a memory cell. During a read operation, the read circuit selects one sense conductor and one word line to determine the resistance and state of the memory cell situated at the conductors crossing point. The read circuit can supply a sense current that flows through the word line and the memory cell to the sense conductor and back to the read circuit, where a voltage is detected. This voltage is used to determine the resistance and state of the cell.
A write circuit is electrically coupled to the word lines and the bit lines to write a memory cell. The write circuit supplies write currents to a selected word line and bit line crossing a memory cell to change the state of the memory cell. These word and bit line write currents may be the same or different in magnitude. The write currents create magnetic fields that, when combined, switch the orientation of magnetization of the selected memory cell from parallel to anti-parallel or vice-versa.
During a write operation, the non-selected memory cells along the selected word and bit lines are referred to as “half-selected” memory cells. The orientation of magnetization of these half-selected memory cells must not change when the selected memory cell is altered. If inadvertent switching of half-selected memory cells takes place, the array is gradually erased. This results in an unreliable memory device that cannot be used in an integrated circuit or system.
The memory cell device is usually fabricated as part of an integrated circuit using thin film technology. As with any integrated circuit device, it is important to use as little space as possible. However, difficulties arise as packing densities increase. For example, the magnetic field strength required to write a memory cell increases as the cell size decreases. Additionally, current density increases as the width and thickness of the word and bit lines decrease. This leads to electro-migration problems in the write conductors requiring the use of reduced write currents. Reduced write currents result in reduced magnetic field strengths, making it even more difficult to write the smaller memory cells.
Increasing packing density also leads to increasing the possibility of cross talk between conducting write lines and adjacent memory cells. If this happens repeatedly, the stored magnetic field of the adjacent cells is eroded through magnetic domain creep and the information in the cell can be rendered unreadable.