Rail-to-rail input stages are important for low-supply voltage systems which are used in many system applications. A well-known problem of rail-to-rail input stages is offset glitch. Most rail-to-rail input stages include a p-type differential pair and an n-type differential pair. For this configuration, the p-type differential pair is active only for low input common mode voltages, and the n-type differential pair is only active for high input common mode voltages. However, the input offset voltage must make a transition between the offset of the p-type differential pair to the n-type differential pair when the input common mode voltage increases from low to high values. The transition often causes rail-to-rail MOS operational amplifiers to have a poor common mode rejection ratio (CMRR).