The present inventive concept relates to resistance variable memories. More particularly, the inventive concept relates to resistance variable memories having performance characteristics less susceptible to variations in Process, Voltage and Temperature (PVT).
Semiconductor memory devices may be categorized as volatile and nonvolatile according to their ability to retain stored data in relation to applied power. Memory devices that lose stored data in the absence of applied power are volatile. Volatile memory includes Dynamic RAM (DRAM), Static RAM (SRAM), and similar types of memory that generally use a capacitor to store data.
Memory devices that retain stored data in the absence of applied power are non-volatile. Nonvolatile memories include Programmable ROM (PROM), Erasable PROM (EPROM), Electrically EPROM (EEPROM), flash memory (including NOR and NAND flash memories), and the like. Nonvolatile memory replaces the conventional capacitor used in volatile memory to store data with some nonvolatile form of data storage. Thus, nonvolatile memory includes Ferroelectric RAM (FRAM) which uses a ferroelectric capacitor, Magnetic RAM (MRAM) which uses a Tunneling Magneto-Resistive (TMR) film, phase change memory devices using phase changeable materials like chalcogenide alloys, etc.
Within the general class of nonvolatile memory devices, the phase change memory device is particularly susceptible to variations in temperature. However, phase change memory devices are characterized by fabrication processes that are relatively simple, and by an ability to densely integrate constituent memory cells at low cost. Accordingly, phase change memory devices offer great promise for future applications.
Contemporary phase change memory devices include a write driver circuit that supplies a program current to the constituent phase change material (e.g., Ge—Sb—Te or GST) of a selected phase change memory cell during a program operation. The write driver circuit may be configured to supply the program current, (i.e., supply a SET current or RESET current to a selected phase change memory cell storing binary data), using an externally provided power supply voltage (e.g., over 2.5V), where the SET current is a current placing the phase change material in a SET state, and the RESET current is a current placing the phase change material in a RESET state.