1. Field of the Invention
The present invention relates to a method for preventing crosstalk between conductive layers on a semiconductor device. More particularly, the present invention relates to a method for preventing horizontal and vertical crosstalk between conductive layers using a dummy conductive layer on a semiconductor substrate.
2. Description of the Related Art
As the integration density of semiconductor devices increases, more circuit elements must to be packed in a unit surface area of the device substrate, and circuit elements such as interconnects are necessarily increased between MOS transistors of the IC device. In many highly integrated semiconductor devices, more than two levels of interconnecting metal layers are demanded, called multilevel interconnects. Between these multiple metal layers, electrically insulating material known as inter-metal dielectrics are used to provide isolation in between the metal layers. Vias are formed in these inter-metal dielectric layers that can be filled with electrically conductive material to form plugs that provide electrical connection between the interconnects for different metal layers.
As shown in FIG. 1, planar conductive lines 108 are isolated by an inter-metal dielectric layer 104 on a substrate 100. Another conductive layer 110 is formed on the inter-metal dielectric layers 104. An inter-metal dielectric layer 106 is formed on the conductive layer 110. Another conductive layer 112 is formed on the inter-metal dielectric layer 106. The inter-metal dielectric layers 104 and 106 are formed to isolate the conductive layers 108, 110 and 112 and avoid any unwanted connection. In order to make interconnection between any of these conductive layers 108, 110 and 112, an interconnection structure is formed.
Multilevel interconnect structure includes conductive layers, conductive lines and plugs. The conductive lines are either located side by side and are isolated by inter-metal dielectric layer or else the conductive layers are located level by level and are connected by a plug. The planar conductive lines 108 and the conductive layer 110 are isolated by inter-metal dielectric layer 104, and the conductive layers 110 and 112 for different levels are isolated by inter-metal dielectric layer 106.
Semiconductor miniaturization results in reducing the distance between the interconnects. Electric fields are induced while charges flow through the interconnects. The distance between the conductive lines 108 is shorter than before, which induces electric field interference between the conductive lines 108 in a phenomenon known as horizontal crosstalk. Horizontal crosstalk can affect mobility of charges in the conductive lines 108, which reduces device performance. Similarly, the distances between the conductive lines 108 and the conductive layer 110 are shortened, which induces electric field interference between the conductive lines 108 and conductive layer 110 in a phenomenon known as vertical crosstalk. Vertical crosstalk can also affect mobility of charges in the conductive lines 108 and conductive layer 110, which reduces device performance.
Additionally, as the thickness of the inter-metal dielectric layers 104 between planar conductive lines 108 or between the conductive lines 108 and conductive layer 110 for different levels becomes thinner, an induced capacitance 114 becomes more obvious. The phenomenon is undesirable in the multilevel interconnects process.