1. Technical Field
This disclosure relates to memories, and more particularly to shared memory I/O.
2. Description of the Related Art
Many memory devices include a number of storage arrays that share an input/output I/O circuit. For example, two or more arrays may share an I/O circuit that includes a sense amplifier. These storage arrays may often operate in voltage domains that are different from one another and which are also different than the voltage domain of the shared I/O. In many cases, the storage arrays and their associated circuits may be placed in retention mode when not being accessed to save power. When one of the arrays is in retention mode, the data outputs of that array may will be referenced at a different voltage than the array being accessed.
The voltage differences between the domains is typically handled using level shifters on the data paths from the array output to the sense amplifier. However, level shifters in the data path may in some cases cause additional signal delay because they are in the signal path, and thus the critical path. Furthermore, the level shifters may consume significant die area.