Removable memory devices such as secure digital (SD) memory cards are widely used as recording media for portable music players, cameras, cellular phones and the like because they have large capacity and they are small and can be carried conveniently. Such a removable memory device is connected to a host terminal, and data of video, audio and the like is transmitted to and from the host terminal. When data is transmitted from the removable memory device to the host terminal, the host terminal first transmits transmission/reception clock for transmitting and receiving data to the removable memory device, and then, the removable memory device transmits data based on the transmission/reception clock. Herein, there are two transmission paths: a path from the host terminal to the removable memory device, and a path from the removable memory device to the host terminal. Therefore, a phase shift is generated between internal reception clock for the host terminal to receive data from the removable memory device and the data transmitted from the removable memory device based on the transmission/reception clock and received by the host terminal due to delay caused by passing the two paths. For example, when there is a distance of about 10 cm via a printed circuit board between the host terminal and the removable memory device, delay of about 1.2 ns is generated by passing two paths. Conventionally, a frequency of the transmission/reception clock and the internal reception clock is about 50 MHz, and a cycle of the clock is about 20 ns. Thus, a phase shift due to delay of about 1.2 ns does not prohibit the host terminal from receiving data.
As a method for adjusting a phase shift of clock between a reception terminal which receives data and a transmission terminal which transmits the data when they are operating in different clocks, a method as follows has been used conventionally. When the transmission terminal transmits packetized data to the reception terminal based on its clock, synchronization pattern is attached to each packet before transmitting. If the reception terminal and the transmission terminal are connected via Ethernet®, pattern of “0101 . . . ” of 64 bits which is same as the clock is used as the synchronization pattern. The reception terminal synchronizes the frequency and the phase of its clock to the clock of the transmission terminal based on the synchronization pattern attached to each packet. In this way, the reception terminal can effectively receive data transmitted from the transmission terminal.