1. Field of the Invention
The present invention relates to a material for forming a silica based film.
Priority is claimed on Japanese Patent Application No. 2003-412380, filed Dec. 10, 2003, the content of which is incorporated herein by reference.
2. Description of Related Art
Conventionally, in the production of substrates for semiconductor elements and liquid crystal elements, SOG (spin-on-glass) is a known technique used in the production of planarizing films, interlayer insulating films, passivation films, as well as the raw material solutions used for producing these films. SOG is a generic term that is typically used to describe both solutions comprising a silicon compound dissolved in an organic solvent (hereafter also referred to as SOG solutions), and silica based films (hereafter also referred to as SOG films) comprising SiO2 as the primary component, formed by applying a SOG solution to a substrate and conducting a subsequent heat treatment.
A variety of silica based films have been proposed (see patent references 1 to 4, listed below).
Silica based films formed using chemical vapor deposition methods (hereafter also abbreviated as CVD methods) are formed in a conformal manner relative to the wiring pattern, meaning that following film formation, they must be subjected to reflow at a high temperature of 950 to 1100° C. in order to flatten the surface of the film.
In contrast, SOG films can be formed with a flat surface by applying a SOG solution, and then conducting baking at a temperature that is lower than the above reflow temperature. Such SOG films display excellent surface planarity.
Patent Reference 1:
Japanese Examined Patent Application, Second Publication No. Hei 8-3074 B
Patent Reference 2:
Japanese Patent (Granted) Publication No. 2,739,902
Patent Reference 3:
Japanese Patent (Granted) Publication No. 3,228,714
Patent Reference 4:
Japanese Unexamined Patent Application, First Publication No. Hei 10-313002 A
However, with recent further advances in the miniaturization of semiconductor devices, the use of SOG films is becoming restricted due to the high etching rate of SOG films by hydrofluoric acid. For example, use of a SOG film as the insulating film of so-called PMD (Predetermined Metal Dielectrics) provided on top of a metal wiring pattern in a device with a gate length of no more than 0.18 μm is problematic.
Specifically, if a contact hole is formed by penetrating through the SOG film, and the inside of the contact hole is then washed with hydrofluoric acid, then the SOG film from the inside walls of the contact hole is also etched in a horizontal direction relative to the substrate, causing so-called side etching.
This side etching is most prevalent at the bottom sections of the SOG film, namely, the sections of the film closest to the substrate in the film depth direction.
In the case of substrates for the next generation of devices, some substrates covered with a film formed by a CVD method can comprise ultra fine indentations with a width between wiring (the wiring separation) of no more than 0.25 μm and a depth (step) of at least 0.4 μm. A SOG film formed on top of this type of substrate must be capable of filling these spaces between wiring without generating voids. In addition, if side etching of the SOG film which fills the indentations between wiring sections to planarize the substrate surface occurs, then short circuits can develop within the wiring, and consequently it is becoming increasingly important to reduce the etching rate of SOG films by hydrofluoric acid, thus preventing side etching.