1. Field of the Invention
The invention relates to integrated semiconductor circuits and somewhat more particularly to a method of selectivity depositing layer structures composed of silicides of high melting point metals on silicon substrates, such as are used in thin-film and semiconductor technology.
2. Prior Art
In VLSI (very large scale integration) technology, highly doped polysilicon gate-contact material in MOS devices is replaced with a layer combination exhibiting a lower resistance, for example, one composed of a 300 nm thick doped polysilicon layer and a 200 nm thick metal disilicide layer wherein the metal is molybdenum, tungsten or tantalum. However, problems exist in etching such double layers so that no steps or overhangs occur at the edges of the structures or tracks (or lines) composed of such metal silicides.
A technique for overcoming this problem comprises a two-stage dry etching process, or "lift-off" technique. In this regard, reference is made to a lecture by Kinsborn, Fraser and Vratny documented in the Abstracts of the Fifth International Thin-Film Congress in Herzlia (Israel) from September 21 through 25 (1981), on page 193.
Avoiding this relatively complicated involved process would effect an increase in device yield and provide a significant reduction in fabrication costs. With the use of the CVD (chemical vapor deposition) process, which deposits a material from a gaseous phase after thermal decomposition of a gaseous compound containing such material, it is possible to selectively deposit tungsten on silicon and not on silicon oxide (SiO.sub.2), see C. M. Melliar-Smith et al, J. Electrochem. Soc., Vol. 121, No. 2, (1973) pages 298-303, particularly page 299. Accordingly, it is possible to structure doped polysilicon in a problem-free manner according to hitherto known methods and to subsequently coat only the resultant polysilicon track with tungsten. A prerequisite for this, however, is that all regions of the device which are not to be coated with tungsten, must be occupied by SiO.sub.2. A disadvantage of this special technique is that tungsten forms volatile oxides so that a protective layer must be utilized. Further, tungsten reacts with a silicon base or substrate at temperatures above 600.degree. C., which produces an undesired roughness of the layer surface.
Since temperatures up to 1100.degree. C. are utilized in many VLSI processes, the advantages of a selective deposition of tungsten on silicon tracks cannot be fully exploited. Moreover, it has turned out that tantalum silicide is superior to tungsten silicide in regard to adhesion and oxidizability and forms a SiO.sub.2 passivation layer at higher temperatures.