The present invention relates generally to methods of processing semiconductor wafers, and more particularly to a method of processing a semiconductor wafer including final polishing a front surface of the semiconductor wafer.
Semiconductor wafers are generally prepared from a single crystal ingot, such as a silicon ingot, that is trimmed and is usually ground to have a notch or flat for orienting the wafer in subsequent procedures. The ingot is sliced into individual wafers which are each subjected to a number of processing operations to remove damage caused by the slicing operation and to ensure that the wafer surfaces are flat.
During processing, the surfaces of each wafer are usually polished to remove damage to the front and back surfaces induced by prior operations. Simultaneous double surface polishing (DSP) has become preferred in the industry because such polishing yields a wafer with flatter, more parallel surfaces. Unfortunately, conventional DSP technology cannot produce a wafer having a front surface prepared for integrated circuit fabrication. For example, conventional DSP technology produces wafers having front surfaces which are not sufficiently smooth and have significantly more haze than is acceptable for integrated circuit fabrication. Therefore, the front surface of the wafer is final polished in a single surface polishing operation to improve the smoothness and to reduce the scratches and haze in the front surface caused by the DSP operation such that the front surface is prepared for integrated circuit fabrication. However, single surface processing operations generally degrade the wafer flatness, including site flatness, and degrade parallelism (flatness and parallelism may generally be described as topology) which has been previously achieved by the simultaneous double surface polishing operation. Topological degradation may be caused by a non-uniform backing film such as wax used to mount the wafer which results in non-uniform material removal. The backing film serves as the reference plane for polishing the front surface, and imperfections therein can degrade flatness and parallelism. For example and referring to FIG. 6A, a wafer W having substantially flat, parallel surfaces is mounted on imperfect wax layer L of a plate P. The wafer elastically deforms as shown in FIG. 6B and is polished flat as shown in FIG. 6C. Upon removing the wafer from the wax (FIG. 6D), the wafer returns to a xe2x80x9cfree statexe2x80x9d in which the imperfections in the wax layer are seen in the front surface (the upper surface in FIG. 6D).
Similarly, in another type of final polishing process (sometimes referred to as CMP or free-mount CMP) wherein the wafer is mounted in a retaining ring and is substantially fixed against a backing membrane, pad or template by friction and surface tension, topological degradation may be caused by irregularities and deviations in the backing membrane, pad or template. Note that in such a CMP operation, movement of the wafer W relative to the backing pad or template is not desirable because such movement may cause undesirable damage to the back surface and may cause the release of scratch-causing or damaging particles which can migrate to the interface between the wafer and a polishing pad.
Among the several objects of the present invention may be noted the provision of a method of processing a semiconductor wafer which produces a relatively flat wafer; the provision of such a method which produces a wafer having parallel surfaces; the provision of such a method which improves the yield of polished wafers; and the provision of such a method which produces a finished front surface prepared for integrated circuit fabrication.
Further among the several objects of the invention is the provision of a method of handling wafers after batch processing which inhibits damage to the wafer and which improves the yield of polished wafers.
Also among the several objects of the invention is the provision of an apparatus for polishing semiconductor wafers which reduces contamination of polishing slurry used in the apparatus and which reduces haziness of wafers polished in the apparatus.
Briefly, a method of the invention is directed to manufacturing a semiconductor wafer having a front surface and a back surface. The method comprises the operations of providing an ingot of semiconductor material, slicing the wafer from the ingot, and processing the wafer to increase parallelism of the front surface and the back surface. A further operation of final polishing the front surface is performed by positioning the wafer between a first pad and a second pad and obtaining motion of the front and back surfaces of the wafer relative to the first and second pads to maintain parallelism of the front and back surfaces and to produce a finish on at least the front surface of the wafer so that the front surface is prepared for integrated circuit fabrication.
Another method includes final polishing the front surface by providing a polishing apparatus having a wafer carrier generally disposed between a first pad and a second pad. The second pad has surface area for contacting the back surface of the wafer which is at least about 10 percent larger than the back surface of the wafer. The wafer is placed in the wafer carrier so that the front surface faces the first pad and so that the back surface faces the second pad. The wafer is free to move relative to the first and second pads. A solution including polishing slurry is applied between the pads and rotation speeds of the wafer carrier, the first pad and the second pad are selected such that during rotation velocity of the back surface relative to the second pad is less than velocity of the front surface relative to the first pad to inhibit unstable hydrodynamic lubrication between the second pad and the back surface and inhibit vibration of the wafer. At least one of the wafer carrier, the first pad and the second pad is rotated such that the front and back surfaces of the wafer rotate and translate relative to the first and second pads.
In yet another method, a polishing slurry is applied to the pad and at least one of the wafer and pad is rotated to polish at least one of the surfaces of the wafer. The wafer is rinsed by applying a rinsing fluid to the pad after polishing to increase hydrodynamic lubrication between the wafer and pad and to maintain a solution including the slurry and the rinsing fluid at a buffered pH of between about 7.8 and about 11.8 such that the solution in contact with the wafer is alkaline and such that silica agglomeration is inhibited.
In another method, the wafer is placed in position for polishing by a pad and the pad is conditioned by applying a solution including polishing slurry containing silica particles and an alkaline component to the pad. At least one of the wafer and pad is rotated and pressure is applied to the wafer to polish at least one of the surfaces of the wafer.
In a method of handling semiconductor wafers after batch processing the wafers in a batch processing machine, the method comprises removing each wafer from the batch processing machine and spraying a first solution onto a front surface of each wafer which adsorbs to the front surface and inhibits particle adhesion to the front surface.
An apparatus of the invention for polishing semiconductor wafers comprises upper and lower platens adapted to rotate and to mount upper and lower pads, respectively. The lower pad is adapted to mount a wafer carrier thereon. The apparatus further comprises means for applying a solution to the pads and wafer carrier drive components for rotating the wafer carrier. The solution contacts exposed portions of the drive components during polishing, and the drive components exposed to contact by the solution have no composite reinforcing particles therein so that particle contamination of the solution and the wafers is inhibited.
Other objects and features of the present invention will be in part apparent and in part pointed out hereinafter.