Advances in semiconductor processing have demanded ever-increasing high functional density with continuous size scaling. This scaling process has led to the adoption of high-k gate dielectrics and metal gate electrodes in metal gate stacks in semiconductor devices.
High-k gate dielectrics can offer a way to scale down the thickness of the gate dielectric with acceptable gate leakage current. The use of high-k gate dielectrics is often accompanied by a metal gate electrode, since thin gate dielectric layers may cause poly depletion, affecting the device operation and performance.
The introduction of metal elements to the device, e.g., in the formation of the metal gate electrode, can impose significant changes to the device fabrication process, including device structure designs to reduce leakage, process chemistry to pattern metallic structures and avoid metal corrosion, and cleaning chemistry to remove metallic-containing residues.
For complementary metal-oxide-semiconductor (CMOS) transistors with metal gates, it is desirable to fabricate PMOS and NMOS transistors having gates of different work functions. For example, current FinFET replacement metal gate integration scheme uses an Al-based metal gate for NMOS and a TiN-based metal gate for PMOS. Besides the fabrication complexity of using two different metals, Al-based metal gate can have high resistivity, poor thermal stability, and potentially requiring metal cladding.
Therefore, there is a need for methods to form metal gate transistors devices having similar process flows and/or a same metal in the metal gates with a first work function for a PMOS device and a second work function for an NMOS device.