Many integrated circuit designs use multiple power supplies to reduce power consumption while still providing high performance. But the voltage levels of logic signals processed by logic circuitry powered by one power supply domain might be different, and possibly incompatible, with the voltage levels of logic signals processed by logic powered by different power supply domain. For example, a field-programmable gate array (FPGA) typically has core signal processing logic and input-output buffers interfacing the core logic with off-chip logic circuitry. Generally, the input-output buffers are powered from one or more power supplies having voltages higher than the power supplies powering the core logic. Because the voltage levels of logic signals for the input-output buffers are usually greater than the voltage levels of logic signals utilized by the core logic, level shifters are used to “translate” the logic signals passing between the core logic and the input-output buffers.
A similar use for level shifters exists in analog circuitry where it is desirable to shift the level of analog signals originating from one analog function for use by another analog function. For example, a phase-locked-loop (PLL) might require the use of a level shifter to have an error signal from a phase detector shifted to a voltage range that is suitable for use by a voltage-controlled oscillator (VCO).
Two similar examples of a level shifter used to change the voltage levels of logic or analog signals are source or emitter followers where the output voltage levels are reduced by an amount approximately equal to the gate-to-source voltage or base-to-emitter voltage of a single MOSFET or bipolar transistor, respectively. Because the amount of voltage reduction is dependent on the electrical characteristics of the transistor, the amount of voltage reduction is relatively large (e.g., 0.5-0.7 volts), is not controllable, and varies with process, temperature, and operating voltage.