1. Field of the Invention
The present invention relates to a chopper circuit, a chopper circuit control method, a chopper-type charging circuit, an electronic device, and a timekeeping apparatus.
2. Related Art
A chopper-type charging circuit is known as a charging circuit for charging a capacitor or a battery, with alternating current electrical power generated by an electrical generator.
FIG. 25 of the appended drawings is a circuit diagram of a chopper-type charging circuit of the past. This chopper-type charging circuit 1 is formed by an oscillator circuit 2, comparators COM1 and COM2, AND circuit 3, a large-capacitance capacitor 4, and P-channel FETs P1 and P2, N-channel FETs N1 and N2.
The oscillator circuit 2 outputs a clock signal CL. The comparator COM1 (COM2) performs a comparison of the voltages at output terminal A(B) of an alternating current electrical generator AG with a terminal voltage VDD of a power supply. The AND circuit 3 calculates the logical product of the output signal SP1 and SP2 of the comparator COM1 and COM2 and the clock signal CL. The large-capacitance capacitor 4 is for storing a charging current. P-channel FET P1 (P2) are on/off controlled by the output signals SP1(SP2) of the comparator COM1(COM2). N-channel FET N1 (N2) are on/off controlled by an output signal SN of the AND circuit 3.
A diode D1 is a parasitic diode of the P-channel FET P1. A diode D2 is a parasitic diode of the P-channel FET P2. A diode D3 is a parasitic diode of the N-channel FET N1. A diode D4 is a parasitic diode of the N-channel FET N2.
The operation of the chopper-type charging circuit is described below, with reference made to the timing diagram shown in FIG. 26.
In FIG. 26, the assumption is that until a time ta, the voltages on the output terminals A is equal to or less than the terminal voltage VDD and the voltages on the output terminals B is equal to or less than the terminal voltage VDD. Output signal SP1 of the comparator COM1 is held at a high level and output signal SP2 of the comparator COM2 is held at a high level. Thus both of the P-channel FETs P1 and P2 are in the off state.
At the time ta, when the clock signal CL rises from a low level to the high level, output signal SN of the AND circuit 3 changes to the high level. Thus both of the N-channel FETs N1 and N2 are placed in the on state. Accordingly a closed loop is formed by the alternating current generator AG and the N-channel FET N1 and the N-channel FET N2.
In the above case, the alternating current generator AG generates an electromotive force. For example, when the output terminal A reaches a positive potential with respect to the output terminal B. As shown by the arrow .alpha. in FIG. 25, a current i1 flows through a path from the alternating current generator AG, to the N-channel FET N1, and then to the N-channel FET N2.
At the time tb, when the clock signal CL falls to the low level, the output signal SN of the AND circuit 3 changes to the low level. Thus the N-channel FETs N1 and are placed in the off state, thereby cutting off the above-noted current path.
In the above case, because of the current that flows during the time when the clock signal CL is at the high level (hereinafter referred to as the shorted period), the inductance of a generator coil of the alternating current generator store up an energy. This energy raises the voltage of the output terminal A. Next at time tc, when the voltage of the terminal A is equal to or greater than the terminal voltage VDD of the large-capacitance capacitor 4, the output signal SP1 of the comparator COM1 changes to the low level, so that the P-channel FET P1 is placed in the on state.
As a result, as shown by the arrow .beta. in FIG. 25, a current i2 flows through a current path from the diode D4 of the N-channel FET N2, to the alternating current generator AG, the P-channel FET P1, and then to the large-capacitance capacitor 4.
As the charging proceeds, energy stored in the inductance of the generator coil is gradually released, so that the charging current i2 gradually decreases. When the voltage of the output terminal A falls below the terminal voltage VDD on the large-capacitance capacitor 4, the output signal SP1 of the comparator COM1 changes to the high level, so that the P-channel FET P1 is placed in the off state, thereby cutting off the above-noted charging current path.
That is, until the voltage at the output terminal A falls below the terminal voltage VDD of the large-capacitance capacitor 4, the AND circuit 3 holds the N-channel FETs N1 and N2 in the off state, so that charging is continued. For this reason, when the amount of electricity generated by the alternating current generator AG is large, so that the amount of energy stored in the inductance of the generator coil is large, charging continues even after switching to the shorted period. Thus the charging time is long, so that it commensurately eats away the shorted period.
In the case in which the electromotive force of the alternating current generator AG is generated and the output terminal B reaches a potential that is positive with respect to the output terminal A. Thus the direction of the current i1 flowing during the above-noted shorted period reverses, so that the voltage of the output terminal B rises. As a result, the charging current i2 flows through the path from the diode D3 of the N-channel FET N1, the alternating current generator AG, the P-channel FET P2, and then the large-capacitance capacitor 4, resulting in the charging of the large-capacitance capacitor 4.
Thus, in a chopper-type charging circuit 1 of the past, by repeatedly performing shorting and voltage raise of the circuit in accordance with the clock signal. A chopper voltage that charges a large-capacitance capacitor 4 is generated from the electromotive force of an alternating current generator, which has a small, non-uniform amount of generated electricity. In the case in which the there is a large amount of energy stored in the inductance of the generator coil, or in which the input energy is large, the shorted period of the chopper is disabled, so that priority is given to charging by non-chopped operation. By performing charging by switching between chopper and non-chopped operation, it is possible to efficiently charge the large-capacitance capacitor.
In a chopper-type charging circuit 1 such as described above, if the amount of electrical generated by the alternating current generator is large, because the charging continues even after transition to the shorted period, so that there are an eatting away of the shorted period. For this reason, there are the problems of it not being possible to achieve sufficient storage of energy in the inductance of the generator coil, and of decreased charging efficiency.
While making the shorted period long can be envisioned as a method of achieving a sufficient shorted period. In particular in the case of an alternating current generator, the internal resistance of the generator causes a large loss in the current path during the shorted period, thereby resulting in a decrease in the charging efficiency.
In this case, although one method that can be envisioned is that of setting the shorted period duty cycle, which is the proportion of the shorted period in the chopper operation. In accordance with the amount of electricity generated, the detection of the amount of electricity generated by the alternating current generator requires the provision of a separate circuit to detect the charging current, thereby increasing the power consumption. In particular in the case of applying a chopper-type charging circuit to a wristwatch, in which the electrical generator is small, the amount of power consumed by the circuit to detect the charging current is a large proportion of the overall power consumption. This is undesirable from the standpoint of overall power consumption of the wristwatch.