This invention relates to the field of assembly between a microchip-package substrate and a second substrate and in particular to attaching a BGA component to the second substrate with improved yields.
The ever-increasing density improvements in silicon can be more fully exploited with corresponding wiring density improvements in chip carriers. Challenges to increased wire density have been met with ball grid array packaging designs. FIG. 1A is an illustration of a ball grid array (BGA) design. Ball grid array packaging designs are a die housed in a plastic package and typically have via in pad architecture. Solder balls are attached to the BGA package to electrically connect a die within and then electrically connect to a second substrate through the solder balls by a reflow operation. FIG. 1B is an illustration of a short between two solder balls. FIG. 1C is an illustration of an insufficiency of solder that fails in a connection. As the number of solder balls has increased, so have problems with solder ball shorts or insufficient solder joint conditions resulting from via in pad designs. These defects are the result of outgassing from the via barrel during the high temperature cycles involved in a surface mount technology (SMT) process. As shown in FIG. 1B, with opposing via barrel ends capped, outgassing can expand from a via barrel on a mating second substrate into the solder balls causing them to expand until they contact each other or contact an incorrect land creating a short. As shown in FIG. 1C, solder ball expansion from outgassing can cause an implosion of the solder ball resulting in the solder falling into the via barrel creating an open between the BGA land and the mating via in pad of the second substrate.
As circuit line widths are reduced, solder ball arrays will continue to become packed even tighter, and these problems with solder ball shorts and solder insufficiencies will continue to become more severe. As a result, via in pad technology applications can suffer from high yield loss (greater than 1% at the component level) in the SMT manufacturing process. These yield losses, resulting from shorting or opens in BGA joints as well as other leaded components, are the direct result of outgassing of air trapped within the via barrel and/or from volatiles created by materials in the via during the thermal processing.
Currently, the state of art is to cap the via on the PCB side opposite the solder ball and rely on minimizing the volatiles in the via barrel to prevent outgassing and solder implosion during reflow. Fill materials with high solid content may be used or minimization of the via fill material can be done, however neither of these methods control defects to the desired level for cost effective manufacture.
An apparatus to vent via barrel outgassing of a via in pad during assembly is disclosed. A vent path is placed within the pad of the via in pad that is sized to vent via outgassing for all or a portion of a reflow operation and at a rate that can restrict solder from collapsing into the via barrel. During the reflow operation, outgassing from the via barrel can escape to atmosphere by passing through the vent and around the solder.