With the rapid development of display technology, displays have a development trend to high integrity and a low cost. The Gate Driver on Array (GOA) technology is to integrate a gate switch circuit of a Thin Film Transistor (TFT) onto an array substrate of a display panel to achieve scanning and driving of the display panel, so as to omit a bonding region and a wiring space of a fan-out region of an Integrated Circuit (IC). This can not only reduce a product cost in terms of a material cost and manufacturing processes, but also can achieve an aesthetic design of the display panel with two symmetrical sides and a narrow frame. Further, such integration process can further omit bonding processes in the direction of gate scanning lines, so as to improve the productivity and yield.
Generally, the existing GOA circuit is comprised of multiple cascaded shift registers. Each of driving signal output ends of various stages of shift registers corresponds to a gate line, to arrange various gate lines in turn along a scanning direction. However, shift registers used in most GOA circuits are currently under the control of a clock signal, in which case a node for controlling a switch transistor for output will always be in a floating state, and a potential at the node will be influenced by current leakage from surrounding switch transistors, and thereby a potential at a gate of the switch transistor for output is unstable. In this case, a noise in a scanning signal output by a driving signal output end is large, thereby influencing stability of output of the shift register.