Various bus architectures and interconnect schemes are known in the art. Such schemes are used, for example, in the design of Integrated Circuits (IC) and Systems-on-Chip (SoC). For example, ARM Ltd. (Cambridge, England) offers a bus architecture called Advanced Microcontroller Bus Architecture (AMBA). The AMBA architecture includes an interconnect protocol called Advanced eXtensible Interface (AXI), which is targeted at high-performance, high-frequency system designs and includes a number of features for a high-speed submicron interconnect. The AMBA AXI protocol is specified in an ARM specification entitled “AMBA AXI Protocol,” version 1.0, 2004, which is incorporated herein by reference.
Another part of the AMBA protocol family is the Advanced Peripheral Bus (APB) protocol, which aims to provide a low-cost interface that is optimized for minimal power consumption and reduced interface complexity. APB is specified in an ARM specification entitled “AMBA 3 APB Protocol,” version 1.0, 2004, which is incorporated herein by reference.
ARM also offers a configurable auto-generated AMBA 3 bus subsystem called High-Performance Matrix (HPM), which is based on an AXI cross-bar switch. The HPM product is described in an ARM Technical Summary entitled “PrimeCell High-Performance Matrix (PL301),” revision r1p2, 2008, which is incorporated herein by reference. Yet another product is the AMBA Network Interconnect, which is a configurable component for creating AMBA-compliant network infrastructure. This component is described in an ARM Technical Reference Manual entitled “AMBA Network Interconnect (NIC-301),” revision r2p0, 2009, which is incorporated herein by reference.
The description above is presented as a general overview of related art in this field and should not be construed as an admission that any of the information it contains constitutes prior art against the present patent application.