In association with the rapid progress of semiconductor integrated circuit techniques and the higher integration of semiconductor elements, a technological revolution aiming at greater capacities of semiconductor information storage elements that are commonly called memory has been in progress.
What has become a problem associated with greater Dynamic Random Access Memory (DRAM) capacity, reaching up to a gigabyte scale in recent years, is an increase in power consumption when data is being transmitted in the process of performing a read or write operation. One factor in the increase in power consumption result from the elongation of a data bus for transmitting data.
In a common semiconductor storage apparatus, the majority of a chip is occupied by memory cells, resulting in a configuration such that a data bus has to be placed in the peripheral part, thereby resulting in greatly increasing the length of the data bus. Further, associated with a growing chip size in proportion to the capacity of the semiconductor storage apparatus in recent years, the transmission distance of data, that is, the length of the data bus, has tended to become ever longer. 
In a semiconductor storage apparatus, data (DQ) buffers that are an interface for data readout and write are arranged integrally in one place within the chip. When transmitting data, the input and output data is detected from a memory cell by way of a sense amplifier and then the data is transmitted to a data sense amplifier through an input/output line. The output of the data sense amplifier is transmitted by way of a local data bus. Further, the local data bus is integrated into a global data bus by a multiplexer at a certain point. As such, the data is transmitted to the DQ buffer by way of the global data bus.
Currently, data transmissions in the Double Data Rate (DDR) system are widely utilized for DRAM, particularly for Synchronous Dynamic Random Access Memory (SDRAM). The DDR system refers to a system of reading or writing continuous data in response to a single read/write command. For example, the number of times continuous data processing is carried out for each system is as follows: two times for DDR, four times for DDR2 and eight times for DDR3. Further, the number of DQ buffers varies from four to eight to sixteen to thirty two, etc., with individual semiconductor storage apparatuses.
As an example, in the case of a semiconductor storage apparatus comprising sixteen DQ buffers transmitting data in the DDR3 system, the continuous data is transmitted to sixteen DQ buffers eight times, and therefore the number of required data buses (i.e., the data bus width) is 128.
Further, when transmitting the data, a toggle operation for the data bus is required. The toggle operation refers to an operation for changing a data bus in a pre-charge state from a certain potential to zero volts. For example, it is supposed that a toggle operation for a data bus is required for transmitting data of “1” and that the pre-charged state needs to be maintained for the data bus for transmitting data of “0”. In this case, the semiconductor storage apparatus does not consume power for transmitting data of “0”. For transmitting data of “1”, however, a series of operations is required in which a toggle operation is used to reduce the potential of the data bus to zero volts, and then the potential is increased to the potential of the pre-charge state once again. If the  series of operations is carried out by a large number of very long data buses as described above, the power consumption becomes very large, and this constitutes a major problem in association with the increased capacity of recent semiconductor storage apparatuses.
Accordingly, one prior art technique for reducing the power consumption of a semiconductor storage apparatus utilizes a Current Sense Amplifier (CSA). For example, the data transmitted to a DQ buffer is amplified by using the CSA and VSA (Voltage Sense Amplifier) in order to reduce the power consumption in a data transmission at the semiconductor storage apparatus. Such a utilization of the CSA makes it possible to minimize a difference in potential for transition at the time of performing a toggle operation, thereby enabling a reduction in the power consumption used for a data transmission.
The method, however, has left the following problems. A first problem is that the power consumption of the CSA is large. In some cases, this problem is addressed by reducing the number of CSAs to be placed. However, it is difficult to reduce the power consumption beyond a certain limit using this method.
A second problem is low noise resistance. Noise resistance is reduced as the distance of a transmission increases, and this requires that a current with a larger difference in potential be applied. That is, when applying it to a large capacity device on which a long distance data transmission is required, then a recognized problem is difficulty in reducing the power consumption.