This invention relates to memory management units and, more particularly, to such units designed for the control of multiple, concurrently operating processes.
In computer usage, it is necessary to store data in memory and to retrieve that data as quickly as possible using as little central processing unit (CPU) time as possible. Thus, the CPU concerns itself only with gross instructions concerning the storage (or retrieval) of data and not with the actual physical location in memory where such data is to be stored.
For example, the CPU might issue an instruction to store a block of data from buffer A in memory at virtual address location LOC1. The CPU does not know where the data is stored physically but it does know that, if it desires to retrieve that same data, it can issue an instruction to retrieve data from virtual address LOC1, and the data will be available.
A memory management unit (MMU) is used to accomplish the task of controlling information flow in and out of a memory. The primary task of the MMU is to accept storage or retrieval assignments from the CPU and to translate the virtual address, as supplied from the CPU, into a physical location within the memory. Another important task of the MMU is to insure that the process which is calling for the writing or the retrieval of data has the proper permission to do so at the designated location in memory.
The MMU organizes the memory into variable length segments or into fixed length pages, or combinations of both, and establishes memory tables cross-referencing each virtual address to the associated actual physical address. These tables are called mapping tables and contain permission information as well as physical coordination information.
When the CPU is running a particular process, the MMU accesses only those tables associated with that process. The obvious reason for this is that each different process may issue an instruction to store a piece of data in the memory at virtual address LOC1. Thus, since data written into LOC1 for a first process is different from the data put into LOC1 for a second process, the MMU must store each of these data segments at different physical locations within the memory.
In the simplest form, the CPU sends to the MMU a virtual address together with a desired operation, i.e., read, write or execute instruction. The MMU, using the mapping table of the currently active CPU process, determines the physical location and cross checks the permissions.
Most MMUs maintain a memory cache of translation and permission tables directly in the MMU. If the information for a virtual address is in the cache, the MMU can perform its job without accessing the cross-reference table stored in main memory. If the information is not in the cache, the MMU must retrieve the proper table entry from main memory, check permissions and then send the physical address for the CPU's access to memory.
Since the MMU can only work with one process at a time, data transfers between two different processes require special work by the CPU. In order to transfer data between processes, the CPU must verify permissions and set up address tables so that the source and target data areas are both contained within one process. In addition, the process that is actually performing the transfer might be a third process. This requires a significant amount of work by the CPU thereby degrading system performance.
By way of example, assume that there are three processes A, B and C. Process A is a privileged process, and processes B and C are normal (unprivileged) processes. Processes B and C request that process A copy a block of data from process B LOC1 to process C LOC2 (LOC1 and LOC2 are virtual addresses; and LOC1 might be the same as LOC2, or different).
Process A must first verify that processes B and C have the proper permissions for the copy. To do this, process A must retrieve permission information for LOC1 of process B and then must verify that process B has read permission. This verification requires the transfer of mapping tables associated with process B. Process A must then retrieve permission information for each data storage block of LOC2 for process C and verify that each block has write permission. This requires a second transfer of mapping tables. If the permissions are correct, process A must then set up a scratch translation table area in the MMU pointing to the physical addresses involved in the copy. To do this, process A must cause the MMU to retrieve the translation information for LOC1 of process B and then set up its address tables so that its LOC2 points to the same physical addresses as process B's LOC1. Assume this to be physical address space PH000-PH100. Process A must then set up a translation table so that its LOC3 points to the same physical addresses as process C's LOC2. Assume this to be physical location PH200-PH300. Process A then copies the data from physical location PH000-PH100 (process B's LOC1) to physical location PH200-PH300 (process C's LOC2). This example has required the CPU to perform a significant amount of work, which, as discussed above, degrades system performance. The problem is significantly compounded when it is remembered that data transfer can span several memory sections and the translation tables need not be the same for all the data.
A compounding problem arises because the management of MMU's is part of any operating system and, thus, programs exist which rely upon the function already established. Thus, any attempt to change the MMU operation which results in necessary program changes, is difficult, at best, to achieve.