The present invention relates to low power consumption circuits for providing a selected one of a plurality of voltage levels at a circuit output region.
Conventional electricity erasable programmable read only memories (E.sup.2 PROM's) are designed to operate at logic levels of zero volts and +5 volts. A much higher voltage, typically +21 volts, is required to program or erase such conventional memory circuits, however. In such conventional E.sup.2 PROM's this voltage is supplied by a voltage source external to the integrated circuit chip containing the memory. While one may wish to provide only a +5 volt signal to the circuit chip and rely on voltage multipliers located thereon to raise the voltage to +21 volts, such a design is difficult to achieve in a conventional E.sup.2 PROM. In such a conventional circuit the 21 volt voltage supply is typically electrically connected to ground potential via depletion pull up and enhancement pull down transistors in unselected word lines. The power drawn by the unselected word lines is therefore typically greater than on-chip voltage multipliers can conveniently supply.