1. Field of the Invention
This invention relates to a semiconductor device provided with semiconductor chips, and a manufacturing method thereof.
2. Description of the Related Art
Portable electronics devices such as a cellular phone, a PDA, a DVC and a DSC become increasingly sophisticated. The fabrication of the devices with a compact size and lightweight are indispensable so that such devices are accepted in the market. System LSI higher integrated is required for the realization of such devices. On the other hand, LSI used for the devices is required to be with a high functionality and a high performance for the realization of friendly and convenient electronics devices. For this reason, while the number of I/O is increasing with the acceleration of LSI chip integration, downsizing of the package is also required. The development of the packages appropriate to the board assembly of semiconductor components with a high density is strongly desired to satisfy both of the integration and the downsizing. Some kinds of package technique called CSP (Chip Size Package) are developed to correspond with such demand.
BGA (Ball Grid Array) is known as an example of such a package as described above. BGA is formed by mounting a semiconductor chip on a substrate for the package, molding it by resin, and forming solder balls in an array on the backside surface of the substrate as an external terminal. Since the mounting part of BGA has an area, the downsizing of the package becomes easy. Furthermore, a circuit board corresponding to a narrow pitch, and a mounting technique with a high precision become unnecessary. Therefore, a total mounting cost can be reduced by using BGA even when a packaging cost is relatively high.
FIG. 1 is a schematic illustration of such a standard configuration of BGA as disclosed in Japanese Laid-Open Patent Application H7-183426. BGA 100 has a configuration in which the LSI chip 102 is mounted on the adhesion layer 108 formed on the glass epoxy board 106. The LSI chip 102 is molded by mold resin. The LSI chip 102 is electrically connected with the glass epoxy board 106 by the metal wire 104. The solder balls 112 are formed in an array arrangement on the backside surface of the glass epoxy board 106. BGA 100 is mounted on a printed circuit board by the intermediary of the solder balls 112.
In such a package, a semiconductor chip is connected with a interconnect layer by a wire bonding method or a flip chip method. That is, a pad electrode consisting of a metal film is provided on the top of a interconnect layer, and the pad electrode is connected with a pad electrode of a semiconductor chip by a predetermined conductive member such as a gold wire and solder. It becomes important technical problems to reduce the resistance at the connecting point and to improve the connection strength stably, to improve a yield rate and element reliability.