The present invention relates to a method of fabricating non-volatile memory devices and, more particularly, to a method of fabricating NAND flash memory devices.
Generally, semiconductor memory devices can be classified into volatile memory devices and non-volatile memory devices. Volatile memory devices, such as Dynamic Random Access Memory (DRAM) and Static Random Access Memory (SRAM), exhibit high speed data input/output characteristics, but lose their data when power is turned off. Non-volatile memory devices retain their data even when power is turned off.
A flash memory device is a kind of a non-volatile memory device. A flash memory device is a high-integrated memory device, which was developed by taking advantage of Erasable Programmable Read Only Memory (EPROM) that can be programmed and erased, and Electrically Erasable Programmable Read Only Memory (EEPROM) that can be electrically programmed and erased. The term ‘program’ refers to an operation of writing data into a memory cell, and the term ‘erase’ refers to an operation of deleting data written into a memory cell.
A flash memory device can be categorized as NOR type and NAND type flash memory devices according to the structure and operating condition of a cell. In the NOR type flash memory device, the drain of each memory cell transistor is coupled to a bit line, enabling program and erase operations with respect to a specific address and, therefore, increasing the operating speed. The NOR type flash memory device is generally used in applications requiring a high-speed operation. In contrast, in the NAND type flash memory device, a plurality of memory cell transistors is connected in series, constituting one string, and one string is coupled between bit lines and a common source line. Thus, the NAND type flash memory device has a relatively small number of drain contact plugs, facilitating high integration. Accordingly, the NAND type flash memory device is generally used in applications requiring high-capacity data retention.
The NAND type flash memory device includes a plurality of word lines formed between a source select line and a drain select line. A select line, for example, the source select line or the drain select line, is formed by connecting gates of select transistors, each included in a plurality of strings. The word lines are formed by connecting gates of memory cell transistors. The select line and the word line include a tunnel oxide layer, a floating gate, a dielectric layer and a control gate. In the select line, the floating gate and the control gate are electrically connected.
In order to program the NAND flash memory, electrons pass through the tunnel insulating layer by the F-N tunneling effect, so that the electrons from the semiconductor substrate are stored in the floating gate and electrons stored in the floating gate are drained toward the semiconductor substrate. A high voltage is applied to a memory cell to be programmed and the semiconductor substrate is grounded to produce a bias difference. Accordingly, electrons in the channel area of the semiconductor substrate pass through the tunnel insulating layer and then tunnel through the floating gate of the corresponding memory cell. The electrons are trapped at the floating gate of the corresponding memory cell, which is thereby programmed.
However, the same high voltage is applied to other memory cells sharing the word line of the programmed memory cell. Thus, the other memory cells sharing the word line may be programmed unintentionally. In order to solve this problem, a channel area of the other memory cells sharing the word line is boosted to maintain a constant voltage. Accordingly, a potential difference between the other memory cells sharing the word line and the channel area can be reduced to prevent a program operation.
However, if the channel area of a word line adjacent to the select line is boosted, when 0V is applied to the select line, a Gate Induced Drain Leakage (GIDL) current is generated in a section where the select line and the junction overlap, thereby generating electrons. The generated electrons rapidly move to the channel area and serve as hot carriers due to a program voltage applied to the word line adjacent to the select line, so that the electrons move to the floating gate. For this reason, a phenomenon in which the word line adjacent to the select line is unintentionally programmed can occur.