The invention relates generally to integrated circuit design, and more specifically, to an approach for representing integrated circuit device characteristics using polynomial equations.
As a result of the increased size and complexity of integrated circuits and economic pressures to reduce design cycle times, most contemporary integrated circuits are designed using electronic design automation (EDA) tools. EDA tools are available for almost every phase of the integrated circuit design process, for example logic testing, layout, simulation and test, verification and package design and test.
EDA tools that are used to predict and/or verify the performance of an integrated circuit design need to understand the characteristics of particular integrated circuit devices and cells contained in the design. That is, how the particular integrated circuit devices and cells contained in the design behave under various operating conditions for particular process technologies. Currently, two ways by which EDA tools understand the timing and power characteristics of integrated circuit devices are the multidimensional table approach and the empirical equation approach.
According to the multidimensional table approach, integrated circuit device characteristics are determined by simulating or measuring the performance of devices and cells under various operating parameters and environmental conditions using a circuit simulator such as HSPICE. The results are then stored in a set of multidimensional data tables that are organized in a library for use by EDA tools.
Multidimensional tables typically contain data that is based upon various timing parameters such as propagation delays, transition time delays and timing constraints including setup, hold, pulse width and recovery time, as measured against a number of factors (independent variables) that influence timing and power. Example factors include input transition time, output capacitance load, output resistance load, output inductance load, temperature, voltage and process type.
For example, two-dimensional tables are commonly used to characterize combinational elements, where the independent variables are input transition time and output load. Three-dimensional time tables are commonly used to characterize unbuffered sequential elements, where the independent variables are clock transition time, data transition time and output load. A set of sampling points are selected on the multidimensional independent variable domain. Device performance, e.g., timing, is characterized at each of the sampling points using a circuit simulator or by collecting actual measurement data. The characterization data is then stored in a data table in a semiconductor library for use by an EDA tool. When an EDA tool needs to determining the timing for a particular device, the EDA tool uses the multidimensional tables for the particular device to lookup a particular timing value. The EDA tool may also use either linear or polynomial interpolation to determine timing values between sampling points.
The use of multidimensional data tables generally provides a relatively high level of accuracy since actual (or interpolated) data values are used by the EDA tool. However, the data table approach also has disadvantages. The primary disadvantage of the data table approach is that large multidimensional tables require a large amount of storage space and also require a large amount of system resources and time to retrieve, for example, when an EDA tool retrieves large multidimensional tables over a network.
There are two primary factors that contribute to the large size of the multidimensional data tables. First, accurate modeling of device behavior in the non-linear operational domain generally requires a large number of sampling points to provide the necessary sampling granularity. For example, while a typical application-specific integrated circuit library may contain between five and ten sampling points per dimension, resulting in a two-dimensional table containing (25) to (100) data points. A table for modeling non-linear behavior may contain (400) data points.
Second, contemporary deep sub-micron designs are typically characterized with more operational and environmental parameters and therefore require an increasing number of dimensions. For example, temperature and voltage are increasingly important in system-on-chip designs where different regions of a chip are operate at different temperatures and voltages, causing the table size to grow quadratically.
Table compaction techniques have been proposed to reduce the size of multidimensional data tables in linear operating regions by removing over-sampled data points. However, these techniques are generally not practical in non-linear operating regions because of the need for higher sampling granularity when the rate of change on the surface is high. See xe2x80x9cA fast and accurate technique to optimize characterization tables for logic synthesis,xe2x80x9d by J. F. Croix and D. F. Wong, Proceedings of 1997 Design Automation Conference, pp.337-340, Anaheim Convention Center, Anaheim, Calif., Jun. 9-13, 1997.
According to the empirical equation approach, a set of empirical equations is developed for an integrated circuit device from a simplified device model that define the operation of the device over a broad range of operating parameters and operating conditions. The empirical equations are often derived by hand and rely upon many assumptions about the operational behavior of a device.
The primary drawback of using empirical equations is that they are not sufficiently accurate for many applications. Contemporary semiconductor devices are very sophisticated and their operation can be affected by a large number of operational conditions and environmental factors. Empirical equations make many assumptions about operational conditions and environmental factors when the equations are developed. Therefore it is very hard to determine an accurate initial empirical equation. Even when such an equation exists, the number of terms in the equation can be very large (between 20 and 30), leading to computational complexity. As a result, empirical equations often do not accurately model integrated circuit device behavior when these parameters change.
Accordingly, based upon the need to represent integrated circuit device characteristics for use in integrated circuit analysis and the limitations in prior approaches, an approach for representing integrated circuit device characteristics that avoids the limitations of the prior approaches is highly desirable.
This and other needs are met by embodiments of the invention, which in one aspect provide a method for representing one or more characteristics of an integrated circuit device. According to the method, integrated circuit device characterization data is received that indicates one or more characteristics of the integrated circuit device. Then a polynomial equation representation of the integrated circuit device characterization data is determined based upon the integrated circuit device characterization data, wherein the polynomial equation representation satisfies specified accuracy criteria.
According to another aspect of the invention, a computer system is provided for representing one or more characteristics of an integrated circuit device. The computer system comprises a storage medium containing integrated circuit device characterization data and a polynomial equation generation mechanism communicatively coupled to the storage medium. The polynomial equation generation mechanism is configured to determine a polynomial equation representation of the integrated circuit device characterization data based upon the integrated circuit device characterization data, wherein the polynomial equation representation satisfies specified accuracy criteria.
Other aspects and advantages of the invention will become apparent from the following description and claims.