In a computer system including a plurality of central processing units (CPUs), when data is transferred among the plurality of CPUs, for example, a CPU of a transmission source writes data in a share memory of a transmission destination and thereafter, generates and notifies an interrupt to a CPU of the transmission destination. The CPU that receives the interrupt accesses the share memory to read out the data written in the memory. Hereinafter, data communications performed among the CPUs may be called a cross call (xcall).
[Patent Literature 1] Japanese Laid-open Patent Publication No. 2004-086615    [Patent Literature 2] Japanese Laid-open Patent Publication No. 11-120156    [Patent Literature 3] Japanese Laid-open Patent Publication No. 2006-301894    [Patent Literature 4] Japanese Laid-open Patent Publication No. 63-059649    [Patent Literature 5] Japanese Laid-open Patent Publication No. 2000-029850
However, in a large-scale computer system including a plurality of CPUs, the number of CPUs increases, and as a result, a time required for the cross call also increases. There is a case in which after an operating system (OS) issues a cross call transmission request, the cross call is not completed within a prescribed time, the OS detects a time-out (cross call time-out), and the system abnormally ends. Therefore, it is desirable to complete the cross call within a short time.
For example, in an information processing apparatus including a building block (BB) including a plurality of CPUs, when the cross call is performed among the CPUs through the BBs, it is desirable that the CPU of the transmission destination can efficiently judge from which CPU included in the BB the interrupt is received. Further, a cross access competition in which data is transmitted to the same CPU from the CPUs of the plurality of BBs may occur, but in this case, it is desirable to prevent only processing of a specific BB from being prioritized.