1. Field of the Invention
The present invention relates to a receiving apparatus suitable for a CDMA (Code Division Multiple Access) type cellular telephone system, a receiving method thereof, and a terminal unit for use with a radio system thereof.
2. Description of the Related Art
In recent years, a CDMA type cellular telephone system has become attractive. In the CDMA type cellular telephone system, a pseudo-random code is used as a spread code. A carrier of a transmission signal is spectrum-spread. The pattern and phase of each spread code in the code sequence are varied so as to perform a multiple access.
In the CDMA system, the spectrum spread method is used. In the spectrum spread system, when data is transmitted, the carrier is primarily modulated with the transmission data. In addition, the carrier that has been primarily modulated is multiplied by a PN (Pseudorandom Noise) code. Thus, the carrier is modulated with the PN code. As an example of the primarily modulating method, a balanced QPSK modulating method is used. Since the PN code is a random code, when the carrier is modulated by the PN code, the frequency spectrum is widened.
When data is received, the received data is multiplied by the same PN code that has been modulated on the transmission side. When the same PN code is multiplied and the phase is matched, the received data is de-spread and thereby primarily modulated data is obtained. When the primarily modulated data is demodulated, the original data is obtained.
In the spectrum spread method, to de-spread the received signal, the same PN code that has been modulated on the transmission side is required for both the pattern and the phase. Thus, when the pattern and the phase of the PN code are varied, the multiple access can be performed. The method for varying the pattern and the phase of each spread code in the code sequence and thereby performing the multiple access is referred to as the CDMA method.
As cellular telephone systems, an FDMA (Frequency Division Multiple Access) system and a TDMA (Time Division Multiple Access) system have been used. However, the FDMA system and the TDMA system cannot deal with a drastic increase of the number of users.
In other words, in the FDMA system, the multiple access is performed on different frequency channels. In an analog cellular telephone system, the FDMA system is usually used.
However, in the FDMA system, since the frequency use efficiency is bad, a drastic increase of the number of users tends to cause channels to run short. When the intervals of channels are narrowed for the increase of the number of channels, the adjacent channels adversely interfere with each other and thereby the sound quality deteriorates.
In the TDMA system, the transmission data is compressed on the time base. Thus, the use time is divided and thereby the same frequency is shared. The TDMA system has been widely used as a digital cellular telephone system. In the TDMA system, the frequency use efficiency is improved in comparison with the simple FDMA system. However, in the TDMA system, the number of channels is restricted. Thus, it seems that as the number of users drastically increases, the number of channels runs short.
On the other hand, the CDMA system has excellent interference resistance. Thus, in the CDMA system, adjacent channels do not interfere with each other. Consequently, the frequency use efficiency improves and more channels can be obtained.
In the FDMA system and the TDMA system, signals tend to be affected by fading due to multi-paths.
In other words, as shown in FIG. 8, a signal is sent from a base station 201 to a portable terminal unit 202 through a plurality of paths. In addition to a path P1 in which a radio wave of the base station 201 is directly sent to the portable terminal unit 202, there are a path P2, a path P3, and so forth. In the path P2, the radio wave of the base station 201 is reflected by a building 203A and sent to the portable terminal unit 202. In the path P3, the radio wave of the base station 201 is reflected by a building 203B and sent to the portable terminal unit 202.
The radio waves that are reflected by the buildings 203A and 203B and sent to the portable terminal unit 202 through the paths P2 and P3 are delayed from the radio wave that is directly sent from the base station 201 to the portable terminal unit 202 through the path P1. Thus, as shown in FIG. 9, signals S1, S2, and S3 reach the portable terminal unit 202 through the paths P1, P2, and P3 at different timings, respectively. When the signals S1, S2, and S3 through the paths P1, P2, and P3 interfere with each other, a fading takes place. In the FDMA system and the TDMA system, the multi-paths cause the signal to be affected by the fading.
On the other hand, in the CDMA system, with the diversity RAKE method, the fading due to the multi-paths can be alleviated and the S/N ratio can be improved.
In the diversity RAKE system, as shown in FIG. 10, receivers 221A, 221B, and 221C that receive signals S1, S2, and S3 through the paths P1, P2, and P3 are disposed, respectively. A timing detector 222 detects codes received through the individual paths. The codes are sent to the receivers 221A, 221B, 221C corresponding to the paths P1, P2, and P3, respectively. The receivers 221A, 221B, and 221C demodulate the signals received through the paths P1, P2, and P3. The received output signals of the receivers 221A, 221B, and 221C are combined by a combining circuit 223.
In the spectrum spread system, signals received through different paths are prevented from interfering with each other. The signals received through the paths P1, P2, and P3 are separately demodulated. When the demodulated output signals received through the respective paths are combined, the signal intensity becomes large and the S/N ratio improves. In addition, the influence of the fading due to the multi-paths can be alleviated.
In the above-described example, for simplicity, with the three receivers 221A, 221B, and 221C and the timing detector 222, the structure of the diversity RAKE system was shown. However, in reality, in a cellular telephone terminal unit of diversity RAKE type, as shown in FIG. 11, fingers 251A, 251B, and 251C, a searcher 252, and a data combiner 253 are dispose d. The fingers 251A, 251B, and 251C obtain demodulated output signals for the respective paths. The searcher 252 detects signals through multi-paths. The combiner 253 combines the demodulated data for the respective paths.
In FIG. 11, a received signal as a spectrum spread signal that has been converted into an intermediate frequency is supplied to an input terminal 250. This signal is supplied to a sub-synchronous detecting circuit 255. The sub-synchronous detecting circuit 255 is composed of a multiplying circuit. The sub-synchronous detecting circuit 255 multiplies a signal received from the input terminal 250 by an output signal of a PLL synthesizer 256. An output signal of the PLL synthesizer 256 is controlled with an output signal of a frequency combiner 257. The sub-synchronous detecting circuit 255 performs a quadrature detection for the received signal.
An output signal of the sub-synchronous detecting circuit 255 is supplied to an A/D converter 258. The A/D converter 258 converts the input signal into a digital signal. At this point, the sampling frequency of the A/D converter 258 is much higher than the frequency of the PN code that is spectrum-spread. In other words, the input signal of the A/D converter 258 is over-sampled.
An output signal of the A/D converter 258 is supplied to the fingers 251A, 251B, and 251C. In addition, the output signal of the A/D converter 258 is supplied to the searcher 252. The fingers 251A, 251B, and 251C de-spread the signals received through the respective paths, synchronize the signals, acquire the synchronization of the received signals, demodulate the data of these signals, and detect frequency errors of the signals.
The searcher 252 acquires the codes of the received signals and designates the codes of the paths to the fingers 251A, 251B, and 251C. In other words, the searcher 252 has a de-spreading circuit that multiplies a received signal by a PN code and de-spreads the signal. In addition, the searcher 252 shifts the phase of the PN code and obtains the correlation with the received code under the control of the controller 254. With the correlation between a designated code and a received code, a code for each path is determined.
An output signal of the searcher 252 is supplied to the controller 254. The controller 254 designates the phases of the PN codes for the fingers 251A, 251B, and 251C corresponding to the output signal of the searcher 252. The fingers 251A, 251B, and 251C de-spread the received signals and demodulate the received signals received through the respective phases corresponding to the designated phases of the PN codes.
The demodulated data is supplied from the fingers 251A, 251B, and 251C to the data combiner 253. The data combiner 253 combines the received signals received through the respective paths. The combined signal is obtained from an output terminal 259.
The fingers 251A, 251B, and 251C detect frequency errors. The frequency errors are supplied to the frequency combiner 257. With an output signal of the frequency combiner 257, the oscillation frequency of the PLL synthesizer 256 is controlled.
In the portable telephone terminal unit of RAKE type, the searcher 252 has the structure as shown in FIG. 12.
In FIG. 12, a digital signal is supplied from the A/D converter 258 (see FIG. 11) to an input terminal 301. As described above, the sampling frequency of the A/D converter 258 is higher than the frequency of a PN code. In other words, the digital signal is over-sampled. The digital signal is supplied from the input terminal 301 to a decimating circuit 302. The decimating circuit 302 decimates the signal received from the input terminal 301. An output signal of the decimating circuit 302 is supplied to a multiplying circuit 303.
A PN code generating circuit 304 generates a PN code that has spread on the transmission side. The phase of the PN code received from the PN code generating circuit 304 can be designated by a controller 254. The PN code received from the PN code generating circuit 304 is supplied to the multiplying circuit 303.
The multiplying circuit 303 multiplies the output signal of the decimating circuit 302 by the PN code received from the PN code generating circuit 304. Thus, the received signal from the input terminal 301 de-spreads. When the pattern and the phase of the received code match the pattern and the phase of the code received from the PN code generating circuit 304, the received signal de-spreads. Thus, the level of an output signal of the multiplying circuit 303 becomes large. The output signal of the multiplying circuit 303 is supplied to a level detecting circuit 307 through a band pass filter 306. The level detecting circuit 307 detects the level of the output signal of the multiplying circuit 303.
An output signal of the level detecting circuit 307 is supplied to an adding circuit 308. The adding circuit 308 cumulates output data a predetermined number of times (for example, 64 times). With the cumulated value of the output data of the level detecting circuit 307, correlation values of the code designated to the PN code generating circuit 304 and the received code are obtained. An output signal of the adding circuit 308 is supplied to a memory 309.
The phase of the PN code received from the PN code generating circuit 304 is shifted every predetermined number of chips. The correlation value is obtained from the output signal of the adding circuit 308 for each phase. The correlation value is stored in the memory 309. After the PN code has been designated for one period, the correlation values stored in the memory 309 are sorted in the order of larger correlation values by the controller 254. For example, three phases with the largest correlation values are selected. The selected phases are designated to the fingers 251A, 251B, and 251C (see FIG. 11).
FIG. 13 is a flow chart showing a process of the searcher. In FIG. 13, the phase of the PN code generating circuit 304 is designated to the initial value (at step ST101). The number of additions is cleared (at step ST102). The cumulated value of the adding circuit 308 is cleared (at step ST103).
When the initial phase is designated to the PN code generating circuit 304, the multiplying circuit 303 de-spreads the received signal with the designated PN code. The adding circuit 308 cumulates the de-spread signal level (at step ST104). Whenever the signal level is cumulated, the number of additions is incremented (at step ST105). Next, it is determined whether or not the number of additions exceeds a predetermined value (for example, 64) (at step ST106). The signal level is cumulated until the number of additions becomes 64. Thus, the correlation value is obtained. When the number of additions becomes 64, the correlation value at the time is stored in the memory 309 (at step ST107).
It is determined whether or not the last phase of the PN code generating circuit 304 has been designated (at step ST108). When the last phase has not been designated, the phase of the PN code is advanced or delayed by a predetermined value (at step ST109). Thereafter, the flow returns to step ST102. With the phase of the PN code that has been shifted for the predetermined value, the above-described process is repeated.
When the phase of the PN code is shifted for one period, at step ST109, the last phase of the PN code has been designated. Thus, the determined result at step ST108 becomes Yes. At this point, the correlation values stored in the memory 309 are sorted and the largest three correlation values are obtained (at step ST110). The three phases corresponding to the three largest correlation values are designated to the fingers 251A, 251B, and 251C (at step ST111).
In the example of the searcher shown in FIG. 12, de-spread levels are added 64 times for all phases of each PN code so as to obtain a correlation value. Thus, the search time becomes long. When the number of additions is decreased, although the search time becomes short, the accuracy of the correlation values deteriorates.
To solve this problem, the number of additions is designated to 32. It is determined whether or not each correlation value exceeds a predetermined threshold value. Only when each correlation value exceeds the predetermined threshold value, more than 32 additions are performed so as to obtain a correlation value. Thus, the searching process can be quickly performed without a deterioration of the accuracy. FIG. 14 shows an example in which the speed of the searching process is increased in such a manner.
In FIG. 14, a digital signal is supplied from the A/D converter 258 to an input terminal 351. The digital signal is supplied from the input terminal 351 to a decimating circuit 352. The decimating circuit 352 decimates the signal received from the input terminal 351. An output signal of the decimating circuit 352 is supplied to a multiplying circuit 353.
A PN code generating circuit 354 generates a PN code that has spread on the transmission side. The phase of the PN code received from the PN code generating circuit 354 can be designated by a controller 254. The PN code received from the PN code generating circuit 354 is supplied to the multiplying circuit 353.
The multiplying circuit 353 multiplies the output signal of the decimating circuit 352 by the PN code received from the PN code generating circuit 354. Thus, the received signal from the input terminal 351 de-spreads with the code received from the PN code generating circuit 354. When the pattern and the phase of the received code match the pattern and the phase of the code received from the PN code generating circuit 354, the received signal de-spreads. Thus, the level of an output signal of the multiplying circuit 353 becomes large. The output signal of the multiplying circuit 353 is supplied to a level detecting circuit 357 through a band pass filter 356. The level detecting circuit 357 detects the level of the output signal of the multiplying circuit 353.
An output signal of the level detecting circuit 357 is supplied to an adding circuit 358. The adding circuit 358 cumulates output data of the level detecting circuit 357. With the cumulated value of the output data of the level detecting circuit 357, correlation values of the code designated to the PN code generating circuit 354 and the received code are obtained.
The output signal of the level detecting circuit 357 is cumulated for example 32 times (namely, 32 additions are performed) by the adding circuit 358. An output signal of the adding circuit 358 is supplied to a comparator 362. The comparator 362 determines whether or not the value of the output signal of the adding circuit 358 exceeds a predetermined threshold value. When the value of the output signal is less than the predetermined threshold value, since a small correlation value is not necessary, it is determined that there is almost no correlation in the current phase. The phase of the PN code generating circuit 354 is shifted to the next phase. Only when the value exceeds the predetermined threshold value, the output signal of the level detecting circuit 357 is cumulated more than 32 times so as to accurately detect a correlation value. The output signal of the adding circuit 358 is supplied to a memory 359.
The phase of the PN code received from the PN code generating circuit 354 is shifted every predetermined number of chips. The correlation value is obtained from the output signal of the adding circuit 358 for each phase. The number of additions of the adding circuit 358 is for example 32. When the cumulated value is equal to or less than the predetermined threshold value, it is determined that the correlation is weak. In this case, the phase of the PN code generating circuit 354 is shifted to the next phase. Only when the cumulated value exceeds the predetermined threshold value, more than 32 additions are performed. The correlation value is stored in the memory 359. After the phases of the PN code have been designated for one period, for example three paths are selected in the order of larger correlation values. Codes of the three paths are designated to the fingers 25A, 25B, and 25C.
FIGS. 15A and 15B are flow charts showing another example of the process of the above-described searcher. In FIGS. 15A and 15B, the phase of the PN code generating circuit 354 is designated to the initial value (at step ST151). The number of additions is cleared (at step ST152). The cumulated result of the adding circuit 358 is cleared (at step ST153).
When the initial phase is designated to the PN code generating circuit 354, the multiplying circuit 353 de-spreads the received signal with the designated PN code. The adding circuit 358 cumulates the de-spread signal level (at step ST154). Whenever the signal level is cumulated, the number of additions is incremented (at step ST155). Next, it is determined whether or not the number of additions exceeds a predetermined value (for example, 32) (at step ST156). The signal level is cumulated until the number of additions becomes 32.
When the number of additions becomes 32 as the determined result at step ST156, it is determined whether or not the cumulated result exceeds a predetermined threshold value (at step ST157). When the cumulated result does not exceed the predetermined threshold value, it is determined that the correlation is weak (at step ST158). In addition, it is determined whether or not the last phase of the PN code generating circuit 354 has been designated (at step ST159). When the last phase has not been designated, the phase of the PN code is advanced or delayed by a predetermined value (for example 1/2 chip) (at step ST160). Thereafter, the flow returns to step ST152. With the phase of the PN code that has been shifted for the predetermined value, the above-described process is repeated.
When the cumulated result exceeds the predetermined threshold value as the determined result at step ST157, additions are continued (at step ST162). Whenever one addition is performed, the number of additions is incremented (at step ST162). It is determined whether or not the number of additions becomes a predetermined value (for example, 64) (at step ST163). The signal level is cumulated until the number of additions becomes for example 64. When the number of additions becomes 64, the current correlation value is stored in the memory 359 (at step ST164).
It is determined whether or not the last phase of the PN code generating circuit 354 has been designated (at step ST159). When the last phase has not been designated, the phase of the PN code is advanced or delayed by a predetermined value (for example 1/2 chip) (at step ST160). Thereafter, the flow returns to step ST152. With the phase of the PN code that has been shifted for the predetermined value, the above-described process is repeated.
When the phase of the PN code is shifted for one period, it is determined that the last phase of the PN code has been designated at step ST159. At this point, correlation values stored in the memory 359 are sorted and phases corresponding to the three largest correlation values are obtained (at step ST165). The three phases corresponding to the three largest correlation values are designated to the fingers 251A, 251B, and 251C (at step ST166).
It is assumed that the number of additions is designated to a predetermined value (for example, 32). It is determined whether or not a correlation value exceeds a predetermined threshold value. Only when the correlation value exceeds the predetermined threshold value, a predetermined number of additions (for example, 32 additions) are additionally performed so as to obtain a correlation value. Thus, when the correlation is weak, additions are not repeatedly performed. Consequently, the searching process can be performed at high speed without deterioration of the accuracy. However, in this case, the number of additions should be properly designated.
In other words, in the stage of which the number of additions is small, when the cumulated value that is output from the adding circuit 358 is compared with the predetermined threshold value, if the correlation with a received signal is strong and the received signal is affected by noise, it is mistakenly determined that the correlation is weak. Thus, the correlation value in this phase may not be obtained. In contrast, when the number of additions becomes large, if the cumulated value that is output from the adding circuit 358 is compared with the predetermined threshold value, additions are meaninglessly repeated. Thus, the searching process cannot be performed at high speed.