1. Field of the Invention
The present invention relates to an economical distributed-architecture device for switching ATM cells in a local area network, with fault tolerance of the cross-connection and management functions.
2. Discussion of the Background
Investigations of telecommunications systems are increasingly calling upon a mode of transfer called ATM, the abbreviation standing for Asynchronous Transfer Mode. This technique makes it possible to convey digital information, the nature and bit rate of which are as varied as they are irregular (for example voice, video, files). The information is transported across a network which can be of various topologies (for example mesh, ring, star, etc.). Each node of the network, called an ATM switch, is linked to the adjacent node by a transmission highway which accepts all types of technologies (cable, radio beam, optical fibre, etc.).
The principle of the ATM technique is to segment the data emanating from the various services into blocks of fixed length, and to append a header to this block so as to form an ATM cell. The ATM cells originating from the various sources are multiplexed and transmitted asynchronously on the transmission highway.
The routing of the cells relies on a logic channel-based mode, the value of which is written into the header of the ATM cell. Thus, each physical highway is logically equivalent to several paths. The ATM switches establish link-ups between these logical channels so as to form virtual routes between the ends of the network.
An essential function of an ATM switch is to be able to translate the incoming logical channel in such a way as to switch the ATM cell onto the appropriate outgoing path. This function relies on a prior operation of tagging the virtual route in each ATM switch.
A great majority of ATM switches of local area networks such as described in the document entitled xe2x80x9cRedundant Asynchronous transfer Mode Switching Modulexe2x80x9d, IBM Technical Disclosure Bulletin, Vol 39, No. 4 Apr. 1996, pages 227 to 229, are switches having centralized, or weakly distributed, architecture, and in which the functions specific to the ATM technique are grouped together into an entity called the ATM layer. This entity performs in particular the translation of the (VPI, VCI) pair contained in each cell header, VPI and VCI being the abbreviations for xe2x80x9cVirtual Path Identifierxe2x80x9d and xe2x80x9cVirtual Channel Identifierxe2x80x9d, respectively, the processing of OAM management cells, the abbreviation for xe2x80x9cOperations Administration and Maintenancexe2x80x9d. The switch""s management function consists in particular of procedures for local supervision, routing and signalling. The functions of an ATM switch consist generally, apart from the ATM layer function and the management function, of an access function and a cross-connection function. In the case of a centralized architecture all these functions are executed by a single hardware unit which groups together calculational capabilities consisting of micro-processors, storage capabilities in the form of memories and capabilities for steering the cells in the form of cross-connectors.
This concentration is detrimental to the modularity of the switch and to its capacity to remain operational when one of the elements of which it consists develops a fault.
A conventional solution to this problem consists in distributing the functions over distinct hardware units, which are possibly duplicated to allow the backup of a defective unit of the same nature, and are installed in the switch in sufficient number to satisfy the foreseeable processing load depending on the configuration of the network at this spot. In practice these units consist of cards having electronic components and which are brought together in a rack, and converse with one another via one or more data buses laid out in a backplane rack.
Nevertheless, this solution is expensive since the development of every new card includes an irreducible design expense which will raise the cost price of the switch. Moreover, the exchanging of information between these cards requires complex and expensive connecting arrangements which must meet the operational needs of the system, by means of high bit rate buses for example, sometimes to the detriment of the possibility of using, in one and the same rack, off-the-shelf cards whose standard interface as more conventional, of the VME or PCI bus type.
The distributed architecture is consequently reserved as a priority for big switches involved in public telecommunications networks. Within the framework of these networks, fault tolerance, when it exists, is achieved by duplicating the vital units of the switch and by their simultaneous parallel operation. This type of active redundancy is difficult to manage. This is because an incoming cell entering the switch at one of its accesses is immediately duplicated and processed in parallel by the two redundant units, after which the two resulting cells are compared so that only one of them is returned to the network. This assumes perfect synchronism between the redundant units or, at the very least, means for managing any possible asynchronism. As regards the switch""s management function, the problem is identical: any message originating from the network has to be duplicated, processed in parallel and lastly merged with its dual. All of this is expensive and complex.
The purpose of the Invention is to alleviate the aforesaid drawbacks.
To this end, the subject of the invention is a distributed-architecture device for switching ATM cells of the type comprising access means (1), means for executing the ATM layer function, means for executing the cross-connection of the ATM cells and management means, the whole of the means of the device being distributed between two types of hardware modules, a first type composed of junctor modules and a second type composed of two cross-connection and management modules, one operating in an xe2x80x9cactivexe2x80x9d mode and the other in a xe2x80x9cpassivexe2x80x9d mode, in that the access means are installed in each junctor, the means of executing the ATM layer function are installed almost identically in each junctor and in each of the two cross-connection and management modules and in that it comprises a supervising bus which links the first and second types of module, so as to ensure rapid and automatic reconfiguration of the device in the event of a fault in one of its constituents, the supervising bus being of simple configuration and serving merely to convey, under the control of the management means, signals indicative of the xe2x80x9cmasterxe2x80x9d and xe2x80x9cslavexe2x80x9d management means as well as a signal indicative of the xe2x80x9cactivexe2x80x9d cross-connection module characterized in that each cross-connection and management module comprises a cross-connector subassembly coupled to the junctor modules and to subassemblies for managing the modules of the second type so as to allow a changeover of the operation of the device from the cross-connection and management module currently in use to the other cross-connection module when a fault occurs in the cross-connection and management module currently in use.
An advantage of the invention is economical implementation of the device, requiring only a small number of soecific electronic cards which can be produced with the aid of components or of processor cards available off-the-shelf. Another advantage is that it allows simple reconfiguration of the device in the event of a fault owing to the absence of parallel operation of the duplicated vital units and by virtue of the possibility which it offers of performing automatic changeover to the backup unit in the event of a fault with a vital unit.
Given the need to produce an economical architecture, and given the present state of the art, the changeover between a hardware module and its backup module cannot be effected without disturbing the services rendered by the switch. The changeover from one cross-connection module to another may be accompanied by the loss of a few cells. The changeover from one management module to another may be accompanied by the breaking of the established connections. Nevertheless, the architecture proposed and the processes for implementing these changeovers make it possible to minimize their operational impact. Thereby, it is likely that the disturbances introduced by the changeover itself are no more serious than those introduced by the poor operation of the faulty unit before the fault is detected.
Since the most delicate element in this architecture is the management module which is exposed to the vagaries of software errors, the architecture proposed makes it possible to detect the fault, to activate the backup management module, to keep the same cross-connector initially so as to avoid any disturbance to the established connections for as long as the management module is not completely ready to cope with the requests for reconnections, then to change over to the cross-connector local to the active management module so as to allow a maintenance operator subsequently to extract the faulty card and replace it without disturbing the proper operation of the switch.
However, the management module is not the only one which may develop a fault. If the cross-connection module is no longer operating correctly the architecture proposed also makes it possible to detect the fault, to change over to the backup cross-connector, to keep the same management module while awaiting the favourable moment to execute the changeover (slack period, etc.), then to change over to the management module situated in the same card as the active cross-connector module.