Borophosphosilicate Glass (BPSG) is often used as a radiation hardened interlevel dielectric. In the past, BPSG layers were deposited using typical atmospheric chemical vapor deposition techniques. BPSG layers can also be deposited by plasma enhanced chemical vapor (PECVD)deposition techniques. However, we found that PECVD BPSG layers were radiation soft, rather than radiation hard. That finding lead us to conduct a series of experiments to determine the causes of radiation hardness or softness in BPSG layers. In particular, it suggested that the radiation hardness of a BPSG layer may depend upon the method of its deposition rather than its stoichiometry.
Electrically erasable programmable read only memories (EEPROMs) are devices that can retain a charge on a transistor when the voltage supply to the transistor is removed. EEPROMS are well known devices. A typical EEPROM includes an array of standard FET transistor and an array of storage transistors. One problem with existing EEPROMs is that substantially different steps are required to form the two kinds of transistors. One kind of EEPROM relies upon a gate insulating material comprising a layer of silicon dioxide and silicon nitride. The interface between the nitride layer and the oxide layer can trap injected charges and thereby provide a memory device. An example of one such EEPROM is shown in U.S. Pat. No. 3,881,180. One disadvantage of such a structure in the dual layer gate insulating layer. Those layers are applied in separate steps and thus increase the overall complexity and expense of the EEPROM. Another type of EEPROM is a floating gate, avalanche-injection MOS transistor or FAMOS. The conductive gate is electrically isolated by enclosing the gate in silicon dioxide. The process for forming such a floating gate usually requires separate steps for depositing a first oxide layer on the surface of the substrate and a second oxide layer on the surface and the sides of the conductive gate material. Such a device is described in Device Electronics for Integrated Circuits, R. S. Muller and T. I. Kamins, John Wiley & Sons, (1977), pp 372, 373.