As miniaturization techniques have advanced in recent years, the power consumptions of LSI (Large-Scale Integrated) circuits have become larger, and the standby power consumptions of semiconductor memories cannot be ignored these days. In a LSI circuit, a power-gating technique is being used to cut off the power supply to portions not being used, and supply power only to portions being used. Where a memory circuit is manufactured by a semiconductor CMOS technique, volatile SRAMs (Static Random Access Memories) are used as the memories for storing information. Since SRAMs are volatile, the power supply cannot be cut off during a standby time, and therefore, the power consumption becomes larger. Also, since SRAMs are volatile, the memory information is lost when the power supply is abruptly cut off. Where a large number of SRAMs are used, the power consumption becomes larger due to a leakage current, even when there is not an operation being performed. As a result, a circuit that cannot easily reduce its power consumption and cannot easily be highly-integrated is formed. Further, since SRAMs are volatile memories from which information is lost when the power supply is cut off, it is necessary to write information supplied from an external memory every time the power supply is activated. Therefore, time and effort are required when the power supply is activated. Also, the external memory for storing the information while the power supply is off needs to be secured, and the power consumption and the volume for the external memory are required. This is one of the factors that hinder high integration and low power consumptions in the entire system.
As a nonvolatile memory circuit based on a currently-available semiconductor technique, a nonvolatile memory of a variable resistance type has been suggested. A nonvolatile memory of a variable resistance type causes a SRAM as a semiconductor memory to store information when the power supply is activated. Since a nonvolatile memory retains information even when the power supply is cut off, the power can be cut off while neither a reading operation nor a writing operation is being performed. In other words, if a nonvolatile memory is used in a LSI circuit, power gating can be readily performed. In view of this, attention is being drawn to nonvolatile memories of the variable resistance type.
In recent years, spin electronics devices that utilize the spin freedom of electrons have been actively studied and developed. Particularly, techniques based on tunnel magnetoresistance (TMR) effects have been actively studied and developed, and are now applied to magnetic random access memories (MRAMs) and the reproduction heads of hard disk drives (HDDs). Further, attention is being drawn to spin transistors that combine semiconductors and ferromagnetic materials.
A ferromagnetic material can have a nonvolatile memory function. Therefore, if used as nonmagnetic memories, ferromagnetic materials may be applied to the power-gating technique or memory backup. A nonvolatile memory circuit using ferromagnetic tunnel junction (MTJ) devices has been suggested as a nonvolatile memory.
In the nonvolatile memory circuit, MTJ devices are series-connected to MOS transistors within an inverter loop. Therefore, the operation margin becomes much lower, and high reliability cannot be achieved.
In a nonvolatile memory circuit using MTJ devices, the contents stored in the memory are determined by the resistance values of the MTJ devices observed when the power supply is activated. However, when the power voltage is low, the resistance of each MOS transistor is very high. Therefore, the influence of the resistance values of the MTJ devices is very small. As a result, false operations tend to be often caused due to variations in resistance value among the MOS transistors when the power voltage is low, and therefore, high reliability cannot be achieved.