The continuing push to produce faster semiconductor devices with lower power consumption has resulted in device miniaturization. As part of these efforts, there is interest in the use metal gate electrodes and in producing channel strain in transistors. The use of metal gates can avoid the depletion of gate charge carriers at the interface between the gate and gate dielectric, such as encountered when a polysilicon gate electrode is biased to invert the channel. The production of strain can improve carrier mobility in the channel region of semiconductor substrates.
Unfortunately, the manufacture of semiconductor devices having metal gates and channel strain are not without problems. The addition of manufacturing processes for metal gate into existing semiconductor device manufacturing processes has been problematic. E.g., it has proven difficult to use a single metal with different work function in complementary nMOS and pMOS transistors. Additionally, the incorporation of strain-producing materials into semiconductor substrates without causing a high leakage current, and making electrical contacts to such materials, has also been problematic. The integration of metal gates and channel strain fabrication process into the same transistor using an efficient process presents additional challenges.
Accordingly, what is needed is a method for manufacturing semiconductor devices that integrates the manufacture of metal gate electrodes of the appropriate work function with a strained channel.