1. Field of the Invention
The present invention relates to an organic electroluminescent device, and more particularly, to a dual plate organic electroluminescent device that includes a first substrate having a thin film transistor array unit and a second substrate having an organic electroluminescent unit, and a method of fabricating the same.
2. Discussion of the Related Art
Generally, an organic electroluminescent device (ELD) emits light by injecting electrons from a cathode and holes from an anode into an emission layer, combining the electrons with the holes, generating an exciton, and transitioning the exciton from an excited state to a ground state. Unlike the case for a liquid crystal display (LCD) device, an additional light source is not necessary for the organic ELD to emit light because the transition of the exciton between states causes light to be emitted in the organic ELD. Accordingly, the size and weight of the organic ELD is less than a comparable liquid crystal display (LCD) device. The organic ELD has other desirable characteristics, such as a low power consumption, superior brightness and a fast response time. Because of these advantageous characteristics, the organic ELD is regarded as a promising candidate for use in various next-generation consumer electronic applications, such as cellular phones, car navigation systems (CNS), personal digital assistants (PDA), camcorders and palmtop computers. Moreover, since fabricating an organic ELD is a relatively simple process compared to an LCD device and has fewer processing steps than an LCD device, an organic ELD is much cheaper to produce than an LCD device. Two different types of organic ELDs exist: passive matrix and active matrix.
FIG. 1 is a schematic cross-sectional view of an organic electroluminescent device according to the related art. As shown in FIG. 1, an organic electroluminescent device (ELD) 30 has a first substrate 32 that faces and is spaced apart from a second substrate 48. An array layer 34, including a thin film transistor (TFT) “T,” is formed on an inner surface of the first substrate 32. A first electrode 36, an organic electroluminescent (EL) layer 38, and a second electrode 40 are sequentially formed over the array layer 34. The organic EL layer 38 may separately display red, green, and blue colors for each pixel region “P.”
The first substrate 32 and the second substrate 48 are attached with a sealant 47. An organic ELD is encapsulated by attaching the first substrate 32 to the second substrate 48. A moisture absorbent desiccant 41, which eliminates moisture and oxygen that may penetrate into a capsule of the organic electroluminescent layer 38, is positioned on the second substrate 48. More particularly, a portion of the second substrate 48 is etched and the moisture absorbent desiccant 41 is place in the etched portion and affixed by a holding element 25.
FIG. 2 is a schematic plane view showing an array layer of an organic electroluminescent device according to the related art. As shown in FIG. 2, an array layer of an organic electroluminescent device (ELD) includes a switching element “TS,” a driving element “TD” and a storage capacitor “CST.” The switching element “TS” and the driving element “TD” may include a combination of switching elements including at least one thin film transistor (TFT). A first substrate 32, which may be transparent insulating substrate, on which the array layer is formed may be made of glass or plastic. A gate line 42 and a data line 44 crossing each other are formed on the first substrate 32. A pixel region “P” is defined by the gate line 42 and the data line 44. An insulating layer (not shown) is interposed between the gate line 42 and the data line 44. A power line 55, which crosses the gate line 42, is parallel to and spaced apart from the data line 44.
The switching element “TS” shown in FIG. 2 is a thin film transistor that includes a switching gate electrode 46, a switching active layer 50, a switching source electrode 56, and a switching drain electrode 60. Similarly, the driving element “TD” in FIG. 2 is a thin film transistor that includes a driving gate electrode 68, a driving active layer 62, a driving source electrode 66, and a driving drain electrode 63. The switching gate electrode 46 is connected to the gate line 42 and the switching source electrode 56 is connected to the data line 44. The switching drain electrode 60 is connected to the driving gate electrode 68 via a first contact hole 64 that exposes a portion of the driving gate electrode 68. The driving source electrode 66 is connected to the power line 55 via a second contact hole 58 that exposes a portion of the power line 55. Moreover, the driving drain electrode 63 is connected to a first electrode 36 in the pixel region “P.” The power line 55 overlaps a first capacitor electrode 35 with the insulating layer interposed therebetween in order to form the storage capacitor “CST.”
FIG. 3 is a schematic cross-sectional view taken along a line “III—III” of FIG. 2. As shown in FIG. 3, a driving thin film transistor (TFT) “TD” is formed on a first substrate 32 and includes a driving active layer 62, a driving gate electrode 68, a driving source electrode 66, and driving drain electrode 63. An insulating layer 67 is formed on the driving TFT “TD” and a first electrode 36 is formed on the insulating layer 67 and is connected to the driving drain electrode 63. An organic electroluminescent (EL) layer 38 is formed on the first electrode 36, and a second electrode 40 is formed on the organic EL layer 38. The first electrode 36, the second electrode 40, and the organic EL layer 38 interposed between the first and second electrodes constitute an organic electroluminescent (EL) diode “DEL”. A storage capacitor “CST,” which includes a first capacitor electrode 35 and a second capacitor electrode, is electrically parallel with the driving TFT “TD.” More particularly, a portion of a power line 55 (of FIG. 2) that overlaps the first capacitor electrode 35 is used as the second capacitor electrode 55. The second capacitor electrode 55a is connected to the driving source electrode 56. The second electrode 40 is formed over the driving TFT “TD,” the storage capacitor “CST” and the organic EL layer 38 on the first substrate 32.
FIG. 4 is a schematic cross-sectional view showing a sidewall of a substrate according to the related art. As shown in FIG. 4, a plurality of pixel regions “P” are defined in a substrate 80. A plurality of first electrodes 82 are formed on the substrate 80. Each of the first electrodes 82 is respectively located in one of the pixel regions “P.” In addition, a sidewall 84 having a positive slope is formed at a boundary of the pixel regions “P.” A plurality of electroluminescent layers 86 are formed on each of the first electrodes 82. In other words, each of the electroluminescent layers 86 is in each of the pixel regions “P.” In addition, a second electrode 88 is formed over the surface of the sidewall 84 and the organic electroluminescent layers 86. The sidewall 84 separates neighboring pixel regions “P.” The electroluminescent layers 86 can be formed by an evaporation process using a mask.
The sidewall 84 in FIG. 4 has a taper shape such that a width of the sidewall 84 gradually decreases from the second electrode 88 to the substrate 80. The sides of the sidewall 84 make an angle “θ1” greater than about 90° with respect to the second substrate 80, as shown in FIG. 4. The first electrodes 82 are bottom electrodes are formed in each of the pixel regions “P,” and the second electrode 88 is top electrode formed over the first electrodes 82 and electroluminescent layers 86 on the substrate 80. However, since a process using a mask takes time and requires mask alignment processes, a shadow mask process using the sidewalls has been suggested.
FIG. 5 is a schematic plane view showing a sidewall structure according to the related art. FIG. 6 is a schematic cross sectional view taken along a line “VI—VI” of FIG. 5 including electroluminescent layers and second electrodes. As shown in FIGS. 5 and 6, a plurality of pixel regions “P” are defined on a substrate 90. A first electrode 92 is formed on the substrate 90. Sidewalls 94 having a negative slope are formed on the first electrode 92 at boundaries of the pixel regions “P.” The sidewall 94 has a taper shape such that a width of a sidewall 94 gradually increases from the substrate 90. In addition, sides of the sidewall 94 make an angle “θ2” smaller than about 90° with respect to the substrate 90.
An electroluminescent material 95 and a second electrode material 97 are sequentially deposited on the first electrode 92 and are patterned into a plurality of electroluminescent layers 96 and a plurality of second electrodes 98, respectively. The sidewalls 94 having inverted taper shape automatically separate the electroluminescent layers 96 and the second electrodes 98 into each pixel region “P.” Therefore, the electroluminescent material 95 and the second electrode material 97 are positioned between the sidewalls 94. However, the separated electroluminescent material 95 and the second electrode material 97 in each of the pixel regions “P” are not connected to another electroluminescent material 95 and another second electrode material 97 in another pixel regions “P,” since the height and the tapered shape of the sidewall 94 prevented them from shorting to each other.
FIG. 7 is a schematic cross-sectional view showing an evaporation process by a shadow mask method. Generally, separate electrodes for each pixel can be formed by a thermal evaporation method or an e-beam evaporation method using a shadow mask process. FIG. 7 shows that the substrate 90 having the sidewall 94, as shown in FIG. 6, and a metal source 99, which is spaced apart from the substrate 90, facing the substrate. The metal source 99 has a small area in comparison with the substrate in general.
In a portion “A” of the substrate 90, which is an area of the substrate 90 that does not correspond to an area of the metal source, materials from the metal source 99 are deposited at a slanted deposition angle “α1.” Thus, the materials are deposited on a side of the sidewall 94. Accordingly, a metal layer can form on the sidewall 94 that may connect to a second electrode in a pixel region “P.” Further, as the size of the substrate 90 increases relative to the area of the metal source 99, the short problem becomes greater. To solve this short problem, a sidewall having a very large inverted taper has been suggested. However, since the sidewall material has low heat reliability and low mechanical hardness, it is difficult to solve the short problem with a sidewall having a big inverted taper shape. A sidewall should have a shape, such as a mushroom, to be reliably used as a separating means. However, a two-layer stack of sidewall material has to be used to form the mushroom shape, which is a complicated process and increases production cost.
An organic electroluminescent device using a polymeric material has been developed recently. An organic electroluminescent device using the polymeric material is called a polymer light emitting diode (PLED) or polymer electroluminescent device (PELD) to distinguish from an organic electroluminescent device using a monomeric material. The polymeric material has a higher heat stability and better mechanical hardness than the monomeric electroluminescent device. Problems, such as investment costs of evaporation apparatus for the monomeric material and limitation of display size, can be solved by the polymeric material. The PLED uses less power because PLED has a lower driving voltage than a driving voltage in the monomeric electroluminescent device. In addition, various methods can be used to generate the emission of different colors. Accordingly, a patterning method of the polymeric material in the PLED is desired.
FIG. 8 is a schematic cross-sectional view showing an organic electroluminescent device using a negative sidewall applied to PLED according to the related art. As shown in FIG. 8, a plurality of pixel regions “P” are defined in a substrate 90, and a first electrode 92 is formed on the substrate 90. Sidewalls 94 having a negative slope are formed on the first electrode 92 at boundaries of the pixel regions “P.” In addition, a plurality of polymeric electroluminescent layers 91a, 91b and 91c are formed on the first electrode 92, and polymeric electroluminescent layers 91a, 91b and 91c are divided into each of the pixel regions “P” by the sidewalls 94.
The sidewalls 94 have an inverted taper shape, such as an inverted trapezoid, and thus outsides of one of the sidewalls 94 make an angle “θ2” that is smaller than about 90° with respect to the substrate 90. The electroluminescent layer 96 (of FIG. 5) is deposited by thermal evaporation method, but the polymeric electroluminescent layers 91a, 91b and 91c are coated by spin coating a solution type polymeric material, generally. Therefore, it is difficult for the polymeric electroluminescent layers 91a, 91b and 91c to have a uniform depth over an entire surface substrate in all of the pixel regions “P” due to the polymeric material property.
As shown in FIG. 8, first depths “d1” of the polymeric electroluminescent layers 91a, 91b and 91c near one of the sidewalls 94 are higher than second depths “d2” of the polymeric electroluminescent layers 91a, 91b and 91c in the center of each of the pixel regions “P.” Since the polymeric electroluminescent layers 91a, 91b and 91c are made of a solution type material and are located in each of the pixel regions “P.” The sidewalls 94 having a negative slope surrounds each of the polymeric electroluminescent layers 91a, 91b and 91c at the boundary of the pixel regions “P.” At this moment, when the polymeric electroluminescent material are coated over the substrate 90 having the sidewalls 94, the polymeric electroluminescent layer 91a, 91b and 91c can not have a uniform depth due to a surface tension of the polymeric electroluminescent material with the sidewalls 94. Therefore, a top surface of the polymeric electroluminescent layers 91a, 91b and 91c may contact a top portion of the sidewall 94. This may cause non-division problem of an electrode in the substrate process. Further, the polymeric electroluminescent layers 91a, 91b and 91c may not be formed in a center of each pixel region “P.”
The sidewalls 94 have an inverted trapezoid shape to divide neighboring pixel regions “P” automatically. However, a plurality of second electrodes 93a, 93b and 93c may not be divided due to the boundary surface rise of the polymeric electroluminescent layers 91a, 91b and 91c. Therefore, neighboring second electrodes 93a, 93b and 93c are connected to each other, and signals can not be independently applied to each of the pixel regions “P.” Accordingly, if the polymeric electroluminescent material is applied to an organic electroluminescent device including a negative slope sidewall, it is difficult for each of the polymeric electroluminescent layers and the second electrodes to be divided into each of the pixel regions, respectively.
When an array layer of TFTs and organic EL diodes are all formed on the same substrate, a production yield of an organic ELD is determined by a multiplication of TFT's yield and organic EL layer's yield. Since an organic EL layer's yield is relatively low, the production yield of an ELD is limited by the organic EL layer's yield. For example, even when a TFT is well fabricated, an organic ELD can be judged as being bad due to defects of an organic EL layer using a thin film of about 1000 Å thickness. This limitation causes a loss of materials and a rise in production cost.
Organic ELDs are classified into a bottom emission type and a top emission type according to a transparency of the first and second electrodes and of the organic EL diode. The bottom emission type ELDs are advantageous for their high image stability and variable fabrication processing due to an encapsulation. However, the bottom emission type organic ELDs are not adequate for implementation in devices that require high resolution due to the limitations of the increased aperture ratio in that type of organic ELDs. On the other hand, since top emission type organic ELDs emit light in a direction upward of the substrate, the light can be emitted without influencing the array layer that is positioned under the organic EL layer. Accordingly, the overall design of the array layer including TFTs may be simplified. In addition, the aperture ratio can be increased, thereby increasing the operational life span of the organic ELD. However, since a cathode is commonly formed over the organic EL layer in the top emission type organic ELDs, materials selection and light transmittance are limited such that light transmission efficiency is lowered. If a thin film type passivation layer is formed to prevent a reduction of the light transmittance, the thin film type passivation layer may fail to prevent infiltration of exterior air into the device.