The present invention relates to multiplication by a constant of the charge quantity in a distinct charge aggregation, i.e. a charge packet, occurring in charge-coupled devices, and more particularly, to a charge-coupled device technology floating gate regenerator capable of providing a charge packet having a charge quantity equal to that in another charge packet multiplied by a constant.
For signal processing purposes, the capability to perform arithmetical operations on distinct charge aggregations, i.e. charge packets, in charge-coupled device signal processors is required. Addition of the charge quantities in two such charge packets can be quite simple, just the routing of the two charge packets to being below a common charge-coupled device gate where the charges are combined to form a charge quantity equal to the sum of the charges in the two original charge packets. Subtraction can be performed rather straightforwardly using a floating gate regenerator.
However, attempts to provide multiplication and division capabilities in charge-coupled device technology signal processing systems have led to more cumbersome procedures and structures. Nevertheless, multiplication by a constant, at least, is strongly desired to permit a satisfactory implementation of many signal processing algorithms.