This invention is related to integrated circuit devices and, in particular, to semiconductor-based memory, such as static random access memory (SRAM) and dynamic random access memory (DRAM).
A DRAM is a type of random-access memory that stores a bit of data in a capacitor coupled to a transistor within the integrated circuit. Lithographic scaling and process enhancement may quadruple the number of bits of storage in a DRAM approximately every three years. However, the individual memory cells have become so small that maintaining the capacitance of each cell while reducing charge leakage may significantly limit further reductions in size.
What is needed is a memory unit cell that is smaller than the conventional one-capacitor one-transistor cell, that is readily scalable below 20 nm design rules, that is compatible with standard bulk silicon processing, and that consumes less power, both statically and dynamically.