1. Field of Invention
The present invention relates to a type of memory cell. More particularly, the present invention relates to a random access memory cell.
2. Description of Related Art
In general, random access memory (RAM) can be categorized into two major types: dynamic random access memory (DRAM) and static random access memory (SRAM). Because the process of reading data from a DRAM cell is a destructive operation, meaning that data originally held inside the memory cell is destroyed after the reading, constant refreshing of memory cell data is required. In addition, since the DRAM cell uses a capacitor to store up the charges for representing data, the capacitor should be sufficiently large to prevent data loss. In reality, each memory cell should be made as small as possible in order to cram more devices within a chip. The reduction of each memory cell and hence the capacitor inside the cell means that only a very small voltage and current can be provided. However, the provision of a small voltage or current renders the probing of any voltage or current changes difficult. Ultimately, operating speed of the memory cell is reduced.
On the other hand, the process of reading data from a SRAM cell is non-destructive. There is no need to perform frequent data-refreshing operations. However, each SRAM cell consists of a minimum of four MOS transistors. Therefore, each SRAM cell occupies a volume much greater than a DRAM cell.
In brief, a conventional memory cell has at least the following drawbacks, including:
1. For DRAM, frequent refresh of memory DRAM cell data is required because the data inside the cell is destroyed after each reading operation.
2. Since a capacitor is used to store data charges in DRAM but only a small capacitor can be produced due to miniaturization, very small voltage or current can be provided.
3. A SRAM cell consists of at least four MOS transistors. Hence, each SRAM cell needs to occupy a much larger volume than a DRAM cell.