This application claims the priority benefit of Taiwan application serial no. 91104456, filed Mar. 11, 2002.
1. Field of Invention
The present invention relates to a structure of a non-volatile memory (NVM) device and an operating method of the NVM device. More particularly, the present invention relates to a structure of a nitride read-only memory (NROM) with a protective diode and an operating method of the NROM.
2. Description of Related Art
The non-volatile memory family includes the electrically erasable programmable read-only memory (E2PROM). An E2PROM can be programmed, read, and erased repeatedly and can retain data even if the power is switched off, and therefore is widely used in personal computers and in electronic apparatuses.
A conventional E2PROM uses a floating gate and a control gate both made from doped polysilicon. When the E2PROM is being programmed, the control gate and the source/drain of a selected memory cell are applied with appropriate biases. An electron flow from the source to the drain is thereby induced in the channel. The electron flow can produce hot electrons that will tunnel through the tunnel oxide layer and into the floating gate and will distribute evenly in the floating gate. An E2PROM is usually programmed by the above-mentioned xe2x80x9cChannel Hot-Electron Injection (CHEI)xe2x80x9d mechanism and is usually erased by the Fowler-Nordheim tunneling mechanism. The disadvantage of the conventional E2PROM is that a leakage easily occurs in the memory cell if there are defects in the tunnel oxide layer, and the reliability of the device is thus lowered.
To solve the leakage problem of the conventional E2PROM, a charge-trapping layer is recently developed to replace the polysilicon floating gate in the conventional E2PROM. The charge-trapping layer usually comprises a silicon nitride layer that is disposed between two silicon oxide layers to form an oxide/nitride/oxide (ONO) composite layer, while the memory with a nitride charge-trapping layer is known as a xe2x80x9cnitride read-only memory (NROM)xe2x80x9d. In a NROM, the nitride charge-trapping is able to trap electrons so that the injected hot electrons will not distribute evenly in the charge-trapping layer, but will be localized in a region of the charge-trapping layer near the drain with a Gaussian spatial distribution. Because the injected electrons are localized, the charge-trapping region is small and is less likely to locate on the defects of the tunnel oxide layer. A leakage therefore does not easily occur in the device.
In a manufacturing process of NROM, plasma techniques are frequently used as in the other semiconductor processes. However, when a transient charge unbalance occurs in the plasma, some charges will move along the metal portions on the wafer. Such an effect is called the antenna effect. Consequently, some charges are injected into the charge trapping layers of the non-volatile memory to unevenly raise the threshold voltages (VT) of the memory cells, i.e., to produce a programming effect. Therefore, the VT distribution of the non-volatile memory is much broadened, being usually from 0.3V to 0.9V.
In order to prevent the programming effect caused by the antenna effect, a diode is formed in the substrate to electrically connect with a word-line of a NROM in the prior art. When the charges accumulated on the word-line reach a certain amount to produce a voltage higher than the breakdown voltage of the diode, the charges are released by the diode in a breakdown manner. However, when the NROM is being programmed or read, the input voltage applied on a word-line of the NROM will be lowered by the diode since the voltage required for programming or reading the NROM may be higher than the breakdown voltage of the diode. The operating speed of the NROM device is therefore decreased.
Accordingly, this invention provides a NROM that has a protective diode having an adjustable breakdown voltage and an operating method of the NROM to prevent the charge trapping layer from being damaged or being programmed as well as to avoid the input voltage of the NROM from being lowered.
The NROM with a protective diode of this invention comprises a substrate, a NROM cell, an n+-doped region, an n+ guard ring and a polysilicon guard ring, wherein the substrate, the n+-doped region, the n+ guard ring and the polysilicon guard ring constitute a protective diode. The NROM cell is disposed on the substrate. The n+-doped region is located in the substrate and is electrically connected with a word-line of the NROM cell. The n+ guard ring is located in the substrate surrounding the n+-doped region. The polysilicon guard ring is disposed on the substrate between the n+-doped region and the n+ guard ring.
This invention also provides an operating method of the above-mentioned NROM of this invention. When the NROM is being programmed, the word-line of the NROM is applied with a first positive bias, the polysilicon guard ring is applied with a second positive bias, and the n+ guard ring is floated. When the NROM is being read, the word-line is applied with a third positive bias, the polysilicon guard ring is applied with a fourth positive bias, and the n+ guard ring is floated. When the NROM is being erased, a fifth positive bias is applied to an N-well under the NROM cell.
In this invention, a protective diode electrically connecting with a word-line of the NROM cell is used to conduct the charges on the word-line into the substrate in a back-end plasma process. The breakdown voltage of the protective diode is, for example, 3Vxcx9c5V so that the charges are easily conducted into the substrate. Therefore, the charge trapping layer of the NROM will not be damaged or be programmed in the plasma process.
Moreover, since the n+-doped region is surrounded by the n+ guard ring and a positive bias is applied to the polysilicon guard ring in the programming or reading method of a NROM of this invention, the junction profile of the diode is expanded and the junction corner is rounded. Consequently, when the NROM is being programmed or being read, the breakdown voltage of the protective diode is raised and the input voltage is thus not lowered by the diode.
In addition, to further decrease the leakage caused by the diode, more than one n+ guard rings can be formed in the substrate surrounding the n+-doped region to further round the junction comer of the protective diode and thereby raise the breakdown voltage of the protective diode.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.