1. Field of the Invention
The present invention relates to an improved frequency to frequency de-randomizer circuit and in particular to a low power frequency to frequency de-randomizer circuit.
2. Discussion of Prior Art
Several types of technique are well known and commonly used in existing devices for de-randomizing an input signal to provide a useable output signal. On example described in U.S. Pat. No. 3,646,330 (Rudnick Stanley J et al) is concerned with a continuous digital ratemeter including de-randomizer. However the circuit of U.S. Pat. No. 646,330 is unable to adapt the time constant for smoothing the current depending upon the frequency of the incoming pulses. Further examples of such techniques include integrating counts over a period (xe2x80x9cstore a display averagexe2x80x9d) and diode pump circuits or variants. Details of the later are contained in xe2x80x98Electronics for Nuclear Particle Analysisxe2x80x99xe2x80x94Herbst, p223 to 225 and Radiation Detection and Measurementxe2x80x2 (2nd Edition)xe2x80x94Knoll, p601 and 602. However, each of the known techniques has associated problems.
Modification of the display driver software code to achieve a fast responding, fast settling, accurate and steady display could have been used in the circuit according to the invention. However, the circuit according to the invention is designed for power efficiency and as such the processors operate at very low clock speeds to conserve power and the complexity of the software code has had to be minimised. Thus, if the display driver software code had been used, the processors would have to operate faster and the power consumption of the device would be higher.
The problem with xe2x80x98store and display averagexe2x80x99 arrangements is that they are unable to function in real-time. To achieve a fast responding, fast settling, accurate and steady display, requires the use of a microprocessor running at high clock speeds. This could be fast enough to appear to be working in real time but would have high power consumption due to the processor speed. The circuit according to the invention is designed for power efficiency and as such the microprocessors operate at low speeds to conserve power and the software code is minimised. Hence, the power consumption implications associated with a microprocessor operating at high speed is unacceptable.
Finally, diode pump circuits work well at high frequencies. However, at low frequencies the time-constant required within the circuitry to give an acceptable or steady reading, causes the circuit to have a slow response. This is unacceptable in a device which needs to perform well at both high and low frequencies.
It is an aim of the present invention to provide a frequency-to-frequency de-randomizer circuit with reduced power consumption which can perform well at both high and low frequencies.
Accordingly the present invention provides a frequency to frequency de-randomizer circuit comprising means for converting the frequency of an input signal into an output current, means for smoothing the output current and means for converting the smoothed output current into an output signal having a frequency suitable for digital processing characterised in that the means for smoothing the output current comprises a diode filter configured so as to have a time constant which changes in response to changes in the output current.
The frequency-to-frequency de-randomizer circuit according to the invention is based on the same concept as the diode pump described above. However the invention utilises a logarithmic filter circuit to address the above frequency problem which is fed from a standard diode transistor pump which performs the frequency to current conversion required by the circuit.
Input to the frequency-to-frequency de-randomizer circuit is in the form of a randomly varying pulsed signal. This input is then fed into a linear frequency to current converter such as a diode transistor pump. Alternatively a diode pump or a transistor pump could be used however a diode transistor pump produces both linearity in response and simplicity in the circuit. The varying current output is in turn fed into a diode filter to smooth the current and obtain a time averaged, real time smoothed output. The diode filter can comprise any number of stages dependent on the filtering required. A three stage filter comprises three resistors in parallel with three diodes which each have an associated filter capacitor (a fourth filter capacitor can also be added to increase filtering if required), however as little as one diode acting as the resistive element and an associated filter capacitor can be used. The more stages used, the more filtering is performed however adding more stages provides a diminishing level of filtering. The inventor has found that the optimum balance between level of filtering and number of components is reached with three stages of filtering. Diode theory shows that the effective slope resistance of a forward biased diode is inversely proportional to the current flowing through it, such that for example at 1 mA the resistance is 25 xcexa9 and at 10 mA it is 2.5 xcexa9 and so on. As such, the use of diodes in the resistive elements of this filter serves the purpose of providing a moving time constant with respect to count rate (or current) producing longer time constants at low count rates (and therefore low currents) and shorter time constants at higher count rates (and therefore high currents) as the current through the diodes increases, thus allowing the device to perform well at both high and low counting rates, keeping the response speeds high at high count rates and the fluctuations due to randomness at low count rates to a minimum. At very low count rates the resistors will dominate providing a minimum response time.
The output from the filter can then be converted into an output signal at a frequency suitable for measurement and display. Such conversion can be accomplished by any known means, however, advantageously it can be accomplished by an operational amplifier feeding into a voltage controlled oscillator which produces the output signal and a second means for converting the frequency of an input signal into an output current which converts the output signal into a balancing current, the balancing current then being used to balance the input into the operational amplifier.
The use of an operational amplifier/voltage controlled oscillator arrangement maintains the output of the filter at virtual earth (or other nominal voltage as required). This prevents a build up of charge at the output of the filter, an effect which would slow the response of the circuit.
The second frequency to current converter can be of any form as with the first frequency to current converter, however advantageously it can be in the form of a diode transistor pump. This diode transistor pump acts as a linear frequency to current converter.
This circuit provides a rapidly responding, real time, fluctuation free signal which is optimised for measurement and display from a very low power circuit.
The frequency-to-frequency de-randomizer circuit according to this invention can be used in any application requiring de-randomization of an input however the circuit according to the present invention has been optimised for use in a radiation monitor. In particular it has been optimised for use in a portable radiation monitor which requires to meet the BASEEFA criteria and which needs no on/off switch, the power efficiency of the circuits resulting in the batteries only requiring replacement annually during planned preventative maintenance and calibration activities, as required under the Ionising Radiation Regulations, 1985.
In a radiation monitor, this circuit performs the function of taking randomly occurring xcex1/xcex2 pulses from two discriminators and converting this to a relatively fluctuation free square wave output stream suitable for input into a micro-controller system to provide a display. Two identical circuits are employed in the monitor, one each for the xcex1 and xcex2 signals.