There is an information processing device including a plurality of CPU (Central Processing Unit) cores and memories. An OS (Operating System) of such an information processing device and software operating on the OS, when performing a migration of a job under the execution, relocates hardware resources (CPU core and memory) which are assigned to the job.
The software (below called as relocation program) relocates the CPU core by changing the CPU core which carries out the process of the job operating. In addition, the relocation program relocates the memory by changing the memory area where the data, of which the process of the job under the execution accesses, are stored.
On the other hand, a cache memory in the information processing device has data array including a plurality of data in unit which is called as cache line and tag array (also called as cache tag) having the information of corresponding cache line depending on an index level. The CPU core judges a cache miss-hit of the memory area for the access target with reference to the cache tag based on the index level.
In addition, among the cache memory, there is a cache memory to determine the cache line which stores the data of the memory area based on the address of the memory area for the access. According to such cache memory, the CPU core acquires the index level based on the address of the memory area for the access.
Patent documents 1-4 disclose the technique about the cache memory.
[Patent document 1] Japanese Laid-open Patent Publication No. 2009-87139
[Patent document 2] Japanese Laid-open Patent Publication No. 2000-66899
[Patent document 3] Japanese Laid-open Patent Publication No. H8-77068
[Patent document 4] Japanese Laid-open Patent Publication No. H10-207850