The background description provided herein is for the purpose of generally presenting the context of the disclosure. Unless otherwise indicated herein, the materials described in this section are not prior art to the claims in this application and are not admitted to be prior art by inclusion in this section.
Semiconductor devices are commonly found in modern electronic products to perform a wide range of functions such as high-speed calculations, transmitting and receiving electromagnetic signals, controlling electronic devices, transforming sunlight to electricity, or other functions. Semiconductor devices may generally be manufactured by forming multiple dies on a semiconductor wafer. Each die may be identical and contain circuits formed by electrically connecting various components. A wafer may be singulated to produce individual die that may be packaged to provide structural support and environmental isolation. Wafer sorting, wafer testing, or die testing, may be a testing process performed on wafers or dies to identify the non-functional or faulty wafers or dies.
Because the circuitry on a die or a wafer is small, visual detection of any defects on a wafer or a die may be virtually impossible. Hence, wafer sorting or die testing may be performed using specific testing equipment after the wafer or die has been manufactured. During a testing process, a probe may be positioned on contact pads, e.g., copper pillars, of the wafer or the die, to generate electrical contact. A probe geometry and profile may play an important role in contact between the probe and a contact pad of a wafer or a die. Conventional probe design may not provide stable electrical contact between the probe and a contact pad of a wafer or a die, leading to inaccurate testing results for the wafer or the die. The cost of testing equipments for wafer sorting or die testing may be very high due to miniaturization of probe geometry and increasing complexity of manufacturing process of probes for wafer sorting or die testing.