Integrated circuit (semiconductor) memory devices are widely used in many consumer, commercial and other applications. Semiconductor memory devices may be divided into volatile memory devices and non-volatile memory devices. The volatile memory devices, such as dynamic random access memory (DRAM) devices and static random access memory (SRAM) devices may have a relatively rapid input/output speed, but data stored therein generally disappears when power is removed. On the other hand, non-volatile memory devices such as a read only memory (ROM) may have a relatively slow input/output speed, but data stored therein may be kept relatively permanently.
Electrically erasable programmable read only memory (EEPROM) devices, such as flash memory devices, are being widely used. Flash memory devices may perform programming and erasing of data using a Fowler-Nordheim tunneling or a channel hot electron implantation. In addition, flash memory devices may be largely divided into a floating gate type including a floating gate for storing electric charges and an electric charge trapping type.
Various attempts to improve the integration degree of these devices have been carried out. For example, a non-volatile memory device including a single control gate and two floating gates is disclosed in U.S. Pat. No. 5,834,808 to Tsukiji. A 2 bit non-volatile memory device, which includes two diffusion regions formed on a substrate, a channel formed between the two diffusion regions and an oxide-nitride-oxide (ONO) layer, is illustratively disclosed in U.S. Pat. No. 6,649,972 to Eitan. According to U.S. Pat. No. 6,649,972, the oxide-nitride-oxide layer includes a first oxide layer, a nitride layer and a second oxide layer. The nitride layer has a thickness of no more than about 100 Å and also includes two regions for storing electric charges.
In spite of the various attempts described above, it is desirable to further improve the integration density. Particularly, the above-mentioned patents can increase a storage density of data by providing a structure of the floating gate or a method of using a nitride layer for data storage. However, since the floating gate and the nitride layer are formed in a plane direction, a reduction in a dimension of the non-volatile memory device may be difficult.