1. Field of the Invention
The present invention relates generally to semiconductor fabrication methods and, more particularly, to semiconductor mask-programmable read-only memory devices and methods for fabrication of such devices.
2. Description of Related Art
As the information revolution continues to unfold, the numbers and capabilities of computers and of other digital systems continue to increase. One of the common, and essential, elements of a typical digital system is memory. Consequently, the need for ever-faster, denser, and less expensive memories remains unabated. Computer memories are generally of two kinds: random access memories, or RAMs; and read-only memories, or ROMs. Data can be written into a random access memory and read from it with equal ease. Data can also be read from a read-only memory in the course of normal operation. But, as the name “read-only memory” implies, data is either not written into a read-only memory after the memory's initial programming, or write operations into such memory use special protocols and are performed relatively infrequently.
Read-only memory devices are often based on field-effect transistor (FET) cells. In a single-transistor read-only memory cell, the gate of the transistor serves as the control electrode used for accessing the memory cell, and the transistor combines the storage and access functions of the cell. The digital value programmed into a particular cell is a function of the relative threshold voltage of the cell and the convention used for programming the device containing the cell. The threshold voltage of the cell depends on the doping of the channel of the cell's transistor. For example, if doping increases the threshold voltage of a transistor, the transistor of the doped cell will be in the OFF state. If in the programming convention used the OFF state represents the binary value of “1,” then the doped cells of a read-only memory device will be coded with binary “1” values, while the cells that have not been doped will be coded with binary “0” values.
Doping is the introduction of different particles (e.g., dopant atoms) into a semiconductor structure. The introduction of the dopant atoms is generally performed in a controlled manner, so as to dope a predefined area of the semiconductor structure to a required depth with a required concentration. Doping for the purpose of adjusting transistor threshold voltage is often performed by ion implantation, a process of implanting dopant ions in the channel region of the transistor. (The ion implantation doping technique is, of course, also used for other purposes in semiconductor fabrication; for example, it is commonly used for doping source and drain regions of FETs.) Doping by ion implantation is performed by accelerating the required ions to a predefined energy level, and bombarding a target semiconductor material with the ions, to embed the ions in the material. The concentration of the implanted ions can be controlled by the ion accelerator beam current, and by ion implantation time. The time required for ion implantation during the coding of a read-only memory chip device lengthens the total time required for the chip device fabrication, and thus increases the unit cost of the read-only memory chips. Moreover, the ion implantation coding step adds complexity and concomitant cost to the fabrication process. Furthermore, several diffusion-related problems may arise from the doping of the channel areas during ion implantation coding of the memory device.
Diffusion is the natural process through which particles tend to migrate from regions of a relatively high particle concentration to regions with relatively low particle concentrations. Diffusion during ion implantation coding can make it relatively difficult to control the doped (implanted) area with a high degree of precision. The presence of the dopant particles beyond the intended area may cause undesirable changes in the cell's performance, such as degradation of punch-through voltages between adjacent buried source/drain regions, and may also change the coding of adjacent cells. To avoid these potentially harmful consequences, the cells are made sufficiently large to avoid diffusion of large concentrations of implanted ions into the areas where their presence may affect performance or reliability of the fabricated semiconductor memory device. Large size is, of course, the enemy of circuit miniaturization and unit cost. Furthermore, the switching speed of circuits generally decreases with the increase in the size of individual transistors. A need thus exists in the prior art for faster, simpler, and less expensive processes for use in fabrication of read-only memory devices. A further need exists for a read-only memory device coding process that would both allow scaling down of the individual memory cell size and enable attendant increases in memory device densities and operating frequencies.