The present invention relates to semiconductor structures, and more particularly to field effect transistor structures having an asymmetric SiGe channel, and methods of manufacturing the same.
A SiGe channel, i.e., a channel composed of a silicon-germanium alloy, provides a smaller band gap than a channel composed of silicon in a metal-oxide-semiconductor field effect transistor (MOSFET). The SiGe channel can be advantageously employed, for example, in combination with a high-k gate dielectric and a metal gate electrode thereupon to provide an optimized band gap in field effect transistors. However, the reduction in the band gap induces gate-induced drain leakage (GIDL) current in field effect transistors employing a SiGe channel. Such increase in the GIDL current has been observed, for example, in Dongyun Kim et al., “Band to Band Tunneling Study in High Mobility Materials: III-V, Si, Ge and strained SiGe,” Device Research Conference, pp. 57-58 (2007), Krishna C. Saraswat et al., “High Mobility Materials and Novel Device Structures for High Performance Nanoscale MOSFETs,” IDEM (2007), and X. Chen et al., “A cost Effective 32 nm High-k/Metal Gate CMOS Technology for Low Power Applications with Single-Metal/Gate-First Processes, IEEE VLSI pp. 88-89.
Such increase in the GIDL current due to a SiGe channel has a negative impact on the performance of a field effect transistor by increasing off-current of the field effect transistor, thereby rendering the field effect transistor unsuitable for low power applications. In order to fully utilize the advantage of a SiGe channel in providing a well controlled threshold voltage, the GIDL current of the transistor needs to be controlled to a minimal level.