1. Field of the Invention
This invention relates to an apparatus and a method for testing the functional operation of a microprocessor system.
2. Description of the Prior Art
The functional operation of a microprocessor system involves the manipulation of data in the form of electrical signals which are transferred within the system along a data bus to locations specified by addresses in the form of electrical signals conveyed along an address bus. The operations are under the control of instructions in the form of other electrical signals passing along the data bus with the status of the processor being determined by electrical signals conveyed along a control bus. Microprocessor systems include a plurality of components, such as microprocessor units, read-only and random access storage memories (ROM's and RAM's), serial and parallel input/output data transfer registers, digital control logic circuits, clock pulse generators, bus drivers and so forth. The testing of the functional operation of such components in their system environment requires stepping the system through a sequence of test instructions and verifying that the operations specified by the instructions are performed correctly.
Conventional testing of the functional operation of a microprocessor system is done with off-line external testing equipment. A predesignated sequence of test instructions is communicated to the system from outside, along with designated test data. The response of the system to the test instructions is then monitored by reading the data resulting from the functional operation of the system acting upon the test input data out of the system. Comparison is then made of the output data from the test with reference data representative of the data output of error-free functional operation of the system.
Testing of a microprocessor system in the manner described using external test equipment has certain disadvantages. The data communication between the on-board components of the microprocessor system is very fast. However, the transfer of information across the interface between the external test equipment and the microprocessor system is relatively slow. Thus, using external test equipment, tests must be repeated or the operations looped to give sufficient time for the status of the system to be monitored. Furthermore, most external test equipment receives test result data from the microprocessor system being tested in serial form which complicates the testing of the correctness of parallel transmission of information within the system. Also, since information within the system can be travelling close to the speed of light, there are some tests that would be difficult to perform in real time using external equipment because the input/output processing of information to the test equipment is too slow.
The use of external test equipment to verify the functional operation of a microprocessor system requires that the external test equipment be connected to the system. Thus, tests of microprocessor systems installed in inconvenient or remote locations may not be possible or cannot be performed frequently. Also, the operation of such external equipment may require the degree of sophistication of a skilled technician who may not always be available. External test equipment generally tends to be of a general purpose type and includes capabilities and components that are superfluous for a specific test conducted on a specific microprocessor system.
Software testing routines have been developed for implementation in microprocessor systems whereby the microprocessor can check the accuracy of its information transmission paths. Such tests include parity checks, and the like, which have somewhat limited usefulness. They do not verify the correctness of the functional operations of the total system in the manipulation of actual data to determine whether the correct results are achieved.
A built-in technique for testing the functioning of a logic circuit has been proposed in Koenemann, et al., "Built-In Logic Block Observation Techniques", in Proc. 1979 IEEE Test Conference, Cherry Hill, N.J., IEEE, New York, N.Y., Session 2, pages 37-41. The proposed concept utilizes a circuit called a "built-in logic block observer" or "BILBO". The BILBO has a series of flip-flops arranged in stepping order and also to receive direct inputs, so that the output state of the BILBO depends on both its present inputs and its state history. The output of one BILBO is applied as a data input to a digital logic circuit and the output of the digital logic circuit is applied as the input to a second BILBO. As a sequence of numbers is generated by the first BILBO, the output of the first BILBO is fed to the logic circuit. With each output of the logic circuit an input is fed into the second BILBO which represents the response of the logic circuit to each input received from the first BILBO. At the conclusion of the testing procedure, a single state is available for output from the second BILBO which is derived from the last input and all preceeding inputs to the second BILBO. In this manner, a single output signature is produced that is characteristic of the successive responses of the logic circuit to the entire test sequence. This single output signature can then be compared at the conclusion of the test sequence to the predicted test output signature for an error-free digital logic circuit. The coincidence or disparity of the test output with the predicted output determines whether the circuitry is operating correctly.
The test circuitry proposed by Koenemann, et al. is intended to reside on the same integrated circuit chip with a microprocessor or other primary component such as the microprocessor. The control signal for generating the pseudo-random test data must, however, be received from outside the chip and the second BILBO output must be read out and processed outside the chip in order to evaluate the test results. Further, since the construction of the BILBO proposed by Koenemann does not provide address or control information to the tested circuit, it is unsuitable for diagnosing the functional operation of a total microprocessor system. The testing of the functional operation of a total microprocessor system requires instructions, the generation of addresses as well as test data, and the monitoring of signals as they move throughout the system. The Koenemann device does not provide this.