The present invention relates to multi-layered printed circuit boards and, in particular, to a method for constructing a resistive laminate usable therewith for producing boards with embedded resistive layers and usable for high frequency signals.
With the ever increasing complexities and demands for faster and faster cycle times for digital computers and digital signal processing circuitry, along with a desire to minimize extraneous discrete circuit components, have evolved more complex multi-layer printed circuit board assemblies. Many of such boards include conductive layers containing patterned components which perform like specific discrete components.
One particular laminate usable in such boards is a resistive laminate which can be photo-lithographically processed to define predetermined resistance paths that can be accessed through various well known techniques by other circuitry contained on the board. Applicant is aware of various prior art resistive laminates which have been constructed using conventional liquid bath, plating techniques. However, when formed to relatively large dimensions, for example, for use in so called "mother boards" or the like these laminates are prone to exhibit resistive paths of non-uniform thicknesses, and therefore non-uniform resistance values, across the surface of the laminate. Imprecise signal characteristics, especially at relatively high frequencies, oftentimes result.
Through the use of hydraulic laminating techniques, the laminates and resultant boards have also exhibited characteristics indicative of stressed conductive and resistive layers which can affect yields of the corresponding multi-layered boards which use the laminates. Appreciating further the complexities and costs to scrap or re-work such boards, strong economic incentives exist to develop component laminates of high integrity and tight tolerances, both mechanically and electrically.
Relative, in particular, to nickel-chrome resistive laminates, Applicant is aware of a variety of discrete and thin film laminates which have been developed over the years. Ones of such devices are particularly disclosed in U.S. Pat. Nos. 3,400,066; 3,622,410; 3,629,776; 3,691,007; 3,857,683; 3,930,975; 3,981,691; and 4,021,277. Applicant is also aware of an article from Electronic Engineer Magazine, by H. J. Pawluk, entitled Thin Film Resistors Plated on Circuit Boards (Jul. 1967).
Of the foregoing references, ones of the patents disclose conventionally plated, thin film layers of nichrome which are deposited in various structures. Others disclose sequential fabrication processes for creating monolithic circuits wherein thin films of nichrome are sputter applied directly onto patterned regions to create specific patterned circuits; as distinguished from processes wherein preformed laminates are stacked and assembled within a multi-layer board.
Advantages gained from the latter lamination techniques include increased packing densities through the embedding of many of the resistive components, thereby freeing surface area on the board for active components and providing shorter interconnect distances. Distributed inductance and noise are reduced and therefore the frequency and operating speed of a board is increased. Reliability is also improved through minimized numbers of discrete interconnections. Patterning techniques further enable increased numbers of resistors with less effort and cost to provide same as part of a prepared assembly.