1. Field of the Invention
This invention relates to a self-resetting CMOS (SRCMOS) circuitry and more particularly to SRCMOS circuitry for converting a pulsed input signal to a static output signal for circuitry requiring longer duration signals.
2. Description of Related Art
Microprocessors use static CMOS logic which must properly interface with self-resetting CMOS logic circuits which require short duration pulsed inputs and memory circuits which require inputs of longer duration or "static" inputs. It is a common practice to convert the static input signals to pulsed signals compatible with self-resetting CMOS circuits and converting the resulting output signals of the self-resetting CMOS signals back to static signals. A design problem is to minimize the time required for the conversion process in order to avoid increasing the overall time for the performance of logic operations. It is a common practice to multiplex the pulsed output signals of a plurality of self-resetting CMOS circuits and to provide a sequence of static output signals from the multiplex circuit. FIG. 1 shows a typical prior art 4-to-1 multiplexer. The circuit 100 has four select leads, A through D and four sets of true and complement data inputs, Ta through Td and Ca through Cd. The select leads A through D are activated in sequence to provide an output on the output terminal 101 representative of a corresponding true or complement input. The input is latched in the multiplex circuit to provide a static output signal in response to a short duration pulsed input, to provide an appropriate output signal for use with static CMOS logic circuitry used in the design of a microprocessor or the like. Significant time delay is introduced by prior art multiplex circuitry, negatively affecting the overall performance of data processing systems.