Modern computerized devices require significant amounts of memory. Such memory is often provided in the form of Static Random Access Memory (SRAM). The electronics industry is seeking ways to make SRAMs which are smaller and consume less power.
It is well known that the anode current-voltage (I-V) characteristics of p-n-p-n devices may display negative resistance. Negative resistance occurs in the range of voltages over which increasing the voltage across the device between the anode and cathode causes the current through the device to diminish. The negative resistance region is bounded by a high-conduction "on" region and a low-conduction "off" region.
The occurrence of a negative resistance region in the anode current-voltage characteristics of p-n-p-n devices has been previously used to implement relaxation oscillators in integrated circuit pacemakers. It is further known that p-n-p-n devices may be operated in the "off" state as small-signal amplifiers.
Sakui et al. A new static memory cell based on the reverse base current effect of bipolar transistors, IEEE Transactions on Electronic Devices vol. 36 No. 2, p. 1215, 1989 propose a static memory cell, consisting of one bipolar transistor and one FET. In the Sakui et al. device the bipolar transistor is operated under weak avalanche conditions. The Sakui et al. memory cell consumes relatively large amounts of power in its "on" state. Furthermore, the avalanche effect requires supply voltages of at least 2.5 V.