Digital devices as, for example, circuits within a computer, send information to one another by varying a parameter of a signal as, for example, an electrical voltage, during successive intervals set by a clock in the sending device. In a binary system, the sending device sets the signal parameter for each interval either to a first value to denote a 1 or a second value to denote a 0 during each interval. The receiving device takes successive samples of the signal at times corresponding to the intervals in the signal and determines, for each such sample, whether the parameter denotes a “0” or a “1.” To do this, the receiving device must have a clock signal synchronized with the intervals in the incoming data signal. If the clock used by the receiving device is out of synchronization with the intervals of the data signal, data can be lost or misinterpreted. To communicate data at high speed, it is desirable to make the data intervals as short as possible, which, in turn, requires greater precision in the synchronization between the clock signal used by the receiving device and the data intervals of the incoming signal. For example, modern interfacing and communication protocols such as PCI Express, SONET, InfiniBand and XAUI use data intervals on the order of nanoseconds or less and require that the receiving device use a clock synchronized to the data intervals to within fractions of a nanosecond.