1. Field of the Invention
The present invention relates to a motherboard, and in particular to a slot apparatus for DRAM memory module.
2. Description of the Related Art
Digital information is often stored in dynamic random access memory (DRAM). One type of DRAM transfers information synchronously with a clock signal. This type of DRAM is referred to as synchronous DRAM (SDRAM). SDRAM provides a burst read access (when programmed for a burst length of 4). In the case of 64-bit data bus interface system, such a transfer involves 32 bytes of data per SDRAM access. Current PC systems, for example PC100 or PC133 systems typically use such an arrangement. SDRAM transfers information once during every cycle of the clock signal, for example, at the rising edge of the clock signal. Double data rate DRAM (DDR DRAM), however, transfers data at both edges of the clock signal (i.e., twice during every cycle of the clock signal), thus doubling the peak throughput of the memory device as compared with SDRAM. DDR DRAM thus provides a burst of eight data transfers on every burst read access (when programmed for a burst length of 4). As a result, the operating speed of the memory can be increased.
Therefore, DDR DRAM offers better performance and lower cost than SDRAM. Furthermore, DDR DRAM offers broader bandwidth than SDRAM, and the higher operating speed of DDR DRAM is highly applicable to multimedia and entertainment products. With DDR DRAM, the motherboard layout is redesigned and a dual channel type memory slot set is used for insertion of the DDR RAM. The dual channel type memory slot set means that two DDR DRAMs are inserted in a into each memory slot set of a dual in-line memory module (DIMM). The bandwidth of DRAM can be increased to 4.27 GB/s due to the dual channel framework effectively increasing the operational performance. When the primary frequencies of two DDR DIMMs are equal, and the difference between the phases of the two DDR DIMMs is ¼ clock cycle, the combined data can be read in one clock cycle.
FIG. 1 is a conventional motherboard 100 with DDR DIMM. The motherboard 100 includes a CPU slot 101, a control chipset 102, differential clock generator 103, memory slots 104, 105, 106 and 107, terminator circuit 108, and terminal resistor 109. The DDR DIMM requires a terminator circuit 108 disposed at an end of the arranged memory slots 104, 105, 106 and 107 to provide terminator voltage VTT for absorbing the reflecting electric wave. Meanwhile, the receiving data bus of DDR DIMM has full-up resistors.
FIG. 2 shows the arrangement of a conventional motherboard, wherein the same symbols are given in FIG. 2 for further description. The serial resistance 110 connects the control chipset 102 and the memory slots 104, 105, 106 and 107 as a full-up resistor. The terminator circuit 108 is disposed beside the memory slots 104, 105, 106 and 107. The terminal resistor 109, memory slots 104, 105, 106 and 107, and the serial resistance 110 are connected to one terminator voltage VTT. 
The memory slots 104 and 106 are a first memory slot set and the memory slots 105 and 107 are a second memory slot set. The memory slots 104, 105, 106 and 107 of the conventional motherboard are alternately arranged, hence the distance is increased between two memory slots in one set. Meanwhile, the distance between the terminator circuit 108 and the memory slot sets is increased, and the distance of the reflecting electric wave is also increased. Another defect of the terminator circuit 108 disposed at an end of the memory slots 104, 105, 106 and 107 is that the distance between the control chipset 102 and the memory slot which has terminal voltage is increased such that the reflection of the electric wave is enhanced, and the noise is also increased. Finally, the stability of the DDR DRAM suffers.