As a standard for transmitting data between a processor and peripheral equipment in a mobile apparatus, there is known the MIPI D-PHY (hereinafter, referred to simply as “D-PHY”) specified by the MIPI (Mobile Industry Processor Interface) Alliance. In a currently prevailing mobile apparatus conforming to D-PHY, typically, four lanes of data signal lines and one lane of clock signal lines are used to differentially transmit a signal D-PHY stipulates that two signal lines per lane are used to transmit a differential signal, and thus there are used 10 signal lines in total D-PHY achieves data transmission of a maximum of 2.5 G bits/second.
In recent years, with an improvement in performance of peripheral equipment such as a camera, a display, and so on that are mounted in a mobile apparatus, there has been a demand for higher speed data transmission in the mobile apparatus. In response thereto, in 2011, the MIPI alliance developed M-PHY as a new physical layer standard. M-PHY can achieve data transmission of a maximum of 5.8 G bits/second per lane.
In order to conform to M-PHY, however, it is necessary that a physical layer designed to meet D-PHY be significantly modified. This necessity for significant modification from D-PHY has been an impediment to prevalence of M-PHY. With this as a background, in order to achieve higher speed data transmission while utilizing a D-PHY physical layer, C-PHY was developed in 2014. C-PHY stipulates that, while a physical layer configuration similar to that of a D-PHY physical layer is used, three signal lines per lane are used to differentially transmit a signal. As described above, without significantly modifying a D-PHY physical layer, C-PHY achieves higher speed data transmission by increasing the number of signal lines per lane from two to three.
The contents of the specifications of D-PHY, M-PHY, and C-PHY are available to the public on the web page of the MIPI Alliance (http://mipi.org/specifications/physical-layer).
In order to eliminate common mode noise from a differential transmission circuit from which a differential signal is transmitted, a common mode choke coil is used. The common mode choke coil includes a plurality of coil conductors, and these coils each function as an inductor that generates a large impedance with respect to common mode noise, and thus common mode noise can be eliminated from the differential transmission circuit. A conventional common mode choke coil is disclosed in, for example, Japanese Patent Application Publication No. 2003-77727, Japanese Patent Application Publication No. 2007-150209, Japanese Patent Application Publication No. 2013-153184, Japanese Patent Application Publication No. 2014-179570, Japanese Patent Application Publication No. 2015-012167, and so on.
In a common mode choke coil, it is desirable, while eliminating common mode noise, to prevent a signal waveform from being degraded. To this end, coils provided in the common mode choke coil are configured so that characteristic impedances thereof are matched to characteristic impedances of signal lines of a differential transmission line.
A common mode choke coil, in order to fulfill its function as an inductor, includes a plurality of coil conductors each formed in a spiral shape. For example, a common mode choke coil for a differential transmission circuit conforming to MIPI C-PHY includes three spiral-shaped coil conductors, which correspond to the number of signal lines per lane of said circuit. In such a common mode choke coil including three coil conductors, it is desirable that characteristic impedances (differential impedances) between said three coil conductors be all matched to characteristic impedances of said differential transmission circuit.
In order for characteristic impedances between the coil conductors to be matched to characteristic impedances of the differential transmission circuit, it is desirable that there be no deviation in the characteristic impedances between the coil conductors. To this end, it is desirable that there be also no deviation in stray capacities generated between the coil conductors. For this reason, normally, in order to eliminate a deviation in stray capacities between the coil conductors in each turn, the three coil conductors are wound so as to maintain an equal spacing from each other.
When, however, the three coil conductors are wound a plurality of turns while maintaining an equal spacing from each other, due to a stray capacity generated between the coil conductors respectively in turns adjacent to each other, there occurs a deviation in stray capacities between the coil conductors. For example, in a case of a common mode choke coil including three coil conductors that are first to third coil conductors, even when the coil conductors are disposed so that, in one turn, a stray capacity between the first coil conductor and the second coil conductor, a stray capacity between the second coil conductor and the third coil conductor, and a stray capacity between the third coil conductor and the first coil conductor are equal to each other, due to a stray capacity generated between them and the coil conductors in a turn adjacent to the one turn, there occurs a deviation in the stray capacities between the coil conductors. That is, since the coil conductors are wound at an equal spacing from each other, an outermost one of the coil conductors in one turn and an innermost one of the coil conductors in a turn outwardly adjacent to the one turn are different types of coil conductors, so that there occurs a relatively large stray capacity between these coil conductors. As described above, when coil conductors are wound at an equal spacing from each other, while it is possible to prevent occurrence of a deviation in stray capacities between the coil conductors in the same turn, due to a stray capacity generated between them and the coil conductors in a turn adjacent to the same turn, there occurs a deviation in the stray capacities between the coil conductors. Further, due to an influence of this stray capacity generated across the turns adjacent to each other, it becomes impossible for all characteristic impedances between the coil conductors to be matched to characteristic impedances of the differential transmission circuit.