Generators of clocking signals for the timing of digital functions in a data processing system are usually delay lines having the various timing pulses derived by taps along its length. Such delay lines are costly, relatively large in volume and relatively inefficient in operation. The advent of inexpensive medium scale integrated (MSI) packages has enabled the circuit designer to implement many prior art hybrid or discrete circuits using the advantages of the newest MSI packages. See the W. W. Davis patent application Ser. No. 388,869, filed Aug. 16, 1973, now U.S. Pat. No. 3,846,705. The present invention is directed toward such a novel use of a commercially available MSI package.