The semiconductor industry has recently experienced technological advances that have permitted dramatic increases in circuit density and complexity, and equally dramatic decreases in power consumption and package sizes. Present semiconductor technology now permits single-chip microprocessors with many millions of transistors, operating at speeds of hundreds of millions of instructions per second to be packaged in relatively small, air-cooled semiconductor device packages. A by-product of such high-density and high functionality in semiconductor devices has been the demand for increased numbers of external electrical connections to be present on the exterior of the die and on the exterior of the semiconductor packages which receive the die, for connecting the packaged device to external systems, such as a printed circuit board.
As the manufacturing processes for semiconductor devices and integrated circuits increase in difficulty, methods for testing and debugging these devices become increasingly important. Not only is it important to ensure that individual chips are functional, it is also important to ensure that batches of chips perform consistently. In addition, the ability to detect a defective manufacturing process early is helpful for reducing the number of defective devices manufactured.
Traditionally, integrated circuit dies have been tested using methods including accessing circuitry or devices within the die. In order to access portions of circuitry in the integrated circuit die it is sometimes necessary to remove substrate from the die and expose a region for analysis. For example, in flip-chip type dies, transistors and other circuitry are located in a very thin epitaxially-grown silicon layer in a circuit side of the die. The circuit side of the die is arranged face-down on a package substrate. This orientation provides many operational advantages. However, due to the face-down orientation of the circuit side of the die, the transistors and other circuitry near the circuit side are not readily accessible for testing, modification, or other purposes. Therefore, access to the transistors and circuitry near the circuit side is from the back side of the chip.
Analyzing flip-chips and other integrated circuit type dies often requires milling the die substrate and accessing certain circuit elements. Such milling may potentially damage elements in the die if not properly controlled. In particular, it is important to have the ability to determine the progression of the removal process and any process endpoints with sufficient accuracy to avoid milling off the node or region to which access is being sought, which could often jeopardize further device analysis. The difficulty, cost, and destructive aspects of methods for testing integrated circuits are impediments to the growth and improvement of semiconductor technologies.