This invention relates to a power shutdown sequence for a multiple microprocessor system sharing a single power supply and more particularly to an orderly power shutdown sequence for multiple microprocessor, single power supply control systems in automotive applications during the ignition cycle.
Currently, in powering down a control system such as an automotive vehicle control system having multiple microprocessors that share a single power supply, only one microprocessor, commonly referred to as the "master," is in control of the power supply. The remaining microprocessors, commonly referred to as the "slaves," have no control over the power supply. Consequently, when multiple microprocessors are powered by a single supply, the slave microprocessors have no means by which to powerdown while at the same time retaining all of the information learned during the operating cycle.