The present invention relates to a field effect transistor and more particularly to a field effect transistor having low on-state resistance and small output capacitance and also to an application device thereof.
FIGS. 1 to 3 are drawings showing a structure of multi-resurf MOSFET which is a conventional horizontal field effect transistor (hereinafter, field effect transistor is abbreviated to MOSFET) having low on-state resistance or MOSFET called a super junction structure, and FIG. 1 is a perspective view thereof, wherein FIG. 2 is a plan view thereof, and FIG. 3a, FIG. 3b, and FIG. 3c are cross sectional views of the drawing shown in FIG. 2 which is cut respectively along the line segments A-A′, B-B′, and C-C′.
As shown in the drawings, on a surface of a p-type semiconductor substrate 201, a p-type base layer 204 is selectively formed, on the surface of which a high concentration n-type source layer 205 and a high concentration p-type contact layer 206 are selectively formed. Further, on the surface of the p-type semiconductor substrate 201, an n-type drain layer 209 is formed apart from the p-type base layer 204. On the n-type source layer 205 and the p-type contact layer 206, a source electrode 210 is formed and on the n-type drain layer 209, a drain electrode 211 is formed. On the bottom of the p-type semiconductor substrate 201, a substrate electrode 212 is mounted, which is biased by a same potential as of a source electrode 210.
An n-type semiconductor layer 202 and a p-type semiconductor layer 203 in a stripe shape are alternately arranged between the p-type base layer 204 and the n-type drain layer 209, as a drift layer. Namely, the n-type semiconductor layer 202 and the p-type semiconductor layer 203 are alternately arranged along a direction from the p-type base layer 204 toward the n-type drain layer 209, to which the stripe shape layers extend nearly perpendicular. Further, a gate electrode 208 is formed via a gate oxide film 207 on a surface of the p-type base layer 204 between the n-type source layer 205 or the n-type semiconductor layer 202 and the p-type semiconductor layer 203.
The type of MOSFET as described above is characterized in that the n-type semiconductor layer 202 and the p-type semiconductor layer 203 are formed in a stripe shape and alternately arranged (the multi-resurf structure, super junction structure) as a drift layer. Therefore, it is also characterized in that the drift layer is apt to be depleted, and a dose concentration of the drift layer can be increased. Thus the on-state resistance can be reduced.
However, in the configuration of the aforementioned conventional low on-state resistance MOSFET, electrons flow in the n-type semiconductor layer 202 of the drift layer but do not flow in the p-type semiconductor layer 203. Thus there is a defect that even if the reduced ratio of the effective sectional area of the n-type semiconductor layer 202 is compensated by increasing the concentration of the n-type semiconductor layer 202 in the super junction structure and by lowering the resistance, a sufficient effect cannot be expected for realizing the low on-state resistance of the whole element.
It has been also known that the MOSFET having the multi-resurf structure (super junction structure) is applied to a vertical MOSFET instead of the lateral MOSFET described above. However, even by use of such a structure, the same defect is caused as described above with respect to the horizontal type element, in a design of an element having a withstand voltage of several hundreds volt or less. Thus, enough advantages of applying the conventional multi-resurf structure or super junction structure cannot be expected for an improvement in the characteristic of the MOSFET of a comparatively low withstand voltage.
Therefore, the present invention was made with the foregoing in view and it is an object of the present invention to provide a field effect transistor capable of realizing a low on-state resistance and low output capacitance and to provide its application device, even in a design of an element having a comparatively low withstand voltage (several tens volt to 100 V or so).