There are two main technologies for electronic displays: one is liquid crystal display technology (LCD) based on liquid crystals and color filters and the other is light emitting display technology (LED) based on organic light emitting elements or inorganic light emitting elements. For the liquid crystal display technology, a simplified diagram of a pixel circuit is shown in FIG. 1a, where each pixel element can be taken as a capacitor Cs1,1, Cs1,2, Cs2,1, Cs2,2. In LED technology, similar to that in LCD technology, each pixel can be taken as an equivalent impedance or an equivalent resistance Rpixel as shown in FIG. 1b. During the control of light intensity, the magnitude of voltage VD1, VD2 applied to data lines D1, D2 in FIG. 1a, is often kept constant. The thin film transistor (TFT1,1, TFT1,2, TFT2,1, TFT2,2) is turned ON and OFF at a relatively high frequency by applying control signals VG1 and VG2 to the gate lines G1 and G2. It should be noted that in many backplane switching circuits, more than one thin film transistors are adopted for each pixel. To simplify the description of this invention, only one single thin film transistor is shown in each pixel in FIG. 1a and FIG. 1c. The light intensity of the pixel is determined by the duty cycle of the switching signals VG1 and VG2. During such pixel switching, the voltage applied to the data line VD as shown in FIG. 1b is divided into two main portions: one is across the pixel cell Vpixel and the other is across the thin film transistor VTFT, which is equal to VD-Vpixel. When the TFT in FIG. 1b or FIG. 1c is turned on, a current Ipixel will be allowed to flow first through the thin film transistor TFT with an ON state resistance of RTFT then the pixel cell in the pixel and the total electric power is Ptot=Ipixel2[RTFT+Rpixel]. Here Ipixel2/Rpixel=Ppixel is the power portion to drive the LCD pixel or LED pixel and is directly related to light emission whereas the power portion Ipixel2RTFT=PTFT represents the unwanted power dissipation in the switching thin film transistor TFT which can not contribute directly to light emission. Therefore, the percentage of the unwanted power dissipation in the TFT is: PTFT/Ptot=Ipixel2RTFT/Ipixel2[RTFT+Rpixel]=RTFT/[RTFT+Rpixel]. As the value RTFT is proportional to resistivity, ρ, of the active channel layer of the TFT in ON state, channel length, L (given by the distance between the drain edge and source edge), and is inversely proportional to the cross-sectional area of the active channel layer, A so that RTFT=ρL/A. In order to increase the switching energy efficiency or to reduce the unwanted power dissipation in the TFT of a pixel cell, the resistivity ρ of the active channel layer for TFTs in the backplane switching circuits must be kept as small as possible.
It is noted that the equivalent circuit in FIG. 1b may also be used to represent a pixel for an OLED display given in FIG. 1c. In FIG. 1c, there is only one single thin film transistor for the given pixel without a storage capacitor and such a circuit is called a one transistor pixel circuit or 1T pixel circuit. However, in a 1T pixel circuit the TFT will be turned off as the voltage VG1, VG2 applied to gate line G1, G2 (see FIG. 1a) is removed and the OLED pixel will also be turned off. In order to main the flow of a current Ipixel after the gate voltage VG has been removed, a pixel circuit as shown in FIG. 1d may be adopted. When a given Gate Line is scanned, the voltage VGTFT1 applied to gate G1 of an address transistor TFT1 will turn on thin film transistor TFT1 when VGTFT1≧VT1 the threshold voltage of TFT1, so that a Data Line voltage VD will be connected through TFT1 to gate G2 of a second thin film transistor TFT2 (a drive thin film transistor) and a first current IT1 will be allowed to flow to raise the gate voltage VGTFT2 of the second thin film transistor TFT2. When VGTFT2 is equal or greater than threshold voltage of TFT2 VT2, TFT2 is turned on and a second current IT2 will be allowed to flow from a Power Line with Vdd voltage through the OLED pixel to turn the OLED pixel element on and emit light. When the voltage VGTFT1 is removed, charges established on capacitor CSS will remain so that VGTFT2 will remain to be substantially greater than VT2 so the TFT2 will remain in an ON state and the light emission from the OLED pixel element will continue. The second current is determined by: IT2=Vdd [RT2+RLED], here, RT2 is the unwanted resistance of TFT2 in an ON state and RLED is the parasitic resistance of the OLED pixel in ON state. The total power dissipation due to the flow of the second current IT2 in the OLED pixel is Ptot2=IT22[RT2+RLED] whereas the one due to the flow of IT1 is Ptot1˜IT12[RT1+RCO] where RT1 is the unwanted resistance of TFT1 in ON state and RCO is the overall impedance or resistance of CSS and input gate terminal of TFT2. It is noted that in the above two expressions, PTFT2=IT22RT2 and PTFT1=IT12RT1 are the unwanted power dissipation. In order to increase the switching power efficiency, both PTFT2 and PTFT1 should be kept as small as possible. In FIG. 1d, there are two thin film transistors and one capacitor for a given pixel and such pixel driving circuit is called a 2T1C circuit.
It is noted that there are possible characteristic non-uniformities between pixels caused by variation in threshold voltage (VT) and hysteresis of TFTs. These non-uniformities can cause quality degradation in OLEDs displays. To overcome these drawbacks, more complicated driving circuits are often required such as: 4T1C, 6T2C etc. Therefore, for the driving of electronic display pixels such as OLED pixels, address thin film transistors are required for gate scanning where as drive thin film transistors are adopted for ON-OFF switching to supply currents to selected pixels. In FIG. 1d, a simplified driving circuit is shown to have two thin film transistors TFT1, TFT2 and a storage capacitor CSS used to drive an organic light emitting diode pixel OLED. A gate line voltage VGTFT1 is supply to the Gate Line for sequential scanning and to turn on TFT1 when VGTFT1 is applied so that Data Line voltage Vdata will be connected through thin film transistor TFT1 to gate G2 of second thin film transistor TFT2. When said first thin film transistor TFT1 is turned on, the first current IT1 is flowing through the equivalent resistance RT1 of the first thin film transistor in ON state to charge the storage capacitor CSS and gate capacitor CT2 for the second thin film transistor TFT2. It is noted that the storage capacitor CSS is between gate G2 and D2 drain of said second thin film transistor TFT2 so that the gate voltage VGTFT2 will be maintained when scanning of gate lines proceeds to subsequent rows. The VGTFT2 is greater than the threshold voltage VTTFT2 of thin film transistor TFT2, TFT2 is turned on and a second current IT2 is allowed to flow from a power line with a power line voltage Vdd through said second thin film transistor and OLED pixel, causing light emission from the OLED pixel. It is noted that in practical second thin film transistor, there is an unwanted series ON state resistance RT2 connected to an equivalent resistance RLED of the OLED pixel in ON state. In an ON state for the OLED pixel in FIG. 1d, the power dissipation components in said first thin film transistor TFT1: IT12RT1 and second thin film transistor TFT2: IT22RT2 must be kept as small as possible.
For a field effect transistor, the total resistance Rtotal between drain and source in the ON state is equal to RTFT (see FIG. 1(c)), and is given by the sum of a channel layer resistance Rch and a contact resistance of drain contact and source contacts RC:RTFT=Rtotal=Rch+RC=L/[WCi(VGS−VT)μch]+RC 
Here Ci and μch are the capacitance per unit area of gate insulator layer and the channel mobility of charge carriers, respectively. The contact resistance RC is determined by the barrier height between drain metal and the channel layer semiconductor, barrier height between source metal and the channel layer semiconductor, and the area of the drain contact and source contacts. The contact resistance RC is often made smaller than the channel layer resistance Rch. Therefore, the total resistance of a TFT RTFT may be considered to be mainly due to the channel layer resistance Rch. Therefore, for a TFT having fixed geometry with given values of channel length L, channel width W and VGS−VT, it is preferable to select the channel layer so that the channel mobility μch is as large as possible.
To compare different thin film transistor technologies, a normalized channel resistance or a specific channel resistance given by Rch W may be used with W as the channel width. For a given TFT technology, the normalized channel resistance or specific channel resistance Rch W should be made as small as possible in order to reduce the unwanted heat dissipation in the TFTs during switching of pixels. It should be pointed out that with a fixed channel width the specific channel resistance is primarily determined by the channel layer semiconductors. For instance for TFTs having organic semiconductors as channel layers, values of the specific channel resistance Rch W is in a range of 3×105 to 2×106 ohm-cm. For the most popular a-Si TFTs adopted currently in many electronic displays, the specific channel resistance values are ranging from 105 to 2×106 ohm-cm. For polycrystalline silicon thin film transistors (p-Si TFTs), the specific channel resistance is about 400 ohm-cm due to larger carrier mobilities in the order of 100 cm2/V-sec. For an metal oxide thin film transistor or metal oxide TFT with an InGaZnO channel, the specific channel resistance value is about 500 ohm-cm.