1. Field of the Invention
The present invention relates to a semiconductor device having a circuit including a thin film transistor (hereinafter, referred to as a TFT) and to a manufacturing method thereof. Specifically, the present invention relates to a semiconductor device having a circuit including a field effect transistor (hereinafter, referred to as an FET). For example, the present invention relates to an electronic device incorporating, as part thereof, a large-scale integrated circuit (LSI), an electro-optic device typified by a liquid crystal display panel, a light-emitting display device having an organic light-emitting element, a sensor device such as a line sensor, or a memory device such as an SRAM or a DRAM, for example.
2. Description of the Related Art
Note that a semiconductor device in this specification means general devices and apparatuses that can function with the use of semiconductor characteristics; for example, an electro-optical device, a semiconductor circuit, and an electronic device are all included in a semiconductor device.
In recent years, in the case of forming a multilayer wiring in a semiconductor element, irregularities are more significant in upper layers, and the wirings are difficult to be processed. Correspondingly, a wiring material is generally embedded in a wiring opening such as a wiring trench or a hole formed in an insulating film by a wiring formation technology called a damascene process.
A damascene process is a method in which a trench is first formed in an insulating film, the entire surface is covered with a metal material (filling the trench), and the entire surface is polished by a CMP (chemical mechanical polishing) method or the like to form a metal wiring. The method further including a step of providing a hole below a metal wiring for contact with a metal wiring or a semiconductor region in a lower wiring is called a dual damascene process. The dual damascene process includes a step in which, after forming a hole for a connection with a lower layer wiring and a wiring trench are formed, a wiring material is deposited, and the wiring material except the wiring portion is removed by a CMP method.
For a metal wiring using a dual damascene process, copper (Cu) by an electroplating method is commonly used. In the electroplating method, a plating solution or the electric field to be applied is required to be controlled intricately so that copper (Cu) is completely embedded in the connection hole. In addition, it is difficult to process copper (Cu) by an etching process using an etchant or an etching gas; therefore, a special CMP method is required for polishing for copper (Cu) processing.
An electroplating method and a CMP method have had a problem of increase in manufacturing costs for forming a wiring.
In addition, not only in a manufacturing process of a semiconductor device using a semiconductor substrate but also in a manufacturing process of an active matrix substrate using a thin film transistor (TFT), it is difficult to process a wiring in forming a multilayer wiring. In recent years, a thin film transistor is widely applied to an electronic device such as an IC or an electro-optic device, and is particularly developed as switching elements for image display devices at a rapid rate. Note that a liquid crystal display device is generally well known as an image display device.
An active matrix liquid crystal display device has often been used because a high precision image can be obtained compared with a passive liquid crystal display device. In the active matrix liquid crystal display device, pixel electrodes arranged in matrix are driven to display an image pattern on the screen. Specifically, a voltage is applied to a selected pixel electrode and an opposite electrode corresponding to the pixel electrode, and thus, a liquid crystal layer between the pixel electrode and the opposite electrode is modulated optically. The optical modulation can be recognized as an image pattern by an observer.
Application range of such an active matrix liquid crystal display device is expanding, and demands for the improvement of productivity and cost reduction are increasing, as a display size gets larger.
Conventionally, in the case of forming a multilayer wiring, in order to connect the upper wiring and the lower wiring, a contact hole is formed in an interlayer insulating film between these wirings by using a photolithography method. In the case of forming a contact hole by using a photolithography method, various steps such as forming a resist mask (coating, exposing, and developing a resist), etching selectively, or removing a resist mask are necessary. In other words, it is necessary to form a contact hole to have a multilayer structure so that the plurality of wirings cross to each other, which has been one of causes of increase in the number of manufacturing processes.
In addition, in the case of using a photolithography method, a photomask is also necessary for each exposure pattern; therefore, a cost for manufacturing the photomask is increased, which has been one of causes of increase in a manufacturing cost.
Moreover, in the case of using a photolithography method, large quantities of resist materials and developing solutions are used in order to improve uniformity; thus, a great deal of surplus materials is consumed.
As for a method for etching an interlayer insulating film selectively, dry etching and wet etching are known. Generally, dry etching by gas plasma has an advantage in forming a pattern processed into a tapered shape or the like. However, a dry-etching apparatus is disadvantageous in that an expensive large-scaled apparatus is needed and a manufacturing cost is increased. In addition, there is a fear that a semiconductor element is damaged due to gas plasma. Therefore, it is desirable that dry etching is performed as less as possible.
In addition, wet etching which is inexpensive and superior in terms of mass production compared with dry etching uses a great deal of etchant once; therefore, waste fluid treatment is difficult, which has been one of causes of increase in a manufacturing cost. In addition, since wet etching is isotropic etching, it is difficult to form a contact hole having comparatively small diameter, which is disadvantageous in high integration of a circuit.
As for a method without using a photoresist in processing a thin film by patterning, a laser-processing technique, particularly a laser-processing method using YAG laser light (wavelength of 1.06 μm) is known. In the laser-processing method with the use of YAG laser light, as well as an object to be processed is irradiated with a spot-like beam, the beam is scanned into a processing direction to form an opening into a chain shape of continuous dots.
In addition, the present applicant uses laser light having a wavelength of 400 μm or less to irradiate a light-transmitting conductive film with a linear beam. A method for processing a thin film for forming an opening is described in Reference 1: U.S. Pat. No. 4,861,964 Specification, Reference 2: U.S. Pat. No. 5,708,252 Specification, and Reference 3: U.S. Pat. No. 6,149,988 Specification.