This invention relates generally to a switching regulator circuit, and is directed more particularly to a switching regulator circuit which is provided with a plurality of switching circuits.
First, a conventional switching regulator circuit used in a pulse drive circuit for a motor will be described. In a prior art VTR (video tape recorder), switching regulators are respectively used for a drum DC motor and a capstan DC motor to apply servo thereto. That is, pulse width modulator circuits are respectively provided for the drum motor and capstan motor. Carrier pulse signals each having the same frequency with random phase to each other are respectively applied to the pulse width modulator circuits. The carrier pulse signals carry out a modulation such that their duty cycles are varied in response to the rotation speeds and/or phases of the respective DC motors. The outputs from the pulse width modulator circuits are used to on-and-off control the respective switching circuits. The outputs from the switching circuits are supplied through low pass filters to the drum motor and capstan motor as drive currents, respectively. In this case, the switching circuits are respectively supplied with DC currents from a common DC power source.
It is assumed that the pulse currents flowing through the two switching circuits are Ia, Ib; their duty cycles are Da, Db, respectively; and that the peak values of the pulse currents Ia, Ib are equal. As described above, since the carrier pulse signals fed to the two pulse width modulator circuits are possible to be the same in phase, if the duties Da and Db of the pulse currents Ia and Ib are both 50%, both the pulse currents Ia and Ib have entirely the same waveform as shown in FIGS. 1A and 1B. Accordingly, a current Ia+Ib flowing out from the common IC power source becomes a pulse current which has a peak value twice that of each of the pulse currents Ia and Ib shown in FIG. 1C.
Next, in the case where the duty cycle Da of the pulse current Ia is 50% while the duty cycle Db of the pulse current Ib is 70% as shown in FIGS. 2A and 2B, the current Ia+Ib flowing out from the common DC power source acquires a peak value twice that of each of the pulse currents Ia and Ib as shown in FIG. 2C.
While in the case where the duty cycle Da of the pulse current Ia is 30% and duty cycle Db of the pulse current Ib is 70% as shown in FIGS. 3A and 3B, the current Ia+Ib flowing out from the common DC power source becomes a pulse current having a peak value twice that of each of the pulse currents Ia and Ib as shown in FIG. 3C.
As will be apparent from the above description, when the carrier pulse signals applied to the two pulse width modulator circuits are the same in phase, the absolute value of the differential coefficient at the rising-up or falling-down edge of the pulse current flowing out from the common, DC power source becomes large and hence an undesired noise radiation becomes large. Further, since the peak value of the pulse current flowing out from the common DC power source is twice that of each of the pulse currents Ia and Ib, the utilization efficiency of the common DC power source becmes low.