The present invention relates to a semiconductor design technology, and more particularly, to a semiconductor device which performs a variety of circuit operations by using a power supply voltage applied thereto from outside.
Generally, with an increasing high integration of semiconductor devices such as double data rate synchronous dynamic random access memory (DDR SDRAM), they adopt a design rule below a sub-micron level in design of internal circuits. In order for these hyperfine-structured circuits to operate at high operation frequency, it is required that the semiconductor memory devices basically use a power supply voltage with a very low level. The semiconductor device receives such power supply voltage from the outside and performs various circuit operations by using it.
To be more specific, the semiconductor device receives a power supply voltage from the outside and processes it internally to generate an internal power supply voltage. Examples of the internal power supply voltage include a core voltage and a peripheral (peri) voltage which are obtained by down-converting the power supply voltage from the outside, and a pumping voltage and a substrate bias voltage which are derived by pumping the power supply voltage, and so on.
FIG. 1 is a block diagram for schematically explaining a partial circuit of a conventional semiconductor device.
Referring to FIG. 1, the conventional semiconductor device includes an internal circuit 110 and an internal power supply voltage generator 130.
The internal circuit 110 receives a power supply voltage VDD provided from the outside, a ground voltage VSS, a power supply voltage data output VDDQ, a ground voltage for data output VSSQ, a command signal CMD, an address signal ADD, and data DAT via input terminals such as pad, ball, pin or the like, and performs read and write operations. More specifically, the internal circuit 110 generates a control signal CTR for controlling the internal power supply voltage generator 130, by using an internal power supply voltage V_INT which is generated by the internal power supply voltage generator 130 and applied thereto.
The internal power supply voltage generator 130 generates the internal power supply voltage V_INT in response to the power supply voltage VDD from the outside, the ground voltage VSS, and the control signal CTR. Here, the internal power supply voltage V_INT should always have a stable voltage level kept, which is essentially required under the situation that the voltage level used for the semiconductor device is gradually lowered in recent years.
Meanwhile, in the conventional semiconductor device, the internal circuit 110 and the internal power supply voltage generator 130 receive the power supply voltage VDD and the ground voltage VSS via the same input terminals. In this structure, the internal power supply voltage V_INT may have noise reflected therein depending on operations of the internal circuit 110, which will be discussed below with reference to FIG. 2.
FIG. 2 shows waveforms for explaining variations of each power supply voltage and each ground voltage that are caused by circuit operations of the conventional semiconductor device, in which the power supply voltage VDD, the internal power supply voltage V_INT and the ground voltage VSS are depicted. For convenience of explanation, it is illustrated that the internal power supply voltage V_INT is generated by down-converting the power supply voltage VDD.
Referring to FIGS. 1 and 2, the power supply voltage VDD, the internal power supply voltage V_INT and the ground voltage VSS all have the stable state without noise before an active command ACT is not applied to the semiconductor device.
However, when the active command ACT is applied, the internal circuit 110 performs a circuit operation, in which the power supply voltage VDD abruptly fluctuates. This is because the internal circuit 110 uses a current of the power supply voltage VDD. Since the current used is discharged into the ground voltage VSS, the ground voltage VSS abruptly fluctuates. That is, noises occur in the power supply voltage VDD and the ground voltage VSS.
The power supply voltage VDD and the ground voltage VSS with noises are applied to the internal power supply voltage generator 130. Thus, the internal power supply voltage V_INT generated by the internal power supply generator 130 fluctuates due to noises in the power supply voltage VDD and the ground voltage VSS. That is, noises also occur in the internal power supply voltage V_INT. As mentioned above, the reason why noises occur in the internal power supply voltage V_INT is that the internal circuit 110 and the internal power supply voltage generator 130 receive the power supply voltage VDD and the ground voltage VSS via the same input terminals. In other words, the circuit operation of the internal circuit 110 affects the internal power supply voltage generator 130 through the common input terminals, which in turn makes noises reflected in the internal power supply voltage V_INT.
As described above, the conventional semiconductor device has the structure that, during the circuit operation of the internal circuit 110, reflects noises in the internal power supply voltage V_INT. The internal power supply voltage V_INT with noises cannot guarantee the stable operation of the semiconductor device, which causes a malfunctioning therein.