1. Field of the Invention
The present invention relates to a method for generating a set of instruction compaction schemes.
The present invention further relates to a method for compacting a program according to the generated set of instruction compaction schemes.
The present invention further relates to an apparatus that is suitably programmed for carrying out these methods.
The present invention further relates to a record carrier that comprises a program for causing an apparatus to carry out one or more of these methods.
The present invention still further relates to a programmable processor that is capable of executing a program that is compacted as indicated above.
2. Related Art
US2002042909 describes a compiling method for generating a sequence of program instructions for use in a processing architecture with architecture resources executing instructions from a corresponding instruction set.
The known compiling method inputs a source file that comprises a plurality of source code instruction statements including at least a first kind of instruction statements and a second kind of instruction statements. The method selects at least a first instruction set and a second instruction set. The second instruction set is a compact instruction set designed to support only a subset of the architecture resources supported by the first instruction set. By using the at least two instruction sets of different sizes, the compiler is able to reduce the processed average code length, since fewer bits are needed in the compact code to encode operations and registers.
In the known method the compiler detects whether the type of source code is a time-critical code or an administrative code. The code classified as administrative is represented by the first, compact instruction set and the time-critical code is represented by the second instruction set. By using the at least two instruction sets of different sizes, the compiler is able to reduce the processed average code length, since fewer bits are needed in the compact code to encode operations and registers.
It is a disadvantage of the known compiler that an assignment of a first and a second instruction set is only possibly if time-critical code and administrative code can be discerned.
It is a purpose of the present invention to provide a method capable of generating one or more instruction sets also in more general circumstances.