To reduce the resistance of metal lines, Ultra-Thick Metal (UTM) lines are formed in integrated circuits. With the reduced resistance, the performance of integrated circuit devices, such as inductors, may be improved to satisfy the requirements of certain performance demanding circuits such as mixed-signal circuits, analog circuits, and radio frequency (RF) circuits.
The UTM lines may be covered with a passivation layer. However, due to the significant thickness of the UTM lines, and further due to the mismatch in coefficients of thermal expansion (CTEs) of the UTM lines and the passivation layer, the passivation layer suffers from cracking when experiencing thermal cycles. The cracks may also propagate from the passivation layer to the underlying dielectric layers, and hence the yield of the respective integrated circuit formation processes is adversely affected. Conventionally, to prevent the cracking in a passivation layer, the thickness of the passivation layer was increased to greater than that of the UTM lines. This approach, however, results in increased manufacturing cost and reduced throughput.