1. Field of the Invention
The present invention relates to an alternating current to direct current (AC-DC) converter that receives an AC power supply and that outputs a DC voltage, and particularly to a power factor correction (PFC) converter provided to improve a power factor.
2. Description of the Related Art
In Japan, Europe, and other countries, harmonic current control that is classified in accordance with an application or an input power is performed. In order to respond to such control, a circuit called a PFC converter is added to a power supply of home appliances that are subjected to harmonic current control, whereby measures have been taken to suppress harmonic currents.
In a typical switching power supply device using a commercial AC power supply as an input power supply, the commercial AC power supply is rectified and smoothed so as to be converted to a DC voltage, and switching by a DC-DC converter is performed on the DC voltage. Therefore, an input current is discontinuous and is significantly distorted as compared to a sinusoidal wave. This causes a harmonic current.
To suppress the harmonic current, a PFC converter is provided in a stage after a full-wave rectifier circuit and before a smoothing circuit configured using a smoothing capacitor.
This PFC converter, which is defined by a chopper circuit, operates so that an envelope of an input current waveform and that of an input voltage waveform have the same phase, i.e., have similar sinusoidal waveforms. Accordingly, a harmonic current can be suppressed to a desired level or less.
However, in a typical PFC converter that performs a chopper operation at a given switching frequency, electromagnetic interference (EMI) noise with a high peak value occurs in the switching frequency and higher-order frequencies thereof. Japanese Unexamined Patent Application Publication No. 2004-282958 discloses a PFC converter which improves these conditions. In the PFC converter, a switching frequency is changed within a range in which an original purpose is not impaired, whereby EMI noise is dispersed on a frequency axis to decrease the peak value of the EMI noise. Also, the switching frequency of the PFC converter in the vicinity of a peak value of an input voltage waveform is increased, whereby the size of an inductor L1 can be reduced.
An example of the PFC converter disclosed in Japanese Unexamined Patent Application Publication No. 2004-282958 will be described with reference to FIG. 1.
In the power factor correction converter illustrated in FIG. 1, a series circuit including a step-up reactor L1, a switching element Q1 defined by a MOSFET, and a current detecting resistor R is connected to both output terminals of a diode bridge B1 that rectifies an AC power supply voltage of an AC power supply Vac1. A series circuit including a diode D1 and a smoothing capacitor C1 is connected to both ends of the switching element Q1, and a load RL is connected to both ends of the smoothing capacitor C1. The switching element Q1 is turned on/off under pulse width modulation (PWM) control by a control circuit 10. The current detecting resistor R detects an input current flowing through the diode bridge B1.
The control circuit 10 includes an error amplifier 111, a multiplier 112, an error amplifier 113, a voltage controlled oscillator (VCO) 115, and a PWM comparator 116.
The error amplifier 111 calculates an error between a voltage of the smoothing capacitor C1 and a reference voltage E1. The multiplier 112 multiplies an error voltage signal by a voltage rectified by the diode bridge B1. The error amplifier 113 generates an error between a multiplication result generated by the multiplier 112 and a current signal flowing through the diode bridge B1 and outputs the error to the PWM comparator 116.
The VCO 115 generates a triangular-wave signal of a frequency according to a voltage value of a rectified AC power supply voltage.
In the PWM comparator 116, a triangular-wave signal from the VCO 115 is input to a negative terminal, whereas a signal from the error amplifier 113 is input to a positive terminal. That is, the PWM comparator 116 applies a duty pulse according to a current flowing through the diode bridge B1 and an output voltage to the switching element Q1. This duty pulse is a pulse-width control signal that continuously compensates for fluctuations of an AC power supply voltage and a DC load voltage in constant cycles. With this configuration, control is performed so that the waveform of an AC power supply current matches the waveform of an AC power supply voltage, whereby the power factor is improved.
However, in the configuration disclosed in Japanese Unexamined Patent Application Publication No. 2004-282958, an instantaneous value of an input voltage is detected and used as a voltage to be applied to the VCO, whereby the switching frequency is modulated in accordance with the instantaneous value of the input voltage. Therefore, the switching frequency of the PFC converter fluctuates in accordance with fluctuations of an effective value of the input voltage.
For this reason, for electronic apparatuses that are used in a plurality of different countries in which different input voltages are used, the switching frequency significantly varies depending on the area in which the electronic apparatuses are used. For example, the effective value is 100 V in Japan, whereas the effective value is 220 V to 240 V in Europe. In order to provide an electronic apparatus that can be used anywhere in the world, the electronic apparatus needs to be adaptable to a wide range of input voltages, e.g., effective values from about 85 V to about 264 V.
If the switching frequency is allowed to be changed simply in accordance with an input voltage, the switching frequency significantly changes within a voltage range necessary for worldwide use (within a range from about 85 V to about 264 V). When the switching frequency significantly changes in this manner, it is necessary to use an inductor having an inductance that prevents saturation of the inductor even when the switching frequency is low. This causes an increase in the size of the inductor. On the other hand, when the switching frequency is high, a large switching loss occurs.
In order to suppress such an increase in the switching frequency, Japanese Unexamined Patent Application Publication No. 2004-282958 discloses a method for limiting the upper limit of the switching frequency. However, in this case, the following problem arises. That is, as illustrated in FIG. 2, when a circuit is designed by optimizing the switching frequency when the effective value of the input voltage is about 100 V, the circuit operates at the upper limit of the switching frequency in most of the region of an input voltage waveform in an area in which the effective value of the input voltage is about 240 V. Such a situation significantly deteriorates the ability to appropriately change the switching frequency and disperse EMI noise that occurs with a peak.