In integrated circuit design, there are various types of logic available. For example, ECL (emitter-coupled logic) is a type of integrated circuit logic which traditionally uses bipolar transistors. CMOS is another type of integrated circuit logic, however CMOS uses complementary MOSFET transistors. ECL circuits have the advantage of high speed, but they consume a large amount of power. CMOS logic circuits have the advantages of low power dissipation, high input resistance, low output resistance, and low noise generation. An ECL voltage swing is generally about one diode voltage drop from a logic high to a logic low, while CMOS logic levels may swing full rail. To achieve compatibility between two different logic families, a level conversion circuit converts, or translates, a logic signal from one logic level to another logic level. For example, a CMOS logic level may have to be converted to an ECL (emitter-coupled logic) level to allow one integrated circuit to communicate with another. A level conversion circuit is used to do the conversion. A level conversion circuit should not cause excessive delay or consume a large amount of power. Additional buffering and drive capability may be provided using an output driver circuit.
An ECL output driver generally consists of a differential pair of bipolar transistors having current electrodes coupled to a power supply via resistors and supplied by a common current source. The ECL output driver provides reduced voltage swing, allowing a reduction in average switching current. Also, ECL generally provides the advantages of good noise immunity because the signals are differential. In addition, ECL provides reduced switching current, and is relatively fast.
A problem with using an ECL output driver with a significant load capacitance is that as the load capacitance increases, the required bias current also increases. For a given rise time, the required bias current may be prohibitive for low power applications such as battery powered communications devices including pagers, two-way radios, etc. Therefore, it would be advantageous to provide an output buffer which provides the advantages of ECL with reduced bias current.