In telecommunications there is a growing need for an inexpensive switch of the properties mentioned and that is able to withstand high voltages of either polarity in the OFF state. It would be particularly advantageous if the switching could be easily controlled either by the photovoltaic voltage of a photosensitive element or by an electrical logic signal.
Important in achieving a switch of this kind would be a solid-state relay having a low resistance in the ON state to currents flowing in either direction, a high resistance in the OFF state in either direction even to high voltages, the capability of being switched between these states with a relatively low control voltage, and the ability to withstand surges of high voltage and current with no damage.
A device that meets some of these characteristics has been described in a U.S. Pat. No. 4,199,774 which was issued on Apr. 22, 1980, to J. D. Plummer. This device involves the merger, in a semiconductive body essentially on a single top surface, of a pair of MOS lateral transistors, of a form known as DMOS, and an NPNPN triac. This device is further described in a pair of papers in the IEEE Transactions on Electron Devices, Vol. ED27, No. 2, February 1980, pp. 380-394, entitled "Insulated-Gate Planar Thyristors."
A DMOS transistors is so called because it was originally made by a double-diffusion process. A distinctive characteristic of such a transistor is that the source region is included within a closely surrounding layer, which will be termed the shielding layer, of the opposite type, a portion of which lies adjacent the surface and underlies the gate electrode, whereby it can be inverted to serve as the channel of the transistor. The source and shielding layer in turn are enclosed in a bulk portion which is of the conductivity type of the source and serves as the drain.
In the Plummer device, the five layers of the NPNPN triac are formed in turn by the source and shielding layer of the first transistor, the common drain of the two transistors, and the shielding layer and source of the second transistor. The basic structure includes three terminals, a connection common to the gates of the two transistors, a connection common to the source and shielding layer of the first transistor and a connection common to the source and shielding layer of the second transistor. The two last-mentioned connections serve to define the main conduction path whose resistance is controlled by voltages applied to the first-mentioned connection.
We have found that this prior art device has limitations which reduce its attractiveness.
Such a device is designed to function as a series pair of MOS transistors at low operating voltages and currents and as a bidirectional thyristor switch at higher voltages and operating currents. However, in practice in this relatively simple structure, it is difficult to control its various parameters so that there can readily be achieved a device with a desired set of operating characteristics.
Additionally, it is characteristic of this device that for reliability it is important that the gate oxides of the two transistors be rugged enough to withstand, without damage, essentially the full voltage applied between the two main terminals. For applications in which this voltage is apt to be high, for example hundreds of volts, this imposes stringent requirements on the gate oxide and leads to thicknesses that make it difficult to switch with low voltages.
Additionally, with this structure, the current flow through the device is largely only the lateral flow adjacent the top surface of the semiconductive body in which it is formed. Because of the limited volume available for current flow, the ON resistance tends to be higher than would be the case if more of the volume of the body could be used for current flow through the device when it is ON.
In pages 75 through 78 of the International Electron Devices Meeting Technical Digest, Dec. 8-10, 1980, there is a paper by J. Tihanyi entitled "Functional Integration of Power MOS and Bipolar Devices," wherein there are described a number of devices including vertical MOSFET-triggered thyristors, optically coupled lateral thyristors with MOS input, and optically coupled lateral MOS triacs. However, Tihanyi's thyristor and triac devices are designed primarily for use as MOS controlled thyristors and triacs and are not designed to be used simply in a transistor linear mode.
Moreover, Tihanyi does not provide control circuits for alleviating the requirements on the gate oxides in the transistor controls.