This invention relates to a data write apparatus for nonvolatile memory which when data supplied to an abnormality detecting device for a nonvolatile memory have become abnormal, can prevent the abnormal data from being written in the nonvolatile memory.
Conventionally, previously known is a technique which in data write into a nonvolatile memory such as EEPROM, detects that the number of pulses of a clock signal transmitted from a memory control circuit to a nonvolatile memory is larger or smaller than a prescribed number and detects that the clock signal is abnormal, thereby stopping the data write.
However, in the conventional technique described above, it is determined that abnormality has occurred using the clock signal that is a synchronous signal. Therefore even if the data actually transmitted from the memory control circuit is abnormal, as long as the number of pulses of the clock signal is normal, the abnormality of the data cannot be detected.
Specifically, where the number of pulses of the clock signal is normal and only the data to be stored is abnormal, these clock signal and data to be stored are received by the nonvolatile memory so that the abnormal data will be written in the nonvolatile memory. Particularly, where the address signal transmitted to the nonvolatile memory changes in a transmitting path, the data will be written in at an erroneous address. Owing to this, there is possibility of having an adverse effect of overwriting the data to be written at the other address on the data to be stored.