Wafer processing apparatuses are used to treat wafers in film making systems such as plasma CVD, low pressure CVD, optical CVD or PVD systems, or in etching systems based on plasma etching or optical etching technique, particularly, for production of semiconductor devices. Ceramic heaters containing heating elements have been used to support the wafers and substrates and to heat them to a specified treating temperature. The electrode pattern design of heating elements directly affects the performance of the heating unit, which is defined as ramp rate, operating temperature, and most importantly temperature uniformity.
Poor uniformity of the heating elements in the wafer processing apparatus results in significant unevenness in heating of the supporting surface as a whole, thus failing to heat the wafer uniformly. Consequently, when a film is formed by using the wafer processing apparatus, the film cannot be formed with a uniform thickness on the wafer and, in the case of etching process, there have been problems as significant variations in the processing accuracy, resulting in poor product yield.
Attempts have been made in the prior art to better design the circuit pattern, i.e., the electrode pattern of ceramic heaters. Japanese Patent Publication No. 11-317283 discloses a circuit pattern that is composed of at least two linear resistance-heating elements connected in parallel to improve the temperature distribution of a ceramic heater. Japanese Patent Publication No. 2004-146570 discloses a ceramic heater in which the resistance heating elements are wired mutually, and wherein the distance between each adjacent heating element is 1-5 mm. Japanese Patent Publication No. 2002-373846 discloses a ceramic heater in which the heating elements have different circuit pattern intervals for forming a wide heat accumulation prevention area. In another reference, US Patent Publication No. 2002-185488 discloses a ceramic heater having alternate arrangements of resistance heating elements formed from central and outermost portions of the insulating substrate.
The present invention directs to an approach to design and optimize the circuit pattern of the heating elements in wafer heating apparatuses. In one embodiment of an optimized circuit design, the power density generated by the electrode closely matches the heat loss defined by the heat transfer boundary conditions of the heater. Additionally in another embodiment, the resistance of heating element closely matches the impedance of the power supply for higher efficiency, particularly under processing conditions wherein higher operating temperature or higher electrical power is required.