This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2001-394215, filed on Dec. 26, 2001; the entire contents of which are incorporated herein by reference.
1. Field of the Invention
The present invention relates to a semiconductor device including a metal-insulator-semiconductor filed effect transistor (MISFET) and a method of manufacturing the same.
2. Related Background Art
It is known that in a MISFET or MOSFET, a hot carrier is generated as a result of electric field concentration at a gate edge, thereby to degrade the reliability of gate breakdown voltage. In order to prevent this, side portions of the gate are oxidized to thicken an insulating layer at the gate edge obtained by oxidizing the gate side portion, i.e., a reoxidized layer, to moderate the electric field intensity near the gate edge. However, a sufficient thickness of the reoxidized layer is required to appropriately moderate electric field. If a reoxidized layer 12 with a sufficient thickness is formed as shown in FIG. 8, this oxidized layer 12 may hinder subsequently-performed very-low-acceleration ion implantation or impurity doping using plasma, using gate electrodes 8a and 8b as masks, for forming an n-type extension layer 16 and a p-type extension layer 17 having a lower impurity concentration than n-type source/drain regions 20 and p-type source/drain regions 21. In FIG. 8, the reference numeral 1 denotes an n-type semiconductor substrate, 2a denotes a p-type semiconductor region, 2b denotes an n-type semiconductor region, 4 denotes a device isolating insulating layer, and 6a and 6b denote gate insulating layers.
Generally, polycrystalline silicon-germanium is used as a material of a gate electrode to activate an impurity (e.g., boron). When the reoxidized layer 12 with a sufficient thickness is formed as shown in FIG. 8, the edges of the gate electrodes 8a and 8b have a higher resistance value than the central portion 34 since deactivation of the impurity doped to make polycrystalline silicon-germanium conductive occurs at the side portions of the gate electrodes 8a and 8b. In a gate electrode which is particularly miniaturized, the proportion of the above-described deactivated portion in the gate electrode increases, thereby to form a depletion layer in the gate electrode. Accordingly, the capability of driving current of transistor is reduced, and the performance of MISFET is degraded.
A semiconductor device according to a first aspect of the present invention includes: a first conductive type semiconductor region formed in a semiconductor substrate; a gate electrode formed on the first conductive type semiconductor region; a channel region formed immediately below the gate electrode in the first conductive type semiconductor region; and a second conductive type first diffusion layer constituting source/drain regions formed at opposite sides of the channel region in the first conductive type semiconductor region, the gate electrode being formed of polycrystalline silicon-germanium, in which germanium concentration of at least one of a source side and a drain side is higher than that of a central portion.
A semiconductor device according to a second aspect of the present invention includes: a first conductive type semiconductor region formed in a semiconductor substrate; a gate electrode of polycrystalline silicon-germanium formed on the first conductive type semiconductor region; a channel region formed immediately below the gate electrode in the first conductive type semiconductor region; a second conductive type first diffusion layer constituting source/drain regions formed at opposite sides of the channel region in the first conductive type semiconductor region; and an oxide layer formed on at least one of a source region side and a drain region side of said gate electrode, a germanium concentration in a region with a thickness substantially identical to the thickness of said oxide layer, ranging from the side of the gate electrode where said oxide layer is formed, is 1.5 to 2 times the germanium concentration of a central portion of the gate electrode.
A semiconductor device according to a third aspect of the present invention includes: a first MISFET having: a first conductive type first semiconductor region formed in a semiconductor substrate; a first gate electrode formed on the first semiconductor region; a first channel region formed immediately below the first gate electrode in the first semiconductor region; and a second conductive type first diffusion layer constituting source/drain regions formed at opposite sides of the first channel region in the first conductive type semiconductor region; and a second MISFET having: a second conductive type second semiconductor region formed in the semiconductor substrate and isolated from the first semiconductor region; a second gate electrode formed on the second semiconductor region; a second channel region formed immediately below the second gate electrode in the second semiconductor region; and a first conductive type second diffusion layer constituting source/drain regions formed at opposite sides of the second channel region in said second conductive type semiconductor region, the first and second gate electrodes being formed of polycrystalline silicon-germanium, in which germanium concentration of at least one of a source side and a drain side is higher than a central portion.
A method of manufacturing a semiconductor device according to a fourth aspect of the present invention includes: forming a gate electrode containing polycrystalline silicon-germanium on a first conductive type semiconductor region in a semiconductor substrate; selectively forming a first insulating layer on said gate electrode such that a portion near one side of said gate electrode is exposed; and forming an oxide layer by selectively oxidizing silicon near the exposed side of said gate electrode.
A method of manufacturing a semiconductor device according to a fifth aspect of the present invention includes: forming a gate electrode containing polycrystalline silicon-germanium on a first conductive type semiconductor region in a semiconductor substrate; and forming an oxide layer all over the gate electrode by selectively oxidizing silicon in the gate electrode.