Transactional execution and memory allows programs to read and modify memory locations as a single atomic operation. A transaction is a finite sequence of machine instructions including memory reads and writes. A transaction may execute serially such that the steps of one transaction do not interleave with the steps of another. Further, a transaction is atomic and either commits its writes to memory so that the transaction's changes to memory are visible to other processes all at one time or aborts and discards the changes.
There are two models for transactional execution, hardware transaction memory (HTM) and software transaction memory (STM). HTM comprises hardware transactions implemented entirely in processor hardware. For hardware transactions, data may be stored in hardware registers and cache, such that all cache actions are done atomically in hardware and data in the HTM is only written to the main memory upon committing the transaction. The HTM holds all the speculative writes without propagating to the main system memory, such as a Random Access Memory (RAM) device, until the transaction commits. If the hardware transaction aborts, then the cache lines holding the tentative writes in the HTM are discarded. HTM hardware transactions may utilize cache coherency protocols to detect and manage conflicts between HTM hardware transactions. The cache coherency protocols keep track of accesses within a hardware transaction. If two hardware transactions are accessing a same memory location, then the HTM aborts one transaction if there is a conflict, else the transaction's changes may be committed to the system memory.
Software transactional memory (STM) is implemented in software. All speculative STM transactional data is stored in the system memory and indicated to be in a non-committed state. When the STM transaction commits, any data the transaction writes is indicated as committed and subsequently available to other threads and transactions. In certain STM systems, a flag may be set to indicate the data as committed and accessible and available in memory to other transactions.
HTM transactions usually require less overhead then STM transactions because HTM transactions occur entirely in hardware. HTM transactions may be limited to smaller transactions due to hardware limitations, whereas STM transactions can handle large and longer transactions.
There is a need in the art for techniques to allow HTM and STM transactions to operate together in an integrated environment and prevent conflicts between HTM and STM transactions in order to provide the efficiency of an HTM while providing the guarantees of an STM.