The semiconductor integrated circuit (IC) industry has experienced exponential growth. Technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs. Such scaling down has also increased the complexity of IC processing and manufacturing. For these advances to be realized, similar developments in IC processing and manufacturing are needed. For example, the need to perform higher resolution lithography processes grows. One lithography technique is extreme ultraviolet lithography (EUVL). Other techniques include X-Ray lithography, ion beam projection lithography, electron beam projection lithography, and multiple electron beam maskless lithography.
EUVL employs scanners using light in the extreme ultraviolet (EUV) region, having a wavelength of about 1-100 nm. Some EUV scanners provide 4× reduction projection printing, similar to some optical scanners, except that the EUV scanners use reflective rather than refractive optics, i.e., mirrors instead of lenses. EUV scanners provide the desired pattern on an absorption layer (“EUV” mask absorber) formed on a reflective mask. Masks used in EUVL presents new challenges. For example, a multi-layer (ML) structure is used in an EUVL mask and a microscopic non-flatness (caused by a defect, for example) on a surface of the substrate of the EUV mask may deform the films deposited subsequently thereon. When an incident light is reflected from a deformed region, it may experience a phase difference with respect to a light reflected from a normally formed region. Sometimes a defect introduces a phase difference close to 180°, referred to as a phase defect. A phase defect may affect print fidelity and result a severe pattern distortion on a wafer. It is desired to provide an efficient and a feasible method to reduce and/or mitigate the printability of phase defects.