1. Field
Embodiments of the invention relate to electronic devices, and more particularly, to quadrature clock signal generators.
2. Description of the Related Technology
Clock and data recovery (CDR) systems can be used in a variety of applications for recovering data from a high-speed serial data stream. CDR systems can be used in, for example, telecommunications systems, optical networks, and chip-to-chip communication.
A CDR system can use a sampling clock signal to capture samples from the serial data stream. The sampling clock signal can be generated in a variety of ways. For example, a CDR system can include a frequency synthesizer for generating a high speed clock signal having a frequency that is a multiple of a reference clock signal, and the CDR system can generate quadrature square wave clock signals from the high speed clock signal by using a quadrature divider. The quadrature square wave clock signals can be filtered to generate sine and cosine clock signals, which can be used to generate the sampling clock signal by weighted-based phase interpolation.
In certain applications, using a clock synthesizer and a quadrature divider to generate a sampling clock signal can be a practical method of quadrature clock signal generation. However, as data rates of CDR systems increase, the synthesizer and/or the quadrature divider can become more difficult to design, consume a relatively large amount of power, and/or occupy a relatively large die area. Additionally, for certain applications, such as radio transceiver applications, the high speed clock signal can generate undesirable coupling, pulling, and/or other forms of interference.
There is a need for CDR systems having improved performance. Additionally, there is need for improved systems and methods for quadrature clock signal generation.