1. Field of the Invention
The present invention relates generally to processors and, more particularly, to instructions for use with processors.
2. Related Art
Current processors support mathematical operations on real numbers, using either fixed point or floating point representations. Floating point values are typically represented in binary format as an exponent and a mantissa. The exponent represents a power to which a base number such as 2 is raised and the mantissa is a number to be multiplied by the base number. Accordingly, the actual number represented by a floating point value is the mantissa multiplied by a quantity equal to the base number raised to a power specified by the exponent. In such a manner, any particular number may be approximated in floating point notation as fxBe or (f,e) where f is an n-digit signed mantissa, e is an m-digit signed integer exponent and B is the base number system. In most computer systems, the base number system used is the binary number system where B=2, although some systems use the decimal number system (B=10) or the hexadecimal number system (B=16) as their base number system. Floating point values may be added, subtracted, multiplied, or divided and computing structures for performing these arithmetic operations on binary floating point values are well known in the art.
Fixed point values, by contrast, are made up of an integer followed by a fraction. The number of digits used for the integer and the fractional parts of the fixed point value can be varied, even though, for convenience, the total number of bits typically remains constant. As a result, multiple formats for representing a fixed point value can be supported by a microprocessor by simply varying the number of bits used for the integer and the fractional parts.
Similarly, a series of floating point formats exist which represent different trade offs between the precision and range of numbers (largest to smallest) representable, storage requirements, and cycles required for computing arithmetic results. In general, longer formats trade increased storage requirements and decreased speed of arithmetic operations (mainly multiplication and division operations) for greater precision and available range.
ANSI IEEE Standard 754 defines several floating point formats including single-precision, double-precision, and extended double-precision. Referring to FIG. 5, the format of a 32-bit single precision floating point value is broken into a one-bit sign field xe2x80x9cs,xe2x80x9d an eight-bit biased exponent field xe2x80x9cexp,xe2x80x9d a so called xe2x80x9chiddenxe2x80x9d bit (which although not explicitly represented, is assumed to be a one just left of the implied binary point), and a 23-bit xe2x80x9cmantissa.xe2x80x9d
Both floating point and fixed point values are typically used on current microprocessors. On general-purpose processors, translations between fixed and floating point values are typically performed in software, thereby requiring multiple instructions to be executed by the processor in order to perform a single translation. Conversion from fixed point to floating point datatypes are needed for several reasons. Fixed point basic arithmetic operations are simpler and usually have a smaller latency than floating point operations. Floating point datatypes, on the other hand, generally cover a wide range of values and dynamically adjust to maintain the most significant bits of the results. Acquired signals from external devices such as visual and auditory data in general use fixed point representations. Floating point computations on these data are sometimes preferred.
The present invention provides a method and apparatus for efficient conversion operations between floating point and fixed point values to be performed in a general purpose processor. This is achieved by providing an instruction for converting an arbitrary fixed point value fx into a floating point value fl in a general purpose processor.
Accordingly, the invention advantageously provides a general purpose processor with the ability to execute conversion operation between arbitrary fixed-point and floating-point values with a single instruction compared with prior art general purpose processors that require multiple instructions to perform the same function. Thus, the general purpose processor of the present invention allows for more efficient and faster conversion operations between fixed-point and floating-point values.