This invention relates to superconductor integrated circuits (xe2x80x9cICsxe2x80x9d) and, more particularly, to reduction of electrical current demand and electronic noise in superconductor ICs, to a single-flux-quantum Josephson transmission line (JTL) formed of a superconductor IC, to reduction of self-inductance of superconductor leads, to a capacitor design that permits coupling single flux quantum pulses without interference caused by self inductance of the capacitor leads that is useful in the foregoing transmission line, and to the method of fabricating that capacitor and the single flux quantum pulse transmission line.
Metals and metal alloys found to exhibit zero electrical resistance at some temperature are commonly referred to as superconductors. Each such superconductor metal or metal alloy possesses a particular cryogenic temperature, referred to as the transition temperature (Tc), at which the respective metal and metal alloy becomes superconducting and changes in electrical resistance from a measurable or relatively high value of resistance to a value of zero.
At room temperatures those metals and metal alloys possess a measurable value of electrical resistance and are not superconducting. The metals and alloys do not attain the superconductive state unless cooled, typically, to extremely low temperatures, cryogenic temperatures. As a consequence of the zero-resistance characteristic of the superconductor in the superconducting state, electrical current induced, as example, into a loop formed of the superconductor cooled below the respective transition temperature persists indefinitely. One well known superconductor or, as alternately referred to, superconductor metal is niobium, a refractory metal, which transitions to a superconducting state at a temperature of 9.2 Kelvin.
Digital electronic devices have previously been constructed of superconductor metals and the functionality of such devices demonstrated. A principal element to the construction of a superconductor digital electronic device is the Josephson junction, discovered in the early ""60""s. A Josephson junction is formed, as example, of two layers of superconductors, such as niobium, separated by a very thin layer of electrical insulation, such as aluminum oxide. When cooled to the transition temperature and biased with DC current below a xe2x80x9ccritical currentxe2x80x9d, the Josephson junction conducts current without developing a voltage drop across the junction and without dissipation of the current. Consequently the junction does not produce heat, which is a significant advantage for electronic circuits or integrated circuits. If biased above the critical current, the Josephson junction produces an RF signal, consisting of a series of pulses at RF frequencies. Thus, the critical current is a boundary at which the electrical properties of the junction changes as described.
Another interesting property is that current or energy introduced to the junction by a single flux quantum pulse is sufficient, when added to the appropriate DC bias current, to cause the Josephson junction to momentarily exceed the critical current for the junction and undergo a 360 degree shift in quantum phase or, as otherwise termed, electronically xe2x80x9cflip-overxe2x80x9d. The single flux quantum pulse is a physical constant and comprises 2.07 millivolts per picosecond or, in alternate terms, 2.07 milliamps per picohenry. In undergoing that shift the junction reproduces the single flux quantum pulse.
Superconductor digital electronic devices typically require cryogenic temperatures, below the transition temperature of the superconductor. Hence a necessary component of the electronic device is an appropriate refrigeration or other cooling apparatus. The device further requires a relatively large DC bias current. Thus, another necessary component is the inclusion of DC bias current supplies, each typically required to supply about 0.1 mA to each Josephson junction within the superconducting ICs. Despite such unwelcome appendages, such superconductor devices operate at very high speeds, as example, 100 GHz to 770 GHz, and very low power, which is unattainable with present semiconductor devices. Because of the high speeds of operation and low power requirement, superconductor electronic devices remain attractive for many applications.
In superconducting integrated circuit devices containing multiple Josephson junctions, the junctions are formed on a common superconductor metal layer, referred to as a ground plane deposited over an insulator substrate. The multiple Josephson junction devices may be logically divided into groups of two or more junctions, the groups referred to as xe2x80x9cSQUIDsxe2x80x9d (the acronym for superconducting quantum interference device). For example, a single flux quantum pulse transmission line may contain a number of SQUIDs arranged in serial order, each SQUID containing two Josephson junctions connected electrically in parallel in a superconducting loop, also referred to herein as a Josephson loop (See, as example, Josephson junctions 1 and 3 in FIG. 5).
A single flux quantum pulse, introduced at the input to the Josephson transmission line (JTL), propagates along the transmission line to the output, effectively transferring the single flux quantum pulse from SQUID to SQUID in that line. In addition, the pulse is regenerated at each stage which can produce current and power gain. The transmission line may in total contain two or more Josephson junctions, the number of Josephson junctions (and SQUIDS) that form the transmission line is proportional to the distance the SFQ pulse is to traverse.
For operation, each Josephson junction in the SQUID is required to be biased with a certain level of DC current. Because the Josephson junctions are connected, directly or indirectly, to a common superconductor metal that serves as the ground plane and, hence, as a connection point for the ground polarity lead of the bias power supply, the DC bias currents required by the individual junction devices is additive. That is, the DC bias current is supplied from the current source, the power supply, in parallel to each Josephson junction. More complex superconductor devices, such as superconductor very large scale integrated circuits (xe2x80x9cVLSIxe2x80x9d) may contain even greater numbers of Josephson junctions, and, hence, in accordance with existing design, requires a power supply capable of supplying even larger levels of DC current. The bias current demand of a superconductor VLSI with one million junctions could easily require one-hundred or more amperes from the power supply at a very low voltage.
A large DC current requirement is undesirable, since the feed lines for that current will generate large magnetic fields, that may interfere with circuit operation. Moreover, delivery of the current to the cryogenic system requires heavy-gauge wires that have a high thermal conductivity and forms a path over which external heat could be introduced, increasing the load on the cryogenic system. Thus, both the thermal load and total system power are increased, which is undesirable.
An approach one might take to lower the DC current demand on the bias source is to place the various Josephson junctions in an electrical series circuit and employ a bias power supply of higher voltage than before to provide the DC bias current through each of the Josephson junctions in series. Each junction then receives the same requisite bias current required for operation. To form such a series circuit, the various SQUIDs (or Josephson junctions) cannot be connected to a common ground plane (superconductor metal layer), as in the existing design, described earlier. Instead, each SQUID (or junction) must contain a separate ground plane and the individual ground planes must be DC isolated from one another.
Although the foregoing approach would appear to solve the bias supply problem by eliminating high current draw while providing the requisite electrical isolation, such a solution fails to take into account the functioning and purpose of the circuit. In the example of a single flux quantum pulse transmission line, that purpose is to transfer a single flux quantum pulse from one SQUID to another along the transmission line. If the individual SQUIDs are DC isolated from one another as described, the only means to couple, that is, transfer, a single flux quantum pulse from one SQUID to another in the formed transmission line and maintain DC isolation between the SQUIDS is to use differential coupling. To provide that differential coupling, electrical capacitors are added into the circuit between the pulse transmission circuits of the SQUID and also between the ground planes thereof. A capacitor would be connected from the output of one SQUID to the input of the next SQUID in the transmission line, and another capacitor is connected between the ground plane of the one SQUID to the ground plane of the next SQUID, much as one might design for propagating an AC signal along a chain of isolated active AC amplifiers.
The frequency of operation of the superconductor ICs is very high, and requires very low impedance interconnects, as example, impedance between and including one to ten ohms. Therefore, the electrical characteristics inherent in the structure of a capacitor, namely the dielectric, the conductive plates and the accompanying electrical leads, include not only the desired capacitance, but undesired parasitic inductance as well. In effect, the foregoing capacitor provides a circuit electrically equivalent to an inductance and a capacitance in series circuit.
The parasitic inductance, which is insignificant at the lower frequencies is quite large and is found to have a predominate effect that precludes propagation of single flux quantum pulses. In other words, at the frequency and switching speeds inherent in the operation of the Josephson junction, in practice, one is unable to add only capacitance to the circuit; inductance is added as well. That inductance is anathema to transmission of a single flux quantum pulse through the capacitor.
The inductance reduces the current produced in the circuit by the single flux quantum pulse. With reduced current applied to the Josephson Junction in the input stage of the next SQUID in the chain, the sum of the DC bias current and the reduced current of the pulse is insufficient to attain the critical current necessary for the Josephson Junction to xe2x80x9cflip-overxe2x80x9d, and transfer a single flux quantum pulse through the SQUID. The junction remains current conducting, and, effectively, the single flux quantum pulse disappears.
Because of the foregoing adverse effect it has not been possible to reduce DC current demand on the bias power supply or incorporate a capacitor in the SQUID circuit to achieve DC isolation between stages, and the goal is incapable of practical realization. As an advantage, the present invention realizes the means for accomplishing desired electrical isolation without adverse effect on transmission of single flux quantum pulses that is capable of practical realization.
Accordingly, an object of the present invention is to permit single flux quantum pulses to propagate across ground plane boundaries in superconductor integrated circuits.
A further object of the invention is to significantly reduce the DC current draw required to power superconductor ICs containing large numbers of Josephson junctions.
A still further object of the invention is to provide a means to introduce coupling capacitance in a superconductor electronic circuit and concurrently reduce the effect of the parasitic inductance inherent in the wiring leads for the coupling capacitance.
An additional object of the invention is to create a negative inductance within a superconductor integrated circuit.
A still additional object of the invention is to produce a new electrical capacitor for a superconductor integrated circuit.
And an ancillary object of the invention is to provide a method for fabricating a dielectric element in a superconductor integrated circuit.
The invention recognizes that a capacitor included within a superconductor integrated circuit exhibits both capacitance and inductance in a series circuit. Considered separately, the inductance is large, and any single flux quantum voltage pulse applied to an end of that series circuit appears across the inductor and cannot pass through to the other end of the circuit. Normally, the ground plane underlying the superconductor wiring is continuous. This greatly reduces inductance, as is well known in the art. The inductance associated with the capacitor structure is large because no such ground plane exists in this case. A principal discovery is that an additional body of superconductor, a layer of superconductor metal (sometimes hereafter referred to as a xe2x80x9csky planexe2x80x9d), positioned proximate to the capacitor effectively changes the electrical characteristic of the foregoing series circuit, significantly reducing the level of the undesired inductance. This so-called xe2x80x9csky planexe2x80x9d acts as a ground plane between ground planes, thereby dramatically reducing the inductance of the capacitor leads. The net or resultant inductance is sufficiently low in value (or insignificant) providing a net characteristic for the series circuit that is highly capacitive in character. As a consequence, it is possible for the first time to send an SFQ pulse through the capacitor.
Further in accordance with the invention, a superconductor integrated circuit includes a layer of dielectric material sandwiched between first and second metal plates to define a capacitor, a superconductor layer overlying that capacitor in magnetic flux coupling relationship with the capacitor and the leads of the capacitor a first Josephson junction, and a second Josephson junction with a first terminal of each of those junctions electrically connected to the first and second metal plates, respectively, whereby single flux quantum pulses produced by said first Josephson junction may be coupled through said capacitor to said second Josephson junction.
In accordance with a specific aspect to the invention, the dielectric material of the capacitor comprises an oxide of the metal of said first metal plate.
In accordance with the new method of forming the capacitor for the superconductor integrated circuit, the first metal plate is anodized to produce the metal oxide that serves as the dielectric and form an integral unitary assembly with the metal plate. More specifically, the standard photo-lithographic mask and etch procedures used to produce prescribed patterns of metal and insulating material in strata on a silicon wafer is modified to include anodization of a portion of a metal layer to produce an integral layer of insulating oxide that has a dielectric constant significantly greater than the insulating material used to produce the insulating strata on the wafer.
In accordance with further aspect to the invention, the foregoing method is adapted to the fabrication of a capacitor that provides DC isolation between stages of a superconducting digital integrated circuit, either in the signal path in that circuit or in isolation of ground planes of different stages of the active circuits contained in the superconducting ICs or in both situations. In the method, the lower most segmented metal layer of the ICs is formed with metal connecting bridges between the segments, placing the segments electrically in common; the segments and bridges are anodized to form at least the dielectric of the capacitor; and, following anodization, metal connecting bridges are removed so that the segments are no longer electrically connected together, but are DC isolated.
The foregoing and additional objects and advantages of the invention together with the structure characteristic thereof, which was only briefly summarized in the foregoing passages, will become more apparent to those skilled in the art upon reading the detailed description of a preferred embodiment of the invention, which follows in this specification, taken together with the illustrations thereof presented in the accompanying drawings.