(a) Field of the Invention
The present invention relates to a semiconductor device and a method for fabricating a semiconductor device.
(b) Description of the Related Art
As semiconductor devices have been implemented for various applications, different device characteristics are required. For example, there can be a device such as a logic and central processing unit (CPU) merged with Dynamic Random Access Memory (DRAM) or Static Random Access Memory (SRAM). Accordingly, a high voltage device and low voltage device can be formed in a single substrate.
Typically, the low voltage device is fabricated with a device isolation region through an STI technique and the high voltage device is fabricated with the device isolation region through a LOCOS technique. For the STI technique, a trench is formed at a predetermined area of the substrate and then the trench is filled with a dielectric material so as to form a device isolation region. In contrast, for the LOCOS technique, the device isolation region is formed by oxidizing a predetermined area of the substrate, such that it is impossible to perform the both processes. This is because the high voltage device is sensitive to the profile of the edge of the device isolation region formed by the STI technique in comparison to the low voltage device. Since the device reliability and characteristic depends on the profile of the edge, the LOCOS technique is conventionally used for forming the device isolation region.
As electric circuits have been highly integrated, a semiconductor device having both high and low voltage devices is required. Accordingly, it is required that even the device isolation region of the high voltage device should be formed using the STI technique. However, if the device isolation region of the high voltage device is formed using the STI technique, electric fields are concentrated at the device isolation region such that the device's characteristics are degraded.