The present invention relates generally to flip chip packaging technologies for integrated circuits more particularly to a methodology and trace design for minimizing electromigration damage to integrated circuit connection joints such as solder bumps in a flip-chip assembly.
Electromigration is the movement of material within a conductor that is caused by the flow of electrical current. Electromigration can cause the complete depletion of material within a conductor leading to the loss of continuity. The effect is more apparent at interconnect junctions, for example, in a solder bump connecting a flip-chip die and substrate, and is dependent on the current density (higher being worse than lower), the material (some materials resisting the effects of electromigration more than others), and the geometry of the structure.
Electromigration is a problem commonly seen in high-current-flow bumps of flip-chip assemblies, so named because during formation, the die pads are formed on the top layer of the integrated circuit die, bumps are added, and the die is then “flipped” over and connected directly to the chip substrate via the bumps. More specifically, and with reference to FIGS. 1 and 2, circuit components are formed on a semiconductor wafer using standard fabrication techniques, with local interconnect layers (formed of interleaved metal and dielectric layers) situated closer to the functional circuitry and global interconnect layers formed further up the sequence of layers. Die pads 22 are formed in the uppermost metal layer. Bumps are then added, and the wafer is diced into individual integrated circuit die 14 for packaging. An individual die 14 is then “flipped” over and attached directly to a substrate 12 or board through the bumps 16, as shown in FIG. 1.
Bumps 16 are formed through one of several different processes, including solder bumping, using processes that are well known in the art. FIG. 2 illustrates a portion of a flip-chip assembly 10 which utilizes solder bumps 16. In the solder bumping process, an under bump metallization (UBM) 26 is applied to the chip bond pads, by sputtering, plating, or other means, to replace the insulating passivation layer 24 (typically comprising a polymer such as Benzoclyclobutene or “BCB”) typically applied over the top metal layer, and to define and limit the solder-wetted area. Solder is deposited over the UBM 26 by evaporation, electroplating, screen printing solder paste, or needle-depositing.
FIG. 1 illustrates an example of a typical path of current flow 18 in a flip-chip assembly 10 that utilizes a conductive bump 16 for interconnecting the pads (not visible) of an integrated circuit die 14 to pads (not visible) on a chip substrate 12. As shown, a typical current path 18 flows from circuitry (not visible) on the substrate 12, through a bump 16a, through circuitry (not visible) on the die 14, and finally from the die 14 through another bump 16b and into other circuitry (not visible) on the substrate 12. A bump 16 is the element in the current flow path 18 that is often the most susceptible to electromigration damage due to its material, typically a solder, and the fact that the current flow must change directions.
As shown in more detail in FIG. 2, current flowing through the trace 20 and pad 22 within the die 14 must change direction in order to flow through an opening 25, through the conductive pad-to-bump interface (referred to hereinafter as the UBM) 26, through the bump 16 itself, and finally into the substrate pad 28. As indicated with dotted arrows 15 in FIG. 2, this turning causes the current to “crowd” at the upstream side of the bump 16, resulting in a higher current density, J, in the location of crowding. The mean time to fail (MTTF) under electromigration conditions is generally approximated to be
  MTTF  ∝      A          J      n      
where A incorporates the effects of temperature and other factors and the power n is in the range of 1 to 2 for lead solders. High local values of the current density, J, may cause failures that are premature in time when compared with the failures that occur when the current is uniformly distributed in the bump 16.
The amelioration of electromigration in bump interconnects is the subject of much study. One prior art solution includes the use of a “bus” structure for high current bumps in order to limit the routable regions within the metal layer(s) used for the bus.
The cross-sectional area of a bump affects the rate of electromigration in the bump. Bump cross-sectional area is partially dictated by the bump-to-bump spacing, with higher spacing typically permitting greater cross-sectional area of the bumps. However, with the competition for smaller and faster packaging, the trend has been towards shrinking the bump-to-bump spacing. Thus, future bumps may have smaller cross-sections, leading to the problem of higher current densities in the bumps.
The choice of material used to implement the bump can also play a significant factor in the electromigration properties of the bump. Presently, bump material is typically made of either a 90% Pb (lead) solder that is known to exhibit some electromigration resistance or a lead-tin eutectic solder that has significantly less resistance to electromigration damage. Future designs may use lead-free materials which have unknown electromigration issues. The ability to remove the electromigration design restrictions as materials change could be an important design asset.
Present designs employ multiple bumps for high current circuits. More electromigration resistant designs may enhance present configurations by carrying these high currents in fewer bumps, thereby reducing chip size and cost or by freeing up bumps for other functions. Future designs could also enjoy these benefits. These advantages may also be shared by lower current signal bumps where, for example, traces may be made narrower which would result in routing enhancements.
In view of the foregoing, it would be desirable to have a technique for equalizing the distribution of current flow through bumps of BGAs or flip-chip packages in order to reduce electromigration caused by current crowding in one area of the bump, and a novel pad structure that produces the same.