1. Field of the Invention
The present invention relates to a contour signal detecting filter for digitally detecting contour signals from composite video signals including frequency-multiplexed luminance signals and chrominance signals.
2. Description of the Prior Art
Various systems have been proposed in the art for detecting contour signals from video data. In television receivers, for example, horizontal and vertical contour signals are detected from luminance signals in order to add the detected horizontal and vertical contour signals to the original luminance signals thereby to improve sharpness of pictorial images. Detailed description is now made on such technique.
A composite video signal S(t) of the NTSC color television system is composed of a luminance signal Y(t) and a chrominance signal C(t) which is obtained by quadrature phase modulation of two color difference signals U(t) and V(t) at the chrominance subcarrier frequency f.sub.sc (3.579545 MHz). Namely, the composite video signal S(t) is expressed as follows: EQU S(t)=Y(t)+C(t)=Y(t)+U(t) sin 2.pi.f.sub.sc t+V(t) cos 2.pi.f.sub.sc t
In such a conventional contour detecting filter of the analog or digital type, for example, the luminance signal Y(t) has generally been separated from the composite video signal S(t) so as to obtain from the separated luminance signal Y(t) a horizontal contour signal through a horizontal contour detecting filter and a vertical contour signal through a vertical contour detecting filter.
FIG. 1 is a block diagram showing the circuit arrangement of a conventional horizontal contour detecting filter of the digital system. In FIG. 1, a horizontal contour detecting filter 5 is provided as external circuits with an analog-to-digital conversion circuit (hereinafter referred to as A-D conversion circuit) 2 for sampling analog composite video signals which are supplied to an input terminal 1 at a predetermined sampling frequency f.sub.s thereby to convert the same into digital composite video signals and a chrominance/luminance signal separation circuit (hereinafter referred to as Y/C separation circuit) 3 for separating and detecting luminance signals from the digital composite video signals A-D converted through the A-D conversion circuit 2. The horizontal contour detecting filter 5 is formed by a delay circuit 50-1 which receives the digital signals from the Y/C separation circuit 3 to delay the same by the reciprocal of the sampling frequency f.sub.s, i.e., the sampling period T for the digital signals, a delay circuit 50-2 which receives the delayed digital luminance signals from the delay circuit 50-1 to delay the same by the sampling period T, a coefficient multiplier 51 which multiplies the signals received from the delay circuit 50-1 by -2 to output the same and an adder 52 which receives the signals from the Y/C separation circuit 3, delay circuit 50-2 and coefficient multiplier 51 to add up the same and outputs the result. Description is now made on the operation for detecting the horizontal contour signals.
The analog video signals supplied to the input terminal 1 are sampled by the A-D conversion circuit 2 at the predetermined sampling frequency f.sub.s to be converted into digital composite video signals, from which only luminance signal components are supplied to the horizontal contour detecting filter 5 through the Y/C separation circuit 3. It is assumed here that a luminance signal f(t) outputted from the Y/C separation circuit 3 is supplied as f(nT) at a time t=nT, while the output luminance signal from the delay circuit 50-1 of the delay time T is supplied as f((n-1)T). The delay circuit 50-2 delays the luminance signal f((n-1)T) delayed by the delay circuit 50-1 further by the period T, and hence the output signal from the delay circuit 50-2 is f((n-2)T). The coefficient multiplier 51 multiplies the output signal from the delay circuit 50-1 by -2, and hence the output signal from the coefficient multiplier 51 is -2f((n-1)T). The adder 52 adds up all of its input signals to output the result, and hence the luminance signal supplied to an output terminal 4 of the horizontal contour detecting filter 5 is: EQU f(nT)-2f((n-1)T)+f((n-2)T)
This is expressive of the second order differentiation with respect to the horizontal direction (horizontal frequency component) of the luminance signal f(t) on the screen. Thus, detected is the horizontal high-frequency component of the luminance signal, i.e., the horizontal contour signal.
FIG. 2 is a block diagram showing the structure of a conventional vertical contour detecting filter of the digital system. Similarly to those of the horizontal contour detecting filter 5 as shown in FIG. 1, provided as external circuits of a vertical contour detecting filter 6 are an A-D conversion circuit 2 for A-D converting analog video signals supplied to an input terminal 1 and a Y/C separation circuit 3 which receives the signals from the A-D conversion circuit 2 to output only luminance signal components. The vertical contour detecting filter 6 is formed by a delay circuit 60-1 which receives the luminance signals from the Y/C separation circuit 3 to delay the same by one horizontal scanning interval (hereinafter referred to as 1H), a delay circuit 60-2 which receives the signals from the delay circuit 60-1 to delay the same by 1H, a coefficient multiplier 61 which receives the signals from the delay circuit 60-1 to multiply the same by -2 and an adder 62 which receives the signals from the Y/C separation circuit 3, delay circuit 60-2 and coefficient multiplier 61 to add up the same. The operation of the vertical contour detecting filter 6 is now described.
The vertical contour detecting filter 6 as shown in FIG. 2 is different in structure from the horizontal contour detecting filter 5 of FIG. 1 only in delay times of the delay circuits. Therefore, assuming that a luminance signal f(nT) at a time t=nT is supplied to the vertical contour detecting filter 6 from the Y/C separation circuit 3, the output signal of the vertical contour detecting filter 6 is, similarly to the case of the horizontal contour detecting filter 5, as follows: EQU f(nT)-2f(nT-H)+f(nT-2H)
This is expressive of the second order differentiation in the vertical direction (vertical frequency component) on the screen. Namely, detected is the vertical high frequency component of the luminance signal, i.e., the contour signal in the vertical direction on the screen.
FIG. 3 is a block diagram showing the structure of a conventional horizontal/vertical contour detecting filter of the digital system formed by combining the horizontal contour detecting filter as shown in FIG. 1 with the vertical contour detecting filter as shown in FIG. 2.
The structure as shown in FIG. 3 is obtained by combining the horizontal contour detecting filter 5 of FIG. 1 and the vertical contour detecting filter 6 of FIG. 2, with only difference in delay times of delay circuits 70-1 and 70-4 and the value of the coefficient in a coefficient multiplier 71, in order to adjust the delay times. In other words, connected in series are a delay circuit 70-1 of a delay time (hereinafter referred to as (H-T))obtained by subtracting one sampling period from one horizontal scanning interval, a delay circuit 70-2 of the delay time T, a delay circuit 70-3 of the delay time T and a delay circuit 70-4 of the delay time (H-T) in the said order. A contour detecting filter 7 includes the coefficient multiplier 71 which receives the signals from the delay circuit 70-2 to multiply the same by -4 and an adder 72 which receives the signals from the Y/C separation circuit 3, delay circuit 70-1, coefficient multiplier 71 and delay circuits 70-3 and 70-4 to add up the same. In other words, the horizontal/vertical contour detecting filter 7 is implemented by matching a vertical contour detecting filter formed by the delay circuits 70-1 to 70-4, coefficient multiplier 71 and adder 72 and a horizontal contour detecting filter formed by the delay circuits 70-2 and 70-3, coefficient multiplier 71 and adder 72. Thus, horizontal and vertical contour signals can be simultaneously detected by the horizontal/vertical contour detecting filter 7. The horizontal/vertical contour detecting filter 7 in such structure can be considered to perform arithmetic on the second order differentiation in the oblique direction on the screen, whereby oblique contour signals can also be detected.
FIG. 4 is a block diagram showing definite structure of the Y/C separation circuit 3 as shown in FIGS. 1 to 3. As obvious from FIG. 4, the Y/C separation circuit 3 is formed by a line memory 30 which receives the signals from the A-D conversion circuit 2 to delay the same by predetermined periods thereby to supply three types of signals to a vertical high-pass filter 31 while supplying single-type delay signals to a delay circuit 33, a vertical high-pass filter 31 which receives the signals having three types of delay times from the line memory 30 to detect high frequency components in the vertical direction on the screen and supply the same to a horizontal high-pass filter 32, which in turn detects high frequency components in the direction of horizontal scanning lines from the signals received from the vertical high-pass filter 31 thereby to separate chrominance signals and supply the same to one input terminal of a subtractor 34, and the delay circuit 33 which receives the delay signals from the line memory 30 to delay the same by a period 2T, i.e., twice the sampling period T, and to supply the signals to the other input terminal of the subtractor 34, which in turn subtracts the signals of the horizontal high-pass filter 32 from those of the delay circuit 33 to supply the result to a contour detecting filter in the following stage.
The line memory 30 is formed by cascade-connected delay circuits 30-1 and 30-2 for delaying supplied signals by one horizontal scanning interval H and outputting the same, and is adapted to receive the signals from the A-D conversion circuit 2 to generate three types of signals including non-delayed signals, signals delayed by 1H and those delayed by 2H.
The vertical high-pass filter 31 is formed by a -1/4 multiplier 31-1 which multiplies the non-delayed signals received from the line memory 30 by -1/4 thereby to output the same, a 1/2 multiplier 31-2 which multiplies the 1H-delay signals received from the line memory 30 by 1/2 thereby to output the same, a -1/4 multiplier 31-3 which multiplies the 2H-delayed signals received from the line memory 30 by -1/4 thereby to output the same and an adder 31-4 which adds up the signals from the -1/4 multipliers 31-1 and 31-3 and 1/2 multiplier 31-2 to supply the result to the horizontal high-pass filter 32.
The horizontal high-pass filter 32 is formed by a delay circuit 32-1 which delays the signals from the vertical high-pass filter 31 by 2T, a delay circuit 32-2 for delaying the signals from the delay circuit 32-1 further by 2T, a -1/4 multiplier 32-3 for multiplying the signals received from the vertical high-pass filter 31 by -1/4 and outputting the same, a 1/2 multiplier 32-4 for multiplying the signals received from the delay circuit 32-1 by 1/2 to output the same, a -1/4 multiplier 32-5 for multiplying the signals from the delay circuit 32-2 by -1/4 to output the same and an adder 32-6 for adding up the signals received from the -1/4 multipliers 32-3 and 32-5 and 1/2 multiplier 32-4 to output the result.
Brief description is now made on the operation of the luminance/chrominance separation circuit.
The output signals from the A-D conversion circuit 2 are sequentially detected by the line memory 30 as three signals having the cycle of one horizontal scanning interval H. The vertical high-pass filter 31 receives the output signals from the line memory 30 to detect the high-frequency components in the vertical direction on the screen. The horizontal high-pass filter 32 cascade-connected to the vertical high-pass filter 31 detects the high-frequency components in the direction of the horizontal scanning lines to separate the chrominance signals and supply the same to the subtractor 34. On the other hand, the output signals from the first stage H delay circuit 30-1 of the line memory 30 are delayed by the delay circuit 33 by the period 2T (twice the sampling period T) to be supplied to the subtractor 34. The subtractor 34 subtracts the output signals of the horizontal high-pass filter 32 from the output signals of the delay circuit 33 thereby to obtain luminance signals, which are outputted to a contour detecting filter connected to the following stage of the Y/C separation circuit 3.
As hereinabove described, the conventional contour detecting filter detects the contour signals by utilizing only the luminance signal components. Therefore, delay circuits required for a luminance/chrominance signal separation circuit for separating composite video signals into luminance signals and chrominance signals cannot be commonly used with the delay circuits required for the horizontal/vertical contour detecting filter, whereby the cost therefor is inevitably increased.