The present major trend in semiconductor fabrication is integration of 2.5D and 3D IC chip or die packages having vertically stacked chips and direct electrical inter-chip connections in lieu of other interconnect techniques such as wire bonds and chip edge interconnects. The dies in such IC chip packages may include fine (small) pitch vertical through substrate vias (TSVs) which may be used to form a direct electrical connection to an adjoining stacked die. TSVs offer higher density interconnects and shorter signal paths creating the possibility of forming die packages having smaller form factors and thin die stacks. The TSVs in top dies may be terminated on the back side with very fine pitch microbump arrays for final interconnection to and mounting on a semiconductor substrate. The compact die stacks in 2.5D/3D IC chip packages provide a small form factor consistent with the goal of producing smaller semiconductor devices.
In 2.5D/3D IC chip packages, interposers may be used to make electrical connections between adjoining dies or between die packages and another semiconductor substrate which may include various electrically conductive interconnects such as redistribution layer (RDL) structures in some embodiments that may be used to increase or decrease the pitch spacing of the electrical contacts to aid with eventual final mounting of the chip package on another substrate, which may be a package printed circuit board (PCB), packaging substrate, high-density interconnect, or other.
Some semiconductor structures incorporating 2.5D/3D IC technology may include various passive devices. One such passive device is a board-level SMD (surface mount device) ferrite bead inductor. Ferrite bead inductors (“ferrite beads”) generally include input and output terminals, and conductive metallic leads or traces combined with an associated magnetic core material such as ferrite. Ferrite beads function as passive low-pass noise suppression filters or shields that attenuate high frequency EMI/RFI (electromagnetic interference or radio frequency interference) noise from internal or external sources that may interfere with the proper performance of circuits and devices formed in a semiconductor package. Board level SMD ferrite beads are discrete devices which are fabricated separately and then mounted on a semiconductor package substrate or PCB (printed circuit board). Accordingly, SMD ferrite beads have a relatively large form factor and consume valuable real estate when mounted on the PCB. SMD ferrite beads are not compatible for integration with the silicon-based CMOS (complementary metal-oxide semiconductor) chip fabrication processes.
An integrated passive device (IPD) chip-level or “on-chip” ferrite bead inductor with small form factor is desired that can be integrated with the silicon-based chip semiconductor fabrication process.
All drawings are schematic and are not drawn to scale.