1. Field of the Invention
This invention relates to a low power, monolithically implemented, Digital-to-Analog Converter (DAC) circuit in general and, in one aspect, to the use of this circuit to satisfy the pre-distortion requirements of a four-quadrant Gilbert multiplier in applications for the multiplication of two signals; one being represented as the discrete binary levels of a digital word from the DAC and the other being a continuous analog signal.
2. Brief Description of the Known Art
Binary-weighted Digital-to-Analog Converters (DAC) commonly use a form of resistive network, such as the R-2R ladder 100. Such circuits can require resistors which may not be readily available for implementation in a monolithic fashion. Common approaches to monolithic DAC implementation can require the fabrication of very accurate resistors used in the ladder networks since the actual resistance value of these resistors is critical to the avoidance of errors. These resistors may be of the diffusion or thin film types.
In addition to the resistors in R-2R ladder networks, switching transistors are also required which often consist of large MOS transistors with very small ON resistances. The large size of typical MOS transistors used in this application can significantly decrease the circuit density on a chip, hence increasing the cost.
A number of patents may be of interest in connection with the technology discussed above, including the following: U.S. Pat. Nos. 5,043,731; 4,713,649; and 4,703,302. Also the book, Bipolar and MOS Analog Integrated Circuit Design by Alan Grebene, Wiley, Interscience, pp 456-462, p 759, and pp771-774, may be of interest relative to this prior art.
There is disclosed a highly efficient general use Digital-to-Analog Converter (DAC) and the use of this DAC in one application in conjunction with a Gilbert multiplier circuit to obtain the product of a binary-weighted digital word Vdig and a continuous analog signal Vsig.
More specifically, an efficient, monolithic, low power, digital-to-analog converter (DAC) addresses some of the negative aspects mentioned in the prior art discussion above, namely the need for very accurate resistors and separate switching transistors. The goal is to use an efficient MOS transistor element in a fashion which serves both the switching and resistive current division functions simultaneously. This allows a R-2R type ladder network to be built with straightforward MOS transistors which can both switch and accurately divide current among the branches of the ladder network.
There exists a circuit often used for the multiplication of two analog signals, where in this case one of the signals Vdig represents the discrete levels for a binary-weighted digital word and the other being a continuous analog signal Vsig, is described. For this application the so called four-quadrant multiplier, or Gilbert multiplier, accomplishes the task of producing an output which is equivalent to the product of two input signals Vdig and Vsig. The DC transfer function for the Gilbert multiplier circuit turns out to be the product of the two hyperbolic tangents for the two input signals. As a result, in order to maintain linearity over the voltage operating range, for the case where the amplitude of the two input voltages is relatively large, it is necessary to include appropriate nonlinearity, or pre-distortion, in the circuit to compensate for this hyperbolic tangent function. It is therefore one of the objectives of this patent to also utilize the DAC to both convert the digital word input Vdig to an analog signal and also as an element in generating the nonlinear inverse hyperbolic tangent function for the Vdig signal.
The DAC circuit of the invention makes an extremely efficient use of components by using MOS transistors in the circuit to serve both the switching and resistive functions found separately in a conventional DAC. In addition, only two sizes of MOS transistors are required to accomplish the R-2R current dividing function and the W/L ratios for the two size of transistors are most reasonable, making this circuit very compatible for monolithic implementation. This results in a cost effective approach to DAC manufacturing technology.