Current high performance flash memory devices such as ORNAND, NOR, NAND devices, and the like, can achieve a packaging density substantially higher than the conventional EEPROM non-volatile memory. For example, flash memory devices are suitable for mass storage and/or code storage in commercial, as well as consumer products. As the density of the devices increases, the performance of the ORNAND type of flash memory can also improve. In order to efficiently manage the full chip performance and to effectively use the silicon die area, power, for example, from one area of the die must be handled and transferred to another area with care, especially when dealing with high voltage (HV) signals. The IR effects (current×resistance) become an important factor affecting power consumption, silicon die size, high voltage operation, and the like. The penalty of using extra silicon area, for example, causes large IR drop along the paths, power as well as signal transfer becomes more expensive and even prohibitive in some cases, and the like.
Flash memory devices typically require high voltage circuits to operate program and erase operations, which can consume large currents. Therefore, many devices employ charge pump circuits to generate high voltages to make the devices functional. Capacitors are used to achieve charge pumping via capacitive coupling and regulation, where the charge can be stored in capacitors and transferred from one stage of the pump to the next stage. As a key element of the charge pump, the capacitors may occupy much more silicon area compared to other components in the circuit design.
In view of the foregoing, a need exists to improve the design and efficiency of the capacitors in order to reduce the circuit size and the related parasitic capacitance, for example. This will in turn lead to silicon area savings, die size reduction and improved economy of the product.