The present invention relates to a thin film transistor matrix device and a method for fabricating the same, more specifically a TFT-LCD (TFT matrix-type liquid crystal display device) for use in laptop personal computers and wall TVs, and a method for fabricating the same.
TFT-LCDs have characteristics of thinness and lightness, low electric power consumption, etc. and are expected to have a large market in the future as a display device which will take place of CRTs. To realize TFT panels of high precision, large screens for use in work stations, etc., the aperture ratio is a significant problem for higher image quality. To fabricate inexpensive TFT panels, it is important that the TFT panels have device structures which can be fabricated by the use of photolithography techniques.
A pattern layout of a conventional thin film transistor matrix device is shown in FIG. 35.
An image display region 112 is disposed at the center of a transparent insulating substrate 110, and a plurality of thin film transistors (not shown) and a plurality of picture element electrodes (not shown) connected to the sources of the respective thin film transistors are arranged in a matrix in the region. The gate electrodes of the thin film transistors are commonly connected to gate bus lines 114a and 114b arranged widthwise as viewed in FIG. 35, and the drain electrodes thereof are commonly connected to drain bus lines 116a and 116b arranged lengthwise as viewed in FIG. 35.
The plural gate bus lines 114a and 114b are separated in odd number-th gate bus lines 114a which are adjacent to each other, and even number-th gate bus lines 114b (in this specification, the term “odd number-th lines” is used to refer to the odd numbered lines, namely the first, third, fifth, . . . lines; the term “even number-th lines” is used to refer to the even numbered lines, namely the second, fourth, sixth, . . . lines). The odd number-th gate bus lines 114a are connected to gate side tab terminals 118a on the right side as viewed in FIG. 35, and the even number-th gate bus lines 114b are connected to gate side tab terminals 118b on the left side as viewed in FIG. 35.
The plural drain bus lines 116 are separated in odd number-th drain bus lines 116a which are adjacent to each other, and even number-th drain bus lines 116b. The odd number-th drain bus lines 116a are connected to drain side tab terminals 120a on the upper side as viewed in FIG. 35, and the even number-th drain bus lines 116b are connected to drain side tab terminals 120b on the lower side as viewed in FIG. 35.
In the thus-structured thin film transistor matrix device, as described above, the gate bus lines 114a, 114b, and the drain bus lines 116a, 116b are respectively formed by independent conducting layer patterns. As a result problems due to electric stresses, such as electrostatic charges, etc., occur in the process for fabricating the thin film transistor and in the process for fabricating the liquid crystal panel, whereby the conducting layer patterns are short-circuited and the characteristics of the thin film transistors, such as threshold values, etc., are changed.