1. Field of the Invention
The present invention relates to a Sigma-Delta pulse-width-modulated signal generator circuit. Applications of the invention are in particular in vertical scan circuits for a television screen or a computer monitor of the CRT (Cathode Ray Tube) type. In such an application, the pulse-width-modulated signal is used as a signal for switching a power supply voltage so as to control electron-beam vertical deflection electrodes.
2. Description of the Related Art
Pulse width modulation or PWM is widely used in electronics, especially in switched-mode power supply circuits for controlling the current in an inductive load. In general, a pulse-width-modulated signal is obtained by comparing a modulation signal which is a DC voltage with a sawtooth signal of defined fixed frequency. The pulse-width-modulated signal therefore has a fixed frequency which is that of the sawtooth signal.
The pulse-width-modulated signal is advantageously obtained by using a Sigma-Delta (xcexa3-xcex94) pulse width modulation circuit (hereafter called PWM circuit).
The principle of a Sigma-Delta PWM circuit consists in integrating a modulation signal (xe2x80x9cSigmaxe2x80x9d operation) and then in comparing it with a reference voltage (xe2x80x9cDeltaxe2x80x9d operation). This principle is described, for example, in the article by Mustansir H. Kheraluwala et al., xe2x80x9cDelta Modulation Strategies for Resonant Link Invertersxe2x80x9d, IEEE Transactions On Power Electronics, Vol. 5, No. 2, April 1990.
According to one characteristic of Sigma-Delta PWM circuits, the frequency of the pulse-width-modulated signal is not fixed. In particular, it depends on the duty cycle of the signal. This constitutes a drawback in an application of the aforementioned type when it is desired to synchronize the switching signal with the horizontal scan frequency or line frequency so that one period of the switching signal corresponds to the scan time of a horizontal line of the screen. Typically, the line frequency is 15 kHz (kilohertz) for a CRT television screen and between 20 and 150 kHz for a CRT computer monitor.
An embodiment of the present invention provides a pulse-width-modulated signal generator circuit comprising a Sigma-Delta PWM circuit which is synchronized so as to obtain a pulse-wide-modulated signal whose frequency is independent of the duty cycle.
An aspect of the invention relates to a circuit for generating a pulse-width-modulated signal, comprising a phase-locked loop having: a duty-cycle-insensitive phase comparator which receives on a first input a synchronization signal and delivers as output a phase error signal; a loop filter; and also a Sigma-Delta pulse width modulation circuit which has at least one modulation input for receiving a modulation signal, an oscillation frequency control input and an output for delivering as output the pulse-width-modulated signal. The pulse width modulation circuit receives, on the oscillation frequency control input, the phase error signal filtered by the loop filter. The phase comparator furthermore receives the said pulse-width-modulated signal on a second input.
Stated otherwise, the PWM circuit comprises means for providing a voltage-controlled oscillator or VCO function. It therefore provides both the PWM circuit function and the VCO function. This is why, in the rest of the text and in the figures this circuit is called a PWM-VCO circuit. This PWM-VCO circuit is connected as the VCO of the PLL. In this way, the oscillation frequency of the PWM circuit is synchronized by the PLL to the synchronization signal frequency.
In one embodiment, the pulse width modulation circuit comprises an astable differential circuit which comprises two differential inputs constituting two modulation inputs for receiving the modulation signal, and which comprises a controlled current source for delivering a current into the differential circuit according to the signal received on the oscillation frequency control input.
In an exemplary embodiment, the current source is voltage-controlled.
In addition, in one embodiment, the astable differential circuit comprises two branches connected between a first power supply terminal and a second power supply terminal. Each branch contains a bipolar transistor whose emitter is connected to the first power supply terminal via a respective emitter impedance and via the current source and whose collector is connected to the second power supply terminal via a capacitor having the same value. Further, the respective collectors of the transistors are each connected to a respective input of a flip-flop via a respective comparator, the non-inverting input of each of which receives the same reference voltage. Each of the branches further contains a respective MOS transistor connected in parallel to the capacitor of the branch, the outputs of the flip-flop being connected to the respective control gates of these transistors, each via two series-connected logic inverters. The respective bases of the bipolar transistors constitute the two differential inputs of the astable differential circuit, and the node located between the two inverters of a specified branch constitutes the output of the pulse width modulation circuit.
In one exemplary embodiment, the phase comparator comprises a sequential phase detector comprising four flip-flops and also a four-input NAND logic gate.