1. Field of the Invention
The invention relates generally to flow control and buffer management in high-speed communication media and protocols and more specifically relates to improved buffer management and flow control in high-speed, serial communication network media and protocols.
2. Discussion of Related Art
In electronic network communication systems, a transmitting element is in communication with a receiving element for the exchange of information therebetween. In many such electronic networks, the communications medium connecting the transmitting and receiving elements is a serial interface in which bits of information to be communicated are exchanged in a sequential, serial fashion. Sometimes be serial communication interface may be as narrow as a single bit in width while in other high-speed applications, the serial communication may involve multiple bits communicated in parallel as a word and words communicated in a serial sequential fashion.
In many such electronic communication systems, the transmitting element and a receiving element may be implemented as distinct electronic systems such that the transmitting element produces information at a different rate than the receiving element is capable processing. In such cases, it is generally known in the art to use techniques broadly referred to as flow control to assure that the receiving element is not overrun or overflowed by the production and transmission of information from the transmitting element. Generally speaking, flow control involves the receiving element instructing the transmitting element as to the maximum amount of data that may be presently received or otherwise indicating to the transmitting elements that no further data may be received for a period of time.
It is also common in high-speed electronic communication systems that the exchange of information between the transmitting element and a receiving element is “packetized” (i.e., information aggregated into packets). Each packet of information comprises a certain amount of substantive information coupled with associated overhead information to allow verification and acknowledgment of proper receipt of substantive data (i.e., to verify that no data is missing and/or to reconstruct any missing data and to verify that data is received in the proper sequence).
It is also generally known in such networks that both the transmitting element and the receiving element are comprised of various layers of communication components often referred to as a “stack” or “protocol stack.” Higher layers of such a protocol stack generally provide interfaces to applications and system programs requiring communication services to exchange information with another device. As the information descends from higher layers of the protocol stack to lower layers of the protocol stack, corresponding packet header information may be appended and prepended to the data received from the higher level to allow for robust, reliable exchange of information with a corresponding layer at the receiving element protocol stack.
At each of such layer of a protocol stack, the element generating information may be viewed as a transmitting element and the next lower layer to which it transmits information may be viewed as a receiving element. Flow control is therefore a standard technique practiced not only between distinct computing or communicating elements of electronic network systems but also as a method practiced between various layers of communication media and protocols within a single transmitting element or receiving element.
In many areas of network communications, industries are becoming more standardized in their definition and application of various layers of such a communications protocol stack. Such enhanced interoperability has enabled more efficient distributed development of communication applications across multiple devices and even across devices from multiple vendors. For example, one industry trade organization, the Optical Interconnect Forum (“OIF”), has been formed to establish specifications and agreements for interconnection of high-speed communication media and protocols. One of the various agreements created and maintained by this trade organization is the system packet interface (“SPI”). The current version of the SPI specification is SPI 5 preceded by SPI 4.2. The SPI 5 interface specifications are generally available from at: http://www.oiforum.com/public/elec_interface.html.
The SPI 4 and SPI 5 specifications both address communication media and protocols for high-speed fiber-optic communication channels. These specifications pertain to high-speed fiber communication media such as OC192 and OC768, respectively. The specifications define a rich set of ports (logical channels) that can be active on the physical link at any given time. The SPI 4 specification allows for up to 256 such ports or logical channels while the SPI 5 specification provides for a far greater number of ports (i.e., 2144 ports).
The SPI 4 and SPI 5 specifications are exemplary of communication standards in which flow control is based on a credit structure wherein the receiving end of the link indicates its a readiness to receive further information in accordance with various threshold levels of space available in its buffer memory—i.e., credits for packets that may be received. Under the SPI standards, the credit information is returned from the receiving element to the transmitting element through a two bit wide signal path. Rather than returning explicit credit amounts, the two bit field indicates one of three status conditions. A HUNGRY status indicates that of the receiving element is prepared to his receive additional information from the transmitter. The STARVED status indicates that the receiver is in need of further information to avoid underrun conditions (underrun conditions that may reduce utilization of the bandwidth of the communication channel). A SATISFIED status indicates that the available buffer memory of the receiving element is almost full indicating full utilization of the available communication bandwidth. The memory credit status is returned in regular status updates from the receiving element on a periodic basis.
Under the SPI standards, the transmitting element and receiving element agree on common threshold values that correspond to each of the three credit status values. The agreed upon threshold values are referred to as MAXBURST1 and MAXBURST2. A table included in the SPI 4 and SPI 5 specification provides the precise semantic definition of each of the three status states as they relate to the predefined threshold values for available buffer memory in the receiving element. In sum, the STARVING status indicates that the receiving element has at least enough memory space for the higher predetermined threshold value (MAXBURST1). When a receiving port reports the STARVING status, sufficient buffer memory must be available in the receiving element to assure proper receipt and processing of at least MAXBURST1 packets of information. Under the SPI standards, a receiving element (port) may alter the status at a later time if buffer memory is no longer available but may only do so on a periodic basis when regular status updates are reported from the receiving element to the transmitting element. During the latency period between such updates, the receiving element must have this minimum amount of storage preallocated (i.e., MAXBURST1 packets). Further, the buffer management and credit scheme is defined on a port-by-port basis in accordance with the SPI 4 specifications and either port-by-port or pool-by-pool under the SPI 5 specifications. This minimum buffer allocation is therefore multiplied by the number of ports (or pools) presently defined for the receiving device.
It is therefore critical to in such credit-based flow control architectures to accurately determine the MAXBURST1 (and MAXBURST2) threshold values to permit optimal bandwidth utilization of the communication channel while reducing memory utilization within the receiving element. As discussed further herein below, typical cases supporting 256 active channels under the SPI LVTTL (single ended) signaling standards utilized can require as much as 2 MB of buffer storage for this worst-case, but not uncommon, scenario of all ports starving for data. SPI 5 standards extend the number of ports up to 2144 and therefore correspondingly increase the potential buffer memory required to stand ready to receive bursts of data on all ports.
Similar resource allocation problems may arise in other flow control protocols and standards. Where a minimum buffer space is required for each port of a multiported communication system, the buffer memory requirements may rapidly grow to large, costly capacities.
It is evident from the above discussion that the need exists for an improved architecture in flow control and buffer memory management for high-speed serial communication devices to maintain high-performance while reducing buffer memory requirements.