1. Field of the Invention
The present invention relates to a method of performing inspection by applying a probe to each of pads of a plurality of chip patterns formed on a wafer.
2. Background Art
A one hundred percent inspection is made of the frequency characteristics of ICs operating in a radiofrequency band, particularly ultrahigh-frequency-band ICs operating in a microwave region of 3 GHz or higher or monolithic microwave ICs (MMICs) operating in a higher millimeter wave region (30 to 300 GHz). This kind of inspection is performed by applying a probe to pads of a plurality of chip patterns formed on a wafer (see, for example, Japanese Patent Laid-Open No. 2-105436).
FIG. 15 is a plan view showing a conventional layout of chip patterns formed on a wafer. As shown in FIG. 15, identical chip patterns 1 are orderly laid out on the wafer. In each chip pattern 1 are formed transistor elements 2, DC bias application pads 3, an RF input pad 4, an RF output pad 5, a grounding pad 6a (on the input side) for on-wafer RF inspection, grounding pads 6b (on the output side) for on-wafer RF inspection, and via holes 7 for supply of ground potential.
FIG. 16 is a plan view showing a state when a one hundred percent inspection of the layout shown in FIG. 15 is started. Radiofrequency-band probe heads 8 having a G-S-G-type tip and DC probe cards 9 for application of DC biases are applied to the pads of the chip patterns 1 to make a direct-current inspection and a radiofrequency inspection (DC/RF inspections). The chip patterns 1 in the entire area on the wafer are inspected by moving the wafer stage in front-rear and left-right directions by a certain pitch.
FIG. 17 is a plan view showing the movement of the inspection position in a conventional method of one hundred percent inspection of high-frequency characteristics. FIG. 18 is a flowchart showing a conventional on-wafer one hundred percent inspection method.
In the conventional on-wafer one hundred percent inspection method, wafer alignment is first performed by making the X-Y coordinate angle of a wafer 13 and the X-Y coordinate angle of an inspection apparatus coincide with each other (step S101). Subsequently, a probe is brought into contact with the pads of the chip pattern 1 at an inspection start address (initial position) (step S102).
The probe is then moved to the chip pattern 1 at the next measurement address (step S103). The probe is reciprocated with respect to the X-coordinate and is moved in one direction with respect to the Y-coordinate. A direct-current inspection and a radiofrequency inspection (DC/RF inspections) are made on the chip pattern 1 (step S104).
If the present address is not the final address on the map, the process returns to step S103. If the present address is the final address, the inspection process ends (step S105).
FIG. 19 is a plan view showing the movement of the inspection position in a conventional method of one hundred percent inspection of high-frequency characteristics with respect to temperature. FIG. 20 is a flowchart showing the conventional method of one hundred percent inspection of high-frequency characteristics with respect to temperature.
Inspection is performed by applying a probe to pads of a plurality of chip patterns on the wafer on the basis of a map file indicating the positions of the chip patterns on the wafer. The size of the wafer 13 expands/contracts slightly according to the environmental temperature. As long as only one map file is used, an error occurs in the movement-destination position when the environmental temperature is changed, resulting in contact failure. In the conventional method of one hundred percent inspection of high-frequency characteristics with respect to temperature, therefore, map files indicating slight changes in size related to different temperatures are prepared and loaded on a temperature-by-temperature basis (step S121).
The temperature of the wafer stage is then set (step S122). A contact check is made on certain chip patterns 1 on the wafer 13 (step S123).
A direct-current inspection and a radiofrequency inspection (DC/RF inspections) are made on all the chip patterns 1 (step S124).
If the measurement through the entire temperature range has not been completed, the process returns to step S121. If the measurement through the entire temperature range has been completed, the inspection process ends (step S125).
FIG. 21 is a diagram schematically showing a conventional RF energization inspection system. A radiofrequency signal source 18 is connected to an input end of a device 22 to be measured, via a driver 19, a variable attenuator 20 and an isolator 21. Also, a DC power supply 24 is connected to the device 22 to be measured. A power meter 23 is connected to an output end of the device 22 to be measured, via an isolator 21.
FIG. 22 is a flowchart showing a conventional RF energization inspection method in which an RF output measurement interrupt is produced at certain intervals. In this inspection method, an RF signal generated from the radiofrequency signal source 18 is level-adjusted by the variable attenuator 20 and input to the device (DUT) 22 to be measured, while DC biases are being applied from the DC power supply 24 to the device 22 to be measured (step S141). The device 22 to be measured is left in this state for a certain time period (step S142).
The DC current and RF output power are monitored with the power meter 23 and recorded (step S143). If the measured device 22 is out of order, the inspection process ends. If the measured device 22 is not out of order, the process advances to step S145 (step S144). Further, if a programmed total time has not lapsed, the process returns to step S142. If the programmed total time has lapsed, the inspection process ends (step S145).
FIG. 23 is a diagram showing input power Pin, and output power Pout of the amplifier. As shown in FIG. 23, the amplifier has a linear region in which the gain is constant evenwhen input power Pin is increased, and a saturation region in which the gain is reduced when input power Pin is increased. Output power Pout when the gain is reduced by N dB (N=1, 2, 3 . . . ) than that in the linear region, and which is used as an index to indicate a characteristic of the amplifier, will be referred to as N dB gain compression point output (PNdB).
FIG. 24 is a flowchart showing a conventional N dB gain compression point output inspection method. Intheconventionalinspectionmethod, RF power is first turned off (step S141) and DC biases are applied (step S142). Input power Pin (A dB) which is certainly within the linear region is then given and a linear gain L=(B−A) dB is determined from the corresponding output power Pout (B dB) (step S143).
Input power Pin higher than J dB than the preceding input is thereafter given and output power Pout is measured to determine the power gain (step S144). Examination is made as to whether or not the DUT is operating correctly (step S142). If the DUT is operating correctly, the process advances to step S146. If the DUT is not correctly operating, the process moves to step S149.
Examination is then made as to whether or not the power gain is lower by 1 dB or more than the linear gain (step S146). If the power gain is not lower by 1 dB or more than the linear gain, the process returns to step S144 and the input level is stepped up. If the power gain is lower by 1 dB or more, the process advances to step S147 without stepping up the input power Pin.
The 1 dB gain compression point output (P1 dB) is thereafter computed by linear approximation or input power Pin step-down adjustment (step S147). Determination of the computed 1 dB gain compression point output by comparison with the standard value is then made (step S148). Thereafter, the RF power is turned off, the DC biases are turned off and the inspection process ends (step S149).
When one hundred percent inspection of chip patterns formed on a wafer is executed, there is a need to select the chip pattern at a particular address and to bring the probe head into contact with the selected chip pattern. In a case where identical ship patters are orderly laid out on a wafer as in the conventional art, there is a possibility of a chip pattern at an address different from the target address being probed. Even when the chip pattern at the target address is probed, there is a problem that contact failure may occur due to variation in thickness or warp of the wafer.
On a large-diameter wafer, an X-Y coordinate angle error θ becomes larger at a position closer to a wafer end. Therefore the conventional on-wafer one hundred percent inspection method entails a possibility of contact failure due to error θ at a wafer peripheral portion even if there is no problem with contact at a particular initial position (ordinarily a position at a wafer center). Thus, there is a problem that losses of time and hardware may occur.
The conventional method of one hundred percent inspection of high-frequency characteristics with respect to temperature requires preparation of different map files with respect to measurement temperatures, and has a problem that there is a need to newly prepare a map file in a case where a measurement is tried at an unforeseen temperature.
The conventional RF energization inspection method enables monitoring of only RF output power from a device to be measured with respect to RF input power to one point and therefore has a problem that variations in characteristics in a plurality of power level regions such as a linear region and a non-linear region cannot be detected.
The conventional gain compression point output inspection method requires execution of measurement of input power Pin at least at 10 points and therefore has a problem that a considerably long time (one minute or longer) is required for inspection of one chip.