The invention relates generally to semiconductor device fabrication and, in particular, to methods for fabricating an on-chip capacitor characterized by a tunable variable capacitance, as well as to methods of tuning an on-chip capacitor and design structures for an on-chip capacitor.
Capacitors are on-chip passive devices commonly employed in many types of monolithic integrated circuits designed to operate at high frequencies, such as those found in wireless communication devices. In particular, on-chip capacitors are found in radiofrequency integrated circuits (RFICs), which have applications such as Phase-Locked Loop (PLL) transmitters, voltage controlled oscillators (VCOs), impedance matching networks, filters, etc. The integration of on-chip capacitors may be accomplished by introducing these passive devices into one or more of the metallization levels of the back-end-of-line (BEOL) wiring structure. The BEOL wiring structure is used to electrically interconnect the active devices, such as field effect transistors (FETs), of the integrated circuit during front-end-of-line (FEOL) processing. A popular method of forming a BEOL wiring structure is a dual damascene process in which vias and trenches are formed in a dielectric layer and then filled with metal in a single process step.
A significant problem with conventional BEOL on-chip capacitors is an inability to tune the capacitance during actual circuit operation. This problem is especially acute for on-chip capacitors found in oscillators, which have a natural resonance frequency that is highly dependent on the capacitance. Manufacturing tolerances may cause significant variations in the capacitance of different capacitors on a chip, significant variations in the capacitance among nominally equivalent capacitors on different chips fabricated on a single wafer, and significant variations in the capacitance for nominally equivalent capacitors fabricated on different wafers. These capacitance variations among on-chip capacitors that have been designed to have a nominally identical capacitance can limit the reproducibility of the resonance frequency.
On-chip capacitors with the ability to actively adjust capacitance may be fabricated by FEOL processes. These on-chip capacitors rely on the capacitance of a p-n junction or the gate capacitance of an FET. However, FEOL on-chip capacitors require extra masks for manufacturing and, therefore, are costly. Because FEOL on-chip capacitors are entirely embedded within the semiconductor substrate, FEOL on-chip capacitors are also more susceptible to substrate noise, in comparison with capacitors sited in the BEOL wiring.
In summary, improved methods for fabricating an on-chip capacitor, as well as improved methods of tuning an on-chip capacitor, are needed that overcome these and other deficiencies of conventional device fabrication methods for on-chip capacitors and design structures for an on-chip capacitor.