A command signal intended to induce a large step change in the speed of a variable-speed motor drive typically causes the generated current command from a PI speed controller to exceed the prescribed maximum value, which is limited by the converter protection, the magnetic saturation, and the motor overheating. Thus, a saturator is usually applied, which introduces non-linearity into the system. This phenomenon is referred to as integrator windup. The phenomenon can result in a reduction in performance owing to the fact that the parameters of the PI speed controller are normally designed to operate in a linear region without regard to the nonlinearity that typically results from saturation.
A number of anti-windup techniques have been proposed in an attempt to overcome the windup phenomenon. One drawback of these conventional methods, however, is the complexity of the hardware implementation. Solutions for motor driver controllers implemented in circuits such as Field Programmable Gate Arrays (FPGAs) offer advantages in terms of price, execution speed, and flexibility. FPGAs, moreover, can perform rapid close-loop tasks without interfering with other tasks. Nonetheless, FPGAs are encumbered by relatively poor calculation capabilities and the relatively low number of available logic gates. Accordingly, there is a need for devices and techniques that more efficiently and effectively implement PI controllers, especially those utilizing FPGAs.