1. Field of the Invention
The present invention relates generally to the field of clock circuits for a processor-based system, and more particularly, to a novel switching circuit for dynamically providing glitch-free switching between a plurality of asynchronous clocks.
2. Discussion of the Prior Art
In a processor-based device with internally generated clocks, the need exists for the ability to switch between multiple clock sources that are asynchronous to each other. This switch must be done in a minimum of time and guaranteeing that there are no spurious clock glitches or too small of a clock pulse width in either the on or off state. The switch must also guarantee that metastability problems are minimized.
No single prior art switching device meets all this criteria. For instance, known prior art clock switching devices such as described in U.S. Pat. Nos. 5,155,380 and 5,315,181 provide for synchronous glitch-free clock switching, however, only provide switching among two clock sources.
U.S. Pat. No. 5,231,636 describes a method of glitch less switching among a plurality of clock sources and implements edge detection, multiplexor (MUX), and synchronization circuitry to provide for glitch less switching. As described in U.S. Pat. No. 5,231,636, the MUX requires a number of select inputs with a number of active input lines commensurate with the number of switching sources. Furthermore, the clock switching device in U.S. Pat. No. 5,231,636 provides at least three latches flip-flops at the output which results in decreased switch response time. Moreover, metastability problems may still exist in such a prior art configuration.
It would be highly desirable to provide a clock switching system that is able to provide glitch less switching from among a plurality of asynchronous clock sources in response to a single switching signal.
It would additionally be highly desirable to provide a clock switching system that utilizes minimal logic circuitry to provide glitch less clock switching among multiple asynchronous clock sources of different frequency clocks and, consequently, results in minimal power consumption.