1. Field of the Invention
The present invention relates to a capacitor of a semiconductor device, and more particularly, to a capacitor capable of preventing a bridge from being produced between adjacent storage electrodes, and a method for forming the capacitor.
2. Description of the Prior Art
According to rapid increase in demand of semiconductor memory devices, various techniques have been proposed to form a capacitor having high capacitance. The capacitor is a structure in which a dielectric film is interposed between a storage electrode and a plate electrode. The capacitance of the capacitor is in proportion to a surface area of electrodes and a dielectric constant of a dielectric substance, but is in inverse proportion to an interval between electrodes.
Accordingly, in order to increase the capacitance of the capacitor, use of a dielectric film having a high dielectric constant and enlarged surface area of the electrode are demanded, and a shortened distance between the electrodes is also demanded. Since it is limited to shorten the distance between the electrodes (i.e., a thickness of the dielectric film), studies in forming the high-capacitance capacitor are mainly focused on a method of utilizing a dielectric film having a high dielectric constant or enlarging a surface area of an electrode. In particular, various methods of maximizing a surface area of the electrode have been going on in terms of structure.
A cylinder-type capacitor is in the spotlight as a structure to maximize the surface area of the electrode at present. The reason is because the cylinder-type capacitor may use an inner surface area and an outer surface area as the surface area of the electrode. As a result, the cylinder-type capacitor can obtain large capacitance in the same width, as compared with an existing concave-type capacitor. Also, a process of forming the cylinder-type capacitor is more easily performed.
According to a conventional method for forming the cylinder-type storage electrode, after a concave-type storage electrode is formed, a mold oxide film between electrodes is removed by wet etching (so-called ‘dip-out’ etching).
In spite of a reduced area of a cell, storage cell capacitance required for operation of a memory device should be maintained above 25 fF/cell for soft error prevention and refresh time constraint. Accordingly, in the cylinder-type capacitor, a height of the storage electrode is continuously increased to secure higher storage cell capacitance in the same surface area.
When forming the cylinder-type capacitor, the height of the storage electrode is increased and the interval between the adjacent storage electrodes is shortened, according to reduction of a design rule. In spite of optimization of the dip-out process, a bridge is produced between the storage electrodes by the results of dip-out process.
FIG. 1 shows the state in which a bridge is produced between storage electrodes after performing a dip-out process, in the case of forming a conventional TiN storage electrode in 100 nm design rule. It would be understood from FIG. 1 that a lot of bridges were produced between the TiN storage electrodes. It is expected that the bridge is more excessively produced between the adjacent storage electrodes in 70 nm design rule.
Finally, in order to properly cope with the reduction of the design rule at forming cylinder-type capacitor, it is very important to prevent the production of the bridge between the adjacent storage electrodes during the dip-out process.