The present invention relates to a display driver, a display system that drives a display panel using a display driver, and a microcomputer that controls a display driver, and in particular, to a technique that is effectively applied to a liquid crystal display driver that is effective for the driving of a so-called “low leakage” liquid crystal display panel having a low leakage characteristic for the display charge, for example.
In order to increase the battery life in a portable information terminal, power reduction across the entire system is important. For this reason, a low leakage liquid crystal display panel has been developed. In the case of a still image, even if the low leakage liquid crystal display panel is not refreshed in each frame as conventionally known, it is possible to hold the display charge on the low leakage liquid crystal display panel side.
If a liquid crystal display driver used to drive the liquid crystal display panel includes a frame buffer that is a random access memory (RAM), a host processor holds static display data of one frame in the frame buffer. Therefore, even if the supply of still image data is stopped thereafter, the liquid crystal display driver can continue to supply a display signal to the liquid crystal display panel by repeatedly reading the still image data from the frame buffer memory. Accordingly, when driving the low leakage liquid crystal display panel, the liquid crystal display driver does not need to read the still image data from the frame buffer memory for each display frame. As a result, less power consumption is realized.
On the other hand, a liquid crystal display driver corresponding to a video mode in which no frame buffer memory is provided operates on the assumption that the transmission of display data of a still image is always received similar to a moving image. This is because there is no buffer function of display data. When attention is paid to the display of still image data, display data is transmitted regardless of panel refreshing, and the panel refreshing is performed in each frame by the transmitted display data. Under such circumstances, in order to reduce the number of times the panel is refreshed when displaying a still image on the low leakage liquid crystal display panel, a number of techniques may be utilized. For example, by performing a checksum for input display data in units of a frame, it may be determined on the liquid crystal display driver side whether or not the display data is a still image according to whether or not there has been an image change between front and rear display frames. When it is determined that the display data is a still image, it is preferable to increase the panel refresh interval according to the characteristics of the low leakage liquid crystal display panel.
An additional technique disclosed in WO 2012/137761 A1. WO 2012/137761 A1 abstractly describes that a scan period, for which a driving signal is supplied to a signal electrode based on a synchronization signal or a clock signal supplied from the outside, and a non-scan period, for which no driving signal is supplied to a signal electrode of a pixel, are generated by a timing controller, but does not provide a teaching of how to enable such a system. In short, WO 2012/137761 A1 just simply describes using a clock or a synchronization signal from the host side for the control of a panel refresh period and an idle driving period.
However, even when using the checksum described above, if the host processor continues the transmission of display data for each frame, useless power consumption occurs on the host processor side. Since such a checksum is performed in units of a frame, an identification frame of one frame is required at the time of switching from the still image to the moving image and at the time of switching from the idle driving to the normal operation. When performing a checksum using the identification frame, the display operation is stopped. Accordingly, the display data of one frame at the time of switching is unnecessary data that is only used for a comparison, and this increases the amount of data.
Even when a timing controller is used, a host processor that controls the transmission and reception of display data is always in the transmission operation state. Accordingly, low power consumption on the host processor side is not realized.