Conventional level shifters have been found to be a major source of jitter in IO cells. Conventional level shifters are triggered by a core voltage pull down device. As process technologies scale down, core voltages are also scaling down. However, threshold voltages of core devices do not have a similar factor for scaling down. Pull down capability of conventional level shifters is limited at lower core voltages used in newer process technologies, particularly in the presence of noise.
It would be desirable to implement jitter reduction in a high speed low core voltage level shifter when noise is present on the core supply voltage.