This invention relates generally to packaging integrated circuits.
A folded stacked chip-scale package is a package that may include a number of semiconductor integrated circuits. The dice may be separated by an epoxy layer and may be coupled to a printed circuit board through solder balls, as one example.
Therefore, heat conduction from the stacked integrated circuits is essentially by way of the molded epoxy layer. While these packages have been effective, it would be desirable to increase the heat dissipation of these packages. This is particularly so in view of the amount of heat that may be built up within the package due to the presence of multiple integrated circuit dice.