A metal insulator semiconductor (MIS) transistor having a high breakdown voltage is widely available to various types of electronic equipment which needs a relatively high voltage, such as a transmission module included in a mobile terminal for wireless communications.
Various structures have been suggested so that an MIS transistor has a higher breakdown voltage. For example, in one suggested structure, a low-concentration impurity region and a high-concentration impurity region are formed both on the source side and on the drain side across the gate electrode, and the high-concentration impurity region of the drain side is placed with a predetermined offset from the gate electrode (For example, see Japanese Laid-open Patent Publications No. 2005-093458 and No. 08-064689). In another suggested structure, a high-concentration impurity region is formed on the drain side both in a drain-end portion closer to the gate electrode and in a portion placed with a predetermined offset from the drain-end portion (for example, see Japanese Laid-open Patent Publication No. 2005-093458). In these structures, a silicide layer is formed on the surface of the high-concentration impurity region, except the low-concentration impurity region of the offset. Alternatively, a silicide layer is formed continuously on both surfaces of the high-concentration impurity region and the low-concentration impurity region.
Another suggestion has been made for the transistor structure in which an extended drain is formed such as a drain extended metal oxide semiconductor (DEMOS) (for example, see Japanese Laid-open Patent Publication No. 2006-216947).
In an MIS transistor, in the case where a drain-sided high-concentration impurity region is formed with an offset from the gate electrode, the drain breakdown voltage becomes higher, but the on-resistance between the source and the drain increases. In the case where a high-concentration impurity region is formed also in a drain-end portion closer to the gate electrode in order to reduce the on-resistance, the drain breakdown voltage is likely to be insufficient, depending on the gate insulating film thickness and the operating conditions of the MIS transistor.
Such conventional high-breakdown-voltage MIS transistors have been disadvantageous in that the on-resistance increases in exchange for higher breakdown voltage, and that the drain breakdown voltage is insufficient in exchange for the reduction in the on-resistance.
Furthermore, in these MIS transistors, a silicide layer is preferably formed on the gate electrode and the source and drain impurity regions so that their contact resistances with plugs are reduced. However, the favorable frequency characteristics and on-resistance thereof are not obtained, depending on areas where the silicide layer is formed in each MIS transistor.