High speed PiN diodes are built in a vertical configuration. In such a configuration, the high speed PiN diodes need a dedicated epi Si process for the i-layer, which sets up the breakdown voltage of the diodes. However, different breakdown voltages would need different epi Si thickness, making it very difficult to integrate PiN diode of various breakdown voltages on the same chip. In addition, vertical PiN diodes have high N to substrate capacitance, which ultimately limits its speed.
Schottky barrier diodes (SBD) are another type of high speed diode used in mm wave high speed-Si technologies. These types of diodes need a p-guard ring to reduce leakage current. These p-guard rings, though, increase parasitic capacitance of the diodes, limiting the speed. Accordingly, there are a number of issues related to both high speed PiN diodes and SBDs, e.g., limited number of breakdown voltages with standard formation of PIN diode; and high SBD p+ guard ring−n capacitance.