Emissive display technologies, including displays based on cathode-ray tubes (CRTs) and plasma excitation of phosphors have become very popular within many applications since these technologies natively have superior performance characteristics over reflective or transmissive display technologies, such as displays produced using liquid crystals (LCDs). Among the superior characteristics of these displays is higher dynamic range, wider viewing angle, and, often, lower power consumption. The power consumption of emissive display technologies, however, is directly dependent upon the signal that is input to the display device since the typical emissive display will require almost no power to produce a black image but a significantly higher power to produce a highly luminous white image. More recently, organic light emitting diodes (OLEDs) have been discussed for use in displays and other light emitting devices. Like CRTs and plasma displays, devices constructed based on OLEDs are emissive and have the characteristic that power consumption is dependent upon the input signal.
It is known to control the power of an emissive display by controlling the input signal to the display. For example, U.S. Pat. No. 6,380,943 entitled “Color Display Apparatus”, US 2001/0035850 entitled “Image reproducing method, image display apparatus and picture signal compensation device”, US 2003/0085905 entitled “Control apparatus and method for image display”, US 2001/0000217 entitled “Display Apparatus”, US 2003/0122494 entitled “Driving Device for Plasma Display Panel” all discuss methods for controlling the power of an emissive display, generally plasma displays, wherein the power is estimated for each field or frame of an image signal and the data signal is scaled as a function of some estimate of the average field or frame power to control the overall power of the emissive display. The primary goals of the methods described within these disclosures are to reduce the peak power requirements of the display devices and/or to control the heat that is generated within these display devices. However, these disclosures do not address the fact that active matrix electro-luminescent (EL) displays, such as OLED displays, use a driving arrangement that is significantly different in structure than is applied in plasma displays and therefore require a different approach to power reduction to avoid imaging artifacts while reducing the power of the display device.
In a typical active matrix EL display, row drivers sequentially provide a select voltage to rows of select lines while column drivers provide a voltage to vertical rows of data lines. A pixel driving circuit is formed at each intersection of these select and data lines, typically comprising a select TFT, a capacitor, and a power TFT. This pixel driving circuit then regulates the current provided to each EL light-emitting element within the display device based upon a separate data voltage signal that is provided on the data lines. The circuit generally also consists of a pair of power lines, comprising a supply power line and a return power line. By controlling the voltage between the gate and source of a power TFT within the pixel driving circuit, the pixel driving circuit modulates the current that flows from the supply power line through the OLED, producing light, and back to the return power line.
Unfortunately, the current supplied to the EL light-emitting element by this pixel driving circuit is dependent upon the voltage between the pair of power lines. Ideally, the voltage supplied by the power lines is constant for each pixel driving circuit. However, current is typically provided to a large number of EL light-emitting elements by a single pair of power lines and because the power lines have a finite resistance, an unintended voltage differential is produced that is proportional to the current that is conducted through each power line and the resistance of each power line. Since the unintended voltage differential is positively correlated with current and resistance, the loss of voltage along the power lines will be larger when the lines carry high currents or when the lines have a high resistance. This results in an unintended variation in the voltage supplied to each pixel driving circuit along the power lines, and subsequent variation in both the current supplied to and therefore the luminance provided by each EL light-emitting element that is connected in series by the power lines. The phenomenon that produces this unintended voltage differential is commonly referred to as “IR drop”. Further, because the resistance of the power lines increases with length, this IR drop will result in the gradual loss of luminance for OLEDs along the power lines as the distance from the power source increases. This loss of luminance has the potential to create undesirable imaging artifacts. Therefore, there is a need to avoid these artifacts. A common method to avoid these artifacts in active matrix displays is to orient the data and power lines vertically on the display substrate as this dimension of the display is typically shorter than the width of the display and therefore the power lines provide current to fewer OLEDs than if the power lines were oriented horizontally. Additionally, these power lines are often connected to a power source at both ends to further reduce the IR drop across their length.
The types of and degree of these artifacts vary based upon the overall display structure and drive characteristics that are employed. For example, EL displays formed from OLEDs are commonly constructed on large substrates of amorphous silicon using what is termed a non-inverted structure (i.e., a structure in which the anode is formed on the substrate as opposed to on top of the OLED). In this structure, the active matrix circuit controls the gate-to-source voltage on a power TFT within the OLED structure and this gate-to-source voltage, which is the voltage provided to drive the OLED, is determined by computing the data voltage minus the voltage of the power line minus the voltage across the OLED. In this configuration, because the OLED voltage is often larger than the data voltage, the presence of the OLED voltage in this equation helps to reduce the effect of drops in power line voltage upon the gate-to-source voltage. Unfortunately, the voltage that is provided to the OLED cannot be directly computed but requires an iterative set of calculations to provide an adequate estimate of this entity and therefore it can be difficult to compensate for losses in power line voltage due to IR drop. In another example, OLEDs may also be formed in an inverted structure having the cathode formed on the substrate and allowing the amorphous silicon substrate to drive electrons into the OLED. In this configuration, the gate-to-source voltage is dependent upon only the data voltage and the voltage across the power lines. While the voltage to the OLED may be computed using a single equation in this configuration, a smaller change in power line voltage will have a much larger effect on the gate-to-source voltage than the same change in the voltage across the power lines for a non-inverted OLED configuration as the data voltage will often be significantly smaller than the voltage across the power lines. For this reason, the construction of inverted OLEDs on amorphous silicon is generally avoided as image artifacts commonly occur due to IR loss along the power line.
One method to reduce the artifacts due to IR drop is to reduce the resistance of the power lines as suggested in US 2004/0004444 entitled “Light emitting panel and light emitting apparatus having the same”. Resistance can be reduced by using more conductive materials or by increasing the cross-sectional area of the power lines. In some cases, a highly conductive plane of material can be used in place of one or more individual power lines to reduce the resistance, but this depends on the structure of the device, and it is not always possible to find materials with sufficient properties and/or methods to produce this plane of material. Similarly, the materials that are available to reduce resistance and the cross-sectional area of individual power lines are often fixed by the manufacturing technology that is available, so it is often not cost effective to reduce the resistance of the power lines. Finally, in larger displays, the power lines are typically longer and there are a larger number of EL light-emitting elements connected to each set of lines. The power lines therefore tend to have higher resistance and tend to carry higher currents than those on smaller displays. This often limits the size or luminance of displays that can be produced using EL technology.
It has been suggested that automatic brightness limits can be imposed on OLED displays to limit their power. U.S. Pat. No. 6,690,117 entitled “Display device having driven-by-current type emissive element” discusses a resistor that is placed between the power source and the power lines of an OLED display device. A current dependent voltage drop then takes place across this resistor, reducing the voltage when high currents are present (i.e., when the display has a high relative luminance). This results in a lower data voltage at every OLED in the display and therefore reduces the current that is required at each OLED at the cost of lower luminance. The voltage drop across this resistor can also be sensed and the contrast of the input signal can be modified, dependent upon the voltage drop. While this technique does reduce the peak currents that must be delivered and therefore limits the voltage drop that can occur across the power lines due to IR drop, this technique does not allow a predictable response at each OLED. In fact, it can actually result in additional undesirable artifacts as some TFTs in the panel may be driven at a voltage level below their saturation region, resulting in a further reduction in luminance, and more variability, in the current conducted through the OLEDs for a given data voltage. For this reason, the technique taught, while controlling the power of an active matrix OLED display, does not necessarily reduce the artifacts that occur as a result of IR drop to an acceptable level.
US20050062696 entitled “Display apparatus and method of a display device for automatically adjusting the optimum brightness under limited power consumption” provides a function similar to U.S. Pat. No. 6,690,117 as a resistor is attached to the cathode which also results in reducing the voltage drop across an OLED in the presence of high currents. This disclosure does not, however, recognize or propose a solution to the problem that IR drop can be different for different power lines and that different luminance levels may result between light emitting elements driven by neighboring power lines when high current loads are present.
Digital implementations of similar processes are used to automatically reduce the brightness level of a display under conditions of high power. For instance, U.S. Pat. No. 6,380,943 entitled “Color Display Apparatus” discusses a method for controlling the power consumed wherein this method includes a method for estimating the power consumed by a RGB display, which might include a “light emission diode apparatus”. Within the power estimation method, the power consumed by each color channel is calculated individually using different gains and the resulting values are summed to compute the total power. Generally, the method for controlling the power is applied to the entire field or frame of data. This disclosure does recognize that it may be desirable to update a portion of a display device at a time to reduce memory requirements and therefore power may be computed for a sub-region within the display at a time. However, the described methods can still result in objectionable artifact levels as this disclosure does not recognize or propose a solution to the problem that IR drop can be different for different power lines and that different luminance levels may result between light emitting elements driven by neighboring power lines when high current loads are present. Further, this approach requires that the computation be performed for large portions of, if not the entire, image frame before applying compensation. To perform such a calculation before displaying the resulting image, it is necessary to buffer an entire image in memory, which requires enough memory to store an entire frame of data, significantly increasing the cost of the overall display system. Additionally in displays that are used in applications that require immediacy, the use of a frame buffer can noticeably and unacceptably delay the presentation of visual information. For instance when such a displays is connected to a gaming system, a user can notice the delay of one frame when making a control movement that is expected to immediately impact the video image that is presented.
Copending, commonly assigned U.S. Ser. No. 11/316,443 filed Dec. 22, 2005 describes an electroluminescent display system comprising a display driver for receiving an input image signal and generating a converted image signal for driving the light emitting elements in the display, wherein the display driver analyzes an input image signal for a complete image to be displayed to estimate the current that would result at, at least, one point along at least one power line providing current to each of a plurality of regions, and generates a converted image signal as a function of the input image signal and the estimated currents. Similarly as for the automatic brightness level controlling references discussed above, the specific examples disclosed require that conversion computations be performed for the entire image frame before applying compensation.
U.S. Pat. No. 7,009,627 entitled “Display apparatus and image signal processing apparatus and drive control apparatus for the same” describes a passive matrix EL display in which the row electrodes are scanned and a modulation signal is provided to the column electrodes, wherein the signal that is provided is created by analyzing the input image to calculate both a coefficient to adjust the luminance of the entire image and a compensation for the fluctuation of display luminance due to voltage drop across the row electrodes. As with the earlier disclosures, the calculation of the coefficient to adjust the luminance of the image requires that the content of the entire image be available for analysis before it is displayed. Therefore, the implementation of this approach would require a buffer to store the entire frame of data. Further, since this disclosure provides only a method of compensating for IR drop in passive matrix devices it does not discuss the effect of active drive circuitry or associated drive electronics on the relevant artifact avoidance methods and especially does not discuss such methods that consider the interaction of OLED architecture with active matrix backplanes.
There is a need, therefore, for a method to reduce apparent artifacts in active matrix electro-luminescent (EL) displays, such as OLED displays, that can result when high current levels are required along power lines with a finite resistance to enable the manufacture of larger and/or brighter displays with reduced visual artifacts in a way that does not require substantial increases in display system cost, such as may occur through the addition of frame memory buffers or without requiring a substantial delay in image presentation. Further, the implementation of such a method should be applicable or tunable to active matrix EL displays employing different EL architectures.