The present invention relates to a semiconductor device, in particular, to the technology which is effective when applied to a semiconductor device that is used as a driver for LCD (Liquid Crystal Display).
Japanese Patent Laid-Open No. 2006-210607 describes the technique capable of reducing the chip size. Specifically, buffers are arranged collectively in regions distant from pads, respectively. The regions are the main region except for the regions where the central processing unit, the nonvolatile memory, and the volatile memory are formed. The buffers that require a large area are not provided in the pad peripheral part, and therefore, it is possible to reduce the interval between the pads and the distance between the pad and the internal circuit (for example, the central processing unit). Due to this, the chip size can be reduced.
Japanese Patent Laid-Open No. 2007-103848 describes the technique capable of reducing the size of a semiconductor chip. Specifically, first the pad and the wiring other than the pad are provided over the insulating film. Over the insulating film including over the pad and the wiring, the surface protection film is formed and the opening is provided in the surface protection film. The opening is formed over the pad and the surface of the pad is exposed. Over the surface protection film including the opening, the bump electrode is formed. Here, the pad is configured to have the size sufficiently smaller than that of the bump electrode. Due to this, the wiring is disposed immediately under the bump electrode and in the same layer as that of the pad. That is, the wiring is disposed in the space under the bump electrode formed by reducing the size of the pad.