The invention is generally directed to a non-volatile memory circuit in an integrated circuit for an electronic watch and in particular to an integrated circuit for an electronic watch wherein an EPROM (Erasable Programmable ROM) or EEPROM (Electrically Erasable Programmable ROM) are formed on the same chip as a watch circuit. The circuit allows data to be written into the ROM and to be erased when desired.
It is known to utilize FAMOS (Floating-gate Avalanche Injection MOS) devices in an integrated circuit for an electronic watch to create an EPROM which can be written into. Reference is made to FIG. 1 wherein a circuit, generally indicated as 100, in accordance with the prior art is depicted. Circuit 100 utilizes FAMOS devices which are assembled in an integrated circuit also used for an electronic watch. Circuit 100 has transistors 101 and 102 with the gate electrodes coupled to terminals A and B, respectively, which are present to one of two levels. The terminals are preset to either V.sub.DD =high of to V.sub.SS =low. Transistors 101 and 102 act as switches for the FAMOS devices 103 and 104 which are connected in series with source-drain paths of transistors 101 and 102. When a high negative voltage is applied to terminal V.sub.PP, transistors 101 and 102 are preset to the "low" value and electrons are injected into the FAMOS devices. As the above-injected electrons in the FAMOS devices are maintained semi permanently, the FAMOS devices act as a semiconductor memory which is non-volatile and which allows data to be written electrically.
However, an actual embodiment of the circuit shown in FIG. 1 as part of an integrated circuit for an electronic watch has several real world problems. Often, electrons are injected into the FAMOS devices by mistake as a result of noise or static electricity from outside of the circuit, such as from the static electricity on a wearer's wrist. This results because the drain of one of the FAMOS is connected to the drain of the other FAMOS and the commonly connected drains are connected to a pad which is used as a high voltage applied terminal for writing V.sub.PP. Accordingly, there is a need to provide a circuit for writing data in and erasing data from a non-volatile memory when a high voltage is applied but which limits the voltage and current when noise from the outside of the circuit, such as static electricity is introduced.