1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device. More particularly, the present invention relates to a method of manufacturing a semiconductor device having a transistor including a channel region in which crystals are distorted.
2. Description of the Related Art
One of methods for improving a carrier mobility of a Field Effect Transistor (FET) includes a method for applying a predetermined stress to a channel region of the FET to give a distortion to crystals in the channel region. For example, the following method is proposed. That is, a film (stress film) having a tensile stress or compressive stress as an internal stress is formed on a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) and a predetermined stress is applied to the channel region from the stress film (see, e.g., Japanese Unexamined Patent Publication No. 2005-057301).
A tensile stress applied to a channel region is effective in improving an electron mobility and a compressive stress applied to a channel region is effective in improving a hole mobility, respectively. In a case of a complimentary MOS (CMOS) structure having an n-channel MOSFET (n-MOSFET) and a p-channel MOSFET (p-MOSFET), the following stress films are formed. On the n-MOSFET, a tensile stress film for applying a tensile stress to a channel region of the transistor is formed. On the p-MOSFET, a compressive stress film for applying a compressive stress to a channel region of the transistor is formed.
As such a stress film, a silicon nitride (SiN (including one having an element other than Si and N as the composition)) film is widely used currently.
When forming an SiN stress film on a MOSFET, a method for forming a predetermined stress film over the whole surface and then patterning by etching the formed film to leave the film only on the MOSFET is generally employed.
For example, the following process is performed in a case of the CMOS structure. First, a tensile stress film is formed over the whole surface including an n-MOSFET and a p-MOSFET. Then, the tensile stress film formed on the p-MOSFET is removed by etching so as to be left only on the n-MOSFET.
Also for the p-MOSFET side, the same process is performed. First, a compressive stress film is formed over the whole surface after forming the tensile stress film on the n-MOSFET. Then, the compressive stress film formed on the n-MOSFET side is removed by etching so as to be left only on the p-MOSFET.
Through the above-described process, the following CMOS structure is obtained. That is, the tensile stress film is formed on the n-MOSFET and the compressive stress film is formed on the p-MOSFET. In other words, the tensile stress film and the compressive stress film are split and stuck on the n-MOSFET and the p-MOSFET, respectively. In addition, there may be employed a method for firstly forming the compressive stress film and then forming the tensile stress film. Also in this case, there can be obtained the CMOS structure in which the tensile stress film and the compressive stress film are thus split and stuck through the same sequence.
Recently, there is used a method for irradiating Ultraviolet (UV) to a stress film and modifying the stress film properties to thereby control a stress of the film. When being irradiated with UV, the tensile stress film increases in tensile stress. Further, the tensile stress film irradiated with UV is liable to cure.
In a case where such UV irradiation to the tensile stress film is applied to the above-described splitting and sticking process in the CMOS structure, when the tensile stress film is formed over the whole surface and UV irradiation is subsequently performed to the tensile stress film, the following conditions may occur. That is, the tensile stress larger than that before the UV irradiation can be obtained. On the other hand, however, the tensile stress film is cured by the UV irradiation and therefore, subsequent etching (removal from the p-MOSFET side of the tensile stress film after the UV irradiation) becomes difficult.
More specifically, after UV irradiation to the tensile stress film, high-accurate etching cannot be performed under conventional etching conditions (in the case of performing no UV irradiation). Further, when the etching conditions are made more severe, over-etching to a foundation layer is more likely to occur.
Such an etching problem which occurs in the UV-irradiated tensile stress film may similarly occur in the following case. That is a case where not only in the above-described splitting and sticking process of the CMOS structure but also in a forming process of a device having the n-MOSFET, the UV-irradiated tensile stress film is selectively removed by etching.
Further, the same problem may also occur in the following case. That is a case where regardless of the tensile stress film or the compressive stress film, UV irradiation is performed to the stress film for the purpose of modification of the film and then the film is selectively removed by etching.
Thus, in the case of using the UV-irradiated stress film, when the traditional method is used, securement of high reliability as well as speeding up of transistors by the stress film is difficult.