FIG. 3(a) is a plan view illustrating a semiconductor wafer in which a plurality of ICs are formed in chequerboard pattern, and FIG. 3(b) is a cross section of a portion of FIG. 3(a). A surface protection film 11 is disposed on each chip region 10 containing an IC. Regions 12 where the surface protection films 11 are absent are dicing lines.
FIG. 4 illustrates a semiconductor wafer used in production of high output semiconductor devices. In FIG. 4, the wafer 1 is as thin as 20.about.30 microns and a plated heat sink (hereinafter referred to as PHS) 20 comprising Au or the like and having a thickness of 40.about.60 microns is disposed on the rear surface of the wafer 1 to improve heat radiation of the device. In production of usual devices, the PHS 20 is present except for regions opposite to the dicing lines 12. In case of high powered output devices, however, since the wafer is thin for the reason described above, the PHS 20 covers all the rear surface of the wafer 1 to prevent ICs contained in the wafer from being damaged by warping of the wafer which is caused by a difference in expansion coefficients between the wafer and the PHS.
A method for dividing the semiconductor wafer of FIG. 4 into chips by dicing is illustrated in FIGS. 5(a)-5(c).
Initially, as illustrated in FIG. 5(a), a dicing tape 40 is attached to the rear surface of the PHS 20. Then, as illustrated in FIG. 5(b), a dicing saw 30 cuts the wafer 1 along the dicing line 12. The dicing is carried out along all dicing lines 12 until the tip of the dicing saw 30 reaches into the dicing tape 40, whereby the wafer 1 is divided into chips as shown in FIG. 5(c). At this time, a burr 21 20.about.30 microns long is produced on the rear surface of the chip due to the ductility of the PHS 20.
After removing the dicing tape 40, each chip is bonded to a mount substrate 50 with solder 60 as shown in FIG. 6. Since the burr 21 protrudes from the rear surface of the chip, the solder 60 is not favorably adhered to the entire surface of the PHS 20, resulting in a faulty assembly.