Spin electronics combine semiconductor technology and magnetics, and is a more recent development in memory devices, e.g., MRAM devices. In spin electronics, the spin of an electron, rather than the charge, is used to indicate the presence of digital information. The digital information or data, represented as a “0” or “1”, is storable in the alignment of magnetic moments within a magnetic element. The resistance of the magnetic element depends on the moment's alignment or orientation. The stored state is read from the element by detecting the component's resistive state.
The magnetic element, in general, includes a pinned layer and a free layer, each having a magnetization orientation. The magnetization orientations of the free layer and the pinned layer, define the resistance of the overall magnetic element. When the magnetization orientations of the free layer and pinned layer are parallel, the resistance of the element is low. When the magnetization orientations of the free layer and the pinned layer are antiparallel, the resistance of the element is high. In order to sense the resistance of the magnetic element, current is driven through the magnetic element, either as current in plane (“CIP”) or current perpendicular to the plane (“CPP”).
A typically memory array is formed from a plurality of memory cells, each which has a magnetic memory element and a select device such as transistor. In order to write to a conventional memory cell, a write current is applied to a bit line while a read current is not applied. In addition, a write line carries a current to write to the selected memory cell. The combination of the current in the write line and the current in the bit line generates a magnetic field large enough to switch the direction or orientation of magnetization of the free layer of the magnetic element and thus write to the desired conventional memory cell. Depending upon the data written to the memory cell, the element, e.g., magnetic tunneling junction, will have a high resistance or a low resistance. To read from the memory cell, a read current is applied instead and the output voltage across the cell is read.
Although the conventional magnetic memory using the conventional spin tunneling junctions can function adequately, there are barriers to the use of the conventional magnetic elements and the conventional magnetic memory at higher memory cell densities. For example, a conventional memory array is written using an external magnetic field generated by currents driven through the bit line and the write line. Thus, the magnetization orientation of the free layer is switched by the external magnetic field generated by the current driven through the bit line and the write line. The magnetic field required to switch the magnetization orientation of the free layer, known as the switching field, is inversely proportional to the width of the magnetic element. As a result, the switching field increases with smaller magnetic elements. Because the switching field is higher, the current required increases. This large current can cause various problems. For example, cross talk and power consumption increases. The driving circuits required to drive the current that generates the switching field increases in area and complexity. Additionally, the write currents have to be large enough to switch a magnetic memory cell but not so large that the neighboring cells are inadvertently switched. This upper limit on the write current can lead to writeability issues because the cells that are harder to switch than others (due to fabrication and material nonuniformity) may fail to write consistently.
What is needed are magnetic memory elements which can be used in a memory array of high density, low power consumption, low cross talk, and high reliability, while providing sufficient read signal. The present disclosure provides such improved magnetic memory elements.