1. Field of the Invention
The present invention relates to the design of memories, and more specifically to a tracking circuit enabling quick/accurate retrieval of data stored in a memory array.
2. Related Art
A memory array generally contains multiple cells, with each cell storing a data bit (typically of binary value). Memory arrays are implemented using technologies such as SRAMs (static random access memories) and DRAM (dynamic RAMs), as is well known in the relevant arts.
Access circuits are often implemented to retrieve the data bits stored in a memory array. In one prior configuration, a memory array is logically viewed as a two dimensional pattern (represented by rows and columns), and row and column decoders are implemented to select a cell of the row. The data in the selected cell is provided as an output of the memory array.
Access circuits often further contain a sense amplifier, which senses the output of a memory array as either a 0 or 1 (assuming only a binary bit is stored). The output of the sense amplifier is often latched according to a latch enable signal, and the latched value thus represents the bit accessed from the memory array. In general, the various signals generated to an access circuit and the latch enable signal need to be coordinated.
To achieve high access rates, it is generally desirable that the signals be generated as quickly/closely (in time domain) as possible. However, the electrical characteristics (such as propagation delays, rise/fall time, settling time) limit how fast the components can be operated. Accordingly, a tracking circuit is often provided to coordinate the various signals.
Tracking circuits need to be implemented taking into account several challenges. One such challenge is that the electrical characteristics often are different from one integrated circuit (die) to another, and could further vary depending on the PTV (process, temperature and voltage) considerations at the specific time of operation as is well known in the relevant arts.
Additional challenges are present when one needs to enable manufacture of ‘compiler memories’. A compiler memory is generally integrated as a part of a larger device (as opposed to being sold as a part of stand-alone memory unit such as those generally provided by vendors such as Micron), and a designer of the larger device may specify the specific configuration (array dimensions, number of total cells) with which a memory array is to be provided.
In other words, the dimensions of the memory array may not be known a priori, and the solution (tracking circuit) provided may need to operate in combination with memory arrays of different sizes and array dimensions.