1. Field of the Invention
The present invention relates to facilitating control within Industry Standard Architecture (ISA) compatible laptop computers. Specifically, the invention involves a peripheral controller which emulates the functions of conventional peripheral controllers and an interrupt controller within the peripheral controller which generates internal interrupts in response to a number of devices connected to the ISA computer. The peripheral controller enters a low power mode of operation while it awaits an interrupt from various devices, rather than actively polling these devices to determine which device or devices need service.
2. Description of the Related Art
Conventional ISA (i.e. IBM-AT) compatible computers utilize an integrated circuit (IC) intelligent peripheral microcontroller to perform various control functions between a master processor (the host--the master central processing unit and supporting resources) and various peripheral devices. Typical I/O functions performed by the peripheral microcontroller involve scanning a keyboard and providing an interface between peripheral devices and the host. The microcontroller interfaces these peripheral devices with the standard ISA data and control busses. The microcontroller provides registers which enable it to function as one peripheral device to the master processor. The microcontroller performs the basic I/0 functions for other peripheral devices so the host does not have to use processor time to perform these functions. The host only communicates with the peripheral microcontroller which performs the processing necessary to support the other peripheral devices.
The INTEL 8042 and 8742 integrated circuits are common peripheral microcontrollers for the ISA compatible computer architecture. The use of the 8042 and the 8742 integrated circuits in laptop computers is undesirable because these integrated circuits utilize older technology which consumes too much power. For instance, the INTEL 8742 is a 50mA IC. Moreover, these IC's operate in a continuous active mode in which they poll a status register to determine if the host has transferred data to the peripheral controller, poll a keyboard scanner to determine if a key has been pressed on the keyboard, and poll the serial ports to determine if any devices connected to the serial ports need to transfer data.
In laptop computers which can operate on rechargeable batteries, any reduction in power consumption results in an increase in battery life (i.e. time between battery recharging). However, most presently available laptops continue to utilize the conventional peripheral microcontrollers.
It is therefore desirable to provide a controller for use in laptop computers which consumes substantially less power than the conventional peripheral microcontrollers.
Newer technologies, such as CMOS (complementary metal oxide semiconductor) exist which allow design of application specific integrated circuits (ASIC) which consume less power than the conventional peripheral microcontroller. Simply implementing the conventional controller with CMOS technology would decrease power consumption. However, the inefficient active scanning of conventional peripheral controllers would continue to consume more power than is desirable because CMOS circuits consume more power when active than when idle.
Under the conventional design, as explained, the peripheral controller continuously polls various devices and flags, and polls the keyboard scanner to determine if any data transfers from the keyboard are required. Power is unnecessarily consumed in this active polling process because one or more devices may be inactive for extended periods of time, during which no data transfer from the device is needed, and the polling of the inactive device is unnecessary.
A more desirable system involves only communicating with the peripheral devices or the keyboard when servicing is needed by these devices. This system includes an interrupt system which produces interrupts for the peripheral controller in response to data received from the host, to activation of the keyboard, to movement of a mouse, or to activation of other peripheral devices serviced by the peripheral controller. The core central processing unit (CPU) of the peripheral controller enters a low power idle mode, commonly carried out by executing a halt command in INTEL 8031 series microcontrollers. The microcontroller remains in the idle mode until it receives an interrupt from one of the peripheral devices, or the keyboard, that indicates the device needs to transfer data.
One of the complications with this implementation is that common microcontrollers, such as an INTEL 80C31, do not provide enough interrupts to service all the peripheral devices managed by the peripheral controller. Therefore, it is desirable to provide an interrupt controller which combines numerous interrupts to provide a single interrupt for the microcontroller core of the peripheral controller and also to provide a register which can be read by the core CPU to determine which device has caused the interrupt once the interrupt is received.
By implementing an interrupt controller, the microcontroller core remains idle in a low power mode until it receives an interrupt which activates the microcontroller. The reduction in power consumption results in extended battery life which is particularly useful in portable lap-top computers.