1. Field of the Invention
The present invention relates to a lateral DMOS transistor with a MOS diode that has semiconductor material of a first conductivity type, with a source region of a second conductivity type, and with a drain region of the second conductivity type that is separated from the MOS diode by a drift region of semiconductor material of the second conductivity type, which drift region is at least partially covered by a dielectric gate layer that also covers the semiconductor material of the MOS diode, wherein the dielectric gate layer has a first region of a first thickness and a second region of a second thickness, wherein the first region covers semiconductor material of the MOS diode and the second region is located on the drift region (MOS=metal oxide semiconductor).
In addition, the invention relates to a method for producing a lateral DMOS transistor having the steps: creation of a MOS diode having semiconductor material of a first conductivity type, a source region of a second conductivity type, and a drain region of the second conductivity type that is separated from the MOS diode by a drift region composed of semiconductor material of the second conductivity type; covering the MOS diode and at least a part of the drift region by a dielectric gate layer that has a first region of a first thickness and a second region of a second thickness, wherein the first region covers semiconductor material of the MOS diode and the second region is located on the drift region.
2. Description of the Background Art
A DMOS transistor and a corresponding method are known from U.S. Pat. No. 6,191,453.
Within the scope of the present invention, a MOS diode is understood to mean any sequence of layers having a conductive control electrode, dielectric insulating layer, and layer of semiconductor material, in which a conductive inversion layer can be produced by establishing a suitable control electrode voltage. For the sake of completeness, we shall mention that an inversion layer is understood to mean a layer in which the concentration of the minority charge carriers in the semiconductor layer becomes larger than the concentration of majority charge carriers as a result of influences of the control electrode voltage. As an alternative to the metal to which the name refers, the metal layer of the MOS diode can also be made of high-conductivity semiconductor material. Instead of the oxide to which the name refers, the oxide layer of the MOS diode can also be made of another dielectric material. This also applies to the exemplary embodiments and configurations disclosed further below.
As is known, a MOS transistor is created from a MOS diode in that the semiconductor layer of the MOS diode adjoins a drain region and a source region made of semiconductor material that has a conductivity type opposite to that of the MOS diode semiconductor layer, thus forming two oppositely polarized pn junctions with the semiconductor material of the MOS diode. In the absence of effects that are produced by control electrode voltages, a voltage that is produced externally between the source region and the drain region reverse biases one of the two pn junctions so that no drain current flows between the drain region and the source region. In contrast, upon additional application of a sufficiently high control voltage, the inversion of the charge carrier concentrations in an inversion layer adjoining the dielectric results in a conductive channel region that is not bordered by pn junctions, and thus results in a current flow between the source region and the drain region.
Prior MOS power transistors were characterized by a vertical structure in which source regions and drain regions were separated by a semiconductor layer in a direction perpendicular to the control electrode. The MOS structure described with two pn junctions was made into a DMOS structure by a double diffusion which gave it its name, wherein a first diffusion of a P well region into an N material took place, and a subsequent diffusion of an N region into the P well region took place. In this context, the gate oxide served as a mask for dopant implantations. The lateral separation between the two diffusion borders formed the surface channel region located parallel to the gate oxide for controlled creation of the inversion. The remaining material of the aforementioned semiconductor layer, located between the P well region and the drain region, formed a drift region.
Today, a DMOS transistor is no longer necessarily considered to be a MOS transistor produced by a double diffusion process, but rather any MOS transistor in which the channel region is separated from the drain region by a drift region. The drift region provides for a reduced voltage gradient between the source region and the drain region, thereby improving the dielectric strength of the MOS transistor. DMOS transistors are used as high-voltage components in which voltages, known as drain voltages, of more than 100 volts can be applied between the drain region and the source region.
To improve the electrical properties of DMOS transistors, thin gate oxides of CMOS transistors (C=complementary) are increasingly also used for DMOS driver transistors. However, the dielectric strength decreases with decreasing gate thickness, so that the DMOS transistors are more sensitive to voltage spikes.
To improve the electrical properties of MOS transistors, the aforementioned U.S. Pat. No. 6,191,453 discloses a circular structure in which the source electrode is arranged on an outer circumference and the drain electrode is arranged on an inner circumference. A dielectric gate layer has a smaller thickness in the channel region of the structure than in the area of a drift region. In this context, the portion of the gate layer that has the smaller thickness extends beyond the channel region to the drift region, so that a part of the drift region adjacent to the channel region is likewise covered with the gate layer of smaller thickness. U.S. Pat. No. 6,191,453 discloses no details concerning the method of production. However, the cross-section of the gate layer, which extends to the depth of the semiconductor substrate and is laterally tapered in a stepped manner, indicates production through repeated application of a LOCOS process, which is to say gate oxide formation through local oxidation of silicon.
The use of the LOCOS technique results in an indistinct transition between the first oxide thickness and the second oxide thickness, as well as a pronounced consumption of silicon in the substrate. The silicon consumption results in an edge in the substrate, which entails an undesirable increase in the turn-on resistance.
A primary development goal in the area of DMOS transistors is to achieve a low specific turn-on resistance at the same time as high dielectric strength. In integrated circuits in which the DMOS transistors occupy a significant percentage of total chip area, the intent is to reduce the amount of space used in the integrated circuits.