The present invention relates to attachment of integrated circuits to other substrates.
Integrated circuit dies (“chips”) can be attached to a lead frame and then packaged in a ceramic or plastic carrier. The leads of the lead frame can then be soldered to a printed circuit board (PCB). Alternatively, the chip can be soldered directly to the PCB (“flip chip” packaging). The flip chip packaging reduces the package size and shortens the electrical connections between the die and the PCB. FIG. 1 illustrates a chip 124 flip-chip attached to a PCB 130. The chip is attached face down, with its contact pads 137 connected to contact pads 139 of the PCB.
In the manufacturing process, contact pad metal layer 137 (the layer that provides the contact pads) is deposited and patterned over the chip's silicon substrate 140. A passivation dielectric layer 147 is formed on layer 137. Openings are formed in dielectric 147 to expose the contact pads 137. As a result, contact pads 137 are recessed into the chip's surface. To connect the contact pads 137 to the PCB, protruding metal bumps 150 are formed on the contact pads. Bumps 150 are bonded to PCB contact pads 139 with solder, an adhesive, or by thermal or thermosonic compression.
Bumps 150 can themselves be made of solder. The chip is placed on the PCB with bumps 150 on pads 139, and solder 150 is reflowed to form solder joints. This attachment is mechanically strong and reliable in the presence of thermal stresses, but the solder bumps are difficult to scale down as contact pads 137 become smaller and the pitch between the pads 137 is reduced. As the solder bump sizes decrease to accommodate the smaller contact pads and pitches, the solder joints become mechanically and thermally weaker. Also, the solder ball (solder bump) size defines the standoff distance between the chip 124 and PCB 130. If the standoff is too small, there will be increased fatigue stresses on the solder joints during thermal cycling. In addition, there is a greater possibility of undesirable residues remaining between the chip 124 and the PCB and causing some degradation.
Bumps 150 can also be made without solder, e.g. from copper (Cu) or gold (Au), to obtain better scalability. See S. Zama et al., “Flip Chip Interconnect Systems Using Wire Stud Bumps and Lead Free Solder”, 2000 Electronic Components and Technology Conference, pages 1111–1117 (available from IEEE); C. H. Wang et al., “Laser-Assisted Bump Transfer for Flip Chip Assembly”, 2000 International Symposium on Electronic Materials & Packaging, pages 86–90 (available from IEEE), both incorporated herein by reference. A combination of solder and copper has also been used. More particularly, a “copper pillar” can be plated on contact pads 137, then solder is plated on the copper pillar. See H. Lu et al., “Predicting Optimal Process Conditions for Flip-Chip Assembly Using Copper Column Bumped Dies”, 2002Electronics Packaging Technology Conference, pages 338–343 (available from IEEE); Tie Wang et al., “Studies on a Novel Flip-Chip Interconnect Structure—Pillar Bump”, 2001 Electronic Components and Technology Conference (available from IEEE), both incorporated herein by reference.
Improved integrated circuit attachment techniques are desirable.