1. Field of the Invention
Generally, the present disclosure generally relates to the manufacturing of sophisticated semiconductor devices, and, more specifically, to integrated circuit devices have stacked power supplies and various methods of making such integrated circuit devices.
2. Description of the Related Art
The fabrication of advanced integrated circuits, such as CPU's, storage devices, ASIC's (application specific integrated circuits) and the like, requires the formation of a large number of circuit elements in a given chip area according to a specified circuit layout, wherein field effect transistors (NMOS and PMOS transistors) represent one important type of circuit element used in manufacturing such integrated circuit devices. Other semiconductor devices include, for example, resistors, capacitors, diodes, so-called FinFet transistors, etc. These various semiconductor devices may be arranged in a variety of unique circuit configurations such that each circuit performs a desired function for the integrated circuit device.
Over recent years, there has been a constant drive to reduce the physical size of various consumer electronic products that employ integrated circuits. Perhaps the best example of this trend is the evolution of the cell phone. Early versions of the cell phone were physically very large and bulky, and provided relatively limited functionality, while currentday smart phones are very small and provide a great deal of functionality. The demand for smaller consumer products with greater capability has resulted in the scaling or reduction in the physical size of integrated circuit devices that are employed in such consumer products. The reduction in size of the integrated circuit products has been achieved by, among other things, reducing the physical size of the various semiconductor devices, e.g., the transistors, and by greatly increasing the density of such transistors on a given area of a semiconducting substrate or chip.
Power consumption by an integrated circuit device is a very important parameter in terms of product design and performance. Excessive power consumption may lead to increased heating of the integrated circuit, which may reduce device performance. In the case of portable electronic devices, excessive power consumption may lead to reduced operating times for the consumer product.
Device designers have used a variety of techniques to try to manage the power consumption by integrated circuit products. One of these techniques involves providing both a constant or uninterruptible power supply and a varying or interruptible power supply on an integrated circuit device. This technique further involves identifying some circuits which need to be coupled to the constant or uninterruptible power supply and identifying other circuits that can operate by being coupled to the varying or interruptible power supply, so that constant power is not supplied to all of the circuits on an integrated circuit device. Examples of circuits 12 that are typically coupled to a constant power supply include communication monitoring circuitry in cell phones, battery monitoring circuitry in many wireless products and life critical monitoring circuitry in portable medical products. Examples of circuits 14 that are typically couple to an interruptible power supply include image capture or image projection support circuitry in cell phones and display and other human interface support circuitry in portable or non-portable medical products.
This technique will be further discussed with reference to FIG. 1A (cross-sectional view) and FIG. 1B (plan view) which depicts an illustrative prior art integrated circuit device 100. As shown therein, the device 100 is generally comprised of a plurality of schematically depicted circuits 12 that require connection to an uninterruptible power supply 20U and a plurality of schematically depicted circuits 14 that are connected to an interruptible power supply 201, which is laterally spaced apart from the uninterruptible power supply 20U. The circuits 12, 14 are formed in and above a semiconducting substrate 10. In the depicted example, the circuits 12 are conductively coupled to the uninterruptible power supply 20U by a schematically depicted via 15 and conductive line 13. In the depicted example, the circuits 14 are conductively coupled to the interruptible power supply 201 by a schematically depicted via 19 and conductive line 17. The various conductive structures 15, 13, 20U, 19, 17, 201 are formed in one or more layers of insulating material 11, they may be comprised of a variety of conductive materials, e.g., a metal, and they may be formed using a variety of known techniques.
The present disclosure is directed to integrated circuit devices having stacked power supplies and various methods of making such integrated circuit devices.