1. Field of the Invention
The present invention relates to a power management system for a computer, and more particularly, to a power management system for a computer adjusting power consumption by detecting current.
2. Description of the Prior Art
Please refer to FIG. 1. FIG. 1 is a diagram illustrating a conventional computer 100. As shown in FIG. 1, the computer 100 comprises a power supply PS and a mother board MB. The mother board comprises a central processing unit CPU, a chipset CS, a DC/DC converter DC/DC1, two regulators LDO1 and LDO2, a predetermined function device Y1, and an internal current detecting module CDM1.
The power supply PS comprises a first output end O1 and a second output end O2 for respectively providing power. The first output end O1 of the power supply PS is coupled to the power socket SKT1 through the power cord W1 and the power plug CON1 for providing power to the DC/DC converter DC/DC1. The DC/DC converter DC/DC1 converts the received power to appropriate voltages and provides the converted voltages to the regulators LDO1 and LDO2 respectively. The regulator LDO1 provides an appropriate voltage to the central processing unit CPU and the chipset CS. The regulator LDO2 provides an appropriate voltage to the predetermined function device Y1.
The internal current detecting module CDM1 is coupled between the regulator LDO2 and the predetermined function device Y1 for detecting the current transmitted from the regulator LDO2 to the predetermined function device Y1, and accordingly outputs a current detecting signal SI1 to the chipset CS. The chipset CS determines the operation status of the predetermined function device Y1 according to the current detecting signal SI1, and accordingly adjusts the power consumption of the predetermined function device Y1. For example, when the current detecting signal SI1 is lower than a predetermined value IP1, the chipset CS determines the operation status of the predetermined function device Y1 to be idle; when the current detecting signal SI1 is higher than the predetermined value IP1, the chipset CS determines the operation status of the predetermined function device Y1 to be busy. When the chipset CS determines the operation status of the predetermined function device Y1 to be idle, the chipset CS transmits a control signal SC1 to the regulator LDO2 for decreasing the output voltage of the regulator LDO2 so as to reduce the power consumption of the predetermined function device Y1, or, when the chipset CS determines the operation status of the predetermined function device Y1 to be idle, the chipset CS transmits a control signal SC2 to the predetermined function device Y1 for decreasing the operating frequency of the predetermined function device Y1 so as to reduce the power consumption of the predetermined function device Y1. When the chipset CS determines the operation status of the predetermined function device Y1 to be busy, the chipset CS transmits a control signal SC1 to the regulator LDO2 for increasing the output voltage of the regulator LDO2 so as to accelerate the processing speed of the predetermined function device Y1, or, when the chipset CS determines the operation status of the predetermined function device Y1 to be busy, the chipset CS transmits a control signal SC2 to the predetermined function device Y1 for increasing the operating frequency of the predetermined function device Y1 so as to accelerate the processing speed of the predetermined function device Y1.
The mother board MB is also equipped with a socket SKTX coupling to the chipset CS through Peripheral Component Interface (PCI) or the like for allowing users to connect the external devices onto the mother board MB. As shown in FIG. 1, the external device X can be plugged into the socket SKTX so as to communicate with the chipset CS through the PCI or the like and accordingly execute the function of the external device X.
Generally, under the condition that the power consumption of the external device X is small, the DC/DC converter DC/DC1 of the mother board MB directly provides power to the external device X through the socket SKTX. However, if the power consumption of the external device X (i.e. accelerated graphic card) is too high, the DC/DC converter DC/DC1 of the mother board MB cannot provide enough power to the external device X. Therefore, the external device X has to receive power from the second output end O2 of the power supply PS of the computer 100.
The external device X comprises a power socket SKT2, a DC/DC converter DC/DC2, a regulator LDO3, and a predetermined function device Y2. As stated above, if the external device X is an accelerated graphic card, then the predetermined function device Y2 functions for accelerating the execution of the graphic calculation. The second output end O2 of the power supply PS is coupled to the power socket SKT2 through the power cord W2 and the power plug CON2 for providing power to the DC/DC converter DC/DC2. The DC/DC converter DC/DC2 converts the received power to appropriate voltages and provides the converted voltages to the regulator LDO3. The regulator LDO3 provides an appropriate voltage to the predetermined function device Y2. In this way, the predetermined function device Y2 can communicate with the interface of the chipset CS through the socket SKTX for executing the predetermined function.
However, since the power consumed by the external device X is provided directly from the power supply PS, the chipset CS cannot be informed with the power consumption and the operation status of the external device X, and consequently cannot accordingly adjust the provided voltage and the operating frequency of the external device X, causing inefficiency of the predetermined device X and power wasting.