1. Technical Field
The present disclosure relates to wafer level packages, and to a semiconductor package including one or more semiconductor dies and a method of manufacturing the same.
2. Description of the Related Art
During manufacture of a large panel/wafer structure (e.g., a large panel/wafer fan-out structure), such as during post molding or de-bonding stages of the manufacture, warpage of the large panel/wafer may occur. In some cases, significant warpage may occur, which can decrease production yield and increase manufacturing time.
Furthermore, for wafer level packages, in some cases where singulation and separation of a large panel is performed by a panel saw or a laser, a large number of dies on a panel may result in a low production yield.