1. Field of the Invention
The present invention relates to a quadrature voltage controlled oscillator, and more particularly to a quadrature voltage controlled oscillator having low phase noise and excellent output swing characteristics.
2. Description of the Related Art
A quadrature oscillator outputs four signals having different phases. The quadrature oscillator is generally used in a transceiver circuit for communication devices such as cellular phones, wireless telephones, wireless networking devices, and blue-tooth communication devices.
The above-described devices use a direct conversion method or a low-intermediate frequency method rather than a super heterodyne method to convert a radio frequency (RF) signal to a baseband signal. This is because the direct conversion manner or the low-intermediate frequency manner is advantageous over the super-heterodyne manner in terms of cost and integration. Accordingly, there is a need for a quadrature voltage controlled oscillator capable of generating in-phase output signals and quadrature-phase output signals.
FIG. 1 is a schematic circuit diagram of a conventional quadrature voltage controlled oscillator (VCO). Referring to FIG. 1, the quadrature VCO is composed of two VCOs having the same structure and constituting a feedback structure. This conventional quadrature VCO is disclosed in U.S. Pat. No. 6,462,626 entitled “Quadrature Output Oscillator,” issued on Oct. 8, 2002. U.S. Pat. No. 6,462,626 is hereby incorporated in its entirety by reference.
One of the two VCOs as described above outputs a positive in-phase signal and a negative in-phase signal and the other VCO outputs a negative quadrature-phase signal and a positive quadrature-phase signal. Each of the two VCOs comprises a constant current source (i.e., NMOS transistor biased by a Vbias voltage) for supplying constant current.
However, continuous operation of the NMOS transistor in a saturation region causes a flicker noise to increase, which in turn causes a phase noise to increase. The flicker noise is caused by a phenomenon that electrons passing a channel of the transistor are captured by the gate of the NMOS transistor through which constant current continues to flow.
Further, in the left VCO of FIG. 1, the minimum point of a voltage swing of the output voltages IP and IN and the minimum point of a voltage at the drain of the NMOS transistor biased by the Vbias voltage are not aligned to each other, and thus the voltage swing of the output voltages IP and IN is limited. Similarly, in the right VCO, the minimum point of a voltage swing of the output voltages QN and QP and the minimum point of a voltage at the drain of the NMOS transistor biased by the Vbias voltage are not aligned to each other, and thus the voltage swing of the output voltages QN and QP is limited.