1. Field of the Invention
The present invention relates to a method for checking a multilayer printed wiring board, and more specifically to a method for checking a position of each internal conductor layer within the multilayer printed wiring board.
2. Description of related art
In the prior art, a position of each internal conductor layer within a multilayer printed wiring board has been checked by observing a section of a test piece taken out at the time of conducting an outline trimming (outline machining) of the printed wiring board, or by examining, at the time of the outline trimming, a pattern which is provided on outline trimming lines of the printed wiring board and which corresponds to a pattern of internal conductor layers. Otherwise, no checking has been performed.
In any case, the conventional checking has been ordinarily conducted just before to a final stage of a process of manufacturing the printed wiring board. More specifically, the conventional checking has been performed when the outline trimming is conducted by a punching or a router machining after required circuits have been completed and a protection coating has been deposited. On the other hand, a recent increased number of internal layers in the multilayer printed wiring board and a today's high added value of the multilayer printed wiring board require increased days for manufacturing and an increased manufacturing cost. Therefore, disposal of the multilayer printed wiring board as being defective at a later stage of the manufacturing process will cause various series problems, for example, a delayed time of delivery due to re-manufacturing, and an increased miss or failure cost.