The present invention relates to a semiconductor memory device and a method of manufacturing the same, and more particularly to an electrically erasable programmable ROM (EE PROM) cell.
A main trend of the EE PROM is the so-called floating gate type. A floating gate type EE PROM has a structure so that a thin gate oxide film on a drain (called a tunnel oxide film), a floating gate, an insulating film and a control gate are sequentially laminated, one upon another, whereby a high voltage is applied to the control gate to inject a charge in the floating gate via the tunnel oxide film. Then, a voltage is applied to the drain to draw out the charge from the floating gate to store necessary information.
A conventional floating gate type EE PROM, however, poses a problem in that a sufficient read margin after erase operation cannot be obtained with a control gate voltage of 0. Further, it also poses a problem in that read margin becomes smaller as the write/erase operations are repeated.