Sense amplifiers are used in memory devices to allow for reduced voltage swing on the bit lines. In a dynamic random access memory (DRAM) circuit, each data bit is stored in a small storage capacitor that is discharged quickly. A sense amplifier detects a signal representing the bit on a bit line and amplifies the signal to an amplitude near the DRAM circuit's supply voltage. The capacitor is recharged as the signal is amplified. The data bit is refreshed before it ceases to be detectable as the sense amplifier detects and amplifies the signal on a periodic basis, such as every few milliseconds.
Cross-coupled sense amplifiers are among various sense amplifier configurations used in DRAM circuits. A known cross-coupled sense amplifier includes a pair of inverters “cross coupled” between a complementary pair of bit lines. Each inverter has its input connected to one bit line and its output connected to the complementary bit line. A reset switch, when closed, causes both bit lines to be precharged to about one half of the DRAM circuit's supply voltage by connecting the bit lines to each other and to all the inputs and outputs of both inverters. A cross-coupled sense amplifier provides for fast signal amplification for the DRAM circuits. However, in practice it is difficult to provide the pair of inverters with perfectly matched transistors. Mismatches in transistor characteristics may produce, for example, an offset voltage across the outputs of the inverters during the reset. This offset is reflected to the inputs of the inverters. In the worst case, this reflected offset is detected as a signal representing a data bit after the reset, resulting in a data error.
Therefore, there is a need to provide immunity to the mismatches in transistor characteristics and offsets while maintaining the fast response of cross-coupled sense amplifiers.