With the miniaturization of electronic appliances and with the development of high-speed, high performance and multifunctional capability, demands for high density packaging of semiconductor devices have become stronger. As for the semiconductor device structures, adoption of BGA type semiconductor devices in which solder balls are arrayed on the underside in a grid pattern has increased replacing the lead-type semiconductor devices with external electrode terminals formed in a peripheral pattern. Further, with the miniaturization and thinning of BGA type semiconductor devices, adoption of CSP (Chip Scale Package/Chip Size Package) semiconductor devices having a size nearly equal to the size of the silicone chip is increasing. In order to achieve higher density packaging, multi chip packages, modules and the like of semiconductor devices having a plurality of silicon chips mounted thereon have been implemented. It is thought that with the further development of electronic appliances, there will be a continuous demand for miniaturization and semiconductor devices having high functionality.
Miniaturization and semiconductor devices having high functionality entail the narrowing of the pitch between its external electrode terminals and an increase in the number of pins. Narrowing of the pitch between external electrode terminals is addressed by reducing the size of the eternal electrode terminals and shortening the pitch between external electrode terminals. The minimum pitch that is achievable by the present SMT is 0.4 mm, and a further technical development for reducing the pitch is in progress. On the other hand, multiplication of pins or external electrode terminals is determined by adjusting the size of the interposer that holds a silicon chip of the semiconductor device thereon when external electrode terminals are arranged on the underside of the semiconductor device. When there are many electrode terminals, the size of the interposer is enlarged, or more explicitly, the semiconductor device is made large to address this situation.
FIG. 1 is a sectional diagram showing a semiconductor device of a conventional BGS type. In this semiconductor device 10, silicon chip 101 is mounted on interposer 102, and external electrode terminals 103 applied with solder 104 are formed in interposer 102. Narrowing the pitch between external electrode terminals is achieved by making the electrode terminal size small and reducing the distance between external electrode terminals. However, the actual situation is that when there is a greater number of electrode terminals, interposer 102 is made larger in size so as to accommodate the electrode terminals.
JP2000-261121A discloses a method of increasing the number of external electrode terminals without enlarging the semiconductor device size and the area of the printed wiring board on which the device is mounted. FIG. 2 shows a semiconductor device and its mounting method proposed in JP2000-261121A. This relates to a semiconductor device of a PGA (Ping Grid Array) type, the semiconductor device 111 having coaxial element 115 formed at the root of pin-shaped electrode 112 with cylindrical insulator 114 interposed therebetween. The method of mounting this PGA type semiconductor device to the printed wiring board is realized in the following manner. Solder paste 117 is applied first to the periphery of through-hole 119 of printed wiring board 118. Pin-shaped electrode 112 of PGA type semiconductor device 111 is inserted into through-hole 119 of printed wiring board 118. Next, reflow heating is performed to fuse and join solder paste 117, then flow heating is performed on solder pin-shaped electrode 112 to through-hole 119.
The above-described conventional technology has several problems as follows.
In the conventional BGA type semiconductor device 100 shown in FIG. 1, the limit of narrowing the pitch between external electrode terminals 103 with solder 104 is about 0.4 mm, which is the minimum pitch achieved by the existing SMT packaging technology. Technologies for narrowing the pitch equal to or lower than this are at present under development. The number of arrangeable external electrode terminals is determined depending on both the pitch between external electrode terminals and the area of the semiconductor device, and becomes maximum when external electrode terminals are arranged on the undersurface of the semiconductor device in a square grid pattern having a pitch of about 0.4 mm. Also, it is possible to arrange a greater number of external electrode terminals by enlarging the size of interposer 102 of the semiconductor device.
However, increasing the size of interposer 102 means enlargement of semiconductor device 100, which goes against the trend toward miniaturization. Further, the greater in size the semiconductor device is, the more deformed is the solder that joins the semiconductor device and the printed wiring board, leading to lower reliability.
The above-described JP2000-261121A also proposes a method of increasing the number of pins without size enlargement of semiconductor device 111. However, this is aimed at printed wiring board 118 having PGA type semiconductor device 111 and through holes 119. Since this PGA type semiconductor device 111 is a part of a type that is mounted by insertion into through holes 119 of the printed wiring board, this method cannot be used for a surface mount board having no through-holes 119 for parts insertion. On the other hand, when there are both insert mount parts and surface mount parts, it is possible to use the aforementioned PGA type semiconductor device. However, this method entails the problem of requiring a complicated process of reflow soldering and flow soldering in combination.
Alternatively, in the above-described JP2000-261121A, when surface mounting is attempted by cutting pin-shaped electrodes 112 but not cutting coaxial electrode 115 portions of external electrode terminals of PGA type semiconductor device 111, it is necessary to supply solder for joining electrode pads formed on printed wiring board 118 with cut surface portion of pin-shaped electrode 112, and coaxial electrode 115 portion of semiconductor device 111. In this case, the supplied amount of solder will be controlled depending on the metal mask conditions. However, on the electrode pads on the printed wiring board side there is no insulation between the pad that receives the cut surface portion of pin-shaped electrode 112 and the pad that receives coaxial electrode 115 portion, hence it is thought that a bridge etc. is prone to occur when semiconductor device 111 is mounted. Further, the pitch between external electrode terminals in PGA type semiconductor device 111 is usually 2.54 mm, higher density mounting is difficult to achieve in comparison with a semiconductor device of a BGA type, even when the device is used for surface mounting by cutting pin-shaped electrodes 112.