Synchronous (sync) FET controllers traditionally control the sync FET in the voltage domain. A traditional sync FET controller senses a forward Vf voltage drop of a body diode of the sync FET to determine a point at which to turn on the sync FET. The sync FET further senses a voltage across the Rds_on of the sync FET to determine a point at which to turn off the sync FET.
A voltage controlled amplifier (VCA) may amplify a voltage across the Rds_on of the MOSFET, and the amplified voltage may then be used to control when to turn off the sync FET. Sensing and controlling the sync FET in the voltage domain is susceptible to influences due to parasitic inductors (L's) and capacitors (C's) of the circuit layout and the parts involved. The influence of the parasitic L's and C's may degrade the ability to accurately control the switching on and off of the sync FET.
Voltage domain sync FET control may be inaccurate when sensing signals which have a high change in current vs. time (dI/dt), such as near the zero crossing of an LLC waveform. Parasitic L's and C's in combination with the high dI/dt can cause cross conduction due to propagation delays in the VCA. At light loads, when the traditional sync FET controller senses the forward Vf of the body diode to turn on the sync FET and Rds on to turn off the sync FET, the traditional sync FET control may operate inefficiently. In the load light load condition, after the traditional controller turns on the sync FET based on the forward Vf of the body diode, the controller may then quickly turn off the sync FET based on the voltage detected across the Rds_on of the sync FET being at or below a turn-off threshold. As such, the traditional sync FET controller introduces additional losses due to the unintentional switching of the sync FET plus the loss from the body diode without the benefit of using the low Rds_on of the sync FET.
Thus, there exists a need for a more accurate and efficient sync FET controller.