The present invention relates to a semiconductor device including a through-silicon via.
Seal rings are used for various purposes in the field of semiconductor. For example, Japanese Unexamined Patent Application Publication No. 2011-9795 discloses a semiconductor device including a seal ring for preventing the ingress of water inside the chip from sides on the outer periphery of the chip. Such a seal ring is provided along the outer periphery of the chip. Japanese Unexamined Patent Application Publication No. 2011-9795 also discloses a technique for effectively preventing destruction of a seal ring due to a crack by doubling the seal ring and devising a shape of the seal ring, for example.
Japanese Unexamined Patent Application Publication No. 2010-161367 discloses a technique for using a seal ring for preventing ion diffusion into the substrate region of a die and generation of a crack during die sawing at the time of manufacturing a three-dimensional integrated circuit.
A three-dimensional integrated circuit is composed of a plurality of semiconductor devices laminated by a through-silicon via inside one semiconductor package. Hereinafter, a through-silicon via shall be referred to as TSV (Through-Silicon Via).
The technique disclosed in Japanese Unexamined Patent Application Publication No. 2010-161367 attempts to achieve the object by surrounding a plurality of TSVs by a seal ring.