The present invention relates to output circuits, and more particularly relates to output circuits for driving coil loads, such as switching power supplies and motor drivers.
With recent improvements in digital circuit technology, power supplies and motor drivers are digitally controlled to reduce power consumption of the entire device. In accordance with this trend, in the output circuits such as switching power supplies and motor drivers, MIS (Metal Insulator Semiconductor) transistors are brought into use in order to control the supply of the current to load circuits.
The output circuit of this type is normally provided with a control circuit for carrying out control so that the value of voltage to be supplied to a load circuit is kept constant. If an output terminal of the output circuit is short-circuited to the ground, the control circuit carries out control to increase the current supplied from a power supply unit to the output terminal, and to prevent a reduction in an output terminal voltage. In such a case, the current allowed to flow through an output MIS transistor becomes an excessive current the value of which exceeds a set value. This is the factor that causes damage to the output MIS transistor. Such a phenomenon also occurs when the resistance of the load circuit is reduced (i.e., when the output circuit is overloaded), or when an excessive charge current from an output capacitor is allowed to flow upon activation.
The output circuit is therefore provided with the function of limiting output current in order to ensure the protection of the output MIS transistor against the excessive current. To limit the output current, the output current flowing from an output circuit has to be detected. For this purpose, a frequently used method for detecting the output current is to detect the output current by using a resistor provided in a path through which current flows.
Hereinafter, the above-described conventional output circuit will be described with reference to the accompanying drawings.
FIG. 11 is a circuit diagram showing the configuration of the conventional output circuit.
As shown in FIG. 11, the conventional output circuit includes: a power supply unit 101 for supplying the output circuit with a voltage; an output terminal 105 through which power is supplied to an external load circuit 102; a first resistor 107; an intermediate node 115; an output MIS transistor 106 that is a p-channel MIS transistor; a current supply unit 109 with one end thereof connected to the ground and the other end thereof connected to the power supply unit 101; a reference node 116; a second resistor 108 for generating a reference voltage; a comparator 110 with one input section thereof connected to the reference node 116 and the other input section thereof connected to the intermediate node 115; and a control circuit 114 connected to the output section of the comparator 110, the power supply unit 101, and a gate electrode of the output MIS transistor 106. The first resistor 107, the intermediate node 115 and the output MIS transistor 106 are provided between the power supply unit 101 and the output terminal 105 in this order. And the reference node 116 and the second resistor 108 are provided between the current supply unit 109 and the power supply unit 101 in this order. In this configuration, the output MIS transistor 106 allows or stops the supply of power to the output terminal 105.
The control circuit 114 includes: a timer circuit 111 to which an output signal from the comparator 110 is inputted; a driving circuit 112; and a switching circuit 113, which is controlled by an output signal from the timer circuit 111, for selecting either the voltage of the power supply unit 101 or the output signal of the driving circuit 112 to input the selected voltage or output signal to the gate electrode of the output MIS transistor 106.
The output terminal 105 is connected to the load circuit 102 including a resistor, a capacitor and so on. Between the output terminal 105 and the load circuit 102, a node 117 and a coil 103 for generating electromagnetic energy are provided in this order. In addition, the node 117 is connected to the output terminal of a diode 104 the input terminal of which is connected to the ground. It is to be noted that “load circuit 102” is a generic name for various kinds of circuits (e.g., a motor circuit and so forth). The load circuit 102, the coil 103 and the diode 104 are normally provided outside the output circuit.
In the conventional output circuit, the first resistor 107 is provided in order to monitor the current outputted through the output terminal 105 when the output MIS transistor 106 is brought into conduction. Therefore, the output MIS transistor 106 can be controlled to turn OFF when the voltage applied to the intermediate node 115 is lower than the reference voltage, thus preventing an excessive current from flowing through the output MIS transistor 106 and into the load circuit 102.
Next, the operation of the conventional output circuit will be briefly described.
As shown in FIG. 11, when the output MIS transistor 106 is ON, a voltage supplied from the power supply unit 101 is fed to the output terminal 105 via the first resistor 107 and the output MIS transistor 106 and is outputted as an output terminal voltage Vout from the output terminal 105. In this case, the coil 103 accumulates electromagnetic energy, and although not shown, a capacitor provided in the load circuit 102 accumulates electrical charge.
On the other hand, when the output MIS transistor 106 is OFF, the supply of voltage through the output terminal 105 is stopped, and the energy accumulated in the coil 103 is released. More specifically, when the output MIS transistor 106 is OFF, the diode 104 is brought into conduction to carry out a regenerative operation, and the load circuit 102 including a capacitor smoothes the energy released from the coil 103, so that the energy is supplied, as a DC voltage, to a DC output terminal VDC. As used herein, “regenerative operation” means the operation of allowing the release of energy from the coil.
The ON/OFF states of the output MIS transistor 106 is controlled by a control voltage VG fed from the control circuit 114, and the output MIS transistor 106 is turned ON when the control voltage VG is at a low level. During the normal operation of the output circuit, the driving circuit that includes, although not shown, a circuit for generating a PWM signal is used to carry out the ON/OFF control of the output MIS transistor 106.
Furthermore, when the output MIS transistor 106 is in ON state, the output current is detected as a detection voltage VM that is the voltage applied to the intermediate node 115. More specifically, the second resistor 108 and the current supplied from the current supply unit 109 are used to generate a reference voltage Vref that is the voltage applied to the reference node 116, and the level of the reference voltage Vref is compared with that of the detection voltage VM by the comparator 110, thus carrying out the detection of the output current.
Next, a current detection method using the conventional output circuit will be described in detail with reference to FIGS. 11 and 12.
FIGS. 12(a) through 12(e) are timing charts each showing the waveform of voltage or current of each component provided in the conventional output circuit. In the charts, the abscissa represents time t, and the waveform of each component in operation is shown.
First, FIG. 12(a) shows the waveform of the control voltage VG fed from the control circuit 114. In this prior-art example, since the output MIS transistor 106 is a p-channel MIS transistor, the time period over which the control voltage VG is at a low level corresponds to the time period over which the output MIS transistor 106 is ON, while the time period over which the control voltage VG is at a high level corresponds to the time period over which the output MIS transistor 106 is OFF. It should be noted that at the time of T0, the gate electrode of the output MIS transistor 106 is connected to the driving circuit 112 in the control circuit 114.
In FIG. 12(b), the reference voltage Vref is indicated by the alternate long and short dashed line, and the detection voltage VM, i.e., the voltage applied to the intermediate node 115, is indicated by the solid line. In the chart, the reference voltage Vref substantially remains constant because the reference voltage Vref is determined by the second resistor 108 and the current value of the current supply unit 109. Therefore, the reference voltage Vref is set at a value corresponding to the boundary value between the normal level and the excessive level of the output current.
Furthermore, since no current flows through the first resistor 107 when the output MIS transistor 106 is OFF, the detection voltage VM becomes equal to a supply voltage Vcc of the power supply unit 101. However, when the output MIS transistor 106 is turned ON, a voltage drop is caused by the first resistor 107, and thus the detection voltage VM becomes smaller than the supply voltage Vcc. In addition, the detection voltage VM varies in accordance with the magnitude of the output current, and if the magnitude of the output current is increased, a reduction in the detection voltage VM is roughly proportional to the magnitude of the output current.
FIG. 12(c) is shows the waveform of the current flowing through the coil 103. It should be noted that although the current waveform shown in FIG. 12(c) reaches the target value soon after the output circuit has been operated for the sake of simplicity, a rise in the current waveform is a little bit more gradual in reality, and the output MIS transistor 106 has to be turned ON/OFF several times before the current waveform reaches the target value.
As shown in FIG. 12(c), the coil 103 serves as a load on the output MIS transistor 106 in this prior-art example; therefore, even if the output MIS transistor 106 is completely ON upon switching of the transistor 106 at the time of T0, the impedance of the coil 103 momentarily becomes large due to the effect of the counter-electromotive force of the coil 103, and thus the current flowing through the coil 103 does not quickly increase. Accordingly, the detection voltage VM is, at first, approximately equal to the supply voltage Vcc in FIG. 12(b). When electromagnetic energy is accumulated in the coil 103 with the passage of time, the impedance of the coil 103 is reduced correspondingly to increase an output current Io, thus gradually reducing the detection voltage VM. As the detection voltage VM is reduced, the current flowing through the coil 103 is conversely increased.
Next, when the output MIS transistor 106 is turned OFF at the time of T1,the detection voltage VM becomes equal to the supply voltage Vcc of the power supply unit 101. During the time period over which the output MIS transistor 106 is OFF (i.e., during the T1-to-T2 period), the diode 104 is brought into conduction to carry out a regenerative operation, thus releasing the energy accumulated up to this time in the coil 103. The current flowing through the coil 103 is reduced continuously from the time T1 (see FIG. 12(c)).
Then, suppose that the output MIS transistor 106 is turned ON again at the time of T2. In such a case, if all the energy accumulated in the coil 103 is not released during the time period over which the output MIS transistor 106 is OFF, the detection voltage VM does not begin to decrease from the value corresponding to the supply voltage Vcc but begins to decrease from the value that is a little smaller than the supply voltage Vcc of the power supply unit 101 as shown in FIG. 12(b). Then, electromagnetic energy is accumulated in the coil 103 again, and the detection voltage VM is gradually reduced with the passage of time. In this manner, the output MIS transistor 106 is turned ON/OFF in accordance with the control voltage VG. The operations carried out during the T3-to-T5 period will be described later.
FIG. 12(d) shows the waveform of the output voltage from the comparator 110. As shown in FIG. 12(d), the comparator 110 makes a comparison between the detection voltage VM and the reference voltage Vref to output a high-level signal when the detection voltage VM is smaller than the reference voltage Vref, and output a low-level signal when the detection voltage VM is greater than the reference voltage Vref.
FIG. 12(e) shows the waveform of the output voltage from the timer circuit 111. As shown in FIG. 12(e), the timer circuit 111 operates in response to the rising edge of the waveform of the output voltage from the comparator 110, and outputs a high-level signal for a given period of time by a time constant circuit (not shown) provided in the timer circuit 111.
Described in detail below are the operations, which are carried out during the T3-to-T5 period, for preventing the output of an excessive current by detecting the output current.
If the control voltage VG is continuously at a low level from the time T2, the detection voltage VM is gradually reduced, and becomes smaller than the reference voltage Vref in due time. In this case, the current flowing through the coil 103 is exceeding the target value shown in FIG. 12(c). Accordingly, the comparator 110 outputs a high-level signal to the timer circuit 111, and the timer circuit 111 operates to output a high-level signal.
Once the timer circuit 111 has started outputting a high-level signal, the timer circuit 111 keeps on outputting a high-level signal for a given period of time. Accordingly, during the T3-to-T5 period, the switching circuit 113 blocks an output signal from the driving circuit 112 and is switched such that the potential of the power supply unit 101 is fed to the gate electrode of the output MIS transistor 106. Thus, the control voltage VG to be applied to the output MIS transistor 106 is forcefully placed at a high level. Consequently, the output MIS transistor 106 is OFF for a period of time determined by the operation of the timer circuit 111, thereby preventing power consumption in the output MIS transistor 106 and protecting the output MIS transistor 106 from the excessive current.
When the output MIS transistor 106 is turned OFF, the detection voltage VM exceeds the reference voltage Vref once more, and thus the output of the comparator is at a low level again.
It is to be noted that the waveform of the high-level output of the comparator 110 is a differential pulse-like waveform because there exist a response time i) required for the output of the timer circuit 111 to be at a high level, a response time ii) required for the output of the switching circuit 113 to be at a high level after the timer circuit 111 has outputted a high-level signal, and a response time iii) required for the output MIS transistor 106 to be turned OFF. That is, the pulse width of the high-level output of the comparator 110 is determined by the sum of the response time i), the response time ii) and the response time iii).
In the conventional output circuit, the output MIS transistor is protected from the excessive current by carrying out the above-described operations.
The conventional output circuit, however, presents the following problems. First, the first resistor 107 is inserted between the output MIS transistor 106 and the power supply unit 101; therefore, a voltage drop is caused by the first resistor 107 to create the problem that the range of the voltage usable for the load circuit is limited. The adverse effect of the voltage drop is particularly serious when a relatively low voltage power supply such as a dry battery is used. Even if other power supplies are used, it is necessary to set the supply voltage, in the light of the voltage drop caused by the first resistor 107, at a value greater than the voltage needed for the driving of the load circuit.
In addition, since a resistor causes a power loss of RI2 (R represents a resistance value, and I represents a current value), the conventional output circuit consumes a great deal of power, and thus requires superfluous power.
Furthermore, the conventionally configured output circuit using the first resistor 107 does not lend itself to the integration on a chip. Specifically, this problem is caused by the following reasons. The excessive current in question is at a level corresponding to a current value of about 1A; therefore, the first resistor 107 having a resistance value of 1 Ω or less, for example, is required. However, if the first resistor 107 is formed of a material having a sheet resistance of more than 100 Ω/□, the area of the first resistor 107 becomes too large, which makes it difficult to integrate the conventional output circuit on a chip.