1. Technical Field
The present invention relates generally to a method of forming a semiconductor and, more specifically, to a method of selectively doping, or selectively doping and preventing silicide formation in a single process.
2. Background Art
Heretofore, crystal damage or defects, such as extended loop dislocations that penetrate source/drain junctions, contribute to cell leakage resulting in reduced dynamic random access memory (DRAM) retention time (Rt) and cause much higher power consumption. These crystal defects have long been attributed to and directly modulated by the high dose ion implant required for source-drain doping.
Additional device leakage and DRAM Rt degradation is attributable to "over the spacer" titanium silicide (TiSi) stringers. These stringers also cause discrete failures in the complementary metal oxide semiconductor (CMOS) logic products. Furthermore, these defects, typified by TiSi "creep", are also major contributors to chip field failures and reliability problems.