Semiconductor manufacturers routinely fabricate multilayer semiconductor structures to achieve a high level of integration. The semiconductor structures have multiple devices, such as transistors, formed in a substrate. Multiple metallization layers are formed over the substrate to electrically interconnect the devices and form functional circuits. The metallization layers may also include other devices, such capacitors and resistors.
Each layer of a multilayer semiconductor structure is patterned one or more times using lithography techniques such as photolithography, electron-beam lithography, and the like. As the technology node shrinks the lithography techniques face many challenges. For example, photolithography and electron-beam lithography methods are limited by light diffraction and electron scattering, respectively. Fabrication problems are particularly severe for the semiconductor structures with sub-10 nm features.