This invention relates generally to the fabrication of semiconductor wafers and/or integrated circuit (“IC chips”) devices, and more specifically to the fabrication of metalization layers or interconnect structures. The present invention also pertains to the deposition of thin film layers and tungsten (W) plugs in contact holes or vias of interconnect structures.
Thin films serve a variety of different functions in the manufacture of semiconductor wafers and/or IC devices. For example, thin films are used in the construction of interconnect structures having contact holes and vias. Interconnect structures are those structures on an integrated circuit device that connect different levels of a multi-level IC device, and include contact holes and vias. Contact holes are holes in PMD (pre-metal dielectric) active regions, such as the source region and drain region of a silicon substrate, and a metal layer. Contact holes allow electrical connections between a metal layer and the polysilicon and/or the silicon wafer substrate. Vias allow contact between different metal layers on the device.
Of those refractory metals considered as interconnect materials, tungsten has been the most widely used because of its high thermal stability, low stress, excellent step conformity and because its thermal expansion coefficient closely matches that of silicon. Because of its lower conductivity, tungsten is used for shorter interconnect paths while copper and aluminum are used for global interconnect paths.
Chemical vapor deposition is one process for applying tungsten to a wafer surface and/or an IC device to fill the contact holes and vias. Prior to deposition of the tungsten on the wafer surface within a hole or via, a contact layer and an adhesion/barrier layer are applied to the wafer surface including the hole or via. A titanium (Ti) thin film is first applied as the contact layer because of its adherence to dielectric materials that comprise the wafer or IC device.
Titanium may be applied using a physical vapor deposition (PVD) process commonly referred to as sputtering. A conventional PVD chamber is illustrated in FIG. 1. The components of the PVD chamber 30 include a titanium target 33 as a source of the Ti for sputtering. A semiconductor wafer 31 is supported on a pedestal 32 within the chamber. A DC-power source 35 is supplied to the target 33, and an argon (Ar) glow discharge is coupled to the chamber to create a plasma 34 between the target 33 and wafer 31, and to generate a Ti species from the target 33 that will agglomerate on the surface of the wafer 31.
A TiN (titanium nitride) thin film is then deposited on the wafer surface by sputtering in a separate PVD chamber by the injection of nitrogen within the argon glow discharge. The TiN thin film serves as what is known as a nucleation layer or adhesion layer.
The tungsten is deposited as a plug on the TiN thin film to fill the contact hole or via by CVD. Tungsten fluoride (WF6) gas serves as a source for the W-plug. The WF6, gas undergoes a reduction reaction with silane and hydrogen, which results in the deposition of W on the wafer. An etchback or planarization step is then performed to remove excess W outside of the via or contact hole.
With respect to FIG. 2, a defective W-plug is illustrated. A titanium nitride thin film 41 acts as a barrier layer between the Ti contact layer 40 and the W-plug 42 and also serves as a nucleation layer for the formation of the W-plug 42. It is not desirable to apply Tungsten directly to the Ti film 40, because the WF6 source may react with Ti and cause “W-volcanoes” on the wafer surface. The TiN thin film 41 may crack, or have a pinhole, which exposes the Ti to the WF6, which attacks the Ti causing volcanoes 42 to form. As the W continues to form it pushes back the TiN layer exposing more Ti to the reactive WF6. The W forms humps or “volcanoes” 42 that cannot be completely removed by the etchback procedure. In the worst case, these volcanoes produce a zero-yielding semiconductor wafer.
Reduced feature sizes of via, holes and trenches have resulted in increased aspect ratios for the construction of these features. However, the deposition of Ti and TiN using PVD sputtering methods are not adequate to achieve a desired step conformity. A newer PVD procedure known as ionized metal plasma (IMP) deposition has become a popular method of Ti and TiN deposition to achieve the step conformity demanded from the increased aspect ratios of the contact holes and vias.
With respect to FIG. 3, there is schematically illustrated an IMP chamber and steps for deposition of Ti and TiN films. The deposition of Ti and TiN takes place in two separate IMP chambers. In the IMP chamber, several hardware changes are made to a conventional PVD chamber, primarily to increase the bottom coverage of the sputtered atoms in the feature. The IMP chamber includes a tungsten target (Ti target) 50 and a coil (Ti coil) 51. A semiconductor wafer 52 is supported on a pedestal 53. An ionized metal plasma 54 is generated in the IMP chamber, such that the sputtered Ti atoms, for example, ionize and are attracted towards a top surface of the semiconductor wafer, giving improved bottom coverage.
In a conventional PVD chamber, less than 1% of the total sputtered atoms are ionized and the rest are all neutral atoms that form the TI and TiN films. In the IMP chamber, the changes make it possible to increase the ionization probabilities and thus provide improved feature bottom coverage and step conformity. Allowing increased incidences of the number of collisions between the Ar ions and the sputtered Ti increases the number of ionization events. An RF-power activated coil added to the chamber serves as an extra source of electrons, increases the Ar pressure in the chamber, and increases the number of collisions between Ar ions and sputtered Ti. Increased target to wafer spacing also improves the possibility of increased collisions between the Ar ions and sputtered Ti atoms, thus leading to increased ionization events.
The above-described sputtering process is also conducted in separate deposition of TiN on a wafer surface in a separate IMP chamber. Nitrogen is injected into the chamber with argon to form the TiN to be deposited on the wafer surface.
During the TiN deposition phase, TiN films are formed on shields and other parts of the IMP chamber. These TiN films are intrinsically highly stressed and thus prone to particle generation and flaking, which can contaminate a wafer surface and thereby limit yield of semiconductor wafers and/or limit IC device production. In order to avoid this contamination problem, blank or dummy wafers are placed in the IMP chamber. Titanium is deposited to form films covering the TiN film on the chamber shields. This contraceptive measure is known as “pasting”, which increases the costs and reduces the cycle time for semiconductor wafer and/or IC chip fabrication. Alternatively, a shutter configuration is often used to deposit Ti onto the shutter such that the chamber and its parts can be effectively “pasted”.
Thus, the available deposition procedures for barrier films in contact holes and vias suffer certain shortcomings. The conventional PVD sputtering does not meet the step conformity required with the increased aspect ratios of vias and contact holes. The IMP sputtering of TiN/Ti films create particle contamination and require the additional pasting steps.