1. Field of the Invention
The present invention relates to a semiconductor device, a method of manufacturing a semiconductor device, and a liquid discharge apparatus.
2. Description of the Related Art
In an N-channel MOS transistor formed in a P-type well region, a P-type impurity concentration in the P-type well region in a vicinity of an interface between the P-type well region and an element isolation region decreases, and an N-type inversion layer becomes easy to generate. In order to prevent a source and a drain from short-circuiting through the N-type inversion layer, in the Japanese Patent Laid-Open No. 2-15672, a P-type diffusion layer is formed in contact with a side surface of the element isolation region. In this literature, in addition, a reduction of a tolerable junction voltage of the N-channel MOS transistor is suppressed, by placing a source region and a drain region away from the P-type diffusion layer.