text: in fig2 a and 2b , target 1 is a laminated structure which comprises three planar sheets 2 and 2 &# 39 ; of electrically insulating material and two like metal screens 3 and 4 . the central sheet 2 &# 39 ; may comprise small celled foamed polypropylene and a polymer resin coated , fiberglass web laminated on both sides of the sheet 2 &# 39 ;. the screens 3 and 4 may be a polymer resin coated , brittle , calendered aluminum woven wire screen . this structure , for example , is described more fully in u . s . pat . no . 4 , 240 , 640 incorporated by reference herein . this structure permits penetrating projectiles to pass therethrough without significant material foldback , tearing , cracking and shredding , especially large projectiles , e . g ., 105 mm tank cannon projectiles . projectile 5 in fig2 a is shown penetrating the target 1 to a point where its front tip has just impacted and electrically contacted screen 4 . the projectile is of sufficient length so as to also be in ohmic contact with screen 3 . the projectile being made of metal provides an electrical short circuit between the screens 3 and 4 at this time . as the projectile continues through the target 1 , it reaches a point at which it is still in contact with screen 3 but is about to disengage from screen 3 as it proceeds in the forward direction to the right in the drawing figure . as a result it should be clear that projectiles of differing lengths will all short the screens 3 and 4 only on the condition that the shortest projectile is at least as long as the spacing l between the screens , and preferably somewhat longer to allow for slight differences in manufacturing tolerances of the different structures . if a positive voltage , e . g ., 5 volts , were impressed across the screens 3 and 4 such that screen 3 is at a high potential and screen 4 is at a low potential , e . g ., ground , the potential on screen 3 would then go low for as long as the projectile electrically connects the screens creating a pulse . in fig4 four different projectile types s1 , s2 , s3 and s4 are illustrated , 30 caliber , 50 caliber , 105 mm and 120 mm , respectively . the 30 caliber projectile produces a pulse of time duration t . each of the other projectiles produces increasingly longer time duration pulses t &# 39 ;, t &# 34 ; and t &# 39 ;&# 34 ;. it can be shown that there is no significant difference in the initial velocity of the projectiles as a result of penetrating the target . the length l1 of a 30 caliber unit is 0 . 0306 meters . the corresponding lengths l2 , l3 and l4 of the respective 50 caliber , 105 mm and 120 mm projectiles are 0 . 0582 meters , 0 . 27 meters and 0 . 453 meters . these lengths are sufficiently different to allow distinguishing identifying signals to be generated based on time duration alone among the different projectiles . for a 30 caliber projectile s1 assume a velocity of 915 meters per second ( m / s ). assume a distance l between screens 3 and 4 of 0 . 0254 m . it can be shown that the time duration of this projectile in contact with the screens is 5 . 683 microseconds ( us ). similarly , projectiles s2 , s3 and s4 at respective velocities of 915 m / s , 1 , 539 m / s and 1064 m / s produce significantly different screen contact pulses of 35 . 85 us , 158 . 93 us and 401 . 53 us , respectively . these time durations are sufficiently different to produce reliable detection of each type of projectile . in fig1 apparatus 10 , detects the time duration of the pulses produced by the different projectiles and generates a display on display 11 providing a graphic indication of the projectile type and also which target was hit by a graphic description of the target . target 12 comprises four electrically isolated sections , a , b , c and d representing a tank , for example . section a represents the tank turret , b represents the engine compartment at the rear , c represents the pilot compartment centrally located and d represents the forward section . display 11 in fig3 a would give a description of the engine compartment if that is the section that was hit . subsequently , display 11 in fig3 b gives a description of the projectile that made that hit , e . g ., 105 mm . the display 11 may be a lcd ( liquid crystal ) or a video monitor . in this case the displays of target and projectile are sequential , but in the alternative may be simultaneous . the sections a , b , c and d while shown in close proximity , are formed of separate , spaced targets so that each target is electrically isolated from the others , i . e ., the screens 3 and 4 are separate from each other . each of the sections a , b , c and d are connected by a cable assembly 13 to a remotely situated detection circuit comprising a projectile signal and target signal generator 14 which supplies target and projectile signals to projectile and target identifying signal generator 15 . generator 15 generates the identifying signals supplied to display 11 for display as explained above . a power supply 16 supplies a voltage + v , e . g ., 5 volts dc , to each of screens 3 of the different targets through a corresponding resistance . screens 4 are connected to the power supply return , e . g ., ground . each of the screens 3 and 4 of the targets are connected by cable assembly 13 to generator 14 which generates the appropriate signals manifesting a given hit target and the type of projectile involved . in fig5 power supply 16 preferably comprises 5 volts dc . the return to the power supply is connected to system ground 16 &# 39 ; and screens 4 of each target a , b , c and d . the high output + v is connected to screen 3 of target b via resistance 15 , screen 3 of target a via resistance 17 , screen 3 of target c via resistance 19 and screen 3 of target d via resistance 20 . these resistances may be , for example , 10k ohms each . there are four conductors 15 &# 39 ;, 17 &# 39 ;, 19 &# 39 ; and 20 &# 39 ; each of which connect a respective different junction between the resistances 15 , 17 , 19 and 20 and the targets d , b , a and c to an amplifier 25 of respective corresponding subcables 21 , 22 , 23 and 24 of cable assembly 13 . whenever a direct connection is made between a screen 3 and a screen 4 of a target , as for example when a projectile penetrates the screens , the voltage signal supplied to a corresponding amplifier goes from a high value to a low value by the connection to system ground 16 &# 39 ; by the penetrating projectile . the subcables 21 - 24 are identical and only subcable 21 will be described as being representative . subcable 21 comprises an amplifier 25 having an inverting output and a non - inverting output . these outputs are supplied to a comparator 26 which in accordance with which input is high and which input is low will produce an output signal having either a logic high or low value . for example , conductor 15 &# 39 ; is normally high . if target b is penetrated by a projectile the signal on conductor 15 &# 39 ; will go low . therefore , the non - inverting output of amplifier 25 of cable 21 is normally high and goes low in the presence of a projectile impacting on its corresponding target b . therefore , the output of comparator 26 is normally high except when a projectile is indicated at which time it then goes low . the comparator output is supplied to an inverter 27 to produce projectile signal a , which is normally low except when indicating the presence of a projectile hit on target b when it goes high . the output of inverter 27 is applied as one input to an and gate 28 . the other input of gate 28 is supplied by clock 29 , which may have a frequency in the range of 8 - 10 mhz . in similar fashion an and gate is coupled to the clock 29 and output of a corresponding inverter of each subcable assembly 22 - 24 . an or gate 30 supplies the and gate outputs as clock count signal b , fig6 to counter 31 . counter 31 may have a 12 bit output producing a first output signal of 8 bits d0 - d7 and a second output of 4 bits d8 - d11 . the count manifested by bits d0 - d11 represents the time duration of signal b from gate 30 . this count thus manifests the identity of one of projectiles s1 - s4 , fig4 . the output signal a of each subcable 21 - 24 is also applied to target signal generator 32 which comprises a set of four set - reset flip flops 33 - 36 each of which corresponds to a different subcable 21 - 24 . the flip - flops latch the signal a applied to the set input to produce signal st1 at the q flip - flop output . signal st1 has a duration 4t preferably of about four times the duration t of signal a . this provides a delay suitable for reading the counts of the output of counter 31 by cpu 38 in a manner to be described . the counter 31 is reset by a signal rst at the end of a hit cycle and the flip - flops 33 - 36 are reset by respective signals rt1 - rt4 generated by cpu 38 . the output count signals d0 - d11 are applied to multiplexer 40 which reduces the 12 bit counter output signal to an eight bit signal to be applied to the data input port of cpu 38 . the reason for this is that the cpu is an intel 8088 microprocessor . a minimum of 12 bits needs to be generated to allow for the longest time t of the 120 mm projectile at the clock rate of at least 8 mhz . this clock rate is needed to provide the desired resolution for the shortest projectile . the intel 8088 is of lowest cost for the desired functions of the circuit . the counter 31 output is divided into three signals d0 - d3 , d4 - d7 and d8 - d11 of four bits each . the d0 - d3 signal is applied to the a input of an 8 to 4 register 42 and the d4 - d7 signal is applied to the b input of register 42 . the d7 - d11 signal is applied to the b input of 8 to 4 register 43 . the a input of register 43 is a pass through for passing the outputs d0 - d3 and d4 - d7 of register 42 sequentially , but directly to the data input port of cpu 38 . the b input of register 43 receives the d7 - d11 signal from counter 31 and applies this signal to the cpu sequentially relative to the outputs of register 42 . cpu 38 includes a programmed rom which causes the signals rt1 - rt4 to be generated at the end of respective signals st1 - st4 whose time duration is determined by the program via a looping sequence initiated by the st1 - st4 signals applied to the cpu control ports . at the end of these st1 - 4 periods the cpu generates the flip - flop reset signals rt1 - rt4 , see fig6 setting q low . at time t3 , the cpu generates a logic low signal a / b1 , which normally is high , for a time duration until time t4 is reached . this low signal is applied to register 42 for outputting signal d0 - d3 to register 43 and thence to cpu 38 . signal a / b1 then goes high in the period t4 to t5 at which time register 42 outputs signal d4 - d7 to register 43 and thence to cpu 38 . during time t3 t5 , signal a / b2 has gone low and stays low in this period disabling register 43 from outputting the signal on input b while enabling input a to pass through the received d0 - d7 signals . in period t6 - t7 after period t3 - t5 has elapsed , signal a / b2 goes high outputting signal d8 - d11 to the cpu data input port . four of the 8 bits outputted are blocked at this time and are zero . at time t7 the cpu generates the counter reset signal rst for resetting the counter to zero to receive the next projectile hit count . the entire cycle terminating at time t8 , when the cpu resets the system , may be about 15 milliseconds . thereafter the system waits for the next hit and the cycle repeats . the stored program in the cpu cause a programmed comparison of the received counts to the counts stored in a table in a rom in the cpu addressed by the programmed rom for matching time intervals . when a match is found the cpu outputs a projectile identifying signal specifying the description of the projectile as shown in fig3 b for display on display 11 which is preferably a lcd display . previous to identifying the projectile the cpu received a logic high st signal from one of the flip - flops 33 - 36 at one of the control ports . the program in the cpu monitors these ports and depending upon which port goes high identifies the particular target corresponding to that port for generating a target identifying signal and applying that signal to the display 11 for displaying a description of the target as shown in fig3 a . this display occurs first followed by the display of fig3 b . however , these displays could be provided simultaneously if desired . hold circuits ( not shown ) could hold the identifying signals for any time period desired until a new identifying signal is generated . because the target material is uniform throughout , it is capable of receiving multiple successive hits reliably throughout the target . what is important is that small projectiles can be distinguished from large projectiles to more accurately ascertain the actual damage that might occur to a real target as compared to a simulated target . practical prior art hit recorder systems do not adequately distinguish projectiles accordingly and therefore it was difficult to immediately determine if the hit was of a type that would seriously damage an actual equivalent target , such as a tank . the present invention thus provides enhanced target hit evaluation , and an improved training environment . the types of projectiles described herein are by way of example only . while a particular embodiment is described for generating a target and projectile identifying signal , other means for implementing the present invention will occur to those of ordinary skill in logic design art for measuring , recording and indicating the differences in projectiles and targets hit based on different time duration signals . for example , using a cpu with a twelve bit data input port , the multiplexer may be omitted and the twelve bits read simultaneously . also other cpus may operate differently , and thus require different kinds of enabling signals in order to generate the desired identifying signals . therefore , the particular means of implementing the present invention is merely exemplary .