text: fig4 illustrates a communication system 210 according to the invention . some elements of the communication system are identical to those of fig1 and those elements are designated by the same reference numerals . other elements of the arrangement of fig4 correspond to elements of fig1 but are not identical ; those elements are designated by like reference numerals in the 200 series . for example , the bandwidth - limited link is designated 15 in fig1 while the corresponding element of fig4 is designated 215 . in fig4 the communication system 210 is illustrated as including a block 12 , representing a source of digital information or data signals . the data bits are generated synchronously at a data rate of 2400 bps ( 2 . 4 kbps ), and are associated , as known in the art , with control bits , which may be asynchronous . the 2 . 4 kbps data from block 12 are applied to a block 214 , which represents a first rate adapter . first rate adapter 214 multiplexes the data bits , the control bits , and synchronizing bits , if any , which it receives from block 12 , and possibly adds rudimentary error detection codes , to adapt the bit rate to 3 kbps , in the form of successive 10 msec frames , each of 30 bits . fig5 a and 5b together illustrate the structure of two successive 10 msec ., 30 - bit frames as produced by first rate adapter 214 . thirty - bit frames recurring at a 10 msec . rate correspond to a 3 kbps data rate . frames having the data structure of fig5 a alternate in a regular or cyclic manner with frames having the data structure of fig5 b , and may be viewed as being paired with each other . time flow and data bit designations in fig5 a and 5b follow those of fig2 and 3 , and thus the first bit in each frame is d1 , and the second is d2 . one difference between the frame illustrated in fig2 and those of fig5 a and 5b is that the frame of fig2 contains two x bits , while the frames of fig5 a and 5b contain only one ; thus , one concomitant of reduction of the link data rate from 3 . 6 kbps as described in conjunction with fig1 and the 3 kbps as described for fig4 is that some redundancy is lost . in fig5 a , certain bits are enclosed within dashed lines to draw attention thereto , and to emphasize the differences between frames of the frame pair represented by fig5 a and 5b . more particularly , the 15th , 19th , and 30th data bits of the frames of fig5 a and 5b are identified by dashed - line enclosures . in the frame of fig5 a , the 15th data bit is identified as carrying an s3 bit , while the 15th data bit of the frame of fig5 b carries s4 . also , in the frame of fig5 a , the 30th data bit is identified as carrying an s8 bit , while the 30th data bit of the frame of fig5 b carries s9 . thus , the s3 and s4 data bits occur in the 15th bit position on alternate 30 - bit frames . similarly , the s8 and s9 data bits occur in the 30th bit position on alternate 30 - bit frames . it will also be noted that the 19th bit position of the frame of fig5 a indicates that data bit e7 takes on a binary 0 state , while the corresponding 19th bit of the frame of fig5 b has e7 at a binary 1 state . the e7 bit is therefore an identifier or flag which identifies the data bits in the 15th and 30th bit positions of the alternating frames of fig5 a and 5b . the 3 kbps data from first rate adapter block 214 of fig4 is applied to an input port 215i of a transmission path or link 215 . the data flows through the link 215 , and becomes available at the output port 215o of link 215 . link 215 of fig4 includes a processor 216 which receives the 3 kbps data stream organized as described in conjunction with fig5 a and 5b , and converts it by addition of edac to produce a 24 kbps full - rate channel , arranged as four 6 kbps quarter - rate channels , only one of which is used to carry the signal originating from dte source 12 . the information is applied from processor 216 to a ground station , which processes the signals , as required by the system , and as described in more detail in u . s . patent application ser . no . 08 / 961 , 938 , filed on oct . 31 , 1997 in the name of van hudson , and entitled &# 34 ; spacecraft cellular communication system &# 34 ;. the ground station 218 transmits the signals by way of an antenna 220 , over an uplink , to a spacecraft 250 , which acts a &# 34 ; bent - pipe &# 34 ; repeater , to retransmit the signals over a downlink toward the earth , often with a frequency offset . the retransmitted signal is received by an antenna 222 at another ground station 224 , which processes the signal to restore its 24 kbps full - channel , 6 kbps quarter - channel data rate . the 24 kbps full - channel , 6 kbps quarter - channel data rate signals are applied to a processor 226 , which uses the edac signals to produce what is expected to be error - free data at 3 kbps , organized as illustrated in fig5 a and 5b . the output from processor block 226 is also the output port 215o of link 215 . the 3 kbps is applied from link 215 to a demultiplexer 228 , which receives the alternating frames of fig5 a and 5b , and performs several functions , including storing of the 15th and 30th bit position data for one frame interval , so that the data available from the current one of the frames , which lacks either s3 , s8 or s4 , s9 , can be combined with the stored values from the previous frame . the 2 . 4 kbps data stream is applied from demultiplexer 228 of fig4 over a signal path d to second rate adapter 230 , while the control / synch bits are applied over a c path to rate adapter 230 . second rate adapter 230 converts the 2 . 4 kbps data and associated control bits into an 8 kbps data stream , organized into 10 msec , 80 - bit frames pursuant to the v . 110 international telecommunications union ( itu ) as illustrated in fig3 . this is accomplished in second rate adapter block 230 by ( a ) duplicating each of data bits d1 , . . . , d24 , and inserting the paired bits into the appropriate locations in the v . 110 frames , ( b ) inserting 17 synchronization bits , namely eight zeroes and nine ones , into the v . 110 frames , ( c ) retrieving the stored values of e1 , e2 , and e3 from memory , and inserting the values into the frame , ( d ) inserting binary ones in place of e4 , e5 , and e6 , and ( e ) duplicating the x bit , and inserting it into the proper locations in the v . 110 frame of fig3 . the procedure performed by block 230 , as described above , is simple enough so that no flow chart is needed in order to understand its operation . the 80 - bit , 10 msec v . 110 frames as illustrated in fig3 produced by second rate adapter 230 of fig4 are applied to a third rate adapter 32 , in known manner , to convert the 8 kbps data to 64 kbps , compatible with integrated service data network ( isdn ) service . other embodiments of the invention will be apparent to those skilled in the art . for example , while the described system includes a satellite repeater as part of the air link , the same bandwidth efficiency advantage can be obtained in a terrestrial repeater system . such terrestrial repeaters may be in cellular personal communications systems ( pcs ). thus , a digital communication system ( 210 ) according to an aspect of the invention , for communicating with an isdn - compatible system ( 36 , 38 ) having a bit rate of 64 kbps over a communication link ( 215 ) having a data rate of 3 kbps , includes a source ( 12 ) of synchronous information data at a data rate of 2 . 4 kbps , and associated control bits . the digital communication system ( 210 ) also includes a first rate adaptation arrangement ( 214 ) coupled to the source of information data ( 12 ) and to an input port ( 215i ) of the link ( 15 ). the first rate adaptation arrangement ( 214 ) converts the data rate of 2 . 4 kbps to a data rate of 3 kbps . the 3 kbps data is organized into successive 10 msec frames , each of 30 bits . each of the 10 msec , 30 - bit frames includes a single x status bit , and an e7 bit which alternates binary states from one frame to the next . each of the 10 msec , 30 - bit frames also includes s3 and s8 status bits , but not s4 and s9 status bits , during those frames in which the e7 bit takes a first binary state . each of the 10 msec , 30 - bit frames further includes s4 and s9 status bits , but not s3 and s8 status bits , during those frames in which the e7 bit takes a second binary state . consequently , information relating to the s3 and s4 bits is multiplexed onto alternate ones of the 10 msec ., 30 - bit frames , and information relating to the s8 and s9 bits is multiplexed onto alternate other ones of the 10 msec ., 30 - bit frames . the first rate adaptation arrangement ( 214 ) transmits the 3 kbps data over the link ( 215 ). a second rate adaptation arrangement ( 228 , 230 ) is coupled to an output port ( 215o ) of the link ( 215 ), for converting the 3 kbps data received from the link to 8 kbps , organized as 10 msec , 80 - bit v . 110 frames . the communication system further includes a third rate adaptation arrangement ( 32 ) coupled to the second rate adaptation arrangement ( 30 ), for converting the 8 kbps data to 64 kbps , isdn - compatible data . the first binary state of the e7 bit may be binary 0 , and the second binary state in that case is binary 1 . in a particular embodiment of the invention , each the 10 msec , 30 - bit frames further includes s1 and s6 bits , and 24 data bits denominated d1 , d2 , d3 , d4 , d5 , d6 , d7 , d8 , d9 , d10 , d11 , d12 , d13 , d14 , d15 , d16 , d17 , d18 , d19 , d20 , d21 , d22 , d23 , and d24 . the sequence in which the 30 bits occur in the 10 msec , 30 - bit frame is d1 , d2 , d3 , s1 , d4 , d5 , d6 , x , d7 , d8 , d9 , d10 , d11 , d12 , one of s3 and s4 , d13 , d14 , d15 , e7 , d16 , d17 , d18 , s6 , d19 , d20 , d21 , d22 , d23 , d24 , and one of s8 and s9 . in a particular embodiment of the invention , each the 10 msec , 30 - bit frame generated by the first rate adaptation arrangement ( 214 ) further includes s1 and s6 bits , and 24 data bits denominated d1 , d2 , d3 , d4 , d5 , d6 , d7 , d8 , d9 , d10 , d11 , d12 , d13 , d14 , d15 , d16 , d17 , d18 , d19 , d20 , d21 , d22 , d23 , d24 . in this particular embodiment , the second rate adaptation arrangement ( 30 ) includes a memory ( 18m ) preloaded with information specifying the values of e1 , e2 , and e3 bits . the second rate adaptation arrangement ( 30 ), which is coupled to the output port ( 215o ) of the link ( 215 ), maps information from at least each pair of the 10 msec 30 - bit frames to a 10 msec ., 80 - bit frame , in accordance with the v . 110 standard of the consultative committee for international telephone and telegraph ( ccitt ), now international telecommunications union ( itu ). the v . 110 , 10 msec , 80 - bit frame has the first eight bits set to a first binary state , and also has the 9th , 17th , 25th , 33d , 41st , 49th , 57th , 65th , 73d bits set to a second binary state . the other 73 bits of the 10 msec , 80 - bit frame are available for carrying information . the mapping from the 30 - bit frames to the 80 - bit frames is accomplished by setting , in each of the 80 - bit v . 110 frames , the d1 , d2 , d3 , d4 , d5 , d6 , d7 , d8 , d9 , d10 , d11 , d12 , d13 , d14 , d15 , d16 , d17 , d18 , d19 , d20 , d21 , d22 , d23 , d24 data bits , and the x and e7 bits , in accordance with the corresponding value in the current one of the 10 msec , 30 - bit frames , and by setting the s1 , s3 , s4 , s6 , s8 , and s9 bits , also in accordance with the corresponding values found in the current one of the 10 msec , 30 - bit frames . for those of the s3 , s4 , s8 , and s9 bits not found in the current one of the 10 msec , 30 - bit frames , the corresponding bits of the v . 110 10 msec , 80 - bit frame are set to the values found in the preceding one of the 10 msec , 30 - bit frames . the e1 , e2 , and e3 bits of the v . 110 10 msec , 80 - bit frame are set to the values stored in the memory ( 30m ) of the second rate adaptation arrangement ( 30 ). the e4 , e5 , and e6 bits of the v . 110 10 msec , 80 - bit frame are set to the second binary state . the first binary state may correspond to a binary 0 , and the second binary state to a binary 1 . in a particularly advantageous embodiment of the invention , the link ( 215 ) includes an air link or path ( 249 ), which may be between a satellite ( 250 ) and one or more ground terminals or users ( 218 , 224 ).