text: the embodiments of the present invention will be described below with reference to the accompanying drawings . fig1 is a circuit diagram showing one embodiment of a voltage - controlled oscillator ( vco ) according to the present invention . as shown in fig1 , the vco includes an lc parallel resonant circuit ( lc tank circuit ) 100 , a first amplifier circuit 120 , and a second amplifier circuit 140 . the lc parallel resonant circuit 100 is essentially a loop , which as shown in fig1 , includes an inductor l , two fixed capacitors c 01 and c 02 , and two variable capacitors c 03 and c 04 . an intermediate tap on the inductor l is connected to a supply voltage v dd . the capacitances of the variable capacitors c 03 and c 04 vary with a control input voltage v ctl which is applied to their input terminals via a node connecting between them . the two ends of the inductor l are connected to output terminals which provide the two output signal voltages v out1 and v out2 of the vco . the first and second amplifier circuits 120 and 140 act as a negative resistance circuit that supplies energy to the lc parallel resonant circuit 100 in such a manner as to cancel out the resistance of the resonant circuit 100 by introducing negative resistance into the resonant circuit 100 . that is , n - channel mos ( metal - oxide semiconductor ) fet ( field - effect ) transistors contained in the respective amplifier circuits act to increase the current that flows through the lc parallel resonant circuit 100 . more specifically , the first amplifier circuit 120 is provided in parallel with the lc parallel resonant circuit 100 , and includes a first transistor pair formed from transistors ( nmosfets ) q 11 and q 12 cross - coupled via capacitors c 11 and c 12 . that is , the first output signal voltage v out1 is connected not only to the drain of the transistor q 11 but also to the gate of the transistor q 12 via the dc - cut capacitor c 11 . likewise , the second output signal voltage v out2 is connected not only to the drain of the transistor q 12 but also to the gate of the transistor q 11 via the dc - cut capacitor c 12 . the sources of the transistors q 11 and q 12 are both grounded . on the other hand , the gates of the transistors q 11 and q 12 are connected to a bias voltage v gbias1 via resistors r 11 and r 12 , respectively . the second amplifier circuit 140 has essentially the same circuit configuration as the first amplifier circuit 120 . the difference is that the gates of the transistors q 21 and q 22 are connected to a bias voltage v gbias2 , which is higher than v gbias1 . the vco shown in fig1 oscillates while maintaining the oscillations in the lc parallel resonant circuit 100 , by the action of the negative resistance circuit formed by the amplifier circuits 120 and 140 . when the total inductance value in the lc parallel resonant circuit 100 is denoted by l , and the total capacitance value by c , the oscillation frequency f of the resonant circuit 100 is expressed by the following equation . the two output signal voltages v out1 and v out2 of the vco are 180 ° out of phase with each other as shown by the following equations , where a t is the amplitude of each output voltage and φ is the phase of either one of the output voltages . here , v ds represents the drain - source voltage of the transistor q 11 . fig2 shows the voltage waveform of one output signal voltage v out1 , i . e ., v ds , along with voltage waveforms for a voltage v gs1 - v th obtained by subtracting the threshold voltage v th from the gate - source voltage v gs1 of the transistor q 11 and a voltage v gs2 - v th obtained by subtracting the threshold voltage v th from the gate - source voltage v gs2 of the transistor q 21 . the abscissa represents the phase φ (− π ( rad ] to + π ( rad ]). in the amplifier circuits 120 and 140 , the gate bias voltage v gbiasn ( n is 1 or 2 ) is adjusted relative to the transistor threshold voltage v th such that further , the gate bias voltage v gbiasn is set so that the following relationship holds . the transistor q 11 conducts in the phase range represented by − φ 1 [ rad ]& lt ; φ & lt ;+ φ 1 [ rad ] where v gs1 - v th & gt ; 0 . in the illustrated example , φ 1 = π / 5 . on the other hand , the transistor q 21 conducts in the phase range represented by − φ 2 [ rad ]& lt ; φ & lt ;+ φ 2 [ rad ] where v gs2 v th & gt ; 0 . in the illustrated example , φ 2 = π / 2 & gt ; φ 1 . as a result , drain - source currents i ds1 and i ds2 with current waveforms shown in fig3 flow through the respective transistors q 11 and q 21 . the waveform of the total current i ds1 + i ds2 and the current waveform of a conventional single - conduction class - c vco ( φ 0 = 0 . 4 π ) are also shown in fig3 . according to the dual - conduction class - c vco of the present invention , the equivalent conduction angle can be reduced as shown by the waveform of the current i ds1 + i ds2 . then , the current i ds1 having the smaller conduction angle 2 φ 1 contributes to achieving low phase noise , since the current flows in a concentrated manner in a region centered about the phase φ = 0 where the isf ( impulse sensitivity function ) is the smallest . on the other hand , the current i ds2 having the larger conduction angle 2 φ 2 serves as an oscillation startup current to ensure stable oscillation startup and stable oscillation maintenance . for transistors q 21 and q 22 , where the current i ds2 having the larger conduction angle flows , it is preferable to reduce their transistor sizes . further , the conduction angle 2 φ 1 can be reduced by reducing v gbias1 as much as possible under conditions determined by the amplitude . with the above operation , the vco shown in fig1 can achieve higher performance than the conventional circuit scheme in terms of fom ( figure of merit : phase noise characteristic normalized by power consumption and oscillation frequency ). table 1 below shows a comparison between the circuit scheme of the present invention and the conventional circuit scheme . in the conventional circuit scheme , the lowest possible operating voltage was about 0 . 35 [ v ], but in the circuit scheme of the present invention , the circuit can operate at 0 . 2 [ v ], thus achieving low power consumption , as well as low phase noise . fig4 a and 4b are diagrams showing modified examples of the amplifier circuits 120 and 140 in the voltage - controlled oscillator ( vco ) of fig1 . in the amplifier circuits shown in fig1 , the source of each transistor is directly grounded . however , as shown in fig4 a , the sources of the two transistors may be connected together and their connection point may be grounded via a parallel circuit comprising a current source that flows a constant bias current i bias and a capacitor c tal for flowing an alternating current . this configuration serves to reduce the current . alternatively , as shown in fig4 b , the current source i bias may be replaced by a resistor r tail that forms a pseudo current source . fig5 is a circuit diagram showing another embodiment of a voltage - controlled oscillator ( vco ) according to the present invention , and fig6 a and 6b are diagrams showing modified examples of the amplifier circuits in the voltage - controlled oscillator ( vco ) of fig5 . in the vco shown in fig1 , an n - channel mosfet is used for each transistor . however , as shown in fig5 , each amplifier circuit may be constructed using p - channel mosfets instead of n - channel mosfets . in that case , the sources of the two p - channel mosfets may be connected together and their connection point may be connected to the supply voltage v dd via a parallel circuit comprising a bias current source i bias or resistor r tail and a capacitor c trl , as shown in fig6 a and 6b . further , in each of the circuits shown in fig1 , 4 a , and 4 b and fig5 , 6 a , and 6 b , n - channel junction field - effect transistors ( jfets ) or p - channel jfets may be used instead of the n - channel mosfets or the p - channel mosfets , respectively . it is also possible to use npn bipolar transistors or pnp bipolar transistors instead of the n - channel mosfets or the p - channel mosfets , respectively . when bipolar transistors are used instead of the field - effect transistors ( unipolar transistors ), the sources are replaced by the emitters , the gates by the bases , and the drains by the collectors . while the above embodiments have each been described as being provided with two amplifiers each having a cross - coupled transistor pair , it is also possible to connect a third amplifier circuit in parallel with the lc parallel resonant circuit and to achieve class - c amplifier operation with a third conduction angle by applying a third bias voltage to its gate or base . such a vco configuration can achieve a further precise oscillation - startup and low - noise design . in other words , the number of amplifier circuits each having a cross - coupled transistor pair can be suitably chosen according to the design . the voltage - controlled oscillator according to the present invention can be used in application that require ultra - low power consumption , such as wireless sensor networks , battery - driven mobile devices , and biometrics . the invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof . the present embodiment is therefore to be considered in all respects as illustrative and not restrictive , the scope of the invention being indicated by the appended claims rather than by the foregoing description and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein .