text: referring now to fig1 ( a )- 1 ( g ), illustratively depicted therein are the steps of fabricating a field emitter cell 100 according to the first embodiment of the present invention . the field emitter cell 100 is formed on a conductive or semiconductive substrate layer 102 . optimally , substrate layer 102 is a porous silicon substrate with a nanoporous layer in order to provide for highly directional nanotube growth . a catalyst layer 104 is deposited on substrate layer 102 by sputtering or evaporative deposition of a suitable catalyst material . the catalyst layer promotes the growth of nanofilaments of interest under appropriate growth conditions ( described below ). for carbon nanotube growth , the most effective catalyst layer may comprise iron , nickel or cobalt . optionally , at this point , the catalyst - coated substrate may be annealed in air to anneal and oxidize the catalyst layer 104 . alternatively , the annealing / oxidation of catalyst layer 104 may be done later or it may be left unoxidized . insulator layer 106 , composed of sio 2 or other suitable insulator material , is deposited to a few thousand angstroms thick . gate layer 108 is then deposited on insulator layer 106 . gate layer 108 is composed of either a semiconducting material , a metal , or a multiple layer conductive material that does not catalyze nanofilament growth . for example , the material of gate layer 108 may comprise two layers including a chromium layer on a p - type polysilicon layer deposited over the insulator layer 106 . gate aperture 110 is formed by patterning and etching using any of a number of techniques known in the art such as the one described in the commonly - owned u . s . pat . no . 6 , 084 , 245 , herein incorporated by reference . for example , circular posts of resist ( not shown ) are patterned and fabricated on the gate layer 108 followed by evaporation deposition of a thin chromium layer and then lift - off of the resist post to leave patterned circular apertures in the chromium layer ( not shown ). using the chromium layer as an etch mask , standard reactive ion etching ( rie ) is used to anisotropically etch aperture 110 through gate layer 108 and insulator layer 106 , terminating on the catalyst layer 104 . referring now to fig1 ( b ), preferably a cvd method is used to deposit a conformal , stand - off layer 112 on the horizontal surfaces 109 of gate layer 108 and along the vertical sides of gate layer 108 and insulator layer 106 and the horizontal surface of catalyst layer 104 exposed during the etching of aperture 110 . the thickness of stand - off layer 112 is adjusted to reduce the diameter of aperture 110 . referring now to fig1 ( c ), standard anisotropic rie of the stand - off layer is carried out to remove the stand - off layer 112 disposed on the horizontal surface 109 of gate layer 108 . in addition , rie removes stand - off layer 112 deposited at the bottom of aperture 110 , thereby exposing catalyst layer 104 . if catalyst layer 104 was not previously annealed and oxidized prior to stand - off layer 112 deposition , cell 100 is optionally annealed in air at a temperature to substantially oxidize the exposed catalyst layer 104 as previously described . referring now to fig1 ( d ), nanofilaments are grown on top of the exposed catalyst layer 104 disposed at the bottom of gate aperture 110 . nanofilaments 114 are grown , preferably , perpendicular to and in selective areas over the catalyst surface 104 using growth conditions known in the art , such as those described in connection with the method discussed in science , vol . 283 , 512 ( 1999 ) by s . fan et al ., herein incorporated by reference . nanofilaments 114 , composed of carbon nanotubes , initiate growth on the iron / iron oxide particles that form catalyst layer 104 . optimally , the nanofilaments 114 are grown to the level of gate layer 108 or slightly below , although they may also be at a higher level than the gate layer 108 . nanofilaments 114 , composed of carbon nanotubes , should be grown under conditions that do not form non - nanofilament carbonaceous material on surfaces that do not contain a catalyst . for example , a low hydrocarbon - to - reducing gas ratio should be used in a cvd method . if needed , cleaning / clearing debris from the top surfaces of field emitter cell 100 such as horizontal surfaces 109 and the horizontal surface 113 of stand - off layer 112 , may be accomplished by first filling gate aperture 110 with a protective layer such as a resist or silicon dioxide , followed by perpendicular rie using oxygen to remove any carbonaceous layer and to etch away the top surface until the residual debris layer is removed . referring now to fig1 ( e ), field emitter cell 100 is optionally dipped in a buffered hydrofluoric ( hf ) solution to remove the upper portion of stand - off layer 112 . the hydrofluoric acid removes a portion of the stand - off layer 112 along with cutting into ( i . e ., removing ) a portion of insulator layer 106 adjacent nanofilament clump electrode 116 in areas 118 . the hydrofluoric acid is removed by gentle rinsing or weak sonication in distilled water . optimally , residual water in the cells is removed through a process of freeze - drying . during the freeze - drying , residual water is removed by sublimation . the freeze - drying minimizes the sticking of the individual nanofilaments 114 to the sidewall ( s ) of the aperture after a wet treatment . an alternative method of drying is by critical point drying , a technique commonly used to preserve mechanical integrity of biological specimen , in which the water is first replaced with a solvent which is then replaced with a liquefied gas ( e . g ., carbon dioxide ). minimum distortion occurs upon vaporization of the liquefied gas . a portion of unanchored or weakly anchored nanofilaments 114 may be dislodged during the hydrofluoric acid and water rinse . mechanical and electrical anchoring of the remaining attached nanofilaments to the fea 100 , can be enhanced by electroplating with nickel at the base where the nanofilaments 114 meet catalyst layer 104 . referring now to fig1 ( f ), if nickel plating is desired , a sufficiently long hydrofluoric acid dip / rinse is first conducted to remove stand - off layer 112 from within aperture 110 , thereby exposing catalyst layer 104 . subsequently , nickel 120 is plated up from the freshly exposed portions of the catalytic layer 104 at the bottom of aperture 110 . an alternative to the afore - mentioned hf treatment to remove the top portion of the stand - off layer 112 is by dry etching such as reactive ion etching , thereby avoiding the problem of stiction which would cause the nanofilaments to stick to the sidewalls of the aperture after a wet treatment . referring now to fig1 ( g ), along with fig1 ( e ) and 1 ( f ), the resulting field emitter 100 has a gate layer 108 with a circular gate aperture 110 . clump electrode 116 forms the emitter portion consisting of a group of nanofilaments 114 with circular symmetry centered within gate aperture 110 . vacuum gap 122 is disposed between the top portion of clump cathode 116 , insulator layer 106 , and the edge of the gate aperture 110 , electrically isolating the nanofilament emitters from the gate . electrical contact is established between the clump cathode 116 , substrate 102 , and any layers there between . operation of field emitter cell 100 involves the application of a positive voltage bias to the gate layer 108 relative to the clump cathode 116 to extract field emission of electrons from the clump cathode 116 . electrons may be collected on an anode ( not shown ) placed at a distance above the field emitter array device 100 . many modifications may be made to this first embodiment to accommodate various manufacturing processes and operating conditions . for example , although nanofilaments 114 are composed of carbon nanotubes , alternate nanofilaments may be nanowires composed of si , ge , sic , gaas , gap , inas , inp , zns , znse , cds , cdse , mos 2 , ws 2 , and combinations thereof grown under appropriate growth conditions known in the art . in addition , although clump cathode 116 is formed as a circular group of nanofilaments 114 , other geometrical shape may be substituted , such as but not limited to , linear , square , and rectangular ( not shown ) by making appropriately modifications to the method described above . as is obvious to one of ordinary skill in the art , the placement and shape of the starting template structures ( e . g . aperture ) on the substrate determines the location and shape of resulting emitter cathodes , cells , and array . fig2 ( a )- 2 ( g ) there is illustratively depicted a second embodiment which differs from the first embodiment in that in the second embodiment , catalyst layer 204 is deposited after gate layer 208 and stand - off layer 212 is deposited and etched . therefore , the various processing steps of the second embodiment are the same as in the first embodiment unless otherwise noted . insulator layer 206 is deposited directly on substrate layer 202 by any suitable manner known in the art . subsequently , gate layer 208 is formed on insulator layer 206 , and gate aperture 210 is patterned and etched . stand - off layer 212 is deposited along the surface of cell structure 200 which includes along the gate layer horizontal surface 209 , the vertical wall surfaces within gate aperture 210 and along surface 203 of substrate 202 exposed during the etching of gate aperture 210 ( fig2 ( b )). next , stand - off layer 212 is removed from the horizontal surfaces of cell structure 200 , namely gate layer horizontal surface 209 and substrate surface 203 , using an anisotropic rie ( fig2 ( c )). catalyst layer 204 is directionally deposited along surface 203 , and along the horizontal surface 209 of gate layer 208 . in addition , some catalyst material may be residually deposited along the vertical wall surfaces within gate aperture 210 ( fig2 ( d )). catalyst layer 204 may be composed of the same material as in the first embodiment . optimally , the material of gate layer 208 passivates the material of catalyst layer — that is , under the nanofilament growth conditions , the catalyst layer on such a gate material no longer catalyze growth of nanofilaments . however , it is not necessary for the material of gate layer 208 to passivate the catalyst in this 2 nd embodiment . catalyst material deposited on gate layer 208 and the top portion of the vertical side wall of stand - off layer 212 is removed while leaving catalyst layer 204 intact at the bottom of gate aperture 210 on substrate surface 203 . two methods may be used to accomplish this . the catalyst layer 204 at the bottom of gate aperture 210 is protected by first spinning a resist layer 224 over the field emitter 200 ( fig2 ( d )). next , isotropic etching with oxygen plasma or anisotropic oxygen rie removes most of the resist layer 224 except for a portion on top of catalyst layer 204 at the bottom of gate aperture 210 . subsequently , acid dissolution removes catalyst layer 204 from all surfaces not protected by resist 224 ( fig2 ( e )). alternatively , rather than depositing resist layer 224 followed by isotropic etching using oxygen plasma , catalyst layer 204 may be selectively removed from all surfaces except from the bottom of aperture 210 by glancing angle sputtering . nanofilaments 214 are grown ( fig2 ( f )) and field emitter 200 is then dipped in hydrofluoric acid , rinsed in water , and freeze - dried ( fig2 ( g )). the hydrofluoric acid rinse removes the upper ( i . e ., top ) portion of stand - off layer 212 and undercuts insulator layer 206 in area 218 . as with the first embodiment , the base of clump cathode 216 between nanofilaments 214 and the side - wall of aperture 210 may be optionally reinforced as described above . alternatively , the upper portion of standoff layer 212 can be removed by dry etching , which least disturbs the nanofilaments . referring now to fig3 ( a )- 3 ( g ), in a third embodiment , the starting substrate upon which the nanofilaments are grown is a post structure 330 . referring now specifically to fig3 ( a ), post 330 is formed by patterning and reactive ion etching ( rie ) a starting material of nanoporous silicon layer substrate 302 with catalyst layer 304 . the patterning and rie are standard microelectronic fabrication methods known in the art . catalyst layer 304 is optionally oxidized in the same manner as in the earlier described embodiments . nanofilaments 314 are preferably carbon nanotubes that are grown on top of post 330 under the same conditions as in the previous embodiments , resulting in clump cathode 316 ( fig3 ( b )). a conformal stand - off layer 312 composed of silicon nitride , silicon dioxide or tungsten , is deposited over the entire cell structure 300 structure ( fig3 ( c )). referring now to fig3 ( d ), planarization layer 332 is deposited over cell structure 300 along the top of stand - off layer 312 . planarization layer 332 is composed of a suitable insulator material such as silicon dioxide or spin - on glass of a different insulator material than that of stand - off layer 312 . standard planarization techniques such as chemical - mechanical - polishing ( cmp ) is performed on planarization layer 332 ( fig3 ( d )). selective directional rie is used to etch back planarization layer 332 to a desired height 334 below the top of stand - off layer 312 without etching the stand - off layer 312 ( fig3 ( e )). the desired height 334 determines the placement of the control gate relative to clump cathode 316 . referring now to fig3 ( f ), gate metalization material is directionally evaporated on top of planarization layer 332 to form gate layer 308 , and on the horizontal surface of stand - off layer 312 to form metalization cap 338 . care should be taken such that gate metalization material is not deposited on the vertical portions 313 of stand - off layer 312 . if necessary , a short etch may be used to remove any material inadvertently deposited on the vertical portions 313 of stand - off layer 312 . wet etch ( such as by hf ) or isotropic dry etch is carried out to remove the top portion 336 of stand - off layer 312 . the wet etch or isotropic dry etch also removes metalization cap 338 as well as removing a portion of stand - off layer 312 below metalization cap 338 , recessing stand - off layer 312 sufficiently below the top of clump cathode 316 ( fig3 ( g )). if a wet etch is used , freeze - drying is used to remove the residual liquid . referring now generally to fig4 ( a )- 4 ( i ), a fourth embodiment is shown which represents a modification of the processing method of the third embodiment . in the fourth embodiment , a catalyst layer 404 is deposited on post 430 after gate layer 408 is formed . referring specifically now to fig4 ( a ), post 430 is formed in a similar manner as post 330 with the exception that the starting structure is a post structure 430 on top of substrate 402 without a catalyst layer formed thereon . a silicon dioxide ( sio 2 ) stand - off layer 412 is thermally grown ( in case if the post and substrate are made of silicon ) or deposited over cell structure 400 including the horizontal surfaces 403 of substrate 402 and horizontal and vertical surfaces of post 430 ( fig4 ( b )). subsequently , planarization layer 432 , composed of sio 2 , gate layer 408 and metalization cap 438 are formed as in the third embodiment ( fig4 ( c )). a wet etch in buffered hf or isotropic dry etch removes the metalization cap 438 , the top portion of the stand - off layer and undercuts planarization layer 432 in areas 418 ( fig4 ( d ). a thin , conform cvd silicon dioxide forms sacrificial layer 440 ( fig4 ( e )) over all surfaces of the cell . next , directional rie is used to remove sacrificial layer 440 from the top of post 430 and the top of gate layer 408 while leaving the vertical sides of post 430 covered with the cvd silicon oxide sacrificial layer 440 ( fig4 ( f )). referring now to fig4 ( g ), catalyst layer 404 , such as nickel ( ni ) which is relatively resistant to reaction with hf is directionally deposited by sputtering or evaporation on the top surfaces of cell structure 400 which include on top of post 430 and gate layer 408 , as well as residually in gate aperture 410 along conformal sacrificial oxide layer 440 . optimally , under nanotube growth conditions , the material of gate layer 408 should alloy with the material of catalyst layer 404 , or in the alternative , material of gate layer 408 should passivate the material of catalyst 404 , thereby preventing nanofilament growth on gate layer 408 . for example , the gate material may be chromium ( cr ) which passivates ni . the field emitter 400 is briefly dipped in a dilute buffered hf solution to remove ( i . e ., lift off ) any catalyst material which may lie on top of the sacrificial silicon dioxide layer 440 in gate aperture 410 ( fig4 ( h )). the hydrofluoric acid removes both the unwanted catalyst present in aperture 410 as well as cvd silicon dioxide sacrificial layer 440 present in aperture 410 along the vertical wall surfaces of post 430 and along planarization layer 432 and gate layer 408 . a significant amount of catalyst should remain on the top surface of the post 430 . nanofilaments 414 , preferably carbon nanotubes , are grown on top of post 430 under similar conditions as set forth in the previous embodiments , resulting in clump cathode 416 ( see fig4 ( i )). one advantage of the fourth embodiment is that the nanofilament 414 placement can be above gate layer 408 . consequently , there is less of a chance that there will be a short between nanofilaments 114 and gate layer 408 . fig5 ( a )- 5 ( d ), depicted a fifth embodiment of the present invention . in this embodiment , nanofilament growth occurs on the top surface of a conventional tip - on post emitter ( 530 ) or conical tip emitter ( 531 ) known in the art . this embodiment differs from the fourth embodiment in that instead of using the blunt post structure of post 430 , this embodiment uses ready - made conventional field emitter structures of sharpened tip - on - post structure or a conical tip structure upon which nanofilaments are grown . otherwise , the processing steps of this embodiment are identical to that of the fourth embodiment . the formation of nanofilaments along the top of tip - on post 530 and conical tip 531 occurs in the same manner as in the fourth embodiment . specifically , a conformal silicon oxide sacrificial layer is first deposited over field emitter cells 500 , 501 , and then selectively removed by directional rie from the top surfaces of the tip - on - post 530 , or conical tip 531 , in a manner similar to that in the fourth embodiment . optimally , the gate aperture 511 of the conical tip design is small as practicable and should be smaller than the diameter of the base of the conical cathode 531 . next , a catalyst is deposited , the sample treated with hydrofluoric acid , rinsed in water , and nanofilaments are grown along the top surface of tip - on - post 530 , and conical tip 531 ( fig5 ( c ) and 5 ( d )), in similar manner as in the fourth embodiment . as a result , clump cathode 516 is formed of nanofilaments 514 protruding outward from the surface of the centers ( i . e ., upper portions ) of tip - on post 530 ( fig5 ( c )) and conical tip 531 ( fig5 ( d )). the lengths of the nanofilament 514 should be limited so that the nanofilaments are relatively short and do not come into contact with other parts of the emitter ( for example , the gate layer 508 or insulator 532 ). preferably , the lengths of the nanofilaments should be a small fraction of the distance between the top of the original ( tip - on - post or conical tip ) to the edge of the gate aperture 510 and 511 . optimally , although not essential , tip - on post 530 and conical tip 531 should be of a material that does not passivate the catalyst material 504 . if the emitter tip material passivates the catalyst , the tip should be coated with a material that prevents diffusion of the catalyst material into the tip material under nanofilament growth conditions . as with the previous embodiments , it is preferable that the material of gate layer 508 does passivate the catalyst material so that no nanofilaments will grow on the gate layer 508 . if the gate material does not passivate the catalyst material , it is necessary to remove the catalyst material from the top surface and the edge of the gate . sputtering at a glancing angle ( small angle relative to the surface of the substrate ) with an ion beam is one such way of removing the catalyst material . care should be taken that the angle is such that no portion of the tip - on - post or conical tip is sputtered . to remove catalyst material from any silicon dioxide surface ( for example , on the top surface or oxide insulator surface 532 or along the shank portion of conical portion tip - on post 530 ), the structure may be dipped in a buffered hf solution . however , the duration should be sufficiently short such that a significant amount of catalyst 504 still remains on the surfaces of the top portions of structures 530 and 531 . optimally , nanofilaments 514 are grown on the portion of tip on - post 530 and conical tip 531 covered with catalyst layer 504 using cvd method under lean hydrocarbon conditions ( i . e ., low hydrocarbon - to - reducing gas ratio ) to eliminate growth of non - nanofilament carbonaceous material on insulator layer 532 . the growth time should be limited so that nanofilaments 514 should be relatively short . if necessary , a short isotropic oxygen plasma , such as in a barrel etcher , can be used to remove any thin layer of carbonatious material from insulator layer 532 . if the insulator layer 532 is silicon dioxide , it can be optionally followed by a short dip in dilute buffered hf and subsequent water rinsed to ensure cleanliness of the surface of insulator 532 . precautions should be taken to prevent any nanofilaments 504 from lying down on the tip surface due to adhesion ( stiction ) after exposure to an aqueous environment of hf and water rinse . as with the previous embodiments , it is optimal to use a freeze - drying or a critical - point drying technique . an exemplary preferred implementation of the processing method of the fifth embodiment will now be considered . it will be understood that this example is provided to enhance understanding of the present invention and not to limit the scope or adaptability thereof . the starting structures were an array of the silicon tip - on - post gated field emitter cells fabricated according to a process developed at the microelectronic center of north carolina by a number of standard silicon microprocessing steps ( outlined in fig3 in d . temple , et . al ., j . vac . sci . technol . b 13 , 150 ( 1995 ) and in fig2 in l . n . yadon , et . al ., j . vac . sci . technol . b 13 , 580 ( 1995 )). the silicon tip - on - post emitter cell structure is schematically shown in fig5 ( a ) of the present disclosure . the silicon post height was about 4 microns , the post diameter was about 1 micron , and the post was topped with a very small and sharp conical silicon tip . the gate aperture diameter was 2 . 8 microns and the gate material was made of pure chromium , which apparently could survive the relatively high temperatures and conditions used for carbon nanotube ( cnt ) growth in the current example . moreover , chromium , under the cnt growth conditions used in this example , has been observed to passivate fe and ni catalysts ( e . g . no cnt growth on fe and ni - coated chromium surfaces ). since the sidewalls of the tip - on - post structure had some silicon dioxide left on it from processing , it was optional to omit the initial deposition of a conformal sacrificial silicon dioxide layer . in this example , the initial conformal silicon dioxide sacrificial layer had been omitted . next , a very thin layer of nickel catalyst was sputter - deposited on the substrate using an ion beam and a nickel foil as sputtering target . the nickel coated the surfaces of the chromium gate , the top surface of the tip - on - post ( including the small silicon tip ), and likely residually other surfaces in the emitter cell cavity . the sample was then briefly dipped in a dilute buffered hf solution and thoroughly rinsed ( by weak ultrasonication ) in distilled water . the hf removed much ( by lift - off ) much of the residual nickel that happened to be on any silicon dioxide surfaces in the emitter cell cavity . after drying by blowing with nitrogen and mild heating on a hot plate , the sample was placed on the flat top of a molybdenum cartridge heater in a hot filament chemical vapor deposition ( cvd ) flow reactor , in which the hot filament consisted of a tungsten ribbon suspended parallel to and about a centimeter above the sample . the cartridge heater and the tungsten filament were heated separately . the temperature was measured by a thermocouple in contact with the top surface of the cartridge heater . the gas flow was perpendicular to the surface of the sample . growth of the carbon nanotube emitters began by first heating the sample in flowing argon at a pressure of about 20 torr until a temperature of about 700 ° c . was reached , at which ammonia gas at a flow rate of 80 sccm replaced the argon and flowed onto the sample . the hot filament was immediately turned on and maintained at a filament temperature of about 1900 ° c . as monitored by an optical pyrometer . five minutes after turning on the hot filament , ethylene gas at a flow speed of 20 sccm was admitted into the flow reactor . the final temperature and pressure were maintained at 683 ° c . and 23 . 3 torr , respectively . the hot filament , the ethylene gas , and ammonia gas were shut off 4 . 5 minutes after the admission of the ethylene gas . argon at about 25 torr was then flowed as the sample was cooled down slowly . scanning electron microscope examination showed carbon nanotubes on the top surface of the tip - on post cathode structure and no carbon nanotubes on the chromium gate . the sample was subjected to field emission test in an ultra - high vacuum chamber equipped with electrically conductive cathode , gate , and anode probes to provide electrical contact to the individual pixels ( arrays ) of the field emitter and to measure the current of the field - emitted electrons . for a pixel consisting of 33 , 000 emitter cells , the collected emission current ( anode current ) was measured as a function of the voltage applied to the gate electrode ( with the cathode at ground ). the results are shown in fig5 ( e ). an important result is the low turn on voltage ( e . g . ˜ 17 volts ) compared to about 80 volts obtained for an array of silicon tip - on post fea ( without the nanotubes ). the result for the latter sample is consistent with the 80 - 90 volts required by the silicon tip - on post structures in references by d . temple , et . al ., and l . n . yadon , et . al . ( above mentioned ). this low turn - on voltage for the present nanotube - decorated example can be attributed to the carbon nanotubes acting as field emitters . there can be a wide latitude on the growth parameters , such as different catalysts ( e . g . fe , co ), temperatures ( 500 - 1000 ° c . ), hydrocarbons ( e . g . methane , acetylene ), reducing agents ( hydrogen ), flow rates , pressures , and even a variety of growth techniques including thermal , microwave , and rf cvd methods as well as arc and laser - assisted catalytic growth methods . in a cvd method , a low hydrocarbon - to - reducing agent ratio is necessary to minimize amorphous carbon deposition on catalyst - free surfaces , to avoid electrically shorting out the emitter cell ( between cathode and gate ). in a sixth embodiment , the control gate is formed as offset gate aperture 609 in which the gate aperture is offset by distance 650 from the edge of the aperture 611 in insulator layer 606 ( see fig6 ( a ). the offset of a gate aperture from that of the insulator layer has previously been described in patent application ser . no . 09 / 478 , 899 filed on jan . 7 , 2000 , herein incorporated by reference . the sixth embodiment is based on the second embodiment . all processing steps are the same as those in the second embodiment except that the starting cell structure has an off - set gate aperture . a similar offset of gate aperture 609 from the insulator aperture 611 formed therebelow may also be incorporated into the other embodiments . likewise , other embodiments of gate offset in patent application ser . no . 09 / 478 , 899 are also incorporated into the present embodiment and other embodiments of the present invention as applicable . one possible advantage of having an offset gate layer is to reduce the gate current by precluding a direct - line - of sight from the nanofilament emitter to the gate . an exemplary preferred implementation of the processing method of the sixth embodiment will now be considered . it should be understood that this example is provided to enhance understanding of the present invention and not to limit the scope or adaptability thereof . the starting structure was similar to that shown in fig2 ( a ), except that the gate was offset ( having a larger diameter than that of the hole in the insulator layer ). the methods for fabricating starting structures with offset gates were also given in a commonly - owned patent application ( patent application ser . no . 09 / 478 , 899 ). the gate material consisted of a 60 nm thick chromium layer on top of a 150 nm thick p - type silicon layer . the hole in the insulator layer had a diameter of 1 . 2 microns and the gate diameter was 2 . 25 microns ( e . g . the offset was about 0 . 5 micron ). a stand - off cvd silicon dioxide layer ( nominally 0 . 42 micron thick on top flat surface ) was then deposited over the structure , followed by oxide etch back by rie of 0 . 45 micron of silicon dioxide . sem analysis showed a 0 . 32 micron thick stand - off layer on the vertical sidewall of the hole , leaving an open , inner hole of about 570 nm diameter . a thin layer of fe was then deposited over the sample using an ion beam and a fe foil as sputtering target . next , a 0 . 25 micron thick shipley 1400 photoresist was spin - coated over the sample , followed by baking at 90 ° c . for 30 minutes . oxygen plasma using a barrel etcher was used to remove the resist from the top horizontal surface and from the upper portion of the hole . the exposed fe was removed by dipping the sample in an acid solution . after rinsing in water and drying , the sample was ultrasonicated in acetone , followed by ethanol to remove the resist from the bottom portion of the hole , thereby exposing the fe catalyst on the bottom portion of the hole . the growth of the carbon nanotube emitters was carried out under similar conditions as described above in reference to the exemplary implementation of the fifth embodiment , except a dc voltage bias was placed on the hot filament with respect to the top surface of the cartridge heater and that a growth duration of only 40 seconds was used . the purpose of the voltage bias was to promote more oriented growth of the carbon nanotubes . field emission test was carried out on a small pixel of an array of 20 emitter cells . the anode current and the gate current were measured simultaneously as a function of the voltage applied to the gate electrode . the results are shown in fig6 ( b ). a turn - on voltage below 35 volt was observed . fig6 ( b ) also shows that the gate current is a very small fraction of the anode current , a result expected from an offset gate design . an offset gate can also be expected to require a higher turn - on voltage than one without an offset . alternative photoresist etching could be done by oxygen reactive ion etching ( which is anisotropic ) instead of by the oxygen barrel etcher ( which is isotropic ), thereby gaining better control over the portion of resist to be removed . although the invention has been described above in relation to preferred embodiments thereof , it should be understood by those skilled in the art that variations and modifications can be effected in these preferred embodiments without departing from the scope and spirit of the invention .