text: the present invention is described below in detail in accordance with the embodiment shown in the accompanying drawings . fig1 is an illustration showing a hardware configuration of a computer system 10 to which this embodiment is applied . a computer provided with the computer system 10 is constituted as a notebook pc ( notebook - type personal computer ) mounting a predetermined os ( operating system ) in accordance with , for example , the oadg ( open architecture developer &# 39 ; s group ) specification . in the case of the computer system 10 shown in fig1 , a cpu 11 functions as brains of the whole computer system 10 and executes various programs in addition to a utility program under the control by the os . the cpu 11 is connected with components through buses of three stages such as an fsb ( front side bus ) 12 serving as a system bus , a pci ( peripheral component interconnect ) bus 20 serving as a high - speed i / o - drive bus , and an isa ( industry standard architecture ) bus 40 serving as a low - speed i / o - drive bus . the cpu 11 accelerates processings by storing program codes and data in a cache memory . in recent years , an sram of approx . 128 kb is integrated in the cpu 11 as a primary cache . to make up for a capacity deficiency , a secondary cache 14 of approx . 512 kb to 2 mb is set through a bsb ( back side bus ) 13 serving as a dedicated bus . moreover , it is possible to reduce cost by omitting the bsb 13 , connecting the secondary cache 14 to the fsb 12 , and thereby avoiding a package having a large number of terminals . the fsb 12 and pci bus 20 are connected each other by a cpu bridge ( host - pci bridge ) 15 referred to as a memory / pci chip . the cpu bridge 15 is constituted by including a memory - controller function for controlling the access operation to a main memory 16 and a configuration including a data buffer for absorbing the difference of data transfer rate between the fsb 12 and the pci bus 20 . the main memory 16 is a writable memory used as an area in which an execution program of the cpu 11 is read or a work area in which execution - program processing data is written . for example , the main memory 16 is constituted by a plurality of dram chips , normally equipped with 64 mb , and can be extended up to 320 mb . the execution program includes various drivers for hardware - operating oss and peripheral units , an application program for a specific business , and firmware such as a bios ( basic input / output system ) stored in a flash ram 44 to be described later . a video subsystem 17 is a subsystem for realizing a function relating to video and includes a video controller . the video controller processes a drawing instruction sent from the cpu 11 and writes processed drawing information in a video memory and reads the drawing information from the video memory to output the information to a liquid - crystal display ( lcd ) 18 as drawing data . the pci bus 20 is a bus capable of transferring data at a comparatively high speed , which is standardized by the specification in which a data bus width is set to 32 or 64 bits , the maximum operating frequency is set to 33 or 66 mhz , and the maximum data transfer rate is set to 132 or 528 mb / sec . the pci bus 20 connects with an i / o bridge 21 , a card bus controller 22 , an audio subsystem 25 , a docking station interface ( dock i / f ) 26 , and a mini pci connector 27 . the card bus controller 22 is a dedicated controller for directly connecting a bus signal of the pci bus 20 to the interface connector ( card bus ) of a card bus slot 23 and it is possible to set a pc card 24 to the card bus slot 23 . the docking station interface 26 is hardware for connecting a docking station ( not illustrated ) serving as a function extension unit of the computer system 10 . when a notebook pc is set to the docking station , various hardware elements connected to an internal bus of the docking station are connected to the pci bus 20 through the docking station interface 26 . moreover , a mini - pci ( minipci ) card is connected to the minipci connector 27 . the i / o bridge 21 has a bridge function between the pci bus 20 and the isa bus 40 . moreover , the i / o bridge 20 is provided with a dma controller function , programmable interrupt controller ( pic ) function , programmable interval time ( pit ) function , ide ( integrated device electronics ) interface function , usb ( universal serial bus ) function , and smb ( system management bus ) interface function and has a built - in real - time clock ( rtc ). the dma controller function is a function for transfer data between a peripheral equipment such as an fdd and the main memory 16 without using the cpu 11 . the pic function is a function for executing a predetermined program ( interrupt handler ) in response to an interrupt request ( irq ) sent from a peripheral equipment . the pit function is a function for generating a timer signal at a predetermined cycle . moreover , an interface realized by the ide interface function connects with not only an ide hard disk drive ( hdd ) 31 but also a cd - rom drive 32 through an atapi ( at attachment packet interface ). it is allowed that the interface connects with other type of ide device such as a dvd ( digital versatile disk ) instead of the cd - rom drive 32 . external memories such as the hdd 31 and cd - rom drive 32 are set in a housing place referred to as “ media bay ” or “ device bay ”. these normally - set external memories may be exclusively set so as to be replaceable with other unit . moreover , the i / o bridge 21 is provided with a usb port and the usb port is connected with a usb connector 30 set to the wall surface of a notebook pc . furthermore , the i / o bridge 21 connects with an eeprom 33 through an sm bus . the eeprom 33 is a memory for holding pieces of information such as a password , supervisor password , and product serial number entered by a user , which is nonvolatile and whose storage contents can be electrically rewritten . furthermore , the i / o bridge 21 connects with a power circuit 50 . the power circuit 50 is provided with an ac adapter 51 connected to , for example , a commercial power source of 100 vac to perform ac / dc conversion , an intelligent battery 52 serving as a secondary battery , a battery change circuit 54 for charging the intelligent battery 52 and changing power - supply routes from the ac adapter 51 and intelligent battery 52 , and a dc / dc converter ( dc / dc ) 55 for generating dc constant voltages such as + 15 v , + 5 v , and + 3 . 3 v used for the computer system 10 . moreover , an internal register for controlling power - source states of the computer system 10 and a logic ( state machine ) for controlling power - source states of the computer system 10 including operations of the internal register are set in a core chip constituting the i / o bridge 21 . the logic transceives various signals to and from the power circuit 50 and recognizes an actual power - supply state from the power circuit 50 to the computer system 10 in accordance with the above signal transception . the power circuit 50 controls the power supply to the computer system 10 in accordance with a designation from the logic . the isa bus 40 is a bus having a transfer rate lower than that of the pci bus 20 ( e . g . bus width of 16 bits , maximum data transfer rate of 4 mb / sec ). the isa bus 40 connects with an embedded controller 41 , cmos 43 , flash rom 44 , super i / o controller 45 connected to a gate array logic 42 . moreover , the isa bus 40 is used to connect a peripheral equipment operating at a comparatively low speed such as a keyboard / mouse controller . the super i / o controller 45 connects with an i / o part 46 to drive an fdd and control input / output of parallel data ( pio ) through a parallel port and input / output of serial data ( sio ) through a serial port . the embedded controller 41 controls a not - illustrated keyboard and is connected to the power circuit 50 to bear a part of the power - source management function by a built - in power management controller ( pmc ) together with the gate array logic 42 . then , a power - supply system is described which is a characteristic configuration of this embodiment . fig2 is an illustration showing a circuit configuration of this power - supply system . the power - supply system is constituted by adding the embedded controller 41 and an ac - adapter - power stop circuit 80 to the power circuit 50 shown in fig1 . the power - supply system shown in fig2 includes an ac adapter 51 serving as a power - supply unit connected to a commercial power source and the intelligent battery 52 which is a secondary battery constituted by a lithium - ion battery used while repeating charge and discharge and conforming to an sbs ( smart battery system ). powers supplied from the ac adapter 51 and intelligent battery 52 are output the body system circuit of the computer system 10 via the dc / dc converter 55 shown in fig1 . moreover , the power - supply system shown in fig2 is provided with not only the embedded controller 41 for communicating with the intelligent battery 52 through a communication line 74 as the body system but also a voltage - measuring circuit 75 for measuring a voltage under over - discharge and communicating the measurement result to the embedded controller 41 , and a battery - connection check terminal 76 for confirming whether the intelligent battery 52 is connected under over - discharge as the body system . furthermore , the system comprises an ac - adapter - power stop circuit 80 for refreshing the intelligent battery 52 and a first diode ( d 1 ) 77 and a second diode ( d 2 ) 78 for performing rectification so that the power supply from the ac adapter 51 does not collide with the power supply from the intelligent battery 52 . though the ac adapter 51 serving as a power - supply unit is generally set outside of a unit 20 storing the computer system 10 serving as a body ( internal ) system in the case of an electrical apparatus such as a notebook pc , it may be set inside of the case of the electrical apparatus . a configuration in which an ac inlet or dc inlet through which a connector of a cable can be set or removed is considered as the body system . the ac inlet and dc inlet are respectively constituted so that a connector extended from a cable connected to the ac adapter 51 can be set or removed when the ac adapter 51 is set outside of the body system and so that a connector directly connected to a commercial power source can be set or removed when the adapter 51 is set inside of the body system . the intelligent battery 52 may be removable from the body system or may be set in the case of an electrical apparatus as a battery pack . then , an internal configuration of the intelligent battery 52 is described below . as shown in fig2 , the intelligent battery 52 comprises a cell 61 constituted by a plurality of single cells as a battery to be charged or discharged , a cpu 62 for controlling the intelligent battery 52 and communicating with the embedded controller 41 through the communication line 74 , a current - measuring circuit 63 for obtaining a current value charged by or discharged from the intelligent battery 52 , a voltage - measuring circuit 70 for obtaining the voltage of the cell 61 , and a temperature - measuring circuit 90 for measuring the temperature of the cell 61 . the cell 61 is a lithium - ion unit battery constituted by six cells of two - parallel three - series ( 1 . 8 ah / cell ). the cpu 62 set in the intelligent battery 52 a / d ( analog - to - digital )- converts an analog signal which is a measurement result input from the current - measuring circuit 63 or voltage - measuring circuit 70 inside and holds the information about a battery such as the capacity of the battery . the held information about a battery is transmitted to the embedded controller 41 of the system by the protocol of an sbs through the communication line 74 serving as a communication path . in the case of the current - measuring circuit 63 , a potential difference of voltage i ′ rs is generated at the both ends of a resistance ( rs ) 64 by a current i supplied from the cell 61 . the voltage is differentially amplified by an operational amplifier ( amp 1 ) 65 . moreover , a current i 1 proportional to an output voltage of the operational amplifier ( amp 1 ) 65 is supplied to a resistance ( r 1 ) 67 by an operational amplifier ( amp 2 ) 66 and a transistor 68 . finally , the value of the current i of the intelligent battery 52 can be converted into a voltage vi 1 ″ r 2 generated in a resistance ( r 2 ) 69 . the voltage ( 11 ″ r 2 ) is output to the a / d # 2 port of the cpu 62 and a / d - converted by the cpu 62 . moreover , the voltage - measuring circuit 70 measures the voltage of the intelligent battery 52 . specifically , the voltage of the cell 61 of the intelligent battery 52 is differentially amplified and converted by an operational amplifier ( amp 3 ) 71 and temporarily lowered to a low voltage and then , supplied to the a / d # 1 port of the cpu 62 and a / d - converted by the cpu 62 . as shown in fig2 , in the temperature - measuring circuit 90 , a thermistor ( thermal sensor ) 91 whose voltage is divided by a register is set nearby the cell 61 and a voltage generated by the thermistor 91 is applied to the a / d # 3 port of the cpu 62 . thus , a voltage supplied from the thermistor 91 is read by the cpu 62 and a / d - converted by the cpu 62 , and a temperature is measured . thereby , the intelligent battery 52 can hold the temperature information in the battery . thus , in the case of the cpu 62 , charge and discharge currents measured by the current - measuring circuit 63 , a battery voltage measured by the voltage - measuring circuit 70 , and temperature information obtained from the temperature - measuring circuit 90 are read and the capacity of the intelligent battery 52 ( cell 61 ) or the like is controlled . moreover , the cpu 62 transmits the data about a battery to the embedded controller 41 through the communication line 74 by using its communication function . the embedded controller 41 executes the control of stopping the power supply from the ac adapter 51 by the ac - adapter - power stop circuit 80 in accordance with a held battery state . in this case , a battery capacity can be controlled by performing current accumulation ( ah ) or power accumulation ( wh ). when controlling the battery capacity in accordance with the ah unit , it is basically possible to control the capacity of a battery only by a current value measured by the current - measuring circuit 63 . however , when controlling the battery capacity in accordance with the wh unit , a battery capacity is controlled by using not only a current value measured by the current - measuring circuit 63 but also a battery voltage measured by the voltage - measuring circuit 70 . a discharge current and a charge current supplied from the intelligent battery 52 ( cell 61 ) are used as current values measured by the current - measuring circuit 63 . the structure in fig2 is constituted so that a battery capacity or the like is checked by the cpu 62 of the intelligent battery 52 in a battery pack . however , it is also possible to use a dumb battery not including the cpu 62 instead of the intelligent battery 52 . in this case , it is allowed to constitute a structure in which a current - measuring circuit for measuring charge and discharge currents of the dumb battery and a voltage - measuring circuit for measuring the voltage of the dumb battery are set in the system of the body ( inside of the system ) so as to check dumb - battery states including a battery capacity by the embedded controller 41 . the ac - adapter - power stop circuit 80 has a function for stopping the power supplied from the ac adapter 51 . the computer system 10 serving as a body system is constituted so that power can be supplied to the body circuit side from either of the ac adapter 51 and the intelligent battery 52 serving as a secondary battery having a higher voltage . when the ac adapter 52 is connected , the voltage of the ac adapter 51 is usually higher than that of the intelligent battery 52 . therefore , power is supplied to the body circuit from the ac adapter 51 via the first diode 77 . in this case , when a memory effect occurs in the intelligent battery 52 serving as a secondary battery , the power supply from the connected ac adapter 51 is stopped by the ac - adapter - power stop circuit 80 to realize complete discharge by the intelligent battery 52 . that is , when executing the complete discharge of the intelligent battery 52 serving as a secondary battery , a high signal is supplied from the embedded controller 41 to the ac - adapter - power stop circuit 80 . the first transistor ( tr 1 ) 82 of the ac - adapter - power stop circuit 80 is turned on by receiving the high signal . because the first transistor 82 is turned on , the second transistor ( tr 2 ) 83 is turned off and an fet ( fet 1 ) 81 is turned off . thereby , supply from the ac adapter 51 is stopped , power supply to the first diode 77 is stopped , and power can be supplied to the body circuit from the intelligent battery 52 via the second diode 78 . then , troubleshooting of the battery of this embodiment is described below . in this case , troubleshooting of a battery is executed by displaying an error by an lcd 18 of the system body when the capacity of the battery is smaller than an estimated minimum capacity due to a trouble relating to the cell 61 of the intelligent battery 52 . fig3 is an illustration showing an estimated minimum capacity of a battery used for this embodiment . the estimated minimum capacity shown in fig3 is an estimated minimum capacity when assuming a condition of use of a notebook pc in applying the largest load to the battery . for example , in the case of the notebook pc , because use of the battery to which the above largest load or more is applied cannot be assumed , a trouble of the cell 61 of the intelligent battery 52 is considered when a full charge capacity ( fcc ) at a certain number of cycles is smaller than an estimated minimum capacity . in fig3 , the abscissa denotes the cycle count about charge and discharge and the ordinate denotes the rate (%) of a full charge capacity to a design capacity ( dc ). in the case of counting of the number of cycles ( cycle count ), only charged value is accumulated and when the charged value reaches 100 %, this is regarded as 1 count and the cycle count is increased by 1 . in the case of this embodiment , a table or formula for estimated minimum capacity values is held in the intelligent battery 52 correspondingly to the estimated minimum capacity value shown in fig3 and the values are compared with a full charge capacity . the estimated minimum capacity value or the information for the formula is stored in the cpu 62 when it has a built - in memory such as a one - chip microcomputer but stored in a memory outside of the cpu 62 when it has the memory outside of it . troubleshooting states can be checked by the system by performing the troubleshooting in the battery and communicating the troubleshooting result to the embedded controller 41 at the system in accordance with the sbs protocol . moreover , it is possible to form a configuration so as to provide a table or formula corresponding to the estimated minimum capacity shown in fig3 for the system and check battery states at the system . the configuration of holding the table or formula in the intelligent battery 52 describes above is superior in the fact that it is unnecessary to identify 5 the type or maker of a battery at the system . fig4 ( a ) and 4 ( b ) are illustrations showing assumed patterns to be used which most deteriorate a battery . the estimated minimum capacity shown in fig3 is decided in accordance with the assumed patterns to be used shown in fig4 ( a ) and 4 ( b ). fig4 ( a ) shows the battery capacity to time in a day , in which the ordinate denotes battery capacity (%) and the abscissa denotes time in a day . fig4 ( b ) shows a temperature profile to time in a day , in which the ordinate denotes temperature (° c .) and the abscissa denotes time in a day . the assumed patterns to be used shown in fig4 ( a ) and 4 ( b ) execute reproduction of a dvd for 10 hr in a day in a notebook pc . in 10 hr , a program is executed for approx . 1 . 7 hr ( 101 min ) by the battery ( intelligent battery 52 ) and for 8 . 3 hr by the ac adapter 51 . moreover , it is assumed that the power consumption of the system body is 20 w during dvd reproduction and the dvd is reproduced for 1 . 7 hr by the battery ( intelligent battery 52 ) and then for 8 . 3 hr by connecting the ac adapter 51 . as shown in fig4 ( a ), the capacity of the intelligent battery 52 is decreased from 100 % to 15 % due to the discharge for 101 min through the battery operation . then , by connecting the ac adapter 51 and performing charge for 187 min at 1 a , the capacity reaches 100 % because the dvd is currently reproduced in the system body . as shown in fig4 ( b ), the temperature when executing the above operation temporarily rises from 37 ° c . up to 47 ° c . the estimated minimum capacity shown in fig3 is decided in accordance with the capacity change data and temperature rise data of the intelligent battery 52 when performing the above operation . in the case of an actual operating model by a normal user , it is assumed that the consumption of approx . 10 w is executed for 10 hr , and a program is executed for approx . 3 . 3 hr by the intelligent battery 52 and for 6 . 7 hr by the ac adapter 51 . in this case , a change of capacities is from about 100 % to 75 % and it is expected that the temperature rises from 13 ° c . up to approx . 33 ° c . fig5 ( a ) and 5 ( b ) are illustrations showing troubleshooting of a battery , in which fig5 ( a ) is a flowchart showing the flow of the troubleshooting and fig5 ( b ) is an illustration for assisting the description of fig5 ( a ). first , in the case of the troubleshooting of a battery in this embodiment , the full charge capacity of a battery is obtained by the cpu 62 of the intelligent battery 52 ( step 101 ). how to obtain the full charge capacity will be described later . then , the cpu 62 determines whether the obtained full charge capacity is larger than the estimated minimum capacity shown in fig3 ( step 102 ). when the full charge capacity is not larger than the estimated minimum capacity , the information for “ battery health ” showing how the battery is healthy is displayed in “ red ”, a message showing a message . “ replace the battery .” is displayed ( step 103 ), and the processing is completed . the message is executed by the lcd 18 serving as display means of the system as described later . fig5 ( b ) shows a curve equivalent to the estimated minimum capacity shown in fig3 and it is determined in step 102 whether the curve is upper or lower than the curve showing the estimated minimum capacity . the indication “ red ” in step 103 corresponds to the case in which the curve is lower than the former curve is lower than the curve showing the estimated minimum capacity . in step 102 , when the full charge capacity is larger than the estimated minimum capacity shown in fig3 , it is determined whether the full charge capacity is larger than 50 % of the design capacity ( dc ) ( step 104 ). when the former capacity is not larger than 50 % of the latter capacity , the color of the information for “ battery health ” is changed to “ yellow ”, a message “ replace the battery .” is displayed ( step 105 ), and the processing is completed . it is determined in step 104 whether the full charge battery is larger or lower than the capacity 50 % shown in fig5 ( b ) and the indication in “ yellow ” corresponds to the case in which the full charge capacity is upper than the curve of the estimated minimum capacity shown in fig5 ( b ) and lower than the line of the capacity 50 %. when it is determined in step 104 that the full charge capacity is larger than 50 % of the design capacity ( dc ), the color of the information “ battery health ” is changed to “ green ”, the message “ the battery is normal .” is displayed ( step 106 ), and the processing is completed . the message corresponds to the case in which the full charge capacity is upper than the curve of the estimated minimum capacity shown in fig5 ( b ) and upper than the line of the capacity 50 %. fig6 is an illustration showing an example of displaying battery diagnosis . this example is displayed on the lcd 18 by a utility program executed by the cpu 11 of the system . in this case , a health condition of a battery is displayed intuitively for a user by a color indication 201 and a message for prompting a user to a necessary operation is displayed by a message indication 202 . in the case of the example shown in fig6 , a “ red ” indication showing that a battery trouble is determined is displayed by a color indication 201 and a message “ the battery needs to be replaced .” is displayed . when the full charge capacity of a battery is smaller than a certain specified value ( e . g . 50 % of dc ) though the battery is normal , a message showing that the battery must be replaced soon is displayed with a “ yellow ” indication . moreover , when a battery is normal and the full charge capacity of the battery is large enough , a message showing that it is unnecessary to replace the battery is displayed with a “ green ” indication . moreover , in the case of the example shown in fig6 , specific values are displayed as a full charge capacity , a design capacity , and the cycle count . moreover , in the case of this embodiment , a predetermined date indication 203 is displayed . in the case of the date indication 203 shown in fig6 , the date “ first used date ” on which a user first used the intelligent battery 52 and the latest date “ last refresh operation ” on which refresh was first executed . the intelligent battery 52 stores the date on which a user first used the intelligent battery 52 and the system ( embedded controller 41 ) can read the date according to necessity . the read date is displayed as the date indication 203 shown in fig6 and moreover , it is possible to use the read date to detect whether a battery is kept in the guarantee period by the system and communicate the information to a user . moreover , it is possible to form a configuration so as to store the date information in a predetermined memory of the system . in this case , it is preferable that date information is stored together with battery identification information . fig7 is an illustration showing another indication example of battery diagnosis . in the case of the example shown in fig7 , necessary data content is displayed for each item . in this case , the value of a full charge capacity is displayed by red characters for an abnormal state ( error , trouble , or failure ) of the cell 61 , by green characters when the cell 61 is normal , and by yellow characters when the cell 61 must be replace soon . by displaying the value by various colors , it is possible to make a user intuitively recognize a state of a battery . then , how to obtain a full charge capacity is described below . a full charge capacity showing the “ current total capacity of a battery ” is a value different from a design capacity showing the “ total capacity of a batter in the initial state ”. therefore , it is necessary to regularly perform update ( leaning ). in general , a full charge capacity is updated when a battery is completely discharged until the capacity of the battery becomes up to approx . 0 % ( e . g . 3 %). this embodiment is constituted so that a full charge capacity can be automatically corrected even if a battery is not completely discharged . that is , this embodiment has an automatic update function for a full charge capacity by adding the processing for cycle deterioration and the processing for storage deterioration in addition to capacity leaning due to complete discharge . in this case , the processing for cycle deterioration is first described . fig8 is a flowchart showing the processing for correcting cycle deterioration . in the case of the cpu 62 of the intelligent battery 52 , the charged value stored in the intelligent battery 52 is first initialized and the cycle counter for the charged value is initialized ( step 111 ). thereafter , it is determined whether charge is performed ( step 112 ). when charge is not performed , charge is waited . when charge is performed , a charged value is accumulated ( step 113 ). then , it is determined whether the total accumulated charged value reaches a full charge capacity ( whether the total charged value is equal to or more than fcc ) ( step 114 ). when the accumulated charged value does not reach the full charge capacity , step 112 is restarted . when the accumulated charged value reaches the full charge capacity ( 100 % charged value ), the cycle count is increased by 1 ( step 115 ) and the expression “ full charge capacity - design capacity × 0 . 5 / 500 ” is introduced as a new full charge capacity ( step 116 ) and step 111 is restarted . the expression in step 116 represent that capacity deterioration of approx . 50 % in terms of a battery capacity occurs when charge and discharge are repeated 500 times under predetermined temperature environments ( e . g . 25 ° c . environment and 45 ° c . environment ). for the above mentioned , it is clarified in accordance with the measurement by the present inventor et al . that capacity deterioration increases almost proportionally to the cycle count but hardly depends on environmental temperature . from the result , it is found that a capacity to be deteriorated every cycle is based on the following expression . thus , in the case of the processing for correcting cycle deterioration in this embodiment , the cycle count is performed by accumulating only a charged value , regarding 100 % charged value as 1 count , increasing the cycle count by 1 , and subtracting the deterioration capacity obtained from the above expression from a full charge capacity . fig9 is an illustration showing storage deterioration characteristics of a lithium - ion battery . in this case , the abscissa denotes a storage time ( month ) and the ordinate denotes deterioration degree (%). in this case , six types of data values from 0 to 100 % are shown every 20 % as capacities . as shown in fig9 , it is understood that storage deterioration degrees of batteries depend on remaining capacities of the batteries . actually , the storage - deterioration - characteristic diagram shown in fig9 is prepared for each environmental temperature . as understood from fig9 , it is possible to almost fix the deterioration value for each unit time when a temperature and a remaining capacity are decided . fig1 is a flowchart showing the processing for correcting storage deterioration . in the cpu 62 of the intelligent battery 52 , a storage - deterioration counter is first initialized ( step 121 ). then , it is determined whether one hour passes as unit time ( step 122 ). then , a battery capacity is obtained in accordance with charge and discharge currents from the current - measuring circuit 63 and an output voltage from the voltage - measuring circuit 70 ( step 123 ) and a battery temperature is obtained from the temperature - measuring circuit 90 ( step 124 ). by using the obtained battery capacity and battery temperature , a storage - deterioration value is obtained from the storage - deterioration table in fig9 showing storage deterioration characteristics by numerical values ( step 125 ). when the storage deterioration value is obtained , the cpu 62 updates the storage - deterioration counter ( step 126 ). thereafter , it is determined whether the cycle count is increased ( step 127 ). when the cycle count is not increased , step 122 is restarted . when the cycle count is increased , the processing is completed by using a value obtained by subtracting a storage deterioration value from the current full charge capacity as a new full charge capacity ( step 128 ) and step 121 is restarted . that is , the storage deterioration value is accumulated and then subtracted when the cycle count increases by 1 . moreover , it is also possible to form a configuration so as to obtain a storage deterioration value in accordance with predetermined timing from a certain point of time instead of determining whether the cycle count is increased in step 127 . then , the processing for updating a full charge capacity in accordance with capacity learning based on complete discharge is described below . fig1 is an illustration showing a flowchart for updating a full charge capacity in accordance with capacity learning . first , it is determined whether 100 % charge is performed ( step 131 ). waiting is performed when 100 % charge is not performed but a discharged value is initialized when 100 % charge is performed ( step 132 ). then , it is determined whether discharge is performed ( step 133 ). when discharge is performed , step 135 is restarted . when discharge is not performed , it is determined whether charge is performed ( step 134 ). when charge is performed , step 131 is restarted to determine whether 100 % charge is performed . when charge is not performed , step 135 is restarted . in step 135 , a discharged value is accumulated and it is determined whether a capacity decreases to 0 % in accordance with an accumulated discharged value . in the case of the above determination , it is not always determined whether the capacity completely decreases to 0 % but by assuming approx . 0 % ( e . g . 3 %), it is determined whether the state can be regarded as complete discharge in accordance with the action and effect of the value of approx . 0 %. when a capacity is 0 % in step 136 , step 133 is restarted . when the capacity is 0 %, the accumulated charged value calculated in step 135 is assumed as a full charge capacity ( step 137 ) and step 131 is restarted . thus , this embodiment is constituted so as to apply the correction of cycle deterioration described by referring to fig8 and the correction due to storage deterioration described by referring to fig9 and 10 to a full charge capacity in addition to the update due to execution of complete discharge described for fig1 and update the full charge capacity whenever the cycle count increases . as a result , even if complete discharge is not executed , the intelligent battery 52 can always hold a high - accuracy full charge capacity value and it is possible to troubleshoot the intelligent battery 52 in accordance with the full charge capacity value . as described above , according to this embodiment , it is possible to display an error when the capacity of a battery ( intelligent battery 52 ) is smaller than an estimated minimum capacity due to a trouble of the cell 61 of the battery . that is , an estimated minimum capacity when assuming the operation of a battery bearing the maximum load is previously decided to display an error depending on whether the battery capacity is smaller than the estimated minimum capacity . according to this configuration , when a user feels that the operating time of a battery is shortened , it is possible to determine whether the battery has a trouble or the battery is kept in its guarantee period . moreover , when the error is displayed and the user communicates that the error is displayed to , for example , a help center , a new battery for replacement is sent to the user from the help center free of charge when the old battery is kept in its guarantee period . by providing a function for storing the date on which a battery is first used for the battery , it is possible to determine a trouble of the battery in or out of its guarantee period . therefore , the help center can determine whether to replace the battery having the trouble with a new one free of charge in accordance with correct determination on the contract . as described above , the present invention makes it possible to accurately determine whether a battery has a trouble by an unit provided with a battery for supplying power to the body while repeating charge and discharge .