text: before describing in detail the particular method and apparatus for forming field emission elements according to the present invention , it should be observed that the present invention resides primarily in a novel and non - obvious combination of elements and process steps . so as not to obscure the disclosure with details that will be readily apparent to those skilled in the art , certain conventional elements and steps have been presented with lesser detail , while the drawings and the specification describe other elements and steps pertinent to understanding the invention in greater detail . a method for forming emission elements 10 according to the present invention begins as illustrated in fig2 , wherein a substrate 50 comprises a heavily - doped single crystalline silicon layer 52 , having an upper surface 53 , and an overlying silicon nitride layer 54 . typically , the doping density of the silicon layer 52 produces a sheet resistance of at least 10 - 30 ohms square or a doping density as required to impart sufficient conductivity to the silicon layer 53 , according to a field emission display into which the silicon layer 53 is incorporated . a photoresist layer is deposited overlying the silicon nitride layer 54 and patterned according to known techniques to form a patterned photoresist layer 56 . the pattern in the photoresist layer 56 is determined by a desired pattern for the field emission elements 10 . using the pattern of the photoresist layer 56 , the underlying silicon nitride layer 54 is etched according to known techniques ( for example , using a cf 4 chemistry ) to form silicon nitride regions 54 a ( see fig3 a ) that during a subsequent etch process ( using a different etch chemistry from the silicon nitride etch chemistry ) prevent formation of the field emission elements 10 in regions of the silicon layer 52 immediately below the silicon nitride regions 54 a . thus fig3 a is a cross - sectional view after formation of the silicon nitride regions 54 a , removal of the photoresist layer 56 by plasma etching or by other techniques known in the art and etching of the substrate 52 to form the emission elements 10 . in another embodiment , the silicon nitride regions 54 a may be of a different size than illustrated or may be absent . according to the present invention , the emission elements 10 are formed in the silicon layer 52 using a plasma etch process without the use of a photolithographic mask , thus reducing emission element fabrication costs . in addition , the present invention provides higher density and higher aspect ratio emission elements than the prior art techniques , resulting in better element uniformity and a brighter display image . during the plasma etch process , oxygen ( o 2 ) and sulfur hexafluoride ( sf 6 ) are supplied to the etching chamber in a ratio of oxygen to sulfur hexafluoride of about 1 . 5 : 1 . preferred flow rates are about 30 sccm for the oxygen and about 20 sccm for the sulfur hexafluoride . hydrogen bromine ( hbr ) is also supplied to the etch chamber at a flow rate of about 50 sccm . in another embodiment , a chlorine - based compound ( or other compounds including an element from column viia of the periodic table ) can be used in lieu of the hydrogen bromine and / or the sulfur hexafluoride . during the etch process , a chamber pressure is maintained at about 30 mtorr . a radio frequency current generating about 60 w of power biases the substrate 50 . a radio frequency source supplies about 1500 w to the plasma - forming electrode in the chamber . the stated etch parameters are merely exemplary . those skilled in the art recognize that variations of up to at least 20 % from the stated parameters may produce desired results , i . e ., formation of the emission elements 10 . further , the etch parameters may vary due to the design of the etching tool and the conditions of the chamber . during the etch process , oxygen radicals combine with silicon on the upper surface 53 to form silicon dioxide regions 55 , also referred to as micro - masks . these silicon dioxide regions 55 are not easily etched due to the material selective nature of the etchants employed , i . e ., a higher etch selectivity to silicon than to silicon dioxide . thus the emission elements 10 are formed as regions of the silicon layer 52 adjacent the silicon dioxide regions 55 are etched , while silicon regions masked by the silicon dioxide regions 55 remain substantially intact ( i . e ., are etched at a much slower rate ). this phenomenon of forming the silicon dioxide regions 55 and etching regions of the silicon layer 52 that are not masked by the silicon dioxide regions 55 is referred to as micro - masking . the process occurs when the etch chemistry is such that both etching ( of the silicon ) and deposition ( of silicon dioxide to form the silicon dioxide micro - masks ) occur simultaneously at a ratio of the rate of deposition to the rate of etching determined by the reactants employed during the process . both the sf6 gas and the hbr gas , in an embodiment in which it is present , participate in the silicon etching process . the sf6 etches faster but is less selective to the silicon dioxide and more isotropic ( i . e ., the resulting etch profile lacks the perpendicularity of a substantially anisotropic etch ). the combination of the fluorine and the silicon form volatile sf4 that is removed from the etch chamber . the hbr gas is more selective to the silicon dioxide and etches very anisotropically , because the bromine is less reactive than fluorine and requires a greater ion bombardment energy to form volatile sibr4 . the ratio of sf6 to hbr determines the degree of selectivity to the silicon dioxide and the anisotropic features of the resulting etch . some of the oxygen ions and radicals combine with the silicon to form the silicon dioxide regions 55 , since silicon dioxide is not a volatile material . the ions and radicals that etch the substrate 50 are derived from both the sf6 and the hbr ( in an embodiment where it is present ). the ions strike the surface of the silicon layer 52 substantially normally or anisotropically because they are attracted by the negative potential applied to the substrate 50 . further , since the ions strike the surface at about 90 degrees to the surface , they tend to drive the etch process vertically , rather than laterally , resulting in a predominantly vertical etch process , creating the emission elements 10 with a higher density than the prior art processes . the free radicals , which carry no charge , strike the silicon layer 52 from substantially all directions because they are not attracted to the substrate 50 . instead the motion of the radicals is influenced by collisions with other atoms in the chamber and therefore is essentially random in all directions . as the ions impinge the exposed silicon surface , they tend to accelerate the etch process that was begun by the radicals in the first several monolayers of the silicon layer 52 . as the etching process begins , the upper surface 53 of the silicon layer 52 comprises a relatively flat surface . as the silicon dioxide regions 55 are formed , the etch process removes material adjacent the silicon dioxide regions 55 , forming substantially rectangular vertical structures 10 a as illustrated in the close - up view of fig3 b . as the etch process continues , enhanced ion bombardment at corners 10 b of the rectangular vertical structures 10 a , due to a larger electric field at corners than on flat surfaces , forms generally convergent emission elements 10 , e . g ., conical or pointed emission elements . formation of a polymer material on sidewalls 10 c of the region 10 a can also contribute to formation of the convergent tips of the emission elements 10 , as the polymer masks the side surfaces 10 c from the bombarding ions and radicals . following formation of the emission elements 10 , the silicon dioxide regions 55 are removed by selective isotropic etching . beginning in fig4 and continuing through fig1 , the substrate 50 undergoes a series of processing steps to form electrically conductive paths to the emission elements 10 , through which current is supplied to cause the emission of electrons . as illustrated in fig4 , a layer of silicon dioxide 60 is deposited by a high - density plasma or conformal chemical vapor deposition technique . plasma deposition is preferred due to its excellent gap filling results . a chemical / mechanical polishing step ( cmp ) is performed to planarize an upper surface 64 of the substrate 50 . see fig5 . as illustrated in fig6 , a silicon dioxide layer 66 is formed overlying the upper surface 64 . a photoresist layer 70 is formed overlying the silicon dioxide layer 66 and patterned to form an opening 72 therein . a corresponding opening is etched in the silicon dioxide layer 66 and the silicon nitride region 54 a , after which the photoresist layer 70 is removed . as illustrated in fig7 , a conductive plug 76 ( for example , comprising tungsten ) and a barrier layer 78 ( for example , comprising titanium or titanium nitride ) are formed according to known techniques in the opening in the silicon dioxide layer 66 and the silicon nitride region 54 a . the conductive plug 76 provides an electrical connection to the emission elements 10 through the highly doped silicon layer 52 . in one embodiment , a plurality of electrically insulated emission element arrays are formed in the silicon layer 52 , wherein each element array is associated with a display sub - pixel . such arrays can be formed by fabricating insulating regions , such as trench isolation regions , in the silicon layer 52 . a tungsten plug , such as the conductive plug 76 , is formed in electrical contact with each array to independently control the emission of electrons from that array . thus selected arrays can be energized to emit electrons while others remain inactive , thereby producing images on the display . fig8 depicts in stacked relation overlying the silicon dioxide layer 66 , a barrier layer 80 , an aluminum layer 82 and a photoresist layer 84 , the latter patterned to form an opening 88 therein . the barrier layer 80 typically comprises a bilayer further comprising a titanium layer and a titanium - nitride layer to avoid migration of the aluminum into the silicon dioxide . using the opening 88 as a pattern , an opening 89 is formed in the aluminum layer 82 , using a chlorine - based etch chemistry , for example . through the opening 89 , an opening 90 is formed in the material layer 80 and the silicon dioxide layer 66 . as can be seen in fig9 , the opening 90 exposes the emission element 10 a . the opening 90 is preferably formed using a dry cold fluorine - based isotropic etch to remove material from an upper region of the silicon dioxide layer 66 , stopping prior to reaching material of the silicon layer 52 , such as the emission element 10 . a subsequent silicon - selective dry anisotropic etch removes additional material of the silicon dioxide layer 66 . the described etch is known as a champagne glass etch , which is isotropic in the first step and non - selective to silicon . in the second step the etch is anisotropic and selective to silicon , otherwise the field emission elements would be eroded . during both etch steps the silicon dioxide is etched , while removal of underlying silicon in the silicon layer 52 and the emission elements 10 is minimized . after formation of the opening 90 the photoresist layer 84 is removed . note that a plurality of emission elements 10 are formed within each opening 90 , although only a single emission element 10 is illustrated in fig9 , which differentiates the present invention from the prior art techniques for forming emission elements . fig1 illustrates a top view of a region of the substrate 50 depicting a plurality of emission elements 10 within each of a plurality of openings 89 / 90 . a plurality of openings 89 / 90 ( and the emission elements disposed therein ) form an array element , with each such element providing electrons for a color pixel of the display . thus a brighter image with a more uniform electron distribution and a more reliable display is provided according to the teachings of the present invention . a physical deposition process ( according to one embodiment ) deposits a material layer 96 over the tip 10 a through the opening 90 , and deposits a conductive layer 98 over the aluminum layer 82 . see fig1 . a material of the material layer 96 exhibits a low work function for electron emissions such that electrons are emitted from the material layer 96 at relatively low voltages . in one embodiment , the material layer 96 extends to a surface 100 formed in the silicon dioxide layer 60 . in one embodiment the material layer 96 provides a continuous coating over the emission elements 10 ; in another embodiment only the tips 10 a are covered by the material layer 96 . in yet another embodiment , both the material layer 96 and the conductive layer 98 are absent and electors are emitted from the emission elements 10 through the silicon layer 52 . as shown in fig1 , a photoresist layer 106 is deposited overlying the substrate 50 and patterned to form an opening 108 therein . as illustrated in fig1 , the conductive layer 98 and the aluminum layer 82 are patterned according to the opening 108 , forming an opening 111 therein that isolates the conductive plug 76 and a region 82 a of the aluminum layer 82 from regions 82 b of the aluminum layer 82 . the regions 82 b ( which are connected in a third dimension not illustrated in fig1 ) function as the gate electrode 16 , i . e ., one terminal of the voltage source v g is connected to the regions 82 b . the other terminal of the voltage source v g is connected to the silicon layer 52 and thus to the emission tip 10 a through the region 82 a and the conductive plug 76 . electrons are emitted from the emissive material layer 96 in response to the applied voltage v g . the sharp point of each silicon emission tip 10 a creates an electric field that facilitates electron emission from the material layer 96 toward an anode 99 . in another embodiment , the material layer 96 is absent and the electrons are emitted directly from emitter elements 10 formed in the silicon layer 52 toward the anode 99 . exemplary materials suitable for use as an emissive material include diamonds , ( either chemical vapor deposited , natural diamond grits or synthetic diamonds , doped or undoped ) graphite , metals such as molybdenum , tungsten or cesium , compounds such as lab6 , yb6 , ain or combinations of these materials , and other low work function materials . a top view of the completed structure is illustrated in fig1 , including grid conductors 113 and emission element conductors 115 for supplying the voltage v g between the gate electrode 16 and the emission elements 10 . a controller , not shown , controls application of the voltage v g to certain of the emission element conductors 115 for causing emission elements 10 associated with those conductors to emit an electron flux . a red sub - pixel array 120 comprises a plurality of emission elements 10 that when energized emit electrons that strike a red sub - pixel for producing a red color on the phosphor screen 25 . similarly , electrons emitted from a blue sub - pixel array 122 , comprising a plurality of emission elements 10 , impinge a blue sub - pixel to produce a blue color and electrons emitted from a green sub - pixel array 124 , comprising a plurality of emission elements 10 , impinge a green sub - pixel to produce a green color . as illustrated in fig1 , each pixel array 120 , 122 and 124 comprises an array of openings 89 / 90 , and each opening comprises a plurality of emission elements 10 , although only one emission element 10 is depicted in each opening 89 / 90 for clarity . an architecture and process have been described as useful for forming field emission elements in a semiconductor substrate . specific applications and exemplary embodiments of the invention have been illustrated and discussed , which provide a basis for practicing the invention in a variety of ways and in a variety of circuit structures . numerous variations are possible within the scope of the invention . features and elements associated with one or more of the described embodiments are not to be construed as required elements for all embodiments . the invention is limited only by the claims that follow .