Programming, Fpga, Microprocessor.
that for inputs Rd=FF / Rr=FF, the ADD operation generates the result Rd=FE and sets status bits H,S,N,C. A bit later, ADC adds Rd=00 / Rr=00, carry input 0, and gets result Rd=00 and only the Z status bit set (result is ZERO). And so on. The reference file is available in compressed form in