Fpga, Elections, Engineering, Digital Signal Processing, Ece.
if(reset == 1'b0 || m_axis_fir_tready == 1'b0 || s_axis_fir_tvalid == 1'b0) begin s_axis_fir_tready <= 1'b0; m_axis_fir_tvalid <= 1'b0; enable_buff <= 1'b0; end else begin s_axis_fir_tready <= 1'b1; m_axis_fir_tvalid <= 1'b1; enable_buff <= 1'b1; end end /* Circular buffer bring in a serial input