Verilog, Uart, Protocol, Electroni, Fpga.
4'd3, DATA3 = 4'd4, DATA4 = 4'd5, DATA5 = 4'd6, DATA6 = 4'd7, DATA7 = 4'd8; STOP = 4'd9; We need two registers to keep track of what’s happening. One for how many ticks (counter) and one for the current state (state). reg [4:0] counter; reg [2:0] state; Now to the implementation of the logic. Once