Programming, Vhdl, Fpga, Cpu.
a few branch instructions: .org 0 rjmp dest1 ; PC <- PC+k+1 dest2: sbrs r0, 0 ; PC <- PC+2 /+3 ... nasty! dest3: rjmp dest3 ; PC <- PC+k+1 dest4: rjmp dest4 ; PC <- PC+k+1 -- Program should end here dest1: ijmp ; PC <- Z (=dest2) The CPU will start processing the first instruction, rjmp dest1,