Vhdl, Digital Electronics.
ai 4bit input and x 3bit input: GENERIC (n1: positive:= 4; -- 4 bit input n2: positive:= 3; -- 3 bit input n3: positive:= 3; n4: positive:= 16); -- 16 bit output . . . ELSIF (res = '0') THEN reg1 <= x * (ai + reg1(n3-4 downto 0)); Waveform analysis Verify operation: From the figure: a3 = 0000 (0),