Fpga, Accelerated Computing, High Level Synthesis, Hpc.
h_2; let k2: state = st_scale(h, f(k2_y, k2_x)); let next_y = st_add(current_y, st_scale(1.0/6.0, st_add(k1, k2))); current_y := next_y; ys[i] := next_y; } } } Interface In the top interface we accept the initial state, N and dt. ys is a list of the output states. decl init_int: float[3]; decl