Computers, Hardware, Computer Science, Cpu, Electronics.
(Part 1) Back in 2019, I built a MIPS single-cycle processor in Verilog, extended it into a pipeline, and ran it on an FPGA. Here, I will be going through the things I did to make a single-cycle MIPS processor in Verilog HDL, perform tests on Intel Quartus Prime’s Modelsim, and implement a BNE