Programming, Vhdl, Fpga, Cpu.
a comparison of the maximum clock rates (with default ISE synthesis and implementation options): Spartan 3 (XC3S200): 164 MHz @ -4, 189 MHz @ -5 Virtex 6: 628 MHz @ -3 Zync (XC7Z020): 642 MHz @ -3 Program Memory To store the instructions, I’ve created a simple memory module which is read-only and